Switching control circuit and charge-discharge circuit

Abstract

The application discloses a switching control circuit and a charging and discharging circuit, relates to the technical field of power supplies, and comprises a sampling circuit, a detection circuit and a control module. When AC power is cut off, the control module first turns off first and second switch tubes, and only after the detection circuit determines that the absolute value of the current of the sampling circuit is close to 0 (corresponding to the attenuation of the inductance current to a safe range), the control module controls the charging and discharging circuit to enter a discharging mode, thereby completely avoiding the voltage drop of the bus caused by the inductance current drawn from the bus, and ensuring that the buffered data is safely written into a hard disk.

Description

Technical Field

[0001] This application relates to the field of power supply technology, and in particular to a switching control circuit and a charging and discharging circuit. Background Technology

[0002] Bidirectional buck-boost circuits are commonly used in storage servers, primarily to control the charging and discharging of battery modules. The core function of the battery modules is to provide temporary backup power to the storage server system during AC power outages, ensuring the system can write cached data to the hard drive and thus preventing data loss. In this application scenario, the bidirectional buck-boost circuit has two conventional operating modes: 1. Charging mode: the bus charges the battery; 2. Discharging mode: the battery discharges to the bus.

[0003] However, AC power outages are unpredictable, and scenarios may occur where "AC power suddenly fails while the battery module is charging." In such cases, the system needs the battery module to immediately switch from charging mode to discharging mode to prevent a sudden drop in server bus voltage. However, at the moment of mode switching, the direction of inductor current remains unchanged. If the circuit is directly switched to boost mode, the bus voltage will drop further, resulting in a significant voltage sag and affecting the stable operation of the system. Summary of the Invention

[0004] This application provides a switching control circuit and a charging / discharging circuit to at least solve the problem of how to control a bidirectional buck-boost converter to switch modes in the related art.

[0005] This application provides a switching control circuit applied to a bidirectional buck-boost converter. The bidirectional buck-boost converter includes a first switch, a second switch, and an inductor. The first terminal of the first switch is connected to a bus, and the second terminal of the first switch is also connected to a battery through the inductor. The second switch is connected in reverse parallel with a diode. The switching control circuit includes a sampling circuit, a detection circuit, and a control module. The first terminal of the sampling circuit is connected to the second terminal of the second switch, and the second terminal of the sampling circuit is grounded. The first terminal of the detection circuit is connected to the first terminal of the sampling circuit, the second terminal of the detection circuit is connected to the second terminal of the sampling circuit, and the third terminal of the detection circuit is connected to the control module. The detection circuit outputs a first-level signal when the absolute value of the current in the sampling circuit is detected to be 0 during mode switching. The control module is connected to the control terminals of the first switch and the second switch. The control module controls the first switch and the second switch to turn off when it receives a discharge control command, and controls the first switch and the second switch to enter the discharge mode when it receives the first-level signal.

[0006] This application provides a charging and discharging circuit, including: the above-mentioned switching control circuit and bidirectional buck-boost converter.

[0007] This application provides a switching control method applied to the above-mentioned switching control circuit. The method includes: when the control module receives a discharge control command, controlling the first switch and the second switch to turn off; when the detection circuit detects that the voltages at both ends of the sampling circuit are equal, outputting a first level signal; and the control module controlling the first switch and the second switch to enter the discharge mode.

[0008] With this application, when AC power fails, the control module first turns off the first and second switching transistors. Only after the detection circuit determines that the absolute value of the sampling circuit current is close to 0 (corresponding to the inductor current decaying to a safe range) will the control module enter the discharge mode. This completely avoids the bus voltage drop caused by the inductor drawing current from the bus, ensuring that cached data is safely written to the hard drive.

[0009] Through this application, the sampling circuit stably acquires current signals, the detection circuit accurately determines the current state, and the control module responds promptly. The cooperation of these three components reduces the false judgment rate of mode switching, avoids the problems of "switching before reaching the safe current" or "delayed switching", and ensures the stable operation of the bidirectional buck-boost circuit.

[0010] This application integrates switching control and bidirectional buck-boost functions into the charging and discharging circuit, eliminating the need for separate charging and discharging circuits and simplifying the architecture. The sampling circuit uses a low-resistance design to reduce losses and improve energy conversion efficiency, thus meeting the energy consumption requirements of storage servers.

[0011] This application employs a rigorous switching control process (receiving a command to turn off the transistor → detecting the current → triggering discharge), with intuitive detection indicators (sampling circuit current / voltage status). It requires no complex hardware or software, has a fast response speed, and can quickly meet the emergency backup power needs of AC power outages. At the same time, it utilizes the second switching transistor's diode to accelerate current decay and shorten backup power delay. Attached Figure Description

[0012] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 A detailed circuit diagram of the bidirectional buck-boost converter provided in the embodiments of this application;

[0014] Figure 2 This is a schematic diagram of a switching control circuit provided in an embodiment of this application;

[0015] Figure 3 The specific circuit structure diagram of the switching control circuit provided in this application embodiment is shown.

[0016] Figure 4 Another configuration diagram of the switching control circuit provided in the embodiments of this application;

[0017] Figure 5 A flowchart of the switching control method provided in the embodiments of this application. Detailed Implementation

[0018] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0019] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0020] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] refer to Figure 1 Generally, the bus voltage (Vbus) of a storage server is 12V. The voltage of the battery module depends on the cell structure. For example, the standard voltage of a battery module composed of two lithium batteries connected in series is 7.2V. During charging, the current flows from the 12V bus to the battery module, and the circuit operates in buck mode. During discharging, the current flows from the battery module to the 12V bus, and the circuit operates in boost mode.

[0022] Because AC power outages are unpredictable, the battery may be charging before the AC power failure. A sudden AC power outage requires the battery module to immediately switch to discharge mode to prevent a sudden drop in system bus voltage. However, at the moment of switching, the inductor current flows from SW to the battery. If the system directly switches to boost mode at this time, the switching transistor (Q1) will draw current from the filter capacitor on the 12V bus, causing the bus voltage Vbus to drop further and resulting in a significant voltage sag. Therefore, a control method is needed to avoid this problem.

[0023] Embodiments of this application provide a switching control circuit, which is applied to a bidirectional buck-boost converter, such as... Figure 1 As shown, the bidirectional buck-boost converter includes: a first switch Q1, a second switch Q2, and an inductor L1. The first terminal of the first switch Q1 is connected to the bus, and the second terminal of the first switch Q1 is also connected to the battery through the inductor. The second switch Q2 is connected in reverse parallel with a body diode, such as... Figure 2 As shown, the switching control circuit includes: sampling circuit 1, detection circuit 2, and control module 3.

[0024] like Figure 2 As shown, the first terminal of sampling circuit 1 is connected to the second terminal of the second switching transistor Q2, and the second terminal of sampling circuit 1 is grounded.

[0025] like Figure 3 As shown, the core of sampling circuit 1 is the milliohm-level first resistor R1. The purpose of choosing this resistance value is to minimize the power loss of the circuit and avoid the sampling stage from having a significant impact on the overall efficiency of the converter. Its connection relationship is strictly limited to: the first terminal of sampling circuit 1 is directly connected to the second terminal of the second switch Q2, and the second terminal of sampling circuit 1 is directly grounded (GND), forming a sampling branch of "Q2-R1-GND".

[0026] The working principle and function of the sampling circuit 1 are as follows: When the first switch Q1 is turned on and the second switch Q2 is turned off, the current of the inductor only flows through Q1, and no current flows through the first resistor R1; when the first switch Q1 is turned off and the second switch Q2 is turned on, the current of the inductor will flow through Q2 and all of it will flow through the first resistor R1. At this time, the magnitude of the current in the first resistor R1 is exactly equal to the magnitude of the current in the inductor. That is, the sampling circuit 1 indirectly achieves accurate sampling of the inductor current by collecting the current of Q2, providing the original signal for subsequent detection of the current direction and magnitude.

[0027] like Figure 2 As shown, the first end of the detection circuit 2 is connected to the first end of the sampling circuit 1, the second end of the detection circuit 2 is connected to the second end of the sampling circuit 1, and the third end of the detection circuit 2 is connected to the control module 3. The detection circuit 2 is used to output a first level signal when the absolute value of the current of the sampling circuit 1 is detected to be 0 during the mode switching process.

[0028] Specifically, since the core of sampling circuit 1 is a low-resistance device designed to reduce power loss, its output current-related signal often has weak amplitude and is easily affected by interference. Furthermore, the current direction changes with the converter's operating mode (negative during charging and positive during discharging). Direct judgment in this case can easily lead to signal distortion or misjudgment. Therefore, detection circuit 2 first performs signal conditioning on the raw signal, including enhancing the signal amplitude to improve discernibility, filtering circuit noise to reduce interference, and balancing the signal reference to adapt to the detection requirements of current in different directions. Through built-in signal processing logic, it ensures that the current can be accurately captured regardless of whether it is positive or negative, without signal saturation or loss.

[0029] Specifically, detection circuit 2 uses "the absolute value of the current in sampling circuit 1 approaching 0" as its core judgment target. This target setting directly matches the switching requirements of the bidirectional buck-boost converter: only when the absolute value of the current in sampling circuit 1 approaches 0 does it mean that the inductor current has decayed to a safe range, and only then will switching to discharge mode not cause the inductor to draw current from the bus. To achieve this accurate judgment, detection circuit 2 internally presets a judgment threshold corresponding to "the absolute value of the current approaching 0". The setting of this threshold fully considers the bus voltage characteristics of the storage server, the voltage characteristics of the battery module, and the current decay law of the inductor, ensuring that the threshold is neither too high, causing switching delay (affecting the timeliness of backup power), nor too low, causing misjudgment (causing voltage drop). When detection circuit 2 confirms through signal processing that the absolute value of the current in sampling circuit 1 has reached the threshold, it will immediately generate and output a first-level signal; if the threshold is not reached, it will continue to monitor and maintain the original output state to avoid the control module 3 from erroneously triggering the switching.

[0030] Throughout the entire mode switching process, detection circuit 2 remains in a dynamic monitoring state: from the moment control module 3 receives the discharge control command and shuts down the first switch Q1 and the second switch Q2, detection circuit 2 tracks the current changes of sampling circuit 1 in real time, continuously comparing the conditioned signal with a preset threshold; once the absolute value of the current approaches 0 and outputs a first-level signal, the core task of the current stage is completed, and control module 3 subsequently initiates the discharge mode switching based on this signal. Throughout the process, the response speed and judgment accuracy of detection circuit 2 directly determine the smoothness and safety of mode switching, and are crucial for ensuring the stable operation of the bidirectional buck-boost converter.

[0031] like Figure 2 As shown, the control module 3 is connected to the control terminal of the first switch Q1 and the control terminal of the second switch Q2. When the control module 3 receives a discharge control command, it controls the first switch Q1 and the second switch Q2 to turn off, and when it receives a first level signal, it controls the first switch Q1 and the second switch Q2 to enter the discharge mode.

[0032] Specifically, the core function of control module 3 is to receive external control commands (discharge control commands) and level signals from detection circuit 2, and to control the on / off state of the first switch Q1 and the second switch Q2 by outputting drive signals, thereby completing mode switching. The connection relationship is as follows: the PWM (Pulse Width Modulation) output terminal of control module 3 is connected to the control terminals of the first switch Q1 and the second switch Q2; simultaneously, the GPIO port of control module 3 is connected to the output terminal of detection circuit 2 to receive the first level signal.

[0033] The specific workflow and control logic of control module 3 are as follows:

[0034] Response to the discharge control command: When an AC power failure occurs, the storage server system sends a "discharge control command" (i.e., a discharge enable signal) to the control module 3, informing it that it needs to switch from charging mode to discharging mode. At this time, the control module 3 immediately controls the two complementary PWM signals output by its internal PWM module to maintain a low level. This low-level signal generates two low-level drive voltages Q1_GATE and Q2_GATE, which act on the gates of Q1 and Q2 respectively, causing the first switch Q1 and the second switch Q2 to turn off simultaneously.

[0035] Inductor current monitoring and discharge mode activation: After both Q1 and Q2 are turned off, the inductor current will freewheel through the body diode connected in reverse parallel to the second switch Q2 (current path is "L1-Q2 body diode-R1-GND"). Since the forward voltage drop VF (0.6V) of the body diode is connected in series with the battery voltage VBAT, a reverse electromotive force will be formed, accelerating the decay rate of the inductor current. During this process, the control module 3 continuously monitors the output level of the detection circuit 2 through the GPIO port; when the control module 3 receives the first level signal (high level) sent by the detection circuit 2, it can determine that the absolute value of the current of the first resistor R1 is close to 0, which means that the inductor current has decayed to a safe value.

[0036] Discharge mode switching control: After receiving the first level signal, control module 3 immediately controls the internal PWM module to output complementary PWM drive signals (PWM1, PWM2). These signals generate complementary high / low level drive voltages Q1_GATE and Q2_GATE, driving the first switch Q1 and the second switch Q2 to alternately turn on / off, enabling the bidirectional buck-boost converter to officially enter the boost mode (discharge mode). At this time, the battery voltage is boosted by the inductor and then discharged to the 12V bus through Q1. Since the inductor current is close to 0, the problem of "inductor drawing current from the bus causing Vbus voltage drop" will not occur when Q1 is turned on, ensuring the stability of the server bus voltage and enabling safe writing of cached data.

[0037] In some optional implementations, the detection circuit 2 is the core signal processing unit for the bidirectional buck-boost circuit to achieve safe switching between charging and discharging modes. Its core function is to accurately process and determine the raw current-related signal output by the sampling circuit 1, converting the weak, easily interfered, and potentially variable raw signal into a level signal recognizable by the control module 3. This provides an accurate "current close to 0" determination basis for mode switching, fundamentally solving the technical problem of "inductor current drawdown causing bus voltage drop during charging-to-discharging transitions," and ensuring bus voltage stability under AC power failure scenarios for the storage server. Specifically, the detection circuit 2 is composed of a differential amplifier circuit and a comparator circuit working together. Their connection relationship and functional logic are closely matched, forming a complete signal processing link, such as... Figure 4 As shown, the detection circuit 2 includes a differential amplifier circuit 21 and a comparator circuit 22.

[0038] like Figure 4 As shown, the first terminal of the differential amplifier circuit 21 is connected to the first terminal of the sampling circuit 1, the second terminal of the differential amplifier circuit 21 is connected to the second terminal of the sampling circuit 1, the third terminal of the differential amplifier circuit 21 is connected to the reference voltage VREF, and the fourth terminal of the differential amplifier circuit 21 is connected to the first terminal of the comparator circuit 22; the second terminal of the comparator circuit 22 is connected to the reference voltage VREF.

[0039] refer to Figure 4 The differential amplifier circuit 21 is the "signal preprocessing core" of the detection circuit 2. Its design goal is to solve the problems of "weak amplitude" and "variable polarity" of the original signal from the sampling circuit 1, ensuring that the subsequent comparison circuit 22 can accurately identify the current state. From the connection relationships, the connections of each port serve the signal processing requirements:

[0040] 1. Raw Signal Acquisition: The first terminal of the differential amplifier circuit 21 is directly connected to the first terminal of the sampling circuit 1, and the second terminal is directly connected to the second terminal of the sampling circuit 1. The raw current-related signals at both ends of the sampling circuit 1 are completely acquired through these two ports. Since the design of the sampling circuit 1 needs to take into account low power loss, the amplitude of its output raw signal is usually weak. In addition, in different operating modes of the bidirectional buck-boost circuit, the signal polarity will change with the direction of the inductor current (negative in charging mode and positive in discharging mode). If it is directly transmitted to the determination unit, signal distortion or inability to be recognized may occur. Therefore, the primary function of the differential amplifier circuit 21 is to perform "amplitude enhancement" and "polarity adaptation processing" on the raw signal.

[0041] 2. DC Operating Point Guarantee: The third terminal of the differential amplifier circuit 21 is connected to a reference voltage VREF. The core function of this reference voltage VREF is to provide a stable DC operating point for the differential amplifier circuit 21. Since the original signal output by the sampling circuit 1 has a polarity change (it can be positive or negative), without the support of the reference voltage VREF, when the signal is negative, the amplifier circuit is prone to output negative saturation, resulting in signal loss or processing failure. The introduction of the reference voltage VREF can raise the negative signal to a reasonable processing range, ensuring that the amplifier circuit can effectively capture and amplify the signal regardless of whether the original signal is positive or negative, avoiding judgment errors caused by signal polarity issues.

[0042] 3. Signal Output and Transmission: The fourth terminal of the differential amplifier circuit 21 is connected to the first terminal of the comparator circuit 22. Its function is to stably transmit the processed signal (i.e., the signal that meets the judgment requirements of the comparator circuit 22) after "amplitude enhancement" and "polarity adaptation" to the comparator circuit 22. This processed signal not only meets the subsequent judgment requirements in terms of amplitude, but also realizes the conversion of "differential mode signal to single-ended signal" through the adaptation of the reference voltage VREF, eliminating common-mode interference in the original signal, further improving the stability and accuracy of the signal, and laying the foundation for the accurate judgment of the comparator circuit 22.

[0043] In actual working scenarios, when the bidirectional buck-boost circuit is in charging mode, the sampling circuit 1 outputs a negative original signal, the differential amplifier circuit 21 boosts the negative signal through the reference voltage VREF, and then transmits it to the comparator circuit 22 after amplitude amplification; when the circuit is in the mode switching stage (the switching transistor is turned off after AC power failure), the signal of the sampling circuit 1 gradually changes from negative to "approaching 0", and the differential amplifier circuit 21 tracks the change in real time and continuously outputs the corresponding amplified signal to ensure that the signal change process is completely captured.

[0044] refer to Figure 4 The comparator circuit 22 is the "judgment core" of the detection circuit 2. Its core function is to determine whether the current of the sampling circuit 1 has reached the switching condition of "absolute value close to 0" based on the processed signal output by the differential amplifier circuit 21 and the judgment threshold set by the reference voltage VREF, and output a clear level signal to the control module 3. The design of connecting the reference voltage VREF to its second terminal is precisely to construct this judgment threshold. The specific working logic is as follows:

[0045] 1. Threshold Setting: After the reference voltage VREF is connected to the second terminal of the comparator circuit 22, a threshold corresponding to "the absolute value of the current of the sampling circuit 1 is close to 0" will be formed based on the reference voltage VREF. The threshold setting is not a fixed value, but is designed in combination with the application scenario of the bidirectional buck-boost circuit (12V bus of storage server, battery module voltage such as 7.2V), the inductor current decay law and the switching safety requirements. It is necessary to ensure that the threshold is close to 0 enough (to avoid the inductor still having a large current during switching, causing the bus to be pumped), and to avoid the threshold being too strict, which would cause switching delay (affecting the timeliness of backup power after AC power failure). Ultimately, the goal of "switching can be triggered when the current decays to a safe range" is achieved.

[0046] 2. Signal Comparison and Level Output: After receiving the processed signal transmitted by the differential amplifier circuit 21, the first terminal of the comparator circuit 22 compares the processed signal with the judgment threshold set by the reference voltage VREF at the second terminal in real time. When the absolute value of the current of the sampling circuit 1 corresponding to the processed signal does not reach the threshold of "close to 0", the comparator circuit 22 outputs a low-level signal to inform the control module 3 that "the current state does not meet the switching conditions". When the absolute value of the current of the sampling circuit 1 corresponding to the processed signal reaches the threshold of "close to 0", the comparator circuit 22 immediately switches to output a high-level signal (i.e., the "first level signal" in the technical solution) to transmit the judgment result of "it is safe to switch to the discharge mode" to the control module 3.

[0047] In the critical process of mode switching (after AC power failure, the control module 3 turns off the first switch Q1 and the second switch Q2), the comparator circuit 22 is always in a dynamic comparison state: starting from the decay of the inductor current through the freewheeling diode of the second switch Q2, the comparator circuit 22 continuously compares the differentially amplified signal with the threshold until the current approaches 0 and outputs the first level signal - this signal directly triggers the control module 3 to start the discharge mode, ensuring that there is no problem of inductor current being drawn from the bus when the first switch Q1 is turned on, and completely solving the hidden danger of bus voltage drop.

[0048] Specifically, the differential amplifier circuit 21 and the comparator circuit 22 do not operate independently, but rather form a collaborative link of "signal processing-threshold determination": the differential amplifier circuit 21 solves the problem of "the original signal cannot be directly determined" by amplifying and adapting the polarity, converting the original signal into an effective signal that meets the requirements of the comparator circuit 22; the comparator circuit 22, based on the threshold set by the reference voltage VREF, converts the processed signal into a level command that the control module 3 can execute. The collaborative operation of the two ensures that the detection circuit 2 can accurately capture the current changes of the sampling circuit 1 and output accurate determination results based on the actual application scenario, ultimately supporting the bidirectional buck-boost circuit to achieve "no voltage drop" mode switching in AC power failure scenarios, ensuring the data security and bus stability of the storage server system.

[0049] In some alternative implementations, such as Figure 4 As shown, the differential amplifier circuit 21 is the core functional unit in the bidirectional buck-boost circuit switching control system that performs "precise preprocessing" on the output signal of the sampling circuit 1. Its design originates from the inherent characteristics of the sampling circuit 1. In order to reduce power loss, the core component of the sampling circuit 1 adopts a milliohm-level resistance design, which results in the weak amplitude of its output current-related signal (i.e., the voltage signal reflecting the inductor current state) and the alternation of positive and negative polarities with the circuit working mode (charging / discharging) (the signal is negative when charging and positive when discharging). If it is directly transmitted to the subsequent comparison circuit 22, it is easy to cause judgment distortion or failure due to low signal recognition and polarity exceeding the processing range. Based on this, the differential amplifier circuit 21 includes: a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and an operational amplifier OPA1. The first end of the second resistor R2 is connected to the first end of the sampling circuit 1, and the second end of the second resistor R2 is connected to the non-inverting input of the operational amplifier OPA1 and the first end of the third resistor R3. The second end of the third resistor R3 is connected to the reference voltage VREF. The first end of the fourth resistor R4 is connected to the second end of the sampling circuit 1, and the second end of the fourth resistor R4 is connected to the inverting input of the operational amplifier OPA1 and the first end of the fifth resistor R5. The second end of the fifth resistor R5 is connected to the output of the operational amplifier OPA1 and the first end of the comparator circuit 22.

[0050] Specifically, considering the alternating positive and negative polarity of the sampled signal, the differential amplifier circuit 21 introduces a reference voltage VREF through the third resistor R3 to construct a "signal reference boosting" mechanism, thus addressing the limitations of operational amplifier OPA1 in processing negative signals. Operational amplifier OPA1 has a voltage threshold within its linear operating range. If a negative signal is directly input, its output is prone to negative saturation, resulting in loss of signal detail. However, the reference voltage VREF, connected to the circuit through the third resistor R3, provides a stable DC operating point for the non-inverting input of operational amplifier OPA1, boosting the original negative signal to within the linear processing range of operational amplifier OPA1. Even if the sampling circuit 1 outputs a weak negative signal, after superimposing the reference voltage VREF, it can be converted into a processable signal within the linear range. For positive signals, the reference voltage VREF serves as a stable reference, ensuring that signal amplitude changes are accurately captured. Ultimately, this achieves a polarity adaptation effect where "regardless of whether the sampled signal is positive or negative, it can be effectively amplified without losing detail," covering the signal processing needs of both charging and discharging modes of the circuit.

[0051] To ensure the consistency of signal amplification under different operating conditions (and to avoid the failure of the comparison circuit 22 to determine the threshold due to fluctuations in the amplification factor), the differential amplifier circuit 21 achieves a stable output with a fixed amplification factor through the design of the resistor ratio and the negative feedback mechanism. On the one hand, the circuit locks the amplification factor to the ratio of the resistance of the second resistor R2 to the resistance of the fourth resistor R4, and the resistance of the third resistor R3 to the resistance of the fifth resistor R5 (usually set so that the resistance values ​​of the second resistor R2 and the fourth resistor R4 are equal, and the resistance values ​​of the third resistor R3 and the fifth resistor R5 are equal). This fixed ratio design ensures that the amplification factor is not affected by the slight differences in the individual parameters of the components. On the other hand, the fifth resistor R5 and the fourth resistor R4 work together to form a negative feedback link, feeding back part of the output signal of the operational amplifier OPA1 to the inverting input terminal, forming a closed-loop control of "output-feedback-adjustment". When the amplification factor of the operational amplifier OPA1 fluctuates due to factors such as temperature changes and parameter drift, the negative feedback will adjust the voltage of the inverting input terminal in real time to offset the change in amplification factor, ensuring that the amplification amplitude of the final output signal is always stable within the set ratio range, providing a basis for the comparison circuit 22 to determine the amplitude consistency.

[0052] Since the sampling circuit 1 outputs a differential signal (which needs to be represented by the voltage difference between the two terminals), while the subsequent comparator circuit 22 can only receive a single-ended signal (a voltage signal at a single terminal), the differential amplifier circuit 21 also undertakes the function of "converting the differential signal to a single-ended signal". During the amplification process of the operational amplifier OPA1, the differential signal is processed and finally converted into a single-ended signal through the output of the operational amplifier OPA1. This signal not only contains the amplitude and polarity information of the original differential signal (which has been optimized through amplification and reference boosting), but can also directly adapt to the single-ended input requirements of the comparator circuit 22. Through the connection of the fifth resistor R5 with the comparator circuit 22, lossless and delay-free signal transmission is achieved, ensuring that the comparator circuit 22 can obtain the amplified signal corresponding to the inductor current state in real time, providing a clear and identifiable signal basis for the determination of "whether the current is close to 0".

[0053] In some alternative implementations, such as Figure 3 As shown, the comparator circuit 22 includes: a voltage divider circuit, a seventh resistor R7, and a comparator cmp1. The first terminal of the voltage divider circuit is connected to the reference voltage VREF, the second terminal of the voltage divider circuit is connected to the inverting input terminal of the comparator cmp1, and the third terminal of the voltage divider circuit is grounded. The first terminal of the seventh resistor R7 is connected to the fourth terminal of the differential amplifier circuit 21, and the second terminal of the seventh resistor R7 is connected to the non-inverting input terminal of the comparator cmp1. The output terminal of the comparator cmp1 is connected to the control module 3. The voltage divider circuit includes: a sixth resistor R6 and an eighth resistor R8. The first terminal of the sixth resistor R6 is connected to the reference voltage VREF, the second terminal of the sixth resistor R6 is connected to the inverting input terminal of the comparator cmp1 and the first terminal of the eighth resistor R8, and the second terminal of the eighth resistor R8 is grounded.

[0054] Specifically, after the voltage divider circuit receives the reference voltage VREF, it uses a specific internal resistor ratio (e.g., in this invention, the resistance value of one resistor in the voltage divider circuit is set to be much larger than that of the other) to reduce the reference voltage VREF by a fixed ratio, forming the threshold voltage input to comparator cmp1. The core purpose of this resistor ratio design is to make the absolute value of the current in sampling circuit 1 corresponding to the threshold voltage extremely small, and infinitely close to 0.

[0055] Since the current of sampling circuit 1 in this embodiment is directly related to the inductor current, the critical node of "inductor current decaying from the negative value of charging mode (SW points to VBAT) to a safe range" can be accurately captured when the threshold voltage generated by the voltage divider circuit corresponds to "current close to 0". This ensures that the threshold will not cause switching delay due to excessively large threshold (affecting the timeliness of backup power after AC power failure), nor will it cause misjudgment due to excessively small threshold (causing the switch to turn on prematurely and causing bus current to be pumped). This ensures that the judgment benchmark is fully compatible with the inductor current decay law and the bus voltage protection requirements.

[0056] The voltage divider circuit also has a "threshold stability" guarantee function: the reference voltage VREF itself has low fluctuation characteristics. The voltage divider circuit, through a fixed resistor ratio, can avoid the influence of circuit noise (such as power supply ripple and wiring interference) on the threshold voltage, ensuring that the threshold is always maintained in the "close to 0 current" setting range, providing a stable and reliable judgment benchmark for subsequent voltage comparison.

[0057] Specifically, the seventh resistor R7 is the "signal transmission optimization unit" of the comparator circuit 22. Its design purpose is to solve the adaptation problem between the output signal of the differential amplifier circuit 21 and the input requirements of the comparator cmp1, ensuring that the signal used for comparison can accurately and stably reflect the inductor current state. From the signal processing logic perspective, the signal output by the differential amplifier circuit 21 has completed "weak signal amplification" and "polarity adaptation" (avoiding negative saturation). However, when this signal is transmitted to the comparator cmp1, two key issues still need to be addressed: First, to avoid instantaneous large current impacts on the input of the comparator cmp1. The output signal of the differential amplifier circuit 21 may have instantaneous spikes (such as signal fluctuations at the beginning of mode switching). The seventh resistor R7 can prevent such spike currents from directly damaging the comparator cmp1 through current limiting, thus extending the service life of the core components. Second, to suppress high-frequency interference. There is high-frequency noise generated by wiring coupling in the storage server circuit environment. The seventh resistor R7 can form a simple filter structure with the circuit parasitic capacitance to weaken the impact of high-frequency noise on the signal, making the signal input to the comparator cmp1 more stable and ensuring that the effective information reflecting the inductor current state in the signal is not masked by interference.

[0058] Through the above signal optimization, the seventh resistor R7 provides a "no-impact, low-interference" input signal for comparator cmp1, ensuring the accuracy of subsequent voltage comparison and avoiding judgment errors caused by signal distortion.

[0059] Specifically, comparator cmp1 is the "core decision-making unit" of comparator circuit 22. Its working logic directly determines the accuracy of the mode switching timing, perfectly meeting the requirements for judging the inductor current state. The core working mechanism of comparator cmp1 is "real-time comparison of dual input signals": on the one hand, it receives the differential amplified signal optimized by the seventh resistor R7 (this signal changes with the inductor current, reflecting the negative current in charging mode and gradually approaching 0 during current decay); on the other hand, it receives the fixed threshold voltage generated by the voltage divider circuit (corresponding to a current close to 0). Through internal circuitry, it judges the voltage relationship between the two input signals in real time and outputs the corresponding high and low level signals. The specific decision-making logic is deeply bound to the working mode of this invention:

[0060] When the bidirectional buck-boost circuit is in charging mode, the inductor current direction is SW pointing to VBAT. The signal voltage output by the differential amplifier circuit 21 is lower than the voltage divider threshold. The comparator cmp1 outputs a low level, which is transmitted to the GPIO port of the control module 3 to inform the control module 3 that the current inductor current is still a negative current in the charging direction and the discharge switching condition is not yet met.

[0061] When an AC power failure occurs, control module 3 first controls Q1 and Q2 to turn off. The inductor current decays through the body diode of Q2 (gradually approaching 0). At this time, the signal voltage output by differential amplifier circuit 21 gradually increases. When the signal voltage is higher than the voltage divider threshold, comparator cmp1 immediately switches to a high-level output. This high level is the trigger signal that "informs control module 3 that the inductor current is close to 0". After receiving this signal, control module 3 can control the circuit to enter the boost discharge mode. At this time, Q1 conduction will not cause the inductor to draw current from the bus, thus completely solving the problem of bus voltage drop.

[0062] In addition, the comparator cmp1 has an extremely fast output response speed (microsecond level), which can follow the decay change of the inductor current in real time, ensuring that the control module 3 can obtain the trigger signal as soon as the inductor current reaches the safe range, avoiding mode switching delay caused by response delay, and ensuring the stability of the server bus voltage in AC power failure scenarios.

[0063] In some optional implementations, the control module 3 includes a microcontroller and a drive circuit, wherein the microcontroller is connected to the detection circuit 2 and the drive circuit; and the drive circuit is connected to the control terminal of the first switch Q1 and the control terminal of the second switch Q2.

[0064] In some alternative implementations, to accelerate energy consumption, an energy-dissipating circuit can be added between the sampling circuit 1 and the second switching transistor Q2. This energy-dissipating circuit is connected in series with the body diode and inductor of the second switching transistor Q2 during the switching process, thereby accelerating energy consumption.

[0065] In order to reduce energy consumption during normal charging and discharging, the energy-consuming circuit can be activated only during switching, that is, the energy-consuming circuit is switched off during normal charging and discharging.

[0066] In a practical application scenario, such as Figure 3 As shown, we usually let R2=R4=Rx, R3=R5=Ry. Then the function of the differential amplifier is to convert the differential signal into a single-ended signal for output, with an amplification factor of Ry / Rx.

[0067] OPA1 is connected to the non-inverting input of CMP1 via resistor R7 (the seventh resistor). VREF is connected to the inverting input of CMP1 via a voltage divider formed by resistors R6 and R8 (the sixth resistor). CMP1 outputs a high level when the voltage V+ at its non-inverting input is greater than the voltage V- at its inverting input, and a low level when V+ is less than V-. Therefore, the critical condition for the high / low output level of CMP1 is that V+ equals V-. The expression for V- is:

[0068]

[0069] The voltage V+ is equal to the output Vopa1 of operational amplifier opa1. Based on the amplification factor Ry / Rx of the differential amplifier circuit 21 above, the current across R1 can be calculated:

[0070]

[0071] Therefore, when the current flowing through the first resistor R1 is negative and less than I R1 When the current flowing through the first resistor R1 is greater than a certain value, the output of comparator cmp1 goes low. I R1 At this time, the output of comparator cmp1 goes high. Here, R8 is set much larger than R6, then... I R1 The absolute value is small, close to 0. This condition is used to determine the current direction when the bidirectional buck-boost circuit switches from charging to discharging mode.

[0072] The output of cmp1 is sent to the GPIO port of the MCU to notify the current flow direction of the first resistor R1. The PWM module integrated inside the MCU provides PWM drive signals for the bidirectional buck-boost circuit. PWM1 and PWM2 are two complementary PWM drive signals. After passing through the drive circuit, two complementary drive voltages Q1_GATE and Q2_GATE are generated to drive the switching transistors Q1 and Q2 respectively.

[0073] When the bidirectional buck-boost circuit operates in charging mode, the inductor current flows from SW to VBAT, and the voltage on Vbus charges the battery after being stepped down. At this time, when Q1 is on and Q2 is off, the inductor current flows through Q1. When Q1 is off and Q2 is on, the inductor current flows through Q2, forming a negative voltage across the first resistor R1. In this case, the output voltage of comparator cmp1 is low.

[0074] When the bidirectional buck-boost circuit operates in discharge mode, the inductor current flows from VBAT to SW, and the battery voltage is boosted and discharged to Vbus. At this time, when Q1 is on and Q2 is off, the inductor current flows through Q1. When Q1 is off and Q2 is on, the inductor current flows through Q2, forming a positive voltage across the first resistor R1. At this point, the output voltage of comparator cmp1 is high.

[0075] When an AC power failure suddenly occurs during battery charging, the system sends a discharge enable signal to the MCU, requiring the bidirectional buck-boost circuit to immediately switch from charging mode to discharging mode. However, at this time, the inductor current flows from SW to VBAT. If Q1 is turned on, the inductor will draw current from Vbus, causing the Vbus voltage to drop further. To avoid this problem, the MCU controls PWM1 and PWM2 drive signals to remain low, thus keeping the two drive voltages Q1_GATE and Q2_GATE low as well. The two switches Q1 and Q2 are turned off, and the inductor current flows through the body diode of Q2, forming a negative voltage across the first resistor R1.

[0076] Because the body diode has a forward voltage drop VF, approximately 0.6V, which is connected in series with the battery voltage Vbat, it accelerates the rate at which the inductor current drops to zero. During this process, the MCU continuously monitors the output level of comparator cmp1 via GPIO. If the level goes high, it indicates that the current flowing through the first resistor R1 has changed from a large negative value to close to zero, reflecting that the inductor current from SW to VBAT has decreased from a large value to close to zero. At this point, the MCU immediately controls the bidirectional buck-boost circuit to enter boost mode. In this case, Q1 conducts without causing the previously mentioned problem of further voltage drop in Vbus.

[0077] An embodiment of this application provides a charging and discharging circuit, including: the switching control circuit and the bidirectional buck-boost converter described above.

[0078] An embodiment of this application provides a switching control method, which is applied to the switching control circuit described above. The method includes:

[0079] When the control module 3 receives the discharge control command, it controls the first switch Q1 and the second switch Q2 to turn off.

[0080] When the detection circuit 2 detects that the voltages at both ends of the sampling circuit 1 are equal, it outputs a first-level signal.

[0081] Control module 3 controls the first switch Q1 and the second switch Q2 to enter the discharge mode.

[0082] In some optional implementations, the switching control method further includes: when the control module 3 does not receive a discharge control command, the control module 3 controls the first switch Q1 and the second switch Q2 to maintain the charging mode.

[0083] In some optional implementations, the switching control method further includes: in the discharge mode, the control module 3 controls the first switch Q1 to turn off and the second switch Q2 to turn on; in the charging mode, the control module 3 controls the first switch Q1 to turn on and the second switch Q2 to turn off.

[0084] Specifically, refer to Figure 3 The core functionality of the charging and discharging circuit relies on the deep collaboration between the switching control circuit and the bidirectional buck-boost converter. The two work together to form a complete charging, discharging, and switching closed loop through a power link to transmit energy and a signal link to transmit control commands. This is especially crucial in the critical scenario of AC power failure. (Refer to...) Figure 5 The collaboration process is as follows:

[0085] During normal charging: When the AC power supply is normal, the MCU in the switching control circuit outputs a complementary PWM signal adapted to buck mode. After being amplified by the drive circuit, it controls the first switch Q1 and the second switch Q2 to conduct alternately. The bidirectional buck-boost converter steps down the 12V bus voltage to the battery voltage to achieve stable charging. At the same time, the sampling circuit 1 continuously collects the inductor current, and the detection circuit 2 determines that the current is in the charging direction (negative) and outputs a low level to the MCU. The MCU maintains the charging mode control logic.

[0086] AC power failure emergency phase: After a sudden AC power failure, the system immediately sends a discharge control command to the MCU, and the MCU responds quickly:

[0087] 1. When the control drive circuit outputs a low level, Q1 and Q2 are turned off simultaneously. The inductor current loses its original path and instead flows through the body diode of Q2 (the path is L1-Q2 body diode-sampling circuit 1-ground), and the current value begins to decay from the charging direction.

[0088] 2. Sampling circuit 1 collects the inductor current during the freewheeling process in real time, and detection circuit 2 continuously compares the amplified current signal with the "close to 0" threshold. When the current decays to close to 0, it outputs the first level signal (high level).

[0089] 3. After receiving the first level signal, the MCU immediately adjusts the output of the PWM module to adapt to the boost mode complementary signal, which is converted into the drive voltage of Q1 and Q2 by the drive circuit, controlling the two switching transistors to conduct alternately. The bidirectional buck-boost converter switches to the discharge mode, and the battery voltage is boosted to supply power to the 12V bus to maintain the stability of the bus.

[0090] Normal discharge phase: In discharge mode, the switching control circuit continuously monitors the inductor current direction (discharge direction, positive) through sampling and detection circuit 2. The MCU dynamically adjusts the duty cycle of the PWM signal according to the bus voltage feedback to ensure that the boosted bus voltage is stable at 12V until AC power supply is restored or the battery is depleted.

[0091] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0092] The switching control circuit and charging / discharging circuit provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A switching control circuit, characterized by comprising: The switching control circuit is applied to a bidirectional buck-boost converter, and the bidirectional buck-boost converter comprises a first switch tube, a second switch tube and an inductor, a first end of the first switch tube is connected with a bus, a second end of the first switch tube is further connected with a battery through the inductor, and the second switch tube is reversely connected with a body diode, the switching control circuit comprises a sampling circuit, a detection circuit and a control module, wherein, a first end of the sampling circuit is connected with a second end of the second switch tube, and a second end of the sampling circuit is grounded; a first end of the detection circuit is connected with a first end of the sampling circuit, a second end of the detection circuit is connected with a second end of the sampling circuit, a third end of the detection circuit is connected with the control module, and the detection circuit is used for outputting a first level signal when it is detected that an absolute value of a current of the sampling circuit is 0 during mode switching; the control module is connected with a control end of the first switch tube and a control end of the second switch tube, and the control module is used for controlling the first switch tube and the second switch tube to be turned off when a discharge control command is received, and controlling the first switch tube and the second switch tube to enter a discharge mode when the first level signal is received.

2. The switching control circuit of claim 1, wherein The sampling circuit comprises at least one first resistor, and a resistance value of the first resistor is in the order of milliohm.

3. The switching control circuit of claim 1, wherein, The detection circuit comprises a differential amplification circuit and a comparison circuit, wherein, a first end of the differential amplification circuit is connected with a first end of the sampling circuit, a second end of the differential amplification circuit is connected with a second end of the sampling circuit, a third end of the differential amplification circuit is connected with a reference voltage, and a fourth end of the differential amplification circuit is connected with a first end of the comparison circuit; a second end of the comparison circuit is connected with the reference voltage.

4. The switching control circuit of claim 3, wherein The differential amplification circuit comprises a second resistor, a third resistor, a fourth resistor, a fifth resistor and an operational amplifier, wherein, a first end of the second resistor is connected with a first end of the sampling circuit, and a second end of the second resistor is connected with a non-inverting input end of the operational amplifier and a first end of the third resistor; a second end of the third resistor is connected with the reference voltage; a first end of the fourth resistor is connected with a second end of the sampling circuit, and a second end of the fourth resistor is connected with an inverting input end of the operational amplifier and a first end of the fifth resistor; a second end of the fifth resistor is connected with an output end of the operational amplifier and a first end of the comparison circuit.

5. The switching control circuit of claim 4, wherein, The differential amplification circuit comprises that a resistance value of the second resistor is equal to a resistance value of the fourth resistor, and a resistance value of the third resistor is equal to a resistance value of the fifth resistor.

6. The switching control circuit of claim 3, wherein The comparison circuit comprises a voltage division circuit, a seventh resistor and a comparator, wherein, a first end of the voltage division circuit is connected with the reference voltage, a second end of the voltage division circuit is connected with an inverting input end of the comparator, and a third end of the voltage division circuit is grounded; a first end of the seventh resistor is connected with a fourth end of the differential amplification circuit, and a second end of the seventh resistor is connected with a non-inverting input end of the comparator; an output end of the comparator is connected with the control module.

7. The switching control circuit of claim 6, wherein The voltage dividing circuit comprises a sixth resistor and an eighth resistor, wherein a first end of the sixth resistor is connected to the reference voltage, and a second end of the sixth resistor is connected to an inverting input terminal of the comparator and a first end of the eighth resistor; a second end of the eighth resistor is grounded.

8. The switching control circuit according to claim 7, characterized in that the first level signal is a high level signal; a resistance of the eighth resistor is greater than a resistance of the sixth resistor, so as to ensure that when the absolute value of the current of the sampling circuit is detected as 0 during the mode switching process, the first level signal is output.

9. The switching control circuit of claim 1, wherein, The control module comprises a microcontroller and a driving circuit, wherein the microcontroller is connected to the detection circuit and the driving circuit; the driving circuit is connected to a control terminal of the first switch tube and a control terminal of the second switch tube.

10. A charge-discharge circuit characterized by comprising: The switching control circuit and the bidirectional buck-boost converter according to any one of claims 1-9. ​

Images