Driving circuit, driving method and driving chip of power device

Abstract

The invention discloses a driving circuit, a driving method and a driving chip of a power device, and relates to the field of integrated circuit design, and the main points of the technical scheme are that the driving circuit comprises at least two high-side pre-stage pre-driving branches which are connected in parallel; wherein each high-side pre-stage pre-driving branch comprises a high-side pre-stage pre-driving circuit and a high-side power tube which are connected in sequence; the at least two low-side preceding-stage pre-driving branches are connected in parallel; wherein each low-side pre-stage pre-driving branch comprises a low-side pre-stage pre-driving circuit and a low-side power tube which are connected in sequence; the capacitor is connected with the output end of the high-side preceding-stage pre-driving branch; wherein the output end of the high-side preceding-stage pre-driving branch is connected with the negative electrode of the capacitor, and the positive electrode of the capacitor is connected with the high-side preceding-stage pre-driving branch. According to the invention, the defect that a power device with relatively large total grid charge is driven by adopting a multi-drive parallel connection mode at present is overcome.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit design, more particularly, it relates to a driving circuit, a driving method and a driving chip of a power device. BACKGROUND

[0002] In the application of driving circuit, usually the load in the back stage is the gate of IGBT or other power device. The driving current that the common driving circuit chip in the market can provide is usually below 10A. There are several disadvantages in the small driving current: Insufficient driving current: when driving a large power device, the driving capacity is insufficient, which cannot complete the fast turn-off or turn-on of the device, the driving function fails or the driving performance decreases, forcibly using a small driving current chip to drive a large power device with large total gate charge may cause chip overheating or even burnout; when driving a power tube with large total gate charge or a power tube module, a multi-chip parallel structure needs to be used, which may cause inconsistent conduction of parallel chips, and the multi-chip parallel structure increases the PCB area and makes it difficult to cut the current; When using small current driving chips in parallel, more PCB parasitic parameters are introduced, which easily causes voltage / current ringing, resulting in electromagnetic interference (EMI) and crosstalk problems, threatening system reliability; the use of small current driving chips in parallel greatly increases system power consumption; In order to solve the inconvenience caused by insufficient gate driving current, it is a trend to design a driving chip with higher current capacity. The enhanced driving current: on the one hand, it can drive the fast switching of a power tube or a power tube module with large total gate charge; on the other hand, the driving current requirements of different power tubes may be different, and a large driving current chip can be compatible with a small driving current chip by externally connecting a current limiting resistor, so the increased driving current is more widely used. Finally, using a single large current driving chip instead of multiple small current driving chips greatly simplifies the design difficulty and area of PCB, reduces system cost, and improves system reliability.

[0003] The common driving circuit implementation schematic diagram is shown in Figure 1 It is composed of a high-side pre-driver circuit, a low-side pre-driver circuit, a high-side power tube and a low-side power tube. Output 1 and output 2 are two outputs of the driving chip, which can provide a certain positive power supply to the subsequent load, and the upper pull current of output 1 or the lower pull current of output 2 to the negative power supply.

[0004] Figure 1 The driving current of the driving mode shown in 1. Insufficient driving current capacity: when driving a large power device, the driving capacity is insufficient, and the device cannot be turned off or turned on quickly, the driving function fails or the driving performance decreases, and forcibly using a small driving current chip to drive a large total gate charge power device can cause the chip to overheat or even burn out; 2. The structure of multiple chips in parallel may have inconsistent conduction of parallel chips, and the parallel connection of multiple chips increases the PCB area and makes current sharing difficult during PCB design; 3. When multiple driving chips are used in parallel, more PCB parasitic parameters are introduced, which can easily cause voltage / current ringing, leading to electromagnetic interference (EMI) and crosstalk problems, threatening system reliability; 4. The use of multiple chips in parallel increases system power consumption and increases system failure probability; 5. The current C BOOT The high-side driving circuit architecture of the capacitor has a limitation on the switching frequency, and cannot support low-frequency switching applications. SUMMARY

[0005] The purpose of the present application is to provide a power device driving circuit, a driving method and a driving chip, which solves the drawbacks of driving a large total gate charge power device by using multiple driving chips in parallel.

[0006] The above technical purposes of the present application are achieved by the following technical solutions: In a first aspect of the present application, a power device driving circuit is provided, the output end of the driving circuit is connected to the input end of the power device, and the driving circuit comprises: At least two parallel high-side pre-driver branches; wherein each high-side pre-driver branch comprises a high-side pre-driver circuit and a high-side power tube connected in sequence; At least two parallel low-side pre-driver branches; wherein each low-side pre-driver branch comprises a low-side pre-driver circuit and a low-side power tube connected in sequence; and A capacitor connected to the output end of the high-side pre-driver branch; wherein the output end of the high-side pre-driver branch is connected to the negative electrode of the capacitor, and the positive electrode of the capacitor is connected to the high-side pre-driver branch.

[0007] In an implementation scheme, the high-side pre-driver circuit and the low-side pre-driver circuit each comprise a plurality of inverters connected in sequence along the signal input and output direction, and a PMOS tube and an NMOS tube connected to the output end of the inverter.

[0008] In an implementation scheme, the output end of the high-side pre-driver circuit is connected to the gate of the high-side power tube, and the output end of the low-side pre-driver circuit is connected to the gate of the low-side power tube.

[0009] In an implementation, the output of the high-side power tube is a positive power input of the power device, and the output of the low-side power tube is a negative power input of the power device.

[0010] In an implementation, the drive circuit further comprises: a high-side power refresh circuit connected to the input end of each high-side pre-stage pre-driver branch; wherein the high-side power refresh circuit is internally provided with a high-side power refresh logic, a high-side power monitoring circuit and a high-side power supply.

[0011] In a second aspect of the present application, a drive method of a power device is provided, which is applied to the drive circuit of the power device provided in the first aspect of the present application, and the method comprises: obtaining a drive requirement parameter of the power device; according to the drive requirement parameter, selecting one or more drive control signals by the pre-configured drive control, and turning on or off one or more high-side pre-stage pre-driver branches and low-side pre-stage pre-driver branches by the drive control signals.

[0012] In an implementation, when the output of the drive circuit is high and the drive circuit has no switching action, the high-side power monitoring circuit internally provided in the high-side power refresh circuit is used to detect the high-side power voltage in real time, and if the high-side power voltage is lower than a preset threshold, the high-side power refresh logic internally provided in the high-side power refresh circuit is turned on, and the charge provided by the high-side power supply internally provided in the high-side power refresh circuit is used to supplement the charge of the capacitor.

[0013] In an implementation, the high-side power refresh logic is started in time according to the output state of the high-side power refresh circuit.

[0014] In an implementation, when the high-side power refresh circuit detects that the high-side drive power supply of the high-side pre-stage pre-driver branch decreases, the high-side power supply is started to ensure the normal working state of the high-side power tube under low frequency, when the drive circuit is in a low frequency state.

[0015] In a third aspect of the present application, a drive chip of a power device is provided, which comprises the drive circuit of the power device provided in the second aspect of the present application.

[0016] Compared with the prior art, the present application has the following beneficial effects: On the basis of the traditional drive chip, according to the required drive current, the pre-driver circuit and the power tube structure in parallel are adopted, which can effectively improve the drive current; and the multi-channel circuit matching is realized in the chip, avoiding the uneven conduction of multiple parallel paths outside the chip; compared with the PCB design, the integrated circuit design can greatly shorten the interconnection path between the multi-channel parallel paths, and the parasitic of the parallel path is also greatly reduced, which is beneficial to reduce the ringing in the high-speed switching process and optimize the EMI design; the built-in drive control selection control logic can select the conduction of the parallel path according to the needs outside the chip, reasonably allocate resources according to the application requirements, and further reduce the power consumption required by the drive circuit. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which are included to provide a further understanding of the embodiments of the present application and are incorporated in and constitute a part of this application, illustrate embodiments of the present application and do not limit the present application. In the drawings: Figure 1 A schematic diagram of a drive circuit provided by the prior art; Figure 2 A structural schematic diagram of a drive circuit of a power device provided by the embodiment of the present application; Figure 3 Another structural schematic diagram of a drive circuit of a power device provided by the embodiment of the present application; Figure 4 A structural schematic diagram of a high-side pre-driver branch and a low-side pre-driver branch provided by the embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the present application clearer and more apparent, the present application will be further described in detail below with reference to the embodiments and drawings, and the illustrative embodiments of the present application and the description thereof are only used to explain the present application, and do not limit the present application.

[0019] It should be noted that the term "include" or "may include" used in various embodiments of the present application indicates the existence of the claimed function, operation or element, and does not limit the addition of one or more functions, operations or elements. In addition, as used in various embodiments of the present application, the terms "include", "have" and their synonyms only mean to indicate the presence of a specific feature, number, step, operation, element, component or combination of the foregoing, and should not be understood as first excluding the presence or addition of one or more other features, numbers, steps, operations, elements, components or combinations of the foregoing.

[0020] It should be understood that terms such as "first", "second" are used only for descriptive purposes and cannot be construed as indicating or implying relative importance or implying the number of the indicated technical features. Therefore, the features defined as "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0021] As Figure 1 indicated, Figure 1 The drive current of the drive mode shown is usually below 10A, and the multi-chip parallel mode is used to drive large total gate charge power devices, which may have several disadvantages: 1. Insufficient drive current: when driving large power devices, the drive capability is insufficient, and the device cannot be turned off or turned on quickly, the drive function fails or the drive performance decreases, and forcibly using small drive current chips to drive large total gate charge power devices may cause chip overheating or even burnout; 2. The structure of multi-chip parallel connection may have inconsistent conduction of parallel chips, and the multi-chip parallel connection may increase the PCB area and make it difficult to flow evenly during PCB design; 3. The use of multiple drive chips in parallel may introduce more PCB parasitic parameters, which may cause voltage / current ringing and electromagnetic interference (EMI) and crosstalk problems, threatening system reliability; 4. The use of multiple chips in parallel may greatly increase system power consumption and increase system failure probability; 5. The current C BOOT The high-side drive circuit architecture of the capacitor has a limit on the switching frequency, which cannot support low-frequency switching applications.

[0022] The total gate charge (Qg) refers to the amount of charge injected into the gate electrode to turn on (drive) the MOSFET, and the smaller the value, the smaller the switching loss, thereby enabling high-speed switching.

[0023] Please refer to Figure 2 , Figure 2 A structure diagram of a power device driving circuit provided by the embodiment of the present application, the output end of the driving circuit is connected with the input end of the power device, as shown in Figure 2 The driving circuit comprises: At least two parallel high-side pre-drive branches; wherein each high-side pre-drive branch comprises a high-side pre-drive circuit and a high-side power tube connected in sequence; At least two parallel low-side pre-drive branches; wherein each low-side pre-drive branch comprises a low-side pre-drive circuit and a low-side power tube connected in sequence; and The capacitor connected with the output end of the high-side pre-driver branch; The output end of the high-side pre-driver branch is connected with the negative pole of the capacitor, and the positive pole of the capacitor is connected with the high-side pre-driver branch.

[0024] In the embodiment, the parallel enhanced high-side / low-side power tube is a fixed unit power tube according to the limit of the output current, and multiple channels are connected in parallel to meet the requirements of the output current and the output impedance.

[0025] The parallel enhanced multiple high-side / low-side pre-driver branches are designed in a multi-channel parallel structure with a driving circuit matched with the output power tube, and the logic of the driving control selection signal is built-in. The number of parallel channels of the driving circuit and the power tube circuit can be modulated in real time according to the external application requirements, and the power consumption is optimized under the premise of meeting the driving performance. The following assumes that the external application requirement is a driving circuit with a driving capacity of 60A or less, and there are different driving control selection signal combinations in the parallel structure mentioned in the embodiment, such as: the first kind, each parallel driving branch can provide a driving output capacity of 20A, and 3 parallel circuits are designed. Therefore, the control of one driving branch conduction, two driving branches conduction and three driving branches conduction can realize 20A, 40A and 60A driving capacity output.

[0026] The second kind, 3 parallel circuits are designed, and the current capacity of each branch is combined in a binary manner, for example, the first driving branch can provide a driving capacity output of 10A, the second driving branch can provide a driving capacity output of 20A, and the third driving branch can provide a driving capacity output of 40A. Through 8 binary combinations of the driving control selection signal, 8 driving capacity combinations of driving off, 10A, 20A, 30A, 40A, 50A, 60A and 70A can be realized.

[0027] The low-side driving control signal controls the conduction or off of the low-side power tube through the low-side pre-driver circuit, and the low-side pre-driver circuit can provide a suitable voltage signal between the gate and the source of the low-side power tube to ensure the reliable off and on of the low-side power tube.

[0028] The high-side driving control signal generates a driving control signal through the high-side pre-driver circuit to control the conduction or off of the high-side power tube, and the high-side pre-driver circuit can provide a suitable voltage signal between the gate and the source of the high-side power tube to ensure the reliable off and on of the high-side power tube.

[0029] The drive control signal is used to control the on and off states of the low-side and high-side power tubes. A possible logic relationship is as follows: when the drive control signal is logic 1, the high-side pre-driver circuit controls the high-side NMOS to be turned on, and the output 1 voltage is the same as the positive power input; at the same time, the low-side pre-driver circuit controls the low-side NMOS to be turned off, and the output 2 enters a high-impedance state; when the drive control signal is logic 0, the high-side pre-driver circuit controls the high-side NMOS to be turned off, and the output 1 voltage enters a high-impedance state; at the same time, the low-side pre-driver circuit controls the low-side NMOS to be turned on, and the output 2 voltage is the same as the negative power input. It can be seen that the output end of the high-side pre-driver circuit is connected with the gate of the high-side power tube, the output end of the low-side pre-driver circuit is connected with the gate of the low-side power tube, the drain of the high-side power tube is connected with a positive power input, and the drain of the low-side power tube is connected with a negative power input. These are connection manners disclosed in the prior art, and thus, the present embodiment does not make redundant principle description. Figure 2 It can be seen that the output end of the high-side pre-driver circuit is connected with the gate of the high-side power tube, the output end of the low-side pre-driver circuit is connected with the gate of the low-side power tube, the drain of the high-side power tube is connected with a positive power input, and the drain of the low-side power tube is connected with a negative power input. These are connection manners disclosed in the prior art, and thus, the present embodiment does not make redundant principle description.

[0030] As shown in Figure 4 , the high-side pre-driver circuit and the low-side pre-driver circuit each include a plurality of inverters cascaded in sequence along the signal input and output direction, and a PMOS tube and an NMOS tube connected with the output end of the inverter.

[0031] In the present embodiment, the circuit composition of the high-side pre-driver circuit and the low-side pre-driver circuit is also the same as that of the prior art, and thus, the present embodiment does not make redundant explanation. Of course, it also needs to be explained that, in Figure 4 , there are a high-side drive power supply, a high-side drive ground, a low-side drive power supply, a low-side drive ground, etc., which are also prior art, and are used to ensure that the two drive branches complete the opening and closing of the high / low-side power tubes.

[0032] Secondly, the output of the high-side power tube is the positive power input of the power device, and the output of the low-side power tube is the negative power input of the power device. This part is also the same as the prior art, and thus, the present embodiment does not make redundant explanation.

[0033] In some embodiments, as shown in Figure 3 , on the basis of the drive circuit shown in Figure 2 , the drive circuit provided by the present embodiment further includes: a high-side power refresh circuit connected with the input end of each high-side pre-driver branch; wherein the high-side power refresh circuit is internally provided with a high-side power refresh logic, a high-side power monitoring circuit and a high-side power supply.

[0034] Specifically, the high-side power supply refresh circuit matched with the plurality of parallel high-side front-stage pre-drive branches monitors the threshold of the high-side drive power supply in real time according to the working state of the high-side front-stage pre-drive branch, and when the high-side drive power supply is detected to be lowered in the low-frequency working state, the high-side power supply refresh logic automatically refreshes the high-side power supply, so as to ensure the normal working state of the high-side power tube under the low-frequency switching working frequency.

[0035] In the process of normal output being high, the capacitor C BOOT The high-side pre-drive circuit is provided with the charge, when the drive output is high and the drive circuit has no switching action, the high-side power supply monitoring circuit monitors the high-side power supply voltage in real time, if the high-side power supply voltage is lower than the threshold designed by the internal circuit, the high-side voltage refresh logic is turned on, the charge is supplemented by the internal high-side power supply, when the high-side power supply voltage returns to the normal value, the high-side voltage refresh process is ended, and the process is repeated until the next switching process comes.

[0036] It should be noted that the drive circuit provided by the embodiment is only connected with the high-side power supply refresh circuit in the high-side front-stage pre-drive branch, and is used for adjusting the switching process of each high-side front-stage pre-drive branch. Each low-side front-stage pre-drive branch is realized according to the drive mode provided by the prior art, and the embodiment will not be described.

[0037] The embodiment of the application further provides a drive method of a power device, which is applied to the drive circuit of the power device as described above, and the method comprises the following steps: obtaining a drive demand parameter of the power device; selecting one or more drive control signals according to the drive demand parameter through the preconfigured drive control, and turning on or turning off one or more high-side front-stage pre-drive branches and low-side front-stage pre-drive branches by using the drive control signal.

[0038] Specifically, in the actual working process, the drive control selection can select to turn on or turn off a certain parallel drive circuit and parallel power tube according to the drive demand parameter, so as to not affect the working state of other parallel drive circuits and parallel power tubes, to adjust the drive capacity in real time, and to optimize the power consumption of the drive chip.

[0039] In some embodiments, when the drive circuit output is high and the drive circuit has no switching action, the high-side power supply voltage is detected in real time by the high-side power supply monitoring circuit built in the high-side power supply refresh circuit, if the high-side power supply voltage is lower than the preset threshold, the high-side power supply refresh logic built in the high-side power supply refresh circuit is turned on, and the charge is provided by the high-side power supply built in the high-side power supply refresh circuit to supplement the charge of the capacitor.

[0040] In some embodiments, the high-side power supply refresh logic is activated in time according to the output state of the high-side power supply refresh circuit.

[0041] Specifically, the high-side voltage refresh circuit in parallel can be linked with the drive control signal and the drive control selection, and the refresh function of the high-side power supply can be activated in time according to the output state of the high-side power supply monitoring circuit, further reducing the chip current loss. An exemplary linkage mode is as follows: first, the high-side power supply refresh circuit in parallel can be controlled by the drive control selection signal, and is synchronized with the working state of the corresponding parallel drive output power tube. When the parallel high-side branch is working, the high-side power supply refresh circuit in parallel is working, and vice versa; second, the high-side power supply refresh circuit in parallel can be controlled by the drive control signal: when the drive control signal needs to turn on the high-side output power tube, the high-side voltage refresh circuit is turned on at the same time; when the drive control signal turns off the high-side output power tube, the high-side voltage refresh circuit is turned off at the same time. In some embodiments, when the high-side power supply refresh circuit detects that the high-side drive power supply of the high-side pre-driver branch decreases, the high-side power supply is activated to ensure the normal working state of the high-side power tube at a low frequency, when the drive circuit is in a low frequency state.

[0042] The embodiment of the present application also provides a power device driving chip, which comprises the power device driving circuit as described in the above embodiment.

[0043] Specifically, the power device driving chip utilizes the parallel enhanced pre-driver branch and power tube architecture proposed in the above embodiment of the present application, and simultaneously combines the high-side power supply refresh circuit and the drive control selection logic in parallel in the high-side pre-driver branch, which can bring the following beneficial effects: 1. The driving capability is significantly improved, that is, a single driving chip can complete the driving of a power tube with a large total gate charge; 2. The power consumption of the driving chip is optimized in real time, which is beneficial to the power consumption reduction of the overall driving system; 3. The driving design is simplified, the PCB area is reduced, and the application scenario with limited space is suitable, and the risk of insufficient reliability caused by the parallel connection of multiple driving chips in the PCB design is avoided; 4. The existing design is compatible, and only the appropriate drive selection logic needs to be selected to complete the drive control of different power tubes; 5. The minimum switching frequency of the driving circuit is no longer limited, and the driving circuit at an extremely low switching frequency is suitable.

[0044] The above detailed description of the specific embodiments of the present application has been given to understand the purpose, technical solutions and beneficial effects of the present application. It should be understood that the above description is only a specific embodiment of the present application and is not used to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A driving circuit of a power device, characterized by comprising: The output end of the drive circuit is connected with the input end of the power device, and the drive circuit comprises: at least two parallel high-side pre-driver branches; wherein each high-side pre-driver branch comprises a high-side pre-driver circuit and a high-side power tube connected in sequence; at least two parallel low-side pre-driver branches; wherein each low-side pre-driver branch comprises a low-side pre-driver circuit and a low-side power tube connected in sequence; and a capacitor connected with the output end of the high-side pre-driver branch; wherein the negative pole of the capacitor is connected with the output end of the high-side pre-driver branch, and the positive pole of the capacitor is connected with the high-side pre-driver branch.

2. The driving circuit of a power device according to claim 1, wherein The high-side pre-driver circuit and the low-side pre-driver circuit each comprise a plurality of inverters connected in sequence along the signal input and output direction, and a PMOS tube and an NMOS tube connected with the output end of the inverter.

3. The driving circuit of a power device according to claim 1, wherein The output end of the high-side pre-driver circuit is connected with the gate of the high-side power tube, and the output end of the low-side pre-driver circuit is connected with the gate of the low-side power tube.

4. The driving circuit of a power device according to claim 1, wherein The output of the high-side power tube is the positive power input of the power device, and the output of the low-side power tube is the negative power input of the power device.

5. The driving circuit of a power device according to claim 1, wherein The drive circuit further comprises: a high-side power refresh circuit connected with the input end of each high-side pre-driver branch; wherein the high-side power refresh circuit is internally provided with a high-side power refresh logic, a high-side power monitoring circuit and a high-side power supply.

6. A driving method of a power device, applied to a driving circuit of a power device according to any one of claims 1 to 5, characterized in that, The method comprises: obtaining the driving requirement parameters of the power device; according to the driving requirement parameters, selecting one or more driving control signals through the pre-configured driving control, and opening or closing one or more high-side pre-driver branches and low-side pre-driver branches by using the driving control signal.

7. The method of claim 6, wherein the gate voltage is applied to the gate electrode of the power device in a pulse form. When the output of the drive circuit is high and the drive circuit has no switching action, the high-side power monitoring circuit internally provided in the high-side power refresh circuit detects the high-side power voltage in real time, and if the high-side power voltage is lower than the preset threshold, the high-side power refresh logic internally provided in the high-side power refresh circuit is turned on, and the charge provided by the high-side power internally provided in the high-side power refresh circuit is used to supplement the charge of the capacitor.

8. The method of claim 7, wherein the gate voltage is applied to the gate electrode of the power device in a pulse form. The high-side power refresh logic is started in time according to the output state of the high-side power refresh circuit.

9. The method of claim 6, wherein the gate voltage is applied to the gate electrode of the power device in a pulse form. When the high-side power refresh circuit detects that the high-side driving power of the high-side pre-driver branch decreases in the low-frequency state of the drive circuit, the high-side power is started to ensure the normal working state of the high-side power tube in the low-frequency state.

10. A driving chip of a power device, characterized by comprising: The drive circuit of the power device comprises any one of the drive circuits according to claims 1 to 5.

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