A bump chip flattening method and a bump chip

Abstract

The application discloses a bump chip planarization method and a bump chip, and relates to the technical field of semiconductors.The method comprises the following steps: a parabola model of a bump profile contour in a planarization process is established; the relationship between the dome height h of the bump and the span d of the bottom surface of the bump is obtained according to the parabola model; the range of the span d of the bottom surface of the bump is obtained and taken as the pad size range I; the pad size range II is calculated according to the chip thrust relationship; the final size range of the pad is obtained by comprehensively considering the pad size range I and the pad size range II; the pad size is determined according to the final size range; the UBM structure wafer is prepared according to the pad size; the solder joint is made on the UBM structure wafer; and the solder joint is planarized layer by layer according to the parabola model. By using the application, the tin ball deformation in the planarization process and the large amount of bump planarization transfer before delivery can be avoided, the bump surface is smooth after planarization, the solder is uniformly spread, the welding cavity rate is reduced, the thermal conductivity and the mechanical strength are significantly improved, and the subsequent packaging processing is facilitated.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, in particular to a Bump chip planarization method and a Bump chip. BACKGROUND

[0002] In wafer level packaging technology, the coplanarity control (i.e. planarization) of LED chip Bump has become a key process of advanced packaging. Its development is driven by the demand for miniaturization, high-density integration and reliability improvement, especially in Mini / Micro LED and flip chip application fields.

[0003] However, the current LED Bump planarization technology faces three major challenges: precision limit of miniaturization, thermal stability decay caused by multi-stage reflow, and high equipment and material costs. Specifically, the Bump of ordinary Bump chip is a dome structure, which will deform during planarization. The cross-section is not enough for Bump planarization mass transfer, so it is necessary to discuss the adjustment of LED Bump planarization technology. SUMMARY

[0004] In view of the deficiencies of the prior art, the purpose of the present application is to provide a Bump chip planarization method to solve the problems of tin ball deformation during planarization and Bump planarization mass transfer before shipment.

[0005] To achieve the above purpose, the technical scheme adopted by the present application is as follows:

[0006] In a first aspect of the present application, a Bump chip planarization method is provided, comprising the steps of:

[0007] According to the dome structure of the Bump of the Bump chip, a parabolic model of the cross-sectional profile of the Bump during planarization is established; the relationship between the dome height h of the Bump and the span d of the bottom surface of the Bump is obtained according to the parabolic model; the range of the span d of the bottom surface of the Bump is obtained according to the relationship between the dome height h of the Bump and the span d of the bottom surface of the Bump, and the range of the span d of the bottom surface of the Bump is taken as the pad size range I; the pad size range II is calculated according to the relationship between the chip thrust; the final size range of the pad is obtained by integrating the pad size range I and the pad size range II; and the pad size is determined according to the obtained final size range of the pad.

[0008] An UBM structure wafer is prepared according to the pad size.

[0009] A solder joint is made on the UBM structure wafer.

[0010] The solder joint is planarized layer by layer according to the parabolic model.

[0011] In some embodiments, the pad of the Bump chip is a square.

[0012] In some embodiments, the parabolic model takes the center of the bump bottom surface as the origin, the dome of the bump as the vertex, the straight line where the diameter of the bump bottom surface is located as the X-axis, and the straight line where the height of the bump is located as the Y-axis.

[0013] In some embodiments, the parabolic model formula is wherein d is the span of the bump bottom surface, h is the height of the dome of the bump; the constraint condition of y is y∈[H, h), wherein H is the final flattening height; the constraint condition of x is x∈[-d / 2, d / 2] and x∈[D, +∞), wherein D is the value of the radius of the bump bottom surface that satisfies the minimum adhesion of the blue film.

[0014] In some embodiments, the diameter of the bump bottom surface ranges from that is, the range of the pad size I is wherein is the pad size.

[0015] In some embodiments, the chip thrust relationship is F=A*σ, wherein A is the area of the pad, σ is the shear strength of the welding material, and F is the thrust.

[0016] In some embodiments, the UBM structure wafer sequentially comprises, from bottom to top, a chip layer, a pad, a bonding layer, a wetting layer, and an oxidation-resistant layer.

[0017] In some embodiments, the bonding layer is a Ti-Pt-Ti metal layer, the wetting layer is a Ni metal layer, and the oxidation-resistant layer is an Au metal layer.

[0018] In some embodiments, the solder joint is flattened layer by layer by a flattening machine, and the grinding wheel speed of the flattening machine is 1200r / min-1800r / min.

[0019] The application also provides a Bump chip that is flattened by the Bump chip flattening method.

[0020] The application has the following beneficial effects:

[0021] The application establishes a parabolic model of the bump, designs the pad size of the Bump chip, and flattens according to the model, thereby avoiding deformation of the tin ball during flattening and a large amount of transfer of the Bump chip before shipment, making the bump surface flat after flattening, evenly spreading the solder, reducing the solder void rate, and significantly improving the thermal conductivity and mechanical strength; at the same time, the Bump chip surface is flat, improving the pick-up stability of the suction nozzle of the die bonder, and the transfer yield can be improved to 99.99%, ensuring that the Bump chip is parallelly attached to the substrate and preventing tilting caused by uneven pressure. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 Flow chart of the Bump chip planarization method of the present application;

[0023] Figure 2 Parabolic model schematic diagram of the present application;

[0024] Figure 3 UBM structure wafer structure schematic diagram of the present application;

[0025] Figure 4 Printing process schematic diagram of the present application;

[0026] Figure 5 Bump chip appearance schematic diagram after printing of the present application;

[0027] Figure 6 Bump chip appearance schematic diagram after reflow soldering of the present application;

[0028] Figure 7 Bump chip appearance schematic diagram after planarization of the present application;

[0029] Figure 8 Bump chip planarization process schematic diagram of the embodiment of the present application;

[0030] Figure 9 Bump chip appearance deformation trend schematic diagram;

[0031] Figure 10 Bump chip appearance schematic diagram after reverse film forming of the embodiment of the present application;

[0032] Figure 11 Bump chip planarization process schematic diagram of the comparative example of the present application. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical scheme and advantages of the present application more clear, the embodiments of the present application will be further described in detail below with reference to the drawings.

[0034] Reference Figure 1 The Bump chip planarization method of the embodiment of the present application is shown, and the method specifically comprises the following steps:

[0035] S101, determining the chip pad size.

[0036] The scheme of the present application mainly determines the chip pad size through two aspects, respectively obtaining pad size range I and pad size range II, and then obtaining the final pad size range by comprehensively considering the above two ranges; and then determining the pad size according to the obtained final pad size range. Specifically:

[0037] (1) According to the dome structure of the bump of the Bump chip, a parabolic model of the profile of the bump in the planarization process is established.

[0038] On the one hand, starting from the planarization process, a parabolic model of the profile of the bump is established according to the dome structure of the bump of the Bump chip.

[0039] Specifically, referring to Figure 2 , the parabolic model takes the center of the bottom surface of the bump as the origin, the dome of the bump as the vertex, and the line where the diameter of the bottom surface of the bump is located as the X-axis, and the line where the height of the bump is located as the Y-axis.

[0040] In this way, the formula of the parabolic model can be established as , d is the span of the bottom surface of the bump, and h is the height of the dome of the bump.

[0041] (2) According to the parabolic model, the relationship between the height h of the dome of the bump and the span d of the bottom surface of the bump is obtained.

[0042] In this way, according to the final planarization height H, it can be obtained that the constraint condition of y is: y∈[H, h).

[0043] The constraint condition of x is x∈[-d / 2, d / 2], and in addition, combined with the adhesion force of the blue film, in order to ensure that the bottom surface of the bump can adhere to the blue film after the final planarization, therefore, x cannot be too small, and there is usually a minimum value, that is, x∈[D, +∞), and the value of D is the radius value of the bottom surface of the bump that satisfies the minimum adhesion force of the blue film. For example, in a specific embodiment, when the adhesion force of the blue film is ≥60g / mm, the radius D of the bump is ≥42μm. That is, at this time, x needs to satisfy the constraint condition: x∈[-d / 2, d / 2] and x∈[42, +∞).

[0044] The range of h can be set according to the final planarization height and actual operation experience. For example, in an embodiment, according to the actual operation process of the product, it is found that when the height of the Bump is higher than 90μm, the appearance of the Bump projection will be deformed, affecting the appearance of the planarization; at the same time, the customer requires the final planarization height to be 50μm, and therefore the constraint condition of h is: h∈[-50, 90].

[0045] Further, combined with the above parabolic formula, the relationship between h and d can be obtained as: .

[0046] (3) According to the relationship between the height h of the dome of the bump and the span d of the bottom surface of the bump, the range of the span d of the bottom surface of the bump is obtained, and the range of the span d of the bottom surface of the bump is taken as the pad size range I.

[0047] In combination with the actual situation, in the Bump chip, the bump is located above the pad, so the side length of the pad needs to be greater than the span of the bottom surface of the bump, and therefore the pad size range I can be obtained: , the range of which combined with h, the specific range of the pad size L1 can be calculated.

[0048] (4) According to the chip thrust relationship, the pad size range II is calculated.

[0049] On the other hand, in the process of making Bump chips, it is necessary to pass the thrust test. Specifically, the chip thrust calculation formula is F=A*σ, where A is the area of the chip pad, σ is the shear strength of the welding material, and F is the thrust.

[0050] Therefore, for a square pad, in order to meet the thrust test, the pad side length also needs to meet .

[0051] Therefore, the pad size range II can be obtained: .

[0052] (5) The final size range of the pad is obtained by combining the pad size range I and the pad size range II.

[0053] Further, by comparing the two ranges, it can be determined that the pad size range is .

[0054] (6) The final size range of the pad is determined according to the obtained final size range of the pad.

[0055] In actual production, the pad size is selected within the range.

[0056] S102, prepare a UBM (Under-Bump Metallization) structure wafer according to the pad size.

[0057] According to the pad size calculated above, the UBM structure wafer is made. In some embodiments, referring to Figure 3 , the UBM structure wafer includes, from bottom to top, a chip layer 1, a pad 2, an adhesive layer 3, a wetting layer 4, and an oxidation-resistant layer 5. Specifically, in some embodiments, the adhesive layer 3 is a Ti-Pt-Ti metal layer, the wetting layer 4 is a Ni metal layer, and the oxidation-resistant layer 5 is an Au metal layer.

[0058] S103, print tin paste and reflow soldering to make solder joints on the UBM structure wafer.

[0059] Specifically, the prepared UBM structure wafer is first processed by tin brushing process, and then the printed Bump chip is transported to the reflow soldering machine, the tin paste is gradually heated and melted to form solder joints, i.e. bumps. Referring to Figure 4 an example of a tin paste printing process schematic diagram ( Figure 4Stencil, Flux, UBM, Water, solder, Figure 5 The appearance of the bump chip after printing is shown in the following figure, Figure 6 The appearance of the bump chip after reflow soldering is shown in the following figure.

[0060] S104, flattening the solder joint layer by layer according to the parabolic model.

[0061] The bump (i.e. solder joint) formed after reflow soldering is flattened layer by layer according to the parabolic model established above until the set final flattening height is reached. Since the deformation height and other factors have been considered in modeling, the tin ball deformation or insufficient cross-section to meet the bump flattening mass transfer can be avoided in the flattening process, and the flattening quality is improved. Figure 7 The appearance of the bump chip after flattening is shown in the following figure.

[0062] Specifically, the bump can be flattened by a grinding machine. In some embodiments, the grinding wheel speed of the grinding machine is 1200 r / min to 1800 r / min.

[0063] The following will be further described in combination with specific embodiments.

[0064] Embodiment

[0065] This embodiment takes the Bump chip RB4343C product produced by the applicant company as an example. The chip pad is square, the side length (i.e. pad size range) is L, and it needs to be flattened to 55±5 μm. The final flattening height H is considered to be 50 μm. Referring to Figure 8 , the specific flattening process includes the following steps:

[0066] S201, determine the chip pad size.

[0067] 1) Set the parabolic model formula of the bump as .

[0068] The final flattening height of the Bump chip is 50 μm, so the constraint condition of y is y∈[50, h).

[0069] When the adhesion of the blue film is greater than or equal to 60 g / mm, the constraint condition of x is x∈[-d / 2, d / 2] and x∈[42, +∞).

[0070] According to the actual operation process of the product, when the height of the Bump chip is higher than 90 μm, the appearance of the Bump bump will be deformed, which will affect the appearance of the flattening, such as Figure 9 Therefore, the constraint condition of h is h∈[50, 90].

[0071] In summary, the relationship between h and d is as follows: and h∈[50, 90].

[0072] The bump dome height h of the Bump chip of the RB4343C product is set to 80 μm. By substituting the above formula, d≥126 μm can be calculated. Then the pad size range I: L1≥126 μm can be obtained.

[0073] 2) For the RB4343C product, F=2000 gf, σ=3*40 Mpa, according to the calculation formula of the chip thrust, the pad size range II: L2≥228 μm can be obtained.

[0074] 3) By comparing the pad size range I and the pad size range II, it can be concluded that the pad side length should satisfy L≥228 μm. Therefore, in actual design, the pad side length should be selected within the range. For example, the pad side length can be selected as 228 μm, 230 μm, 240 μm, 250 μm, 280 μm, 300 μm, etc. Specifically, in this embodiment, the pad side length is set to 300 μm.

[0075] S202, preparing a UBM structure wafer.

[0076] According to the pad side length determined above, the UBM structure wafer is prepared. The UBM structure wafer includes, from bottom to top, a chip layer, a pad, an adhesive layer, a wetting layer, and an oxidation-resistant layer. The adhesive layer is a Ti-Pt-Ti metal layer, the wetting layer is a Ni metal layer, and the oxidation-resistant layer is an Au metal layer.

[0077] S203, printing tin paste and reflow soldering.

[0078] Specifically, a steel screen stencil is used to print tin paste flux on the surface of the UBM structure wafer. In this embodiment, an MPM Momentum II 100 printer is used for printing.

[0079] Then the printed chip is transported to a reflow oven, the tin paste is gradually heated and melted, and the solder joint, i.e., the bump, is formed.

[0080] S204, planarization.

[0081] The bump is planarized layer by layer according to the parabolic model established above by using a planarization machine, until the final planarization height is reached. The speed of the grinding wheel of the planarization machine is 1500 r / min.

[0082] The planarization appearance of the obtained product is shown in Figure 8 and the appearance of the chip after film pouring is shown in Figure 10 .

[0083] Comparative Example

[0084] Reference Figure 11 The difference from the embodiment is that the pad side length is set to 200 μm in step S201, and the remaining steps are the same.

[0085] The schematic diagram of the appearance of the obtained product is shown in FIG. 2. Figure 11 It can be seen that the bump surface is not flat enough after planarization due to the unreasonable pad size, and the demolding cannot be completed during the reverse coating, and the defective rate is high.

[0086] In summary, the planarization method of the present application establishes a parabolic model, constructs the relationship between the planarization height and the planarization radius, considers the deformation of the tin ball during the planarization process and the mass transfer of the Bump chip before delivery, and finally determines the pad size in combination with the thrust test requirements. Referring to the established model during the planarization process, the Bump chip planarization after the bump surface is flat, the solder is uniformly spread, the welding cavity rate is reduced, the thermal conductivity and mechanical strength are significantly improved; at the same time, the Bump chip surface is flat, the pick-up stability of the suction nozzle of the die bonder is improved, the transfer yield can be improved to 99.99%, the Bump chip is parallelly attached to the substrate, and the inclination caused by uneven pressure is prevented.

[0087] The technical features of the above-described embodiments can be combined arbitrarily, and in order to make the description simple, all possible combinations of the technical features in the above-described embodiments are not described, however, as long as the combination of the technical features does not exist contradictory, it should be considered as the scope of the present application. It should be noted that for those skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are within the scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A method for polishing a bump chip, characterized in that, Including the following steps: Based on the dome structure of the bumps in the Bump chip, a parabolic model of the bump profile during the polishing process is established. The parabolic model has the center of the bump's bottom surface as the origin, the bump's dome as the vertex, the line containing the diameter of the bump's bottom surface as the X-axis, and the line containing the bump's height as the Y-axis. The formula for the parabolic model is: Where d is the span of the bottom surface of the convex point, and h is the height of the dome of the convex point; the constraint condition of y is: y∈[H, h), where H is the final flattening height; the constraint condition of x is: x∈[-d / 2, d / 2], and x∈[D, +∞), where D is the radius of the bottom surface of the convex point that satisfies the minimum blue film adhesion force; The relationship between the height h of the dome and the span d of the bottom surface of the dome is obtained based on the parabolic model. Based on the relationship between the height h of the bump dome and the span d of the bottom surface of the bump, the range of the bottom surface span d of the bump is obtained, and the range of the bottom surface span d of the bump is taken as the pad size range I; Based on the chip thrust relationship, the pad size range II is calculated; The final size range of the pads is obtained by combining the pad size range I and the pad size range II. Determine the pad size based on the final size range of the obtained pads; UBM structure wafers are fabricated according to the pad dimensions; Solder joints are fabricated on the UBM structure wafer; The weld points are smoothed layer by layer according to the parabolic model.

2. The method for polishing a bump chip according to claim 1, characterized in that, The pads of the Bump chip are square.

3. The method for polishing a bump chip according to claim 1, characterized in that, The range of the bottom diameter of the convex point is: That is, the pad size range I is: ,in, This refers to the pad size.

4. The method for polishing a bump chip according to claim 1, characterized in that, The chip thrust relationship is: F=A*σ, where A is the area of ​​the pad, σ is the shear strength of the soldering material, and F is the thrust.

5. The method for polishing a bump chip according to claim 1, characterized in that, The UBM structure wafer, from bottom to top, includes a chip layer, pads, adhesive layer, wetting layer, and antioxidant layer.

6. The method for polishing a bump chip according to claim 5, characterized in that, The adhesive layer is a Ti-Pt-Ti metal layer, the wetting layer is a Ni metal layer, and the anti-oxidation layer is an Au metal layer.

7. The method for polishing a bump chip according to claim 1, characterized in that, The weld points are polished layer by layer using a grinding machine, and the grinding wheel speed of the grinding machine is 1200r / min to 1800r / min.

8. A bump chip, characterized in that, The chip is polished using the polishing method described in any one of claims 1-7.

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