Low-power-consumption broadband injection locking frequency divider based on S0I technology

Abstract

The invention relates to the technical field of radio frequency integrated circuits, and particularly provides a low-power-consumption broadband injection locking frequency divider based on an S0I process, which comprises an oscillator circuit and an injection locking circuit, the oscillator circuit generates an oscillation signal; the injection locking circuit comprises an injection unit and a frequency tracking unit, the injection unit receives a plurality of injection signals, and the frequency tracking unit adjusts the phase of injection current; the injection locking circuit injects the adjusted injection current and injection signal into a differential output node and a common mode node of the oscillator circuit respectively, and the injection current and injection signal are mixed and coupled with an oscillation signal. According to the frequency divider, cooperative injection is carried out on the output node and the common-mode node of the oscillator circuit, the injection intensity is improved, meanwhile, the frequency tracking unit is introduced to achieve self-adaptive tracking of the injection frequency, the injection locking range of the frequency divider is remarkably widened while low power consumption is kept, the injection locking range can be adjusted in a self-adaptive mode, and the frequency divider is high in practicability. Therefore, the frequency drift of the millimeter wave frequency band is dealt with, and the robustness of the system is improved.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuit technology, and in particular to a low-power broadband injection-locked divider based on SOI technology. Background Technology

[0002] In the evolution of high-speed wireless communication systems towards the millimeter-wave band, phase-locked loops (PLLs), as frequency synthesis circuits, largely determine the overall system performance. Frequency dividers, as the core unit in both RF and millimeter-wave PLLs, are primarily used to divide high-frequency signals for easier use and processing by subsequent circuits. Their performance directly constrains the power consumption and bandwidth of the entire transceiver link. In systems such as PLLs, frequency synthesizers, and wireless transceivers, the main performance requirements for frequency dividers are low power consumption, high frequency, and large bandwidth. Traditional current-mode logic frequency dividers can meet the bandwidth requirements, but suffer from high power consumption at high frequencies. Miller dividers can meet high-frequency design requirements, but their bandwidth is limited by their power consumption. In contrast, injection-locked frequency dividers offer advantages such as low power consumption and high frequency, making them the preferred solution for high-frequency systems or applications.

[0003] In existing technologies, LC-type injection-locked frequency dividers possess both low power consumption and high operating frequency. However, due to the relatively high quality factor and good frequency selectivity of the LC oscillator structure, but weak out-of-band signal gain, the injection-locking range of this structure is narrow. In millimeter-wave applications, due to factors such as frequency drift, temperature variations, or process deviations, injection-locked frequency dividers need to have a wide locking range to adapt to dynamic environments and ensure stable frequency division. However, a narrow locking range can cause the system to lose lock when the frequency changes, affecting communication reliability. This limits its application in today's high-speed wireless communication systems that require high data transmission and low power consumption. Traditional methods for improving the injection-locking range mainly fall into three categories: 1) reducing the quality factor Q of the resonant cavity network; 2) increasing the size of the injection tube to increase the injection intensity; and 3) reducing the current of the main circuit. While the above three methods improve the locking range to some extent, they have significant problems and drawbacks: 1) The decrease in quality factor leads to increased losses in the resonant cavity network, resulting in increased circuit power consumption; 2) The increased size of the injection transistor leads to increased parasitic capacitance at the source and drain terminals, thus suppressing the circuit's resonant frequency; 3) Reducing the current in the main circuit reduces the oscillation energy supply, resulting in decreased circuit gain and attenuated oscillation capability. These methods often sacrifice power consumption or frequency performance while improving the locking range, failing to meet the combined requirements of low power consumption and wide bandwidth in millimeter-wave systems. Therefore, there is an urgent need for an injection-locked frequency divider structure that can improve the injection locking range while maintaining low power consumption. Summary of the Invention

[0004] To address the aforementioned issues, this application provides a low-power broadband injection-locked frequency divider based on SOI technology.

[0005] To achieve the objectives of this application, the following technical solution is provided: This application provides a low-power broadband injection-locked frequency divider based on SOI technology, including an oscillator circuit and an injection-locked circuit; The oscillator circuit includes an LC resonator and a negative resistance unit. The negative resistance unit is used to provide oscillation energy to the LC resonator, and the LC resonator is used to generate an oscillation signal. The injection locking circuit includes an injection unit and a frequency tracking unit. The injection unit is used to receive multiple injection signals and convert a first injection signal into a first injection current. The frequency tracking unit is used to adjust the phase of the first injection current. The injection lock circuit is used to inject the adjusted first injection current and the second injection signal into the differential output node and the common-mode node of the oscillator circuit, respectively. The oscillation signal and the adjusted first injection current and the second injection signal are respectively mixed and coupled at the differential output node and the common-mode node.

[0006] As a preferred embodiment of the present invention, the LC resonator includes a first inductor, a second inductor, a first capacitor, and a second capacitor; The first end of the first inductor is connected to the first end of the first capacitor, and the second end is connected to the first end of the second inductor; The first terminal of the second capacitor is connected to the second terminal of the first capacitor, and the second terminal is connected to the second terminal of the second inductor.

[0007] As a preferred embodiment of the present invention, the negative resistance unit includes a first NMOS transistor and a second NMOS transistor; The gate and body of the first NMOS transistor are connected together with the drain of the second NMOS transistor and the second terminal of the second capacitor; The gate and body of the second NMOS transistor are connected together with the drain of the first NMOS transistor and the first terminal of the first capacitor, and the source is connected to the source of the first NMOS transistor.

[0008] As a preferred embodiment of the present invention, the threshold voltages of the first NMOS transistor and the second NMOS transistor are adjusted based on an adaptive body bias circuit.

[0009] As a preferred embodiment of the present invention, the injection unit includes a differential injection unit, a tail injection unit, and a tail filter coupled injection unit; The differential injection unit includes a third NMOS transistor and a first PMOS transistor; The gate of the third NMOS transistor is connected to the first differential injection signal, the drain is connected to the drain of the first PMOS transistor and the first input terminal of the frequency tracking unit, and the source is connected to the source of the first PMOS transistor and the second input terminal of the frequency tracking unit. The gate of the first PMOS transistor is connected to the second differential injection signal.

[0010] As a preferred embodiment of the present invention, the body terminals of both the third NMOS transistor and the first PMOS transistor are connected to a second bias voltage to adjust the first voltage of the transistor, wherein the first voltage is the voltage between the body terminal and the source of the transistor.

[0011] As a preferred embodiment of the present invention, the frequency tracking unit includes a third inductor, a fourth inductor, a third capacitor, and a fourth capacitor; The first end of the third inductor is connected to the first end of the first capacitor and the first differential output node, and the second end is connected to the first end of the third capacitor and the drain of the third NMOS transistor. The first end of the fourth inductor is connected to the first end of the fourth capacitor and the source of the third NMOS transistor, and the second end is connected to the second end of the second capacitor and the second differential output node. The second terminal of the third capacitor and the second terminal of the fourth capacitor are both grounded; The third inductor and the first inductor form a first coupling transformer, and the coupling coefficient is the first coupling coefficient K1; The fourth inductor and the second inductor form a second coupling transformer, with a coupling coefficient equal to the first coupling coefficient K1.

[0012] As a preferred embodiment of the present invention, the tail injection unit includes a fifth capacitor, a resistor, and a fourth NMOS transistor; The first end of the fifth capacitor is connected to the second injection signal, and the second end is connected together with one end of the resistor and the gate of the fourth NMOS transistor; the other end of the resistor is connected to the first bias voltage; the drain of the fourth NMOS transistor is connected to the tail filter coupling injection unit, and the source is grounded.

[0013] As a preferred embodiment of the present invention, the tail filter coupling injection unit includes a fifth inductor and a sixth capacitor; The first end of the fifth inductor is connected to the drain of the fourth NMOS transistor, and the second end is connected to the source of the first NMOS transistor and the second NMOS transistor, as well as the common-mode node. The first terminal of the sixth capacitor is connected to the source of the first NMOS transistor, and the second terminal is grounded. The fifth inductor and the first inductor form a third coupling transformer, with a coupling coefficient of the second coupling coefficient K2. The fifth inductor and the second inductor form a fourth coupling transformer, with a coupling coefficient of the second coupling coefficient K2. The fifth inductor and the third inductor form a fifth coupling transformer, with a coupling coefficient of the third coupling coefficient K3. The fifth inductor and the fourth inductor form the sixth coupling transformer, with a coupling coefficient of the third coupling coefficient K3.

[0014] Beneficial effects: This invention improves the injection strength by coordinating injection into the output node and common-mode node of the oscillator circuit. At the same time, it introduces a frequency tracking unit to achieve adaptive tracking of the injection frequency. While maintaining low power consumption, it significantly improves the injection lock-in range of the frequency divider and can also adaptively adjust the injection lock-in range, thereby coping with frequency drift in the millimeter-wave band and improving the system robustness. Attached Figure Description

[0015] The accompanying drawings are provided to further understand this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. Figure 1 A schematic diagram of the circuit structure of a low-power broadband injection-locked divider based on SOI technology is provided for an embodiment of this application; Figure 2 This is a phasor diagram illustrating adaptive band tracking of a low-power broadband injection-locked divider based on SOI technology, provided as an embodiment of this application. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0017] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; in the description of this application, unless otherwise stated, "multiple" means two or more.

[0018] This application provides a low-power broadband injection-locked frequency divider based on SOI technology, comprising an oscillator circuit and an injection-locked circuit. The oscillator circuit includes an LC resonator and a negative resistance unit. The negative resistance unit is used to provide oscillation energy to the LC resonator, and the LC resonator is used to generate an oscillation signal. The injection locking circuit includes an injection unit and a frequency tracking unit. The injection unit is used to receive multiple injection signals and convert a first injection signal into a first injection current. The frequency tracking unit is used to adjust the phase of the first injection current. The injection lock circuit is used to inject the adjusted first injection current and the second injection signal into the differential output node and the common-mode node of the oscillator circuit, respectively. The oscillation signal and the adjusted first injection current and the second injection signal are respectively mixed and coupled at the differential output node and the common-mode node.

[0019] The technical solution of the present invention is described below with reference to the embodiments shown in the accompanying drawings: In the embodiments of this application, such as Figure 1 As shown, the LC resonator includes a first inductor L1, a second inductor L2, a first capacitor C1, and a second capacitor C2; The first end of the first inductor L1 is connected to the first end of the first capacitor C1, and the second end is connected to the first end of the second inductor L2. The first end of the second capacitor C2 is connected to the second end of the first capacitor C1, and the second end is connected to the second end of the second inductor L2.

[0020] It is understandable that the LC resonator is connected to the power supply voltage, which provides DC excitation to the LC resonator, enabling the LC resonator to output a continuous oscillation signal that is transmitted to the circuit output node.

[0021] In the embodiments of this application, such as Figure 1 As shown, the negative resistance unit includes a first NMOS transistor M1 and a second NMOS transistor M2; The gate and body of the first NMOS transistor M1 are connected together with the drain of the second NMOS transistor M2 and the second terminal of the second capacitor C2; The gate and body of the second NMOS transistor M2 are connected together with the drain of the first NMOS transistor M1 and the first terminal of the first capacitor C1, and the source is connected to the source of the first NMOS transistor M1.

[0022] Understandably, the first NMOS transistor M1 and the second NMOS transistor M2 in the negative resistance unit are cross-coupled to form a negative resistance pair, providing oscillation energy for the LC resonator and compensating for its oscillation losses. Since the oscillation signal generated by the LC resonator is a fixed-frequency decaying oscillation waveform, to prevent it from continuously decaying, the impedance in the circuit is canceled out through the negative resistance unit, thereby transforming the fixed-frequency oscillation signal into a stable output oscillation waveform.

[0023] Furthermore, it can be understood that the threshold voltage Vth of the transistor is modulated in real time through a cross-coupled body bias network. A dynamic bias circuit is introduced at the body terminals of the SOI-based NMOS transistors M1 and M2, where the body voltage Vbody is driven by the drain voltage node signal of the cross-coupled transistors. When the gate voltage VG of NMOS transistors M1 and M2 decreases, Vbody decreases synchronously, causing Vth to increase, thereby accelerating turn-off (reducing subthreshold leakage); when the gate voltage VG of NMOS transistors M1 and M2 increases, Vbody increases synchronously, causing Vth to decrease, thereby accelerating turn-on (reducing conduction delay). Compared to traditional structures, by adaptively adjusting the threshold voltage to reduce the threshold voltage period, and combining this with the isolation characteristics of the SOI process to reduce the power supply voltage, power consumption is reduced.

[0024] In this embodiment, the injection unit includes a differential injection unit, a tail injection unit, and a tail filter coupled injection unit; The differential injection unit includes a third NMOS transistor M3 and a first PMOS transistor M4; The gate of the third NMOS transistor M3 is connected to the first differential injection signal, the drain is connected to the drain of the first PMOS transistor M4 and the first input terminal of the frequency tracking unit, and the source is connected to the source of the first PMOS transistor M4 and the second input terminal of the frequency tracking unit. The gate of the first PMOS transistor M4 is connected to the second differential injection signal; The body terminals of the third NMOS transistor M3 and the first PMOS transistor M4 are both connected to a second bias voltage to adjust the first voltage of the transistor, which is the voltage between the body terminal and the source of the transistor.

[0025] Understandably, this application uses a differential injection unit instead of a traditional direct injection unit (such as single-ended injection). This design utilizes the symmetry of differential signals, avoiding the limitations of traditional direct injection units that use single-ended signals, and directly achieves the interface between the oscillator's differential output and the frequency divider's differential injection, improving interface convenience and signal integrity. Simultaneously, differential injection has inherent common-mode noise suppression capabilities, reducing environmental interference and improving the frequency divider's robustness and locking range.

[0026] Furthermore, it is understandable that, such as Figure 1 As shown, the junction of the drain of M1 and the first terminal of L3, and the junction of the drain of M2 and the second terminal of L4, are the differential output nodes of the oscillator circuit. The differential injection adopts a differential double-ended injection structure, and the differential injection signal V... INJ+ Differential injection signal V is injected through the gate injection circuit of transistor M3. INJ-By utilizing the gate injection circuit of transistor M4, the complementary characteristics of NMOS and PMOS transistors are employed to enhance the anti-interference capability of the injected signal. The drain and source terminals of the injected NMOS transistor M3 and injected PMOS transistor M4 are connected together and bridged between the two differential output nodes. The transconductance of the transistors converts the injected signal into a current signal across the drain and source terminals. After automatic phase adjustment by the frequency tracking unit, the current signal is bridged between the two differential output nodes and mixed with the output oscillation signal. The body terminals of both injected NMOS transistor M3 and injected PMOS transistor M4 are connected to a second bias voltage V. B2 Used to regulate the body-source voltage V BS Reduce threshold voltage V th This increases the transconductance gm and injection gain, which can be described by the formula: ; Among them, positive V BS (i.e. V) BS >0) Decrease V th This leads to an increase in transconductance ( ), relative change in transconductance This increases the injection gain, thereby directly expanding the lock-in range. At the same time, the isolation characteristics of the SOI process ensure that the volume bias does not introduce parasitic effects, maintaining the low power consumption advantage.

[0027] In this embodiment of the application, the frequency tracking unit includes a third inductor, a fourth inductor, a third capacitor, and a fourth capacitor; The first end of the third inductor is connected to the first end of the first capacitor C1 and the first differential output node, and the second end is connected to the first end of the third capacitor and the drain of the third NMOS transistor M3. The first end of the fourth inductor is connected to the first end of the fourth capacitor and the source of the third NMOS transistor M3, and the second end is connected to the second end of the second capacitor C2 and the second differential output node. The second terminal of the third capacitor and the second terminal of the fourth capacitor are both grounded; The third inductor and the first inductor L1 form a first coupling transformer, and the coupling coefficient is the first coupling coefficient K1; The fourth inductor and the second inductor L2 form a second coupling transformer, with a coupling coefficient of the first coupling coefficient K1.

[0028] It is understandable that, such as Figure 1 As shown, the LC network composed of the third inductor L3, the fourth inductor L4, the third capacitor C3, and the fourth capacitor C4 constitutes a frequency-dependent phase adjustment path; as Figure 2 As shown, this network automatically adjusts the phase of the injected current as the frequency changes, generating an imaginary current i. trackCompared with traditional hybrid current i mix The synergistic effect compensates for the phase shift of the LC resonant cavity at non-resonant frequencies, allowing the trajectory of the injected admittance to move vertically with frequency in the complex plane. This greatly expands the frequency band that can satisfy the phase condition, without introducing excessive losses or deteriorating the gain condition as in traditional methods.

[0029] In this embodiment, the tail injection unit includes a fifth capacitor C5, a resistor R, and a fourth NMOS transistor; The first end of the fifth capacitor C5 is connected to the second injection signal, and the second end is connected together with one end of the resistor R and the gate of the fourth NMOS transistor; the other end of the resistor R is connected to the first bias voltage; the drain of the fourth NMOS transistor is connected to the tail filter coupling injection unit, and the source is grounded.

[0030] It is understandable that, such as Figure 1 As shown, tail injection is achieved through tail current transistor M5, and the injection signal V... INJ The DC blocking capacitor C5 and the bias voltage VB are injected into the gate of the tail current transistor M5 through the resistor R. The transconductance of the tail current transistor M4 is converted into a current signal to modulate the common source node current, which is then mixed and coupled with the output oscillation signal.

[0031] In this embodiment, the tail filter coupling injection unit includes a fifth inductor LT and a sixth capacitor CT; The first end of the fifth inductor LT is connected to the drain of the fourth NMOS transistor, and the second end is connected to the source of the first NMOS transistor M1 and the second NMOS transistor M2, as well as the common-mode node. The first terminal of the sixth capacitor CT is connected to the source of the first NMOS transistor M1, and the second terminal is grounded. The fifth inductor LT and the first inductor L1 form a third coupling transformer, with a coupling coefficient of the second coupling coefficient K2. The fifth inductor LT and the second inductor L2 form a fourth coupling transformer, with a coupling coefficient of the second coupling coefficient K2. The fifth inductor LT and the third inductor form a fifth coupling transformer, with a coupling coefficient of the third coupling coefficient K3. The fifth inductor LT and the fourth inductor form the sixth coupling transformer, with a coupling coefficient of the third coupling coefficient K3. It is understandable that, such as Figure 1As shown, the common-mode node is the node where the source of M1 and M2 is connected to the inductor LT. The tail filter coupling injection is achieved by connecting the inductor LT and the capacitor CT in parallel at the common-mode node to form an LC resonant filter. The injected signal is electromagnetically coupled to the inductor LT through the LC filter, while suppressing harmonic interference signals, and then injected into the common-mode node.

[0032] It should be noted that, in this disclosure, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0033] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit it. This application is not limited to the exact structures described above and illustrated in the accompanying drawings, and it should not be considered that the specific implementation of this application is limited to these descriptions. For those skilled in the art, various changes and modifications made without departing from the concept of this application should be considered to fall within the protection scope of this application.

Claims

1. A low-power broadband injection-locked frequency divider based on SOI technology, characterized in that, Includes oscillator circuitry and injection lockout circuitry; The oscillator circuit includes an LC resonator and a negative resistance unit. The negative resistance unit is used to provide oscillation energy to the LC resonator, and the LC resonator is used to generate an oscillation signal. The injection locking circuit includes an injection unit and a frequency tracking unit. The injection unit is used to receive multiple injection signals and convert a first injection signal into a first injection current. The frequency tracking unit is used to adjust the phase of the first injection current. The injection lock circuit is used to inject the adjusted first injection current and the second injection signal into the differential output node and the common-mode node of the oscillator circuit, respectively. The oscillation signal and the adjusted first injection current and the second injection signal are respectively mixed and coupled at the differential output node and the common-mode node.

2. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 1, characterized in that, The LC resonator includes a first inductor, a second inductor, a first capacitor, and a second capacitor; The first end of the first inductor is connected to the first end of the first capacitor, and the second end is connected to the first end of the second inductor; The first terminal of the second capacitor is connected to the second terminal of the first capacitor, and the second terminal is connected to the second terminal of the second inductor.

3. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 2, characterized in that, The negative resistance unit includes a first NMOS transistor and a second NMOS transistor; The gate and body of the first NMOS transistor are connected together with the drain of the second NMOS transistor and the second terminal of the second capacitor; The gate and body of the second NMOS transistor are connected together with the drain of the first NMOS transistor and the first terminal of the first capacitor, and the source is connected to the source of the first NMOS transistor.

4. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 3, characterized in that, The threshold voltages of the first NMOS transistor and the second NMOS transistor are adjusted based on an adaptive body bias circuit.

5. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 3, characterized in that, The injection unit includes a differential injection unit, a tail injection unit, and a tail filter coupled injection unit; The differential injection unit includes a third NMOS transistor and a first PMOS transistor; The gate of the third NMOS transistor is connected to the first differential injection signal, the drain is connected to the drain of the first PMOS transistor and the first input terminal of the frequency tracking unit, and the source is connected to the source of the first PMOS transistor and the second input terminal of the frequency tracking unit. The gate of the first PMOS transistor is connected to the second differential injection signal.

6. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 5, characterized in that, The body terminals of both the third NMOS transistor and the first PMOS transistor are connected to a second bias voltage to adjust the first voltage of the transistor, which is the voltage between the body terminal and the source of the transistor.

7. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 5, characterized in that, The frequency tracking unit includes a third inductor, a fourth inductor, a third capacitor, and a fourth capacitor; The first end of the third inductor is connected to the first end of the first capacitor and the first differential output node, and the second end is connected to the first end of the third capacitor and the drain of the third NMOS transistor. The first end of the fourth inductor is connected to the first end of the fourth capacitor and the source of the third NMOS transistor, and the second end is connected to the second end of the second capacitor and the second differential output node. The second terminal of the third capacitor and the second terminal of the fourth capacitor are both grounded; The third inductor and the first inductor form a first coupling transformer, and the coupling coefficient is the first coupling coefficient K1; The fourth inductor and the second inductor form a second coupling transformer, with a coupling coefficient equal to the first coupling coefficient K1.

8. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 7, characterized in that, The tail injection unit includes a fifth capacitor, a resistor, and a fourth NMOS transistor; The first end of the fifth capacitor is connected to the second injection signal, and the second end is connected together with one end of the resistor and the gate of the fourth NMOS transistor; the other end of the resistor is connected to the first bias voltage; the drain of the fourth NMOS transistor is connected to the tail filter coupling injection unit, and the source is grounded.

9. The low-power broadband injection-locked frequency divider based on SOI technology according to claim 8, characterized in that, The tail filter coupling injection unit includes a fifth inductor and a sixth capacitor; The first end of the fifth inductor is connected to the drain of the fourth NMOS transistor, and the second end is connected to the source of the first NMOS transistor and the second NMOS transistor, as well as the common-mode node. The first terminal of the sixth capacitor is connected to the source of the first NMOS transistor, and the second terminal is grounded. The fifth inductor and the first inductor form a third coupling transformer, with a coupling coefficient of the second coupling coefficient K2. The fifth inductor and the second inductor form a fourth coupling transformer, with a coupling coefficient of the second coupling coefficient K2. The fifth inductor and the third inductor form a fifth coupling transformer, with a coupling coefficient of the third coupling coefficient K3. The fifth inductor and the fourth inductor form the sixth coupling transformer, with a coupling coefficient of the third coupling coefficient K3.

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