Training apparatus and training method for high speed differential signal skew

The offset calibration and delay training modules in the training device solve the problem of high-speed differential signal offset, improve the reliability and adaptability of signal transmission, and meet the high-quality transmission requirements of high-speed interfaces and high-performance memory.

CN121056282BActive Publication Date: 2026-02-17XIN YAOHUI TECH CO LTD
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Patent Information

Application Number
CN202511573745.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-31
Publication Date
2026-02-17
Estimated Expiration
2045-10-31

AI Technical Summary

Technical Problem

Existing technologies struggle to address the varying bandwidth, data transfer rate, and operating frequency requirements caused by differential signal offset in high-speed interfaces and high-performance memories, and fail to effectively account for the differences between different data paths, thus impacting the performance of high-speed interfaces and high-performance memories.

Method used

A training device is provided, including an offset calibration module and a delay training module. By adjusting the accuracy of offset compensation and delay training, it adapts to the operating frequency, data transmission rate and bandwidth. It uses eye diagram scanning algorithm and hardware implementation to determine the signal uncertainty interval and achieve high-precision offset compensation.

Benefits of technology

The increased eye diagram size provides more margin for signal transmission, ensuring signal accuracy on the receiving side, adapting to complex and ever-changing application environments, and meeting the customized offset compensation requirements of multiple data paths.

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Abstract

The application relates to the technical field of integrated circuits and provides a training device and a training method for high-speed differential signal offset. The device comprises an offset calibration module configured to provide offset compensation for two-phase signals of a differential signal at an adjustment precision, wherein the offset compensation is configured to reduce offset between the two-phase signals; and a delay training module configured to train the offset calibration module so that the adjustment precision provided by the offset calibration module is adapted to an operating frequency, a data transmission rate and a bandwidth, wherein the differential signal is a data strobe signal, and the operating frequency, the data transmission rate and the bandwidth are all associated with the data strobe signal. In this way, the high-speed differential signal offset is compensated, the available eye diagram size is increased, the margin from the edge of the eye diagram is increased, and thus the drift caused by voltage temperature and the like can be better resisted.
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Description

Technical Field

[0001] This application relates to the field of integrated circuit technology, and in particular to a training device and training method for high-speed differential signal offset. Background Technology

[0002] With the development of high-speed interface technology and high-performance memory technology, there is a need to increase bandwidth and data transmission rate. Therefore, higher operating frequencies are adopted, such as 6400 MHz. This means that during differential signal transmission, if there is a large skew between the two phase signals of the same differential signal due to factors such as differences in transmission path length, it is more likely to affect the correctness of the output data on the receiving side. It may also affect the eye diagram size, leading to a reduction in the margin from the eye diagram boundary, thus impacting the performance of high-speed interfaces and high-performance memories. Existing high-speed differential signal offset compensation schemes are difficult to cope with the changing demands for bandwidth, data transmission rate, and operating frequency in practical applications, and they do not adequately consider the differences between different data paths. Therefore, they are insufficient to meet the requirements for high-quality, high-speed differential signal transmission in high-speed interface and high-performance memory applications.

[0003] To address this, this application provides a training device and method for high-speed differential signal offset, in order to solve the technical problems in the prior art. Summary of the Invention

[0004] In a first aspect, this application provides a training apparatus for high-speed differential signal offset. The training apparatus includes: an offset calibration module for providing offset compensation for two phase signals of the differential signal at an adjusted accuracy, wherein the offset compensation is used to reduce the offset between the two phase signals; and a delay training module for training the offset calibration module so that the adjusted accuracy provided by the offset calibration module is adapted to the operating frequency, data transmission rate, and bandwidth, wherein the differential signal is a data gating pulse signal, and the operating frequency, data transmission rate, and bandwidth are all associated with the data gating pulse signal.

[0005] The first aspect of this application compensates for the offset of high-speed differential signals, increases the available eye diagram size, and increases the margin from the edge of the eye diagram, thereby better resisting drift that may be caused by changes in voltage, temperature, etc., which helps to ensure the signal accuracy on the receiving side and subsequent processing. It can provide corresponding offset compensation according to the differential signal offset of a specific data path, which helps to meet the customized offset compensation requirements under multiple data paths and is conducive to adapting to the changes in bandwidth, data transmission rate and operating frequency requirements in complex and ever-changing application environments.

[0006] In one possible implementation of the first aspect of this application, the offset calibration module includes an adjustable delay component for providing the adjustment accuracy, and the delay training module is used to determine the offset between the two phase signals using an eye diagram scanning algorithm, thereby determining the adjustment strategy for the two phase signals corresponding to the optimal eye diagram combination, and then training the adjustable delay component to support the adjustment strategy for the two phase signals.

[0007] In one possible implementation of the first aspect of this application, the delay training module uses the eye diagram scanning algorithm to perform multiple scans to determine the boundary of the signal uncertainty interval between the two phase signals, and the boundary of the signal uncertainty interval is used to determine the offset between the two phase signals.

[0008] In one possible implementation of the first aspect of this application, the two phase signals correspond to a first transmission path and a second transmission path, respectively. The offset calibration module connects a first sampling point on the first transmission path via a first bonding wire and a second sampling point on the second transmission path via a second bonding wire. The offset calibration module uses the first sampling point and the second sampling point to obtain the mutual sampling result between the two phase signals. The mutual sampling result between the two phase signals is used to determine the offset between the two phase signals.

[0009] In one possible implementation of the first aspect of this application, the two phase signals include a first phase signal and a second phase signal, and the mutual sampling result between the two phase signals includes fixing the first phase signal and then sampling the first phase signal with the second phase signal.

[0010] In one possible implementation of the first aspect of this application, the delay training module is configured to successively and separately adjust the delays of the first phase signal and the second phase signal from zero delay to a preset delay value, and after each adjustment of the delay of the first phase signal or the second phase signal, obtain the mutual sampling results between the two phase signals through the offset calibration module, thereby determining the boundary of the signal uncertainty interval between the two phase signals, the boundary of the signal uncertainty interval being used to determine the offset between the two phase signals.

[0011] In one possible implementation of the first aspect of this application, the boundary of the signal uncertainty interval is within a range of variation defined by the preset delay value, and the boundary of the signal uncertainty interval is used to determine the midpoint of the signal uncertainty interval, wherein the delay of the first phase signal or the second phase signal corresponding to the midpoint of the signal uncertainty interval is the offset between the two phase signals.

[0012] In one possible implementation of the first aspect of this application, the boundary of the signal uncertainty interval is determined based on transitions from low to high level and transitions from high to low level.

[0013] In one possible implementation of the first aspect of this application, the first bonding wire and the second bonding wire are of equal length, and the path delay of the first bonding wire and the second bonding wire is within a preset path delay range.

[0014] In one possible implementation of the first aspect of this application, in the length direction of the first transmission path, the distance between the receiving end of the first transmission path and the first sampling point does not exceed one-tenth of the distance between the sending end of the first transmission path and the first sampling point, and in the length direction of the second transmission path, the distance between the receiving end of the second transmission path and the second sampling point does not exceed one-tenth of the distance between the sending end of the second transmission path and the second sampling point.

[0015] In one possible implementation of the first aspect of this application, the offset calibration module obtains the mutual sampling results between the two phase signals through register sampling. The offset calibration module is also used to add process voltage and temperature deviation compensation to the offset between the two phase signals, thereby updating the offset between the two phase signals. The process voltage and temperature deviation compensation is used to offset the influence of register process manufacturing conditions, operating voltage and operating temperature on the register sampling.

[0016] In one possible implementation of the first aspect of this application, the data strobe pulse signal is used for interaction of the physical layer of the dual data rate synchronous dynamic random access memory.

[0017] In one possible implementation of the first aspect of this application, the delay training module includes a delay calibration circuit, a delay unit conversion circuit, and a delay training circuit.

[0018] In one possible implementation of the first aspect of this application, the delay training module is configured to set the adjustment precision to be one-Nth of a unit time interval based on the operating frequency, the data transmission rate, and the bandwidth, where N is a positive integer greater than 1, and the offset compensation is an integer multiple of the adjustment precision.

[0019] In one possible implementation of the first aspect of this application, the training device further includes a low-pass filter for performing low-pass filtering on the differential signal to obtain a DC deviation signal, the DC deviation signal for generating a DC compensation signal, and the DC compensation signal for compensating the differential signal.

[0020] Secondly, this application provides a training method for high-speed differential signal offset. The training method includes: providing offset compensation for two phase signals of the differential signal at an adjusted accuracy via an offset calibration module, wherein the offset compensation is used to reduce the offset between the two phase signals; and training the offset calibration module via a delay training module so that the adjusted accuracy provided by the offset calibration module is adapted to the operating frequency, data transmission rate, and bandwidth, wherein the differential signal is a data gating pulse signal, and the operating frequency, data transmission rate, and bandwidth are all associated with the data gating pulse signal.

[0021] The second aspect of this application compensates for the offset of high-speed differential signals, increases the available eye diagram size, and increases the margin from the edge of the eye diagram, thereby better resisting drift that may be caused by changes in voltage, temperature, etc., which helps to ensure the signal accuracy on the receiving side and subsequent processing. It can provide corresponding offset compensation according to the differential signal offset of a specific data path, which helps to meet the customized offset compensation requirements under multiple data paths and is conducive to adapting to the changes in bandwidth, data transmission rate and operating frequency requirements in complex and ever-changing application environments. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of a high-speed differential signal interface;

[0024] Figure 2 A schematic diagram of a training device for high-speed differential signal offset provided in an embodiment of this application;

[0025] Figure 3 A schematic diagram of the offset calibration module according to the first embodiment provided in this application;

[0026] Figure 4 A schematic diagram of the offset calibration module according to the second embodiment provided in this application;

[0027] Figure 5 This is a flowchart illustrating a training method for high-speed differential signal offset provided in an embodiment of this application. Detailed Implementation

[0028] The embodiments of this application will now be described in further detail with reference to the accompanying drawings.

[0029] It should be understood that in the description of this application, "at least one" means one or more, and "multiple" means two or more. In addition, the words "first," "second," etc., unless otherwise stated, are used only for the purpose of distinguishing descriptions and should not be construed as indicating or implying relative importance or order.

[0030] Figure 1 This is a schematic diagram of a high-speed differential signal interface. (For example...) Figure 1 As shown, there are multiple data paths between the transmitting side 101 and the receiving side 103, namely data path A110, data path B112, data path C114, and data path D116. These data paths are used to transmit high-speed differential signals. Each high-speed differential signal uses differential transmission, thus transmitting electrical signals with equal amplitude and opposite phase through two signal lines. Therefore, a differential signal actually contains two phase signals, one of which can be regarded as the positive phase signal and the other as the negative phase signal. The logic state is determined by comparing the voltage difference between the two signal lines. With the development of high-speed interface technology and high-performance memory technology, there is a need to increase bandwidth and data transmission rate. Therefore, higher operating frequencies are adopted, such as 6400 MHz. This means that during the transmission of differential signals, if there is a large skew between the two phase signals of the same differential signal due to factors such as the difference in transmission path length, it is more likely to affect the correct output of data on the receiving side. It may also affect the eye diagram size, resulting in a reduction in the margin from the edge of the eye diagram, thus affecting the performance of high-speed interfaces and high-performance memories. Therefore, real-time compensation for high-speed differential signal offset is necessary to increase the available eye diagram size and the margin from the eye diagram edge, thereby better resisting drift caused by changes in voltage, temperature, etc., and helping to ensure signal accuracy on the receiving side and subsequent processing. Furthermore, since each data path independently transmits its own high-speed differential signal, each data path requires customized offset compensation. This means providing corresponding offset compensation based on the differential signal offset of a specific data path, taking into account the changing bandwidth, data transmission rate, and operating frequency requirements in complex and variable application environments, as well as the influence of operating temperature, operating voltage, and other environmental conditions during circuit and device operation. Further consideration must be given to the impact of differences in manufacturing processes. Only in this way can the requirements for high-quality high-speed differential signal transmission be met in high-speed interface and high-performance memory applications. The following detailed description, in conjunction with specific embodiments and accompanying drawings, illustrates how the training device and method for high-speed differential signal offset provided in this application achieve the aforementioned beneficial technical effects.

[0031] Figure 2 This is a schematic diagram of a training device for high-speed differential signal offset provided in an embodiment of this application. Figure 2 As shown, the training device includes: an offset calibration module A201, used to provide offset compensation for the two phase signals of the differential signal under the adjustment accuracy, wherein the offset compensation is used to reduce the offset between the two phase signals; and a delay training module A203, used to train the offset calibration module A201 so that the adjustment accuracy provided by the offset calibration module A201 is adapted to the operating frequency, data transmission rate, and bandwidth, wherein the differential signal is a data strobe (DQS) signal, and the operating frequency, the data transmission rate, and the bandwidth are all associated with the data strobe signal.

[0032] See Figure 2The data strobe signal, also known as the bidirectional data filter signal or DQS signal, is widely used in high-performance memories, such as Double Data Rate Synchronous Dynamic Random Access Memory (DDR SRAM). The data strobe signal distinguishes the two data transmission cycles of the data (DQ) signal within one clock cycle, enabling double-rate data transmission and reception. Generally, when writing data, the middle of the high or low level period of the data strobe signal is used as the selection point for the data transmission cycle; when receiving data on the receiving side, the rising and falling edges of the data strobe signal are used as triggers to distinguish the data transmission cycle. To ensure synchronous reception on the receiving side, the stability of the rising and falling edges of the data strobe signal needs to be ensured. This requires considering factors such as temperature and resistance performance that may affect the rise and fall times. The data strobe signal uses differential transmission, meaning it is a high-speed differential signal. A differential signal includes two phase signals, which can be called the T-phase signal and the C-phase signal, or the first phase signal and the second phase signal. Differential signals transmit information through the differential mode component between two phase signals. This design helps overcome the effects of factors such as temperature and resistance performance, and helps maintain the equal width of the two half-cycles, thus contributing to the stability of the rising and falling edges of the data gating pulse signal. The transmission paths of the two phase signals in a differential signal are independent, meaning the first and second phase signals are transmitted separately via two signal lines. The logic state is determined by comparing the voltage difference between the two signal lines. During differential signal transmission, factors such as differences in transmission path length can lead to significant skew between the two phase signals of the same differential signal, i.e., a time deviation, which may affect reception performance. Furthermore, with the development of high-speed interface technology and high-performance memory technology, there is a need to increase bandwidth and data transmission rates, thus employing higher operating frequencies, such as 6400 MHz. Therefore, as memory performance improves, both bandwidth and operating frequency increase, making the skew caused by transmission delay more pronounced and affecting the eye diagram effect.

[0033] Continue reading Figure 2The training device includes an offset calibration module A201 and a delay training module A203. The training device can be deployed on the receiving side of a high-speed interface to provide offset compensation for the offset between the two phase signals of a differential signal, thereby offsetting the deviation caused by transmission delay and improving the receiving performance. Specifically, through internal optimization design of the training device, on the one hand, the offset calibration module A201 provides offset compensation for the two phase signals of the differential signal at an adjusted accuracy; on the other hand, the delay training module A203 trains the offset calibration module A201 so that the adjustment accuracy provided by the offset calibration module A201 is adapted to the operating frequency, data transmission rate, and bandwidth. Thus, the delay training module A203 can provide high-precision delay adjustment capabilities, for example, by setting a delay adjustment of a unit time interval (UI), or by setting a 1 / N fraction of UI, where N is a positive integer greater than 1. Using the delay training module A203, appropriate delay adjustment capabilities can be set according to different operating frequencies, data transmission rates, and bandwidth requirements. For example, the adjustment precision can be set to 1 / 64th of a UI. Considering that the actual time values ​​corresponding to different UIs are different at different operating frequencies, the signal offset that needs to be compensated may be 5% of a UI or other proportions. Therefore, through the delay training module A203, delay adjustments of a UI or a fraction of a UI can be implemented according to different data transmission rates, bandwidth, and operating frequencies. This allows the offset calibration module A201 to control the offset between two phase signals in the differential signal, such as the offset between the T-phase signal and the C-phase signal. In addition, the offset calibration module A201 can provide offset compensation at the trained adjustment precision. Here, the adjustment precision reflects the granularity of the delay adjustment capability. For example, if the signal offset is 5% of a UI, it can be trained to achieve an adjustment precision of 1 / 50th of a UI, thus allowing the trained offset calibration module A201 to provide offset compensation. Furthermore, since the offset calibration module A201 is trained by the delay training module A203 so that the adjustment accuracy provided by the offset calibration module A201 is adapted to the operating frequency, data transmission rate and bandwidth, it can be trained for a specific data path to provide the corresponding adjustment accuracy. This is beneficial to provide corresponding offset compensation based on the differential signal offset of the specific data path itself, which helps to meet the customized offset compensation requirements under multiple data paths.

[0034] In short, Figure 2The training device shown is for high-speed differential signal offset. It compensates for the high-speed differential signal offset, increases the available eye diagram size, and increases the margin from the edge of the eye diagram. This makes it better able to resist drift caused by changes in voltage, temperature, etc., and helps to ensure the signal accuracy on the receiving side and subsequent processing. It can provide corresponding offset compensation according to the differential signal offset of a specific data path, which helps to meet the customized offset compensation requirements under multiple data paths. It is also beneficial to adapt to the changes in bandwidth, data transmission rate and operating frequency requirements in complex and ever-changing application environments.

[0035] Figure 3 This is a schematic diagram of an offset calibration module according to a first embodiment of this application. Figure 3 As shown, the offset calibration module B301 includes an adjustable delay component 310, which is used to provide the adjustment accuracy. Figure 3 The diagram also shows that the delay training module B303 includes an eye diagram scanning component 320. Using the eye diagram scanning component 320, the delay training module B303 uses an eye diagram scanning algorithm to determine the offset between the two phase signals, thereby determining an adjustment strategy for the two phase signals corresponding to the optimal eye diagram combination, and then training the adjustable delay component 310 to support the adjustment strategy for the two phase signals. Thus, using a software algorithm such as an eye diagram scanning algorithm, the offset between the two phase signals of the differential signal is determined through eye diagram scanning. Using the eye diagram scanning results, an adjustment strategy corresponding to the optimal eye diagram combination can be determined, such as adjusting the first phase signal, or adjusting the second phase signal, or simultaneously adjusting both the first and second phase signals. Furthermore, based on the adjustment strategy determined using the software algorithm and eye diagram analysis, the adjustable delay component 310 in the offset calibration module B301 can control the delay amount to support the adjustment strategy, thereby achieving signal offset compensation. In this way, high-precision delay adjustment based mainly on software algorithms is achieved. The left and right boundaries can be determined by eye diagram scanning, thereby determining the signal uncertainty interval. The midpoint of the signal uncertainty interval can be set as the corresponding measured offset value, thus providing corresponding offset compensation.

[0036] See Figure 2 and Figure 3 In some embodiments, the delay training module B303 uses the eye diagram scanning algorithm to perform multiple scans to determine the boundary of the signal uncertainty interval between the two phase signals. The boundary of the signal uncertainty interval is used to determine the offset between the two phase signals. Thus, multiple scans can be used to improve measurement accuracy and help calibrate deviations in high-speed differential signals caused by transmission delays.

[0037] Figure 4This is a schematic diagram of an offset calibration module according to a second embodiment of this application. Figure 4 The diagram illustrates that the two phase signals of the differential signal correspond to the first transmission path respectively. Figure 4 Transmission path A490) and second transmission path ( Figure 4 The transmission path is B492 in the middle. The offset calibration module C401 is connected via the first bonding wire ( Figure 4 The wire A480 in the middle is connected to the first transmission path ( Figure 4 The first sampling point on the transmission path A490 in the middle ( Figure 4 Sampling point A470 in the middle) and through the second wire ( Figure 4 The bonding wire B482 in the middle is connected to the second transmission path ( Figure 4 The second sampling point on the transmission path B492 in the middle ( Figure 4 Sampling point B472 in the sample. The offset calibration module C401 utilizes the first sampling point ( Figure 4 Sampling point A470) and the second sampling point ( Figure 4 The sampling point B472 in the middle is used to obtain the mutual sampling result between the two phase signals, and the mutual sampling result between the two phase signals is used to determine the offset between the two phase signals. Figure 4 The diagram also schematically shows that transmission path A490 is from sender A450 to receiver A452, and transmission path B492 is from sender B440 to receiver B442. Figure 4 The transmission paths A490 and B492 shown are used to transmit two phase signals of the same differential signal, equivalent to two signal lines for differential signal transmission. As mentioned above, each data path transmits its own high-speed differential signal independently. Therefore, each of the multiple data paths requires customized offset compensation, that is, corresponding offset compensation needs to be provided based on the differential signal offset of the specific data path itself. Figure 4 The transmission paths A490 and B492 shown correspond to a specific data path used to transmit a specific differential signal or a specific data strobe pulse signal. Figure 4 The diagram also shows a delay training module C403 connected to the offset calibration module C401. The delay training module C403 is used to train the offset calibration module C401 so that the adjustment accuracy provided by the offset calibration module C401 is adapted to the operating frequency, data transmission rate, and bandwidth.

[0038] See Figure 2 and Figure 4Using hardware implementation, the offset calibration module C401 is used to obtain the mutual sampling results between the two phase signals. The offset calibration module C401 may include necessary sampling latching circuitry and sampling result reporting circuitry, thereby utilizing sampling points on the actual transmission path, i.e., the first transmission path (…). Figure 4 The first sampling point on the transmission path A490 in the middle ( Figure 4 Sampling point A470 in the middle) and the second transmission path ( Figure 4 The second sampling point on the transmission path B492 in the middle ( Figure 4 Sampling point B472 in the data (in the original text) enables timely sampling. Here, the transmission path is as follows: Figure 4 Transmission paths A490 and B492 in the diagram can correspond to actual signal lines or metal wires used for signal transmission. Therefore, the position of the sampling point on the transmission path will affect the sampling result. Generally, the sampling point should be as close as possible to the end of the transmission path. For example, sampling point A470 should be as close as possible to the receiving end A452, and sampling point B472 should be as close as possible to the receiving end B442. Additionally, the offset calibration module C401 utilizes the first sampling point (… Figure 4 Sampling point A470) and the second sampling point ( Figure 4 The sampling point B472 in the differential signal is used to obtain the mutual sampling results between the two phase signals. Therefore, the acquisition of useful information mainly relies on hardware implementation to determine the offset between the two phase signals. Thus, based on the hardware implementation and mutual sampling of the two phase signals, a corresponding adjustment strategy can be determined, such as adjusting the first phase signal, adjusting the second phase signal, or simultaneously adjusting both phase signals. Furthermore, the delay training module C403, connected to the offset calibration module C401, can be trained to provide corresponding adjustment accuracy. High-precision signal offset compensation can also be achieved by adjusting the delay values ​​of the two phase signals and utilizing the mutual sampling results. In this way, high-precision delay adjustment based primarily on hardware implementation is realized. Through the collaboration between the delay training module and the offset calibration module, by adjusting the delay values ​​of the two phase signals and utilizing the mutual sampling results, jumps and boundary detection can be performed to determine the left and right boundaries, thereby determining the signal uncertainty interval. The midpoint of the signal uncertainty interval can be set as the corresponding measured offset value, thus providing corresponding offset compensation.

[0039] See Figure 2 and Figure 4In some embodiments, the two phase signals include a first phase signal and a second phase signal. The mutual sampling result between the two phase signals includes fixing the first phase signal and then sampling the first phase signal using the second phase signal. Here, the first phase signal and the second phase signal are relative concepts, referring to one phase signal and the other phase signal corresponding to the same differential signal. Thus, by fixing one phase signal and then using the other phase signal to sample the fixed phase signal, the mutual sampling result between the two phase signals can be obtained, thereby providing a basis for subsequent determination of the boundary of the signal uncertainty interval and the offset between the two phase signals.

[0040] In some embodiments, the delay training module is used to successively and separately adjust the delays of the first phase signal and the second phase signal, from zero delay to a preset delay value. After each adjustment of the delay of the first phase signal or the second phase signal, the offset calibration module obtains the mutual sampling results between the two phase signals to determine the boundary of the signal uncertainty interval between the two phase signals. The boundary of the signal uncertainty interval is used to determine the offset between the two phase signals. Here, taking the first phase signal as the T-phase signal and the second phase signal as the C-phase signal as an example, the T-phase signal is fixed, and boundary detection is performed by delaying the C-phase signal and sampling the T-phase signal with the C-phase signal, such as a 0-to-1 or 1-to-0 transition. Initially, neither the T-phase signal nor the C-phase signal is delayed, i.e., there is zero delay. Then, the subsequent adjustment strategy is determined based on the corresponding logic state of 0 or 1, i.e., based on a low level or a high level, according to the mutual sampling results. For example, only the C-phase signal can be adjusted, or only the T-phase signal can be adjusted, or both the C-phase signal and the T-phase signal can be adjusted simultaneously. By increasing the delay from zero until a preset delay value is reached, and using the mutual sampling results between the two phase signals after each delay adjustment to determine the subsequent adjustment strategy, boundary detection of the left and right boundaries can be achieved, i.e., determining the transition from 0 to 1 or from 1 to 0. Thus, through the collaboration between the delay training module and the offset calibration module, by adjusting the respective delay values ​​of the two phase signals and utilizing the mutual sampling results of the two phase signals, transitions and boundary detection can be performed to determine the left and right boundaries, thereby defining the signal uncertainty range. It should be understood that because the boundary detection algorithm relies on a combination of hardware implementation and software algorithms, calibration primarily uses the offset calibration module (i.e., the hardware implementation), combined with software algorithms (i.e., the delay training module) to improve accuracy. Therefore, the software algorithm results can be used to fit hardware parameters, such as helping to determine the parameters of the signal uncertainty range, thereby mitigating the impact of errors in the hardware implementation and improving the offset compensation effect. Furthermore, because the offset calibration module in hardware acquires the mutual sampling results between the two phase signals multiple times, and this is combined with the boundary detection algorithm and adjustment strategy in the delay training module in software, it helps to quickly determine the left and right boundaries of the signal uncertainty interval. Since the signal uncertainty interval is caused by the offset between the two phase signals, it can be used to further calculate the offset between the two phase signals, thereby achieving offset compensation.

[0041] In some embodiments, the boundary of the signal uncertainty interval is within a range of variation defined by the preset delay value, and the boundary of the signal uncertainty interval is used to determine the midpoint of the signal uncertainty interval. The delay of the first phase signal or the second phase signal corresponding to the midpoint of the signal uncertainty interval is the offset between the two phase signals. Here, using the preset delay value, the delay value in the delay training module is first set to zero, and then the delays of the two phase signals are sequentially adjusted to the preset delay value. This is equivalent to finding the sampling uncertainty interval within the range of positive and negative preset delay values, thereby allowing multiple measurements to find the midpoint of the uncertainty interval. The corresponding delay value is the measurement offset between the two phase signals. Thus, using the preset delay value, the range of variation defined by the preset delay value, i.e., positive and negative preset delay values, can be determined. Various suitable center point determination algorithms can then be used to determine the midpoint of the signal uncertainty interval, realizing the calculation of the offset between the two phase signals, thereby achieving offset compensation.

[0042] In some embodiments, the boundaries of the signal uncertainty interval are determined based on transitions from low to high and from high to low. This allows for boundary detection of the left and right boundaries, i.e., determining transitions from 0 to 1 or from 1 to 0. Through collaboration between the delay training module and the offset calibration module, by adjusting the respective delay values ​​of the two phase signals and utilizing the mutual sampling results of the two phase signals, transitions and boundary detection can be performed to determine the left and right boundaries, thereby determining the signal uncertainty interval.

[0043] In some embodiments, the first and second bonding wires are of equal length, and the path delays of the first and second bonding wires are each within a preset path delay range. The offset calibration module uses the first and second sampling points to obtain the mutual sampling results between the two phase signals. Therefore, it mainly relies on hardware implementation to obtain useful information, which can then be used to determine the offset between the two phase signals of the differential signal. Thus, based on the hardware implementation and the mutual sampling of the two phase signals, a corresponding adjustment strategy can be determined, such as adjusting the first phase signal, or adjusting the second phase signal, or simultaneously adjusting the first and second phase signals. In this way, high-precision delay adjustment based primarily on hardware implementation is achieved. Through the collaboration between the delay training module and the offset calibration module, by adjusting the respective delay values ​​of the two phase signals and utilizing the mutual sampling results of the two phase signals, jumps and boundary detection can be performed to determine the left and right boundaries, thereby determining the signal uncertainty interval. The midpoint of the signal uncertainty interval can be set as the corresponding measured offset value, thereby providing corresponding offset compensation. To improve measurement accuracy, the first and second bonding wires can be set to the same length. This means the first bonding wire connecting the first sampling point and the second bonding wire connecting the second sampling point are of equal length, and the traces are designed to be as short as possible. This ensures that the signals sampled from the first and second sampling points reach the offset calibration module after the same path delay, thus minimizing errors introduced by sampling and improving offset measurement accuracy. Furthermore, setting the path delays of the first and second bonding wires within a preset range, such as 5 to 10 picoseconds, as a design constraint, also contributes to improved offset measurement accuracy by ensuring sufficiently short traces.

[0044] In some embodiments, along the length of the first transmission path, the distance between the receiving end of the first transmission path and the first sampling point does not exceed one-tenth of the distance between the transmitting end of the first transmission path and the first sampling point; and along the length of the second transmission path, the distance between the receiving end of the second transmission path and the second sampling point does not exceed one-tenth of the distance between the transmitting end of the second transmission path and the second sampling point. As described above, the offset calibration module uses the first sampling point and the second sampling point to obtain the mutual sampling results between the two phase signals. Thus, by setting the position of the sampling point on the transmission path, most of the transmission path is covered, which helps to improve the offset measurement accuracy. For example, in terms of design requirements, it can be required that the length of the segment from the receiving end to the sampling point is no more than 10% of the length of the segment from the transmitting end to the sampling point. This means that the sampling point needs to be sufficiently close to the receiving end, or the end of the transmission path, to improve the measurement effect.

[0045] In some embodiments, the offset calibration module obtains the mutual sampling results between the two phase signals through register sampling. The offset calibration module is also used to add process voltage and temperature deviation compensation to the offset between the two phase signals, thereby updating the offset between the two phase signals. The process voltage and temperature deviation compensation is used to offset the influence of register manufacturing conditions, operating voltage, and operating temperature on the register sampling. Through the collaboration between the delay training module and the offset calibration module, by adjusting the respective delay values ​​of the two phase signals and utilizing the mutual sampling results of the two phase signals, transitions and boundary detection can be performed to determine the left and right boundaries, thereby determining the signal uncertainty interval. Here, the signal uncertainty interval is determined through register sampling. Therefore, the performance and timing characteristics (e.g., rise and fall times) of the sampling circuits and devices within the offset calibration module, such as registers and sampling latch circuits, may be affected by operating environmental conditions such as operating temperature and operating voltage during circuit and device operation. Furthermore, differences in manufacturing conditions, such as different process angles, may also affect the accuracy of the sampling results. Therefore, the appropriate process voltage and temperature deviation compensation can be determined through pre-testing, such as selecting a test environment similar to that used in actual applications. Thus, based on the high-precision delay adjustment achieved through hardware implementation, variables related to register manufacturing conditions, operating voltage, and operating temperature were added, thereby improving the compensation effect.

[0046] See Figure 1 , Figure 2 and Figure 3In one possible implementation, the data strobe pulse signal is used for interaction at the physical layer of the dual data rate synchronous dynamic random access memory. This supports the application of high-performance memory.

[0047] In one possible implementation, the delay training module includes a delay calibration circuit, a delay unit conversion circuit, and a delay training circuit. Thus, through the delay training module, delay adjustments of a unit (UI) or a fraction of a UI can be implemented according to different data transmission rates, bandwidths, and operating frequencies, thereby controlling the offset calibration module to reduce the offset between two phase signals in the differential signal.

[0048] In one possible implementation, the delay training module is used to set the adjustment precision to one-Nth of a unit time interval based on the operating frequency, the data transmission rate, and the bandwidth, where N is a positive integer greater than 1, and the offset compensation is an integer multiple of the adjustment precision. Thus, the adjustment precision reflects the granularity of the delay adjustment capability. For example, if the signal offset is 5% of a unit time interval (UI), training can be used to make the adjustment precision one-fiftieth of a UI, thereby enabling the trained offset calibration module to provide offset compensation. Furthermore, because the offset calibration module is trained through the delay training module to ensure that the adjustment precision provided by the offset calibration module A201 is adapted to the operating frequency, data transmission rate, and bandwidth, training can be performed for specific data paths to provide corresponding adjustment precision. This facilitates providing corresponding offset compensation based on the differential signal offset of a specific data path, helping to meet customized offset compensation requirements under multiple data paths.

[0049] In one possible implementation, the training device further includes a low-pass filter for low-pass filtering the differential signal to obtain a DC offset signal. This DC offset signal is then used to generate a DC compensation signal, which is used for compensating the differential signal. Thus, the additional DC compensation signal, based on the aforementioned signal offset detection and compensation mechanism, helps to address the differential signal offset compensation requirements under high-frequency disturbance conditions.

[0050] Figure 5 This is a flowchart illustrating a training method for high-speed differential signal offset provided in an embodiment of this application. Figure 5 As shown, the training method includes the following steps.

[0051] Step S501: The offset calibration module provides offset compensation for the two phase signals of the differential signal under the adjustment accuracy, wherein the offset compensation is used to reduce the offset between the two phase signals.

[0052] Step S503: Train the offset calibration module through the delay training module so that the adjustment accuracy provided by the offset calibration module is adapted to the operating frequency, data transmission rate and bandwidth, wherein the differential signal is a data gating pulse signal, and the operating frequency, the data transmission rate and the bandwidth are all related to the data gating pulse signal.

[0053] In short, Figure 5 The training method shown for high-speed differential signal offset compensates for the offset, increases the available eye diagram size, and increases the margin from the eye diagram edge, thereby better resisting drift caused by changes in voltage, temperature, etc., which helps ensure the signal accuracy on the receiving side and subsequent processing. It can provide corresponding offset compensation according to the differential signal offset of a specific data path, which helps meet the customized offset compensation requirements under multiple data paths and is conducive to adapting to the changes in bandwidth, data transmission rate and operating frequency requirements in complex and ever-changing application environments.

[0054] The methods and devices provided in this application are based on the same inventive concept. Since the principles by which the methods and devices solve problems are similar, the embodiments, implementation methods, examples, or methods of implementation of the methods and devices can be referred to each other, and repeated details will not be repeated. This application also provides a system comprising multiple computing devices, the structure of each computing device of which can refer to the structure of the computing devices described above. The functions or operations achievable by this system can refer to the specific implementation steps in the above method embodiments and / or the specific functions described in the above device embodiments, and will not be repeated here.

[0055] This application also provides a computer-readable storage medium storing computer instructions. When these computer instructions are executed on a computer device (such as one or more processors), they can implement the method steps described in the above method embodiments. The specific implementation of the above method steps by the processor of the computer-readable storage medium can refer to the specific operations described in the above method embodiments and / or the specific functions described in the above device embodiments, and will not be repeated here.

[0056] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. This application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Embodiments of this application can be implemented wholly or partially by software, hardware, firmware, or any other combination. When implemented in software, the above embodiments can be implemented wholly or partially as a computer program product. This application can take the form of a computer program product embodied on one or more computer-usable storage media containing computer-usable program code. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line) or wireless (e.g., infrared, WiFi, microwave, etc.) means. Computer-readable storage media can be any available medium that a computer can access, or a data storage device such as a server or data center that contains one or more sets of available media. Available media can be magnetic media (such as floppy disks, hard disks, and magnetic tapes), optical media, or semiconductor media. Semiconductor media can be solid-state drives, random access memory, flash memory, read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, or any other suitable form of storage medium.

[0057] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. Each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0058] In the above embodiments, the descriptions of each embodiment have their own emphasis. Parts not described in detail in a certain embodiment can be referred to in the relevant descriptions of other embodiments. Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the spirit and scope of the embodiments of this application. The steps in the methods of the embodiments of this application can be adjusted in order, combined, or deleted according to actual needs; the modules in the systems of the embodiments of this application can be divided, combined, or deleted according to actual needs. If these modifications and variations of the embodiments of this application fall within the scope of the claims of this application and their equivalents, then this application also intends to include these modifications and variations.

Claims

1. A training device for high-speed differential signal offset, characterized in that, The training device includes: An offset calibration module is used to provide offset compensation for the two phase signals of a differential signal under adjustment accuracy, wherein the offset compensation is used to reduce the offset between the two phase signals; A delay training module is used to train the offset calibration module so that the adjustment accuracy provided by the offset calibration module is adapted to the operating frequency, data transmission rate, and bandwidth. The differential signal is a data gating pulse signal, and the operating frequency, data transmission rate, and bandwidth are all related to the data gating pulse signal. The two phase signals correspond to the first transmission path and the second transmission path, respectively. The offset calibration module connects the first sampling point on the first transmission path through the first wire and the second sampling point on the second transmission path through the second wire. The offset calibration module uses the first sampling point and the second sampling point to obtain the mutual sampling result between the two phase signals. The mutual sampling result between the two phase signals is used to determine the offset between the two phase signals.

2. The training device according to claim 1, characterized in that, The offset calibration module includes an adjustable delay component for providing the adjustment accuracy. The delay training module is used to determine the offset between the two phase signals using an eye diagram scanning algorithm, thereby determining the adjustment strategy for the two phase signals corresponding to the optimal eye diagram combination, and then training the adjustable delay component to support the adjustment strategy for the two phase signals.

3. The training device according to claim 2, characterized in that, The delay training module uses the eye diagram scanning algorithm to perform multiple scans to determine the boundary of the signal uncertainty interval between the two phase signals. The boundary of the signal uncertainty interval is used to determine the offset between the two phase signals.

4. The training device according to claim 1, characterized in that, The two phase signals include a first phase signal and a second phase signal. The mutual sampling result between the two phase signals includes fixing the first phase signal and then sampling the first phase signal with the second phase signal.

5. The training device according to claim 4, characterized in that, The delay training module is used to successively and separately adjust the delays of the first phase signal and the second phase signal from zero delay to a preset delay value. After each adjustment of the delay of the first phase signal or the second phase signal, the offset calibration module obtains the mutual sampling results between the two phase signals to determine the boundary of the signal uncertainty interval between the two phase signals. The boundary of the signal uncertainty interval is used to determine the offset between the two phase signals.

6. The training device according to claim 5, characterized in that, The boundary of the signal uncertainty interval is within a range of variation defined by the preset delay value, and the boundary of the signal uncertainty interval is used to determine the midpoint of the signal uncertainty interval. The delay of the first phase signal or the second phase signal corresponding to the midpoint of the signal uncertainty interval is the offset between the two phase signals.

7. The training device according to claim 5, characterized in that, The boundaries of the signal uncertainty interval are determined based on transitions from low to high level and transitions from high to low level.

8. The training device according to claim 1, characterized in that, The first bonding wire and the second bonding wire are of the same length, and the path delay of the first bonding wire and the second bonding wire is within a preset path delay range.

9. The training device according to claim 1, characterized in that, In the length direction of the first transmission path, the distance between the receiving end of the first transmission path and the first sampling point does not exceed one-tenth of the distance between the sending end of the first transmission path and the first sampling point; and in the length direction of the second transmission path, the distance between the receiving end of the second transmission path and the second sampling point does not exceed one-tenth of the distance between the sending end of the second transmission path and the second sampling point.

10. The training device according to claim 1, characterized in that, The offset calibration module obtains the mutual sampling results between the two phase signals through register sampling. The offset calibration module is also used to add process voltage and temperature deviation compensation to the offset between the two phase signals, thereby updating the offset between the two phase signals. The process voltage and temperature deviation compensation is used to offset the influence of register process manufacturing conditions, operating voltage and operating temperature on the register sampling.

11. The training device according to claim 1, characterized in that, The data strobe pulse signal is used for interaction at the physical layer of the dual data rate synchronous dynamic random access memory.

12. The training device according to claim 1, characterized in that, The delay training module includes a delay calibration circuit, a delay unit conversion circuit, and a delay training circuit.

13. The training device according to claim 1, characterized in that, The delay training module is used to set the adjustment precision to be one-Nth of a unit time interval based on the operating frequency, the data transmission rate, and the bandwidth, where N is a positive integer greater than 1, and the offset compensation is an integer multiple of the adjustment precision.

14. The training device according to claim 1, characterized in that, The training device further includes a low-pass filter, which is used to perform low-pass filtering on the differential signal to obtain a DC deviation signal. The DC deviation signal is used to generate a DC compensation signal, which is used for compensation processing of the differential signal.

15. A training method for high-speed differential signal offset, characterized in that, The training method includes: The offset calibration module provides offset compensation for the two phase signals of the differential signal under the adjustment accuracy, wherein the offset compensation is used to reduce the offset between the two phase signals; The offset calibration module is trained using a delay training module to ensure that the adjustment accuracy provided by the offset calibration module is compatible with the operating frequency, data transmission rate, and bandwidth. The differential signal is a data gating pulse signal, and the operating frequency, data transmission rate, and bandwidth are all related to the data gating pulse signal. The two phase signals correspond to the first transmission path and the second transmission path, respectively. The offset calibration module connects the first sampling point on the first transmission path through the first wire and the second sampling point on the second transmission path through the second wire. The offset calibration module uses the first sampling point and the second sampling point to obtain the mutual sampling result between the two phase signals. The mutual sampling result between the two phase signals is used to determine the offset between the two phase signals.

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