System and method for automatically analyzing imaging defects to defect sources of CMOS (Complementary Metal Oxide Semiconductor) chips

Abstract

The invention provides a CMOS chip imaging defect-to-defect source automatic analysis system and method. The CMOS chip imaging defect-to-defect source automatic analysis system comprises a chip container module used for accommodating different types of CMOS chips; the configuration file module is used for storing pixel pitch of the CMOS chip and origin coordinate information of the chip container; the data importing module is used for importing imaging defect coordinate data of the CMOS chip; the coordinate conversion module is used for converting the defect coordinate data into space coordinates of the microscopic analysis equipment according to the configuration file module and the data import module; and the microscopic analysis equipment is used for analyzing the defect source according to the space coordinates of the microscopic analysis equipment. According to the invention, the coordinate conversion module adopts parameters such as a pixel pitch and an original point position to carry out calculation, so that the accuracy of coordinate conversion is ensured, and the precision of defect source positioning is improved. Through the configuration file module and the coordinate conversion module, automation from defect coordinate reading to microscopic analysis equipment coordinate conversion is realized, manual intervention is reduced, and analysis efficiency is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of product defect detection, in particular to a CMOS chip imaging defect to defect source automatic analysis system and method. BACKGROUND

[0002] With the continuous development of CMOS chip manufacturing technology, the integration and complexity of chips are becoming higher and higher, and the analysis of imaging defects has become an important part of chip manufacturing and testing. The traditional defect analysis method mainly relies on manual operation, including manual reading of defect coordinates, coordinate conversion through experience or simple tools, and then using microscopic analysis equipment to locate the defect source. This method is inefficient and prone to errors due to human factors, making it difficult to meet the needs of modern chip manufacturing for high precision and high efficiency.

[0003] In addition, different models of CMOS chips have different pixel pitches and physical sizes, and the traditional method lacks a unified coordinate conversion standard, resulting in inconsistent analysis results and even positioning errors. Although some existing automated tools can achieve coordinate conversion, they are usually limited to specific models of chips and have poor versatility, making it difficult to adapt to diverse production needs.

[0004] Through the search of patent documents, it is found that the patent for invention with publication number CN112102316A discloses a product defect position distribution acquisition method and device. The method includes the following steps: obtaining a product image and determining the pixel coordinates of the defect position in the product image; mapping the pixel coordinate range of the product image to the latitude and longitude range to obtain the latitude and longitude information of the defect position in the product image; converting the latitude and longitude information of the defect position in the product image into a corresponding string through the Geohash algorithm; and obtaining the defect position distribution in the product image according to the string. This patent is suitable for product defect position distribution acquisition method and uses the Geohash algorithm, which is not suitable for CMOS chip defect source analysis.

[0005] In view of the above problems of the prior art, it is a key task to develop a CMOS chip imaging defect to defect source automatic analysis system and method. SUMMARY

[0006] The purpose of the present application is to provide a CMOS chip imaging defect to defect source automatic analysis system and method.

[0007] According to the CMOS chip imaging defect to defect source automatic analysis system provided by the present application, it comprises:

[0008] A chip container module is used to accommodate different models of CMOS chips, and different models of CMOS chips correspond to different chip containers.

[0009] a configuration file module for storing the pixel pitch of the CMOS chip and the origin coordinate information of the chip container;

[0010] a data import module for obtaining the defect coordinates of the CMOS chip;

[0011] a coordinate conversion module for receiving the pixel pitch provided by the configuration file module, the origin coordinate information of the chip container, and the defect coordinates output by the data import module, and converting the defect coordinates into the spatial coordinates of the microscopic analysis device by using a conversion calculation algorithm;

[0012] a microscopic analysis device for analyzing the defect source according to the spatial coordinates.

[0013] Preferably, the chip container module adopts a chip container of a specific model.

[0014] Preferably, the configuration file module allows the user to select a configuration file suitable for the current chip specification through a file dialog box. After the configuration file is loaded, the system parses the pixel pitch and origin coordinate information therein, and stores the parsed results in a memory data structure as the input data of the coordinate conversion module.

[0015] Preferably, the configuration file is in xml format or json format.

[0016] Preferably, the data import module first performs data cleaning and verification preprocessing on the obtained defect coordinate data, and outputs the processed defect coordinates (Px, Py) to the coordinate conversion module as the original data for coordinate conversion.

[0017] Preferably, in the coordinate conversion module, the algorithm formula is as follows:

[0018] Sw = W0 - Px * Pitch

[0019] Sv = V0 - Py * Pitch

[0020] wherein:

[0021] Pitch represents the physical pixel pitch;

[0022] Px * Pitch represents the physical distance of the defect source in the X direction of the chip relative to the pixel origin of the chip.

[0023] Py * Pitch represents the physical distance of the defect source in the Y direction of the chip relative to the pixel origin of the chip.

[0024] (W0, V0) represents the physical coordinates of the pixel origin of the CMOS chip.

[0025] (Sw, Sv) represents the spatial coordinates of the microscopic analysis device.

[0026] The application also provides a CMOS chip imaging defect to defect source automatic analysis method, comprising the following steps:

[0027] Step S1, loading the CMOS chip into a chip container accommodating different models of CMOS chips;

[0028] Step S2, reading the imaging defect coordinates of the CMOS chip;

[0029] Step S3, converting the imaging defect coordinates into spatial coordinates of the microscopic analysis equipment;

[0030] Step S4, analyzing the spatial coordinates using the microscopic analysis equipment.

[0031] Preferably, step S3 comprises the following sub-steps:

[0032] Step S3.1, selecting a corresponding chip container according to the model of the CMOS chip;

[0033] Step S3.2, loading a configuration file, the configuration file containing the pixel pitch of the CMOS chip and the origin coordinate information of the chip container;

[0034] Step S3.3, importing the imaging defect coordinates and preprocessing;

[0035] Step S3.4, converting the preprocessed imaging defect coordinates into spatial coordinates of the microscopic analysis equipment.

[0036] Preferably, in step S3.2, the configuration file is in xml format or json format.

[0037] Preferably, in step S3.4, in step S3.4, the conversion formula is as follows:

[0038] Sw=W0-Px*Pitch

[0039] Sv=V0-Py*Pitch

[0040] Wherein:

[0041] Pitch represents the physical pixel pitch;

[0042] Px*Pitch represents the physical distance of the defect source in the X direction of the chip relative to the pixel origin of the chip;

[0043] Py*Pitch represents the physical distance of the defect source in the Y direction of the chip relative to the pixel origin of the chip;

[0044] (W0, V0) represents the physical coordinates of the pixel origin of the CMOS chip;

[0045] (Sw, Sv) represents the spatial coordinates of the microscopic analysis device.

[0046] Compared with the prior art, the present application has the following beneficial effects:

[0047] 1、The present application realizes the automation of reading from defect coordinates to the coordinate conversion of the microscopic analysis device through the configuration file module and the coordinate conversion module, reduces manual intervention, and improves analysis efficiency.

[0048] 2、The present application supports different models of CMOS chips and chip containers, and flexibly adapts to various chip specifications through configuration files, and has good expansibility.

[0049] 3、The coordinate conversion module of the present application uses parameters such as pixel pitch and origin position for calculation, ensuring the accuracy of coordinate conversion and improving the precision of defect source positioning.

[0050] 4、The present application selects configuration files through a file dialog box, which is user-friendly and reduces the operation difficulty.

[0051] 5、The data import module of the present application cleans and verifies the test data, ensuring the integrity and accuracy of the data, and providing a reliable basis for subsequent analysis. BRIEF DESCRIPTION OF DRAWINGS

[0052] Other features, objects and advantages of the present application will become more apparent from the following detailed description of non-limiting embodiments, with reference to the accompanying drawings:

[0053] Figure 1 Fig. 1 is a schematic diagram of a CMOS chip imaging defect to defect source automatic analysis system in an embodiment of the present application;

[0054] Figure 2 Fig. 3 is the imaging defect coordinates of step S2 in the embodiment of the present application;

[0055] Figure 3 Fig. 4 is the spatial coordinates of the microscopic analysis device converted by step S3 in the embodiment of the present application;

[0056] Figure 2 and Figure 3 The basic content is consistent, only different coordinates are marked. DETAILED DESCRIPTION

[0057] The present application will be described in detail below in conjunction with specific embodiments. The following embodiments will help those skilled in the art to further understand the present application, but do not limit the present application in any form. It should be noted that for those skilled in the art, without departing from the concept of the present application, a number of changes and improvements can be made. These all belong to the protection scope of the present application.

[0058] This invention achieves a direct, accurate, and automated conversion from CMOS chip imaging defect coordinates to the physical stage coordinates of a microscopic analysis device through a conversion method based on precise physical parameters (pixel spacing and physical origin coordinates) and a flexibly configurable system architecture. The system can closely integrate with high-precision physical analysis equipment, thereby rapidly locating microscopic physical defect sources and performing in-depth analysis. This effectively solves the problems of low efficiency and insufficient accuracy in existing CMOS chip failure analysis processes, which rely on manual operation. Compared with existing technologies, this invention has significant advantages in terms of automation in defect location, analysis accuracy, and multi-device collaborative capabilities, possessing unique application value.

[0059] Example 1:

[0060] Figure 1 This is a schematic diagram of an automatic analysis system for CMOS chip imaging defects to defect sources in an embodiment of the present invention.

[0061] like Figure 1 As shown, this embodiment provides an automatic analysis system for CMOS chip imaging defects to defect sources, including:

[0062] The chip container module uses a specific type of chip container (Pocket) to hold different types of CMOS chips, with different types of CMOS chips corresponding to different chip containers.

[0063] The configuration file module is used to store the pixel pitch of the CMOS chip and the origin coordinates (W0, V0) of the chip container.

[0064] Specifically, a file dialog box allows users to select either an XML or JSON configuration file that is compatible with the current chip specifications. After the configuration file is loaded, the system parses the pixel spacing and origin coordinate information and stores the parsing results in an in-memory data structure as input data for the coordinate transformation module.

[0065] The data import module is used to obtain the defect coordinates of the CMOS chip;

[0066] Specifically, the acquired defect coordinate data is first preprocessed by data cleaning and verification. The processed defect coordinates (Px, Py) are then output to the coordinate transformation module as the raw data for coordinate transformation.

[0067] The coordinate transformation module receives the pixel pitch of the CMOS chip and the origin coordinates (W0, V0) of the chip container provided by the configuration file module, as well as the preprocessed defect coordinates (Px, Py) output by the data import module. It then uses an algorithm that includes calculations of pixel pitch, origin position, and coordinate system transformation to convert the defect coordinates into the spatial coordinates of the microscopic analysis equipment.

[0068] Specifically, the algorithm formula is as follows:

[0069] Sw = W0 - Px * Pitch

[0070] Sv = V0 - Py * Pitch

[0071] Wherein:

[0072] Pitch represents the physical pixel pitch;

[0073] Px * Pitch represents the physical distance of the defect source in the X direction of the chip relative to the pixel origin of the chip.

[0074] Py * Pitch represents the physical distance of the defect source in the Y direction of the chip relative to the pixel origin of the chip.

[0075] (W0, V0) represents the physical coordinates of the pixel origin of the CMOS chip.

[0076] (Sw, Sv) represents the spatial coordinates of the microscopic analysis equipment.

[0077] After the coordinate conversion module completes the conversion of all defect coordinates to the spatial coordinates of the microscopic analysis equipment, the converted coordinates are transmitted to the microscopic analysis equipment to drive the microscopic analysis equipment to automatically navigate to the defect source for analysis, thereby realizing the effective transmission of spatial coordinates expressed in physical units to the microscopic analysis equipment, enabling it to automatically and accurately locate the microscopic physical defect source on the CMOS chip.

[0078] Embodiment 2:

[0079] The embodiment provides a CMOS chip imaging defect to defect source automatic analysis method, which is implemented on the CMOS chip imaging defect to defect source automatic analysis system in the above embodiment, that is, those skilled in the art can understand the CMOS chip imaging defect to defect source automatic analysis method as the running mode of the CMOS chip imaging defect to defect source automatic analysis system.

[0080] Specifically, the CMOS chip imaging defect to defect source automatic analysis method comprises the following steps:

[0081] Step S1, loading the CMOS chip into a chip container accommodating different models of CMOS chips;

[0082] Step S2, reading the imaging defect coordinates of the CMOS chip.

[0083] Figure 2 The imaging defect coordinates of step S2 in the embodiment of the application.

[0084] Figure 2 In an embodiment, the imaging defect coordinates are labeled in pixels.

[0085] Step S3, converting the imaging defect coordinates into spatial coordinates of the microscopic analysis device.

[0086] Specifically, step S3 includes the following sub-steps:

[0087] Step S3.1, selecting a corresponding chip container according to the model of the CMOS chip;

[0088] Step S3.2, loading a configuration file, the configuration file containing the pixel pitch of the CMOS chip and the origin coordinate information of the chip container.

[0089] In an embodiment, the configuration file is in xml format or json format.

[0090] Step S3.3, importing the imaging defect coordinates and preprocessing;

[0091] Step S3.4, converting the preprocessed imaging defect coordinates into spatial coordinates of the microscopic analysis device.

[0092] Specifically, in step S3.4, the conversion formula is as follows:

[0093] Sw=W0-Px*Pitch

[0094] Sv=V0-Py*Pitch

[0095] Wherein:

[0096] Pitch represents the physical pixel pitch;

[0097] Px*Pitch represents the physical distance of the defect source in the X direction of the chip relative to the pixel origin of the chip;

[0098] Py*Pitch represents the physical distance of the defect source in the Y direction of the chip relative to the pixel origin of the chip;

[0099] (W0, V0) represents the physical coordinates of the pixel origin of the CMOS chip;

[0100] (Sw, Sv) represents the spatial coordinates of the microscopic analysis device.

[0101] Figure 3 The spatial coordinates of the microscopic analysis device converted by step S3 in an embodiment of the present application.

[0102] Figure 3 In an embodiment, the spatial coordinates of the microscopic analysis device are labeled in um.

[0103] Step S4, using the microscopic analysis device to analyze the spatial coordinates.

[0104] Those skilled in the art understand that, in addition to implementing the system provided by the present application and each device, module and unit thereof in the form of pure computer readable program code, the system provided by the present application and each device, module and unit thereof can also be implemented in the form of logic gates, switches, application specific integrated circuits, programmable logic controllers and embedded microcontrollers, etc. by logically programming the method steps to achieve the same functions. Therefore, the system provided by the present application and each device, module and unit thereof can be considered as a hardware component, and the devices, modules and units included therein for achieving various functions can also be considered as structures within the hardware component; the devices, modules and units for achieving various functions can also be considered as both software modules implementing methods and structures within hardware components.

[0105] The specific embodiments of the present application are described above. It needs to be understood that the present application is not limited to the specific embodiments described above, and various changes or modifications can be made by those skilled in the art within the scope of the claims, which does not affect the essential content of the present application. The embodiments of the present application and the features in the embodiments can be arbitrarily combined with each other without conflict.

Claims

1. A system for automatic analysis of imaging defects to defect sources in CMOS chips, characterized by, The application relates to a method for converting defect coordinates of a CMOS chip into spatial coordinates of a microscopic analysis device. The application comprises: a chip container module for accommodating different models of CMOS chips, wherein different models of CMOS chips correspond to different chip containers; a configuration file module for storing pixel pitch of the CMOS chip and origin coordinate information of the chip container; a data import module for obtaining defect coordinates of the CMOS chip; a coordinate conversion module for receiving pixel pitch provided by the configuration file module, origin coordinate information of the chip container and defect coordinates output by the data import module, and converting the defect coordinates into spatial coordinates of the microscopic analysis device by using a conversion calculation algorithm; 2. The CMOS chip imaging defect-to-defect source automatic analysis system according to claim 1, wherein, a microscopic analysis device for analyzing defect sources according to the spatial coordinates.

3. The CMOS chip imaging defect-to-defect source automatic analysis system according to claim 1, wherein, The chip container module adopts a chip container of a specific model.

4. The CMOS chip imaging defect-to-defect source automatic analysis system according to claim 3, wherein, The configuration file module allows a user to select a configuration file suitable for a current chip specification through a file dialog box, and after the configuration file is loaded, the system parses pixel pitch and origin coordinate information in the configuration file and stores the parsed results in a memory data structure as input data of the coordinate conversion module.

5. The CMOS chip imaging defect-to-defect source automatic analysis system according to claim 1, wherein, The configuration file is in xml format or json format.

6. The CMOS chip imaging defect-to-defect source automatic analysis system of claim 1, wherein, The data import module first performs data cleaning and verification preprocessing on obtained defect coordinate data, and outputs processed defect coordinates (Px, Py) to the coordinate conversion module as original data for coordinate conversion. In the coordinate conversion module, an algorithm formula is as follows: Sw=V0-Px*Pitch Sv=V0-Py*Pitch wherein: Pitch represents physical pixel pitch; Px*Pitch represents a physical distance of a defect source in an X direction of a chip relative to a pixel origin of the chip; Py*Pitch represents a physical distance of the defect source in a Y direction of the chip relative to the pixel origin of the chip; (W0, V0) represents physical coordinates of a pixel origin of the CMOS chip; 7. A method for automatic analysis of imaging defects to defect sources in CMOS chips, characterized in that, (Sw, Sv) represents spatial coordinates of the microscopic analysis device. The application comprises the following steps: Step S1, loading a CMOS chip into a chip container for accommodating different models of CMOS chips; Step S2, reading imaging defect coordinates of the CMOS chip; Step S3, converting the imaging defect coordinates into spatial coordinates of a microscopic analysis device; 8. The method of claim 7, wherein the CMOS chip imaging defect-to-defect source automatic analysis method is characterized by, Step S4, analyzing the spatial coordinates by using the microscopic analysis device. The step S3 comprises the following substeps: Step S3.1, selecting a corresponding chip container according to a model of the CMOS chip; Step S3.2, loading a configuration file, wherein the configuration file contains pixel pitch of the CMOS chip and origin coordinate information of the chip container; Step S3.3, importing the imaging defect coordinates and performing preprocessing; 9. The method of claim 8, wherein the CMOS chip imaging defect-to-defect source automatic analysis method is characterized by, Step S3.4, converting the preprocessed imaging defect coordinates into spatial coordinates of the microscopic analysis device.

10. The method of claim 8, wherein the CMOS chip imaging defect-to-defect source automatic analysis method is characterized by, In the step S3.2, the configuration file is in xml format or json format. In the step S3.4, a conversion formula is as follows: Sw=W0-Px*Pitch Sv=V0-Py*Pitch wherein: Pitch represents physical pixel pitch; Px*Pitch represents the physical distance of the defect source in the X direction of the chip relative to the pixel origin of the chip; Py*Pitch represents the physical distance of the defect source in the Y direction of the chip relative to the pixel origin of the chip; (W0, V0) represents the physical coordinates of the pixel origin of the CMOS chip; (Sw, Sv) represents the spatial coordinates of the microscopic analysis device.

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