Multi-order circuit system for sine nonlinear signal processing

Abstract

The invention belongs to the technical field of chaotic circuits, and discloses a sine nonlinear signal processing-oriented multi-order circuit system, which comprises a sine nonlinear function circuit, a fourth-order linear differential equation circuit and a fifth-order linear differential equation circuit, and is characterized in that the sine nonlinear function circuit consists of an operational amplifier A1, resistors R1 to R16 and diodes D1 to D6; the output and the input are in a sine nonlinear function relationship; the fourth-order and fifth-order linear differential equation circuit consists of an inverting operational amplifier, a capacitor and a resistor, and is used for generating a plurality of Chua's chaotic signal outputs of the sine nonlinear fourth-order and fifth-order Chua's circuit; the circuit can form various chaotic circuit systems and chaotic secret communication systems.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of chaotic circuit, and particularly relates to a multi-order circuit system for processing sinusoidal nonlinear signals. BACKGROUND

[0002] The nonlinear function circuit is a kind of circuit in function circuits, and can be applied to chaotic circuit to generate chaotic signals, but the existing scheme cannot provide four chaotic circuit signals or five chaotic circuit signals, which is an insufficient of the existing chaotic circuit technology. SUMMARY

[0003] The application aims to provide a multi-order circuit system for processing sinusoidal nonlinear signals to solve the problems of the existing technology.

[0004] To achieve the above object, the application provides a multi-stage circuit system for processing sinusoidal nonlinear signals, which comprises a sinusoidal nonlinear function circuit and a multi-stage linear differential equation circuit, the multi-stage linear differential equation circuit comprising a second operational amplifier A2, a third operational amplifier A3, a fourth operational amplifier A4, a fifth operational amplifier A5, a sixth operational amplifier A6, a plurality of capacitors and a plurality of resistors, wherein the non-inverting input terminal of the second operational amplifier A2 is connected to ground, the inverting input terminal of the second operational amplifier A2 is connected to the output terminal of the sinusoidal nonlinear function circuit, the first capacitor C1 and the twenty-first resistor R21, the output terminal of the second operational amplifier A2 is connected to the input terminal of the sinusoidal nonlinear function circuit and the first capacitor C1; the second capacitor C2 and the twentieth resistor R20 are connected in parallel between the inverting input terminal and the output terminal of the third operational amplifier A3, the non-inverting input terminal of the third operational amplifier A3 is connected to ground, the inverting input terminal of the third operational amplifier A3 is connected to the output terminal of the second operational amplifier A2 through the seventeenth resistor R17, the output terminal of the third operational amplifier A3 is connected to the inverting input terminal of the second operational amplifier A2 and the inverting input terminal of the fifth operational amplifier A5 through the twenty-first resistor R21 and the twenty-second resistor R22 respectively, the non-inverting input terminal of the fifth operational amplifier A5 is connected to ground, the twenty-fourth resistor R24 is connected in parallel between the inverting input terminal and the output terminal of the fifth operational amplifier A5, the output terminal of the fifth operational amplifier A5 is connected to the inverting input terminal of the fourth operational amplifier A4 through the twenty-fifth resistor R25, the non-inverting input terminal of the fourth operational amplifier A4 is connected to ground, the third capacitor C3 is connected in parallel between the inverting input terminal and the output terminal of the fourth operational amplifier A4, the output terminal of the fourth operational amplifier A4 is connected to the inverting input terminal of the third operational amplifier A3 and the inverting input terminal of the sixth operational amplifier A6 through the eighteenth resistor R18 and the twenty-seventh resistor R27 respectively, the non-inverting input terminal of the sixth operational amplifier A6 is connected to ground, the twenty-sixth resistor R26 and the fourth capacitor C4 are connected in parallel between the inverting input terminal and the output terminal of the sixth operational amplifier A6, and the output terminal of the sixth operational amplifier A6 is connected to the inverting input terminal of the fifth operational amplifier A5 through the twenty-third resistor R23.

[0005] Optionally, the multi-stage linear differential equation circuit further comprises a seventh operational amplifier A7, the twenty-ninth resistor R29 and the fifth capacitor C5 are connected in parallel between the inverting input terminal and the output terminal of the seventh operational amplifier A7, the inverting input terminal of the seventh operational amplifier A7 is connected to the output terminal of the sixth operational amplifier A6 through the twenty-eighth resistor R28, the non-inverting input terminal is connected to ground, and the output terminal is connected to the inverting input terminal of the third operational amplifier A3 through the nineteenth resistor R19.

[0006] Optionally, the sine nonlinear function circuit comprises a first resistor R1, one end of the first resistor R1 is connected to an output end of the second operational amplifier A2, the other end is connected to an inverting input end of the first operational amplifier A1, one end of a second resistor R2, an anode of a first diode D1, an anode of a second diode D2, an anode of a third diode D3, a cathode of a fourth diode D4, a cathode of a fifth diode D5 and a cathode of a sixth diode D6, a non-inverting input end of the first operational amplifier A1 is grounded, cathodes of the first diode D1, the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5 and the sixth diode D6 are respectively connected to a third resistor R3 and a ninth resistor R9, a fourth resistor R4 and a tenth resistor R10, a fifth resistor R5 and an eleventh resistor R11, an anode of the fourth diode D4 is respectively connected to a sixth resistor R6 and a twelfth resistor R12, an anode of the fifth diode D5 is respectively connected to a seventh resistor R7 and a thirteenth resistor R13, an anode of the sixth diode D6 is respectively connected to an eighth resistor R8 and a fourteenth resistor R14, the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor, the seventh resistor and the eighth resistor are connected in parallel and are connected to the output end of the first operational amplifier A1, the output end of the first operational amplifier A1 is connected to the inverting input end of the second operational amplifier A2, the ninth resistor R9, the tenth resistor R10 and the eleventh resistor R11 are connected to a positive electrode of a power supply EC1, the twelfth resistor R12, the thirteenth resistor R13 and the fourteenth resistor R14 are connected to a negative electrode of a power supply EC2, and the power supply EC1 and the power supply EC2 are connected in series.

[0007] Optionally, the sine nonlinear function circuit further comprises a fifteenth resistor R15 and a sixteenth resistor R16, one end of the fifteenth resistor R15 is connected to the output end of the first operational amplifier A1, the other end is connected to the inverting input end of the second operational amplifier A2, one end of the sixteenth resistor R16 is connected between the first resistor R1 and the output end of the second operational amplifier A2, the other end is connected between the fifteenth resistor R15 and the inverting input end of the second operational amplifier A2.

[0008] The technical effect of the present application is:

[0009] Compared with the prior art, the circuit provided by the present application can observe the nonlinear curve of the sine function, can output three voltage waveform signals and three voltage phase diagram signals of the sine nonlinear Chua circuit, can be applied to the design of a chaotic circuit, and can perform various experiments on the sine nonlinear fourth-order and fifth-order Chua circuit on an oscilloscope. The present application is suitable for analog electronic science education, experimental teaching and demonstration, and science popularization experimental demonstration. BRIEF DESCRIPTION OF DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed in the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] The drawings constituting a part of the present application are used to provide further understanding of the present application, the illustrative embodiments of the present application and the description thereof are used to explain the present application, and do not constitute improper limitation on the present application. In the drawings:

[0012] Figure 1 A sinusoidal nonlinear four-order Chua circuit schematic diagram provided in the embodiments of the present application;

[0013] Figure 2 A sinusoidal nonlinear five-order Chua circuit schematic diagram provided in the embodiments of the present application;

[0014] Figure 3 A sinusoidal nonlinear four-order-five-order Chua circuit XY output phase diagram provided in the embodiments of the present application;

[0015] Figure 4 A sinusoidal nonlinear four-order-five-order Chua circuit XZ output phase diagram provided in the embodiments of the present application;

[0016] Figure 5 A sinusoidal nonlinear four-order-five-order Chua circuit XU output phase diagram provided in the embodiments of the present application;

[0017] Figure 6 A sinusoidal nonlinear five-order Chua circuit XV output phase diagram provided in the embodiments of the present application;

[0018] Figure 7 A sinusoidal nonlinear four-order-five-order Chua circuit YZ output phase diagram provided in the embodiments of the present application;

[0019] Figure 8 A sinusoidal nonlinear four-order-five-order Chua circuit YU output phase diagram provided in the embodiments of the present application;

[0020] Figure 9 A sinusoidal nonlinear five-order Chua circuit YV output phase diagram provided in the embodiments of the present application;

[0021] Figure 10 A sinusoidal nonlinear four-order-five-order Chua circuit ZU output phase diagram provided in the embodiments of the present application;

[0022] Figure 11 A sinusoidal nonlinear five-order Chua circuit ZV output phase diagram provided in the embodiments of the present application;

[0023] Figure 12 The UV output phase diagram of the sinusoidal nonlinear fifth-order Chua's circuit provided in this embodiment of the invention;

[0024] Figure 13 The above are the EWB simulation results of the sinusoidal nonlinear fifth-order Chua's circuit provided in the embodiments of the present invention. Detailed Implementation

[0025] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as a limitation of the present invention, but rather as a more detailed description of certain aspects, features, and embodiments of the present invention.

[0026] It should be understood that the terminology used in this invention is merely for describing particular embodiments and is not intended to limit the invention. Furthermore, with respect to numerical ranges in this invention, it should be understood that each intermediate value between the upper and lower limits of the range is also specifically disclosed. Every smaller range between any stated value or intermediate value within a stated range, and any other stated value or intermediate value within said range, is also included in this invention. The upper and lower limits of these smaller ranges may be independently included or excluded from the range.

[0027] Various modifications and variations can be made to the specific embodiments described in this specification without departing from the scope or spirit of the invention, as will be apparent to those skilled in the art. Other embodiments derived from this specification will also be obvious to those skilled in the art. This application specification and embodiments are merely exemplary.

[0028] The terms “include,” “including,” “have,” “contain,” etc., used in this article are all open-ended terms, meaning that they include but are not limited to.

[0029] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0030] Example 1

[0031] like Figure 1 As shown, this embodiment provides a sinusoidal nonlinear fourth-order Chua's circuit, which includes a sinusoidal nonlinear function circuit and a fourth-order linear differential equation circuit; the X output terminal of the fourth-order linear differential equation circuit is connected to the input terminal of the sinusoidal nonlinear function circuit, and the output terminal of the sinusoidal nonlinear function circuit is connected to one input terminal of the fourth-order linear differential equation circuit.

[0032] The sinusoidal nonlinear function circuit includes an operational amplifier, six diodes, fourteen resistors, and two power supplies; wherein, the input terminal V 输入The first resistance R1 is connected with the sixteenth resistance R16; the other end of the first resistance R1 is connected with the second resistance R2, the anode of the first diode D1, the anode of the second diode D2, the anode of the third diode D3, the cathode of the fourth diode D4, the cathode of the fifth diode D5, the cathode of the sixth diode D6 and the inverting input terminal of the first operational amplifier A1; the non-inverting input terminal of the first operational amplifier A1 is grounded, and the output terminal is connected with the second resistance R2, the third resistance R3, the fourth resistance R4, the fifth resistance R5, the sixth resistance R6, the seventh resistance R7, the eighth resistance R8 and the fifteenth resistance R15; the cathode of the first diode D1 is connected with the third resistance R3 and the ninth resistance R9; the cathode of the second diode D2 is connected with the fourth resistance R4 and the tenth resistance R10; the cathode of the third diode D3 is connected with the fifth resistance R5 and the eleventh resistance R11; the anode of the fourth diode D4 is connected with the sixth resistance R6 and the twelfth resistance R12; the anode of the fifth diode D5 is connected with the seventh resistance R7 and the thirteenth resistance R13; the anode of the sixth diode D6 is connected with the eighth resistance R8 and the fourteenth resistance R14; the ninth resistance R9, the tenth resistance R10 and the eleventh resistance R11 are connected with the positive pole of the first power supply EC1; the twelfth resistance R12, the thirteenth resistance R13 and the fourteenth resistance R14 are connected with the negative pole of the second power supply EC2; the other end of the fifteenth resistance R15 is connected with the other end of the sixteenth resistance R16 and the output terminal.

[0033] The input end of the fourth-order linear differential equation circuit is connected with the twenty-first resistor R21, the first capacitor C1 and the inverting input end of the second operational amplifier A2, and the output end of the fourth-order linear differential equation circuit is connected with the seventeenth resistor R17, the first capacitor C1 and the output end of the second operational amplifier A2; the non-inverting input end of the third operational amplifier A3 is grounded, the inverting input end is connected with the seventeenth resistor R17, the eighteenth resistor R18, the twentieth resistor R20 and the second capacitor C2, and the output end is connected with the twentieth resistor R20, the twenty-first resistor R21 and the second capacitor C2; the non-inverting input end of the second operational amplifier A2 is grounded, the inverting input end is connected with the twenty-first resistor R21, the first capacitor C1 and the input end of the fourth-order linear differential equation circuit, and the output end is connected with the first capacitor C1 and the output end of the fourth-order linear differential equation circuit, and the output end is the output end X; the non-inverting input end of the fifth operational amplifier A5 is grounded, the inverting input end is connected with the twenty-second resistor R22, the twenty-third resistor R23 and the twenty-fourth resistor R24, the output end is connected with the twenty-fourth resistor R24 and the twenty-fifth resistor R25, and the output end is the output end Y; the non-inverting input end of the fourth operational amplifier A4 is grounded, the inverting input end is connected with the twenty-fifth resistor R25 and the third capacitor C3, and the output end is connected with the eighteenth resistor R18, the twenty-seventh resistor R27 and the third capacitor C2, and the output end is the output end Z; the non-inverting input end of the sixth operational amplifier A6 is grounded, the inverting input end is connected with the twenty-sixth resistor R26, the twenty-seventh resistor R27 and the fourth capacitor C4, and the output end is connected with the twenty-third resistor R23, the twenty-sixth resistor R26 and the fourth capacitor C4, and the output end is the output end U.

[0034] Embodiment 2

[0035] As Figure 2 shown, the embodiment also discloses a sinusoidal nonlinear five-order Chua circuit, which specifically comprises a sinusoidal nonlinear function circuit and a five-order linear differential equation circuit; the X output end of the five-order linear differential equation circuit is connected with the input end of the sinusoidal nonlinear function circuit, and the output end of the sinusoidal nonlinear function circuit is connected with one input end of the five-order linear differential equation circuit.

[0036] The input end of the five-stage linear differential equation circuit is connected with the twenty-first resistor R21, the first capacitor C1 and the inverting input end of the second operational amplifier A2, and the input end of the five-stage linear differential equation circuit is connected with the seventeenth resistor R17, the first capacitor C1 and the output end of the second operational amplifier A2; the non-inverting input end of the third operational amplifier A3 is grounded, the inverting input end is connected with the seventeenth resistor R17, the eighteenth resistor R18, the twentieth resistor R20 and the second capacitor C2, and the output end is connected with the twentieth resistor R20, the twenty-first resistor R21 and the second capacitor C2; the non-inverting input end of the second operational amplifier A2 is grounded, the inverting input end is connected with the twenty-first resistor R21, the first capacitor C1 and the input end of the four-stage linear differential equation circuit, and the output end is connected with the first capacitor C1 and the output end of the four-stage linear differential equation circuit, and the output end is the output end X; the non-inverting input end of the fifth operational amplifier A5 is grounded, the inverting input end is connected with the twenty-second resistor R22, the twenty-third resistor R23 and the twenty-fourth resistor R24, the output end is connected with the twenty-fourth resistor R24 and the twenty-fifth resistor R25, and the output end is the output end Y; the non-inverting input end of the fourth operational amplifier A4 is grounded, the inverting input end is connected with the twenty-fifth resistor R25 and the third capacitor C3, and the output end is connected with the eighteenth resistor R18, the twenty-seventh resistor R27 and the third capacitor C2, and the output end is the output end Z; the non-inverting input end of the sixth operational amplifier A6 is grounded, the inverting input end is connected with the twenty-sixth resistor R26, the twenty-seventh resistor R27 and the fourth capacitor C4, and the output end is connected with the twenty-third resistor R23, the twenty-sixth resistor R26 and the fourth capacitor C4, and the output end is the output end U; the output end of the sixth operational amplifier A6 is connected with the twenty-eighth resistor R28; the non-inverting input end of the seventh operational amplifier A7 is grounded, the inverting input end is connected with the twenty-eighth resistor R28, the twenty-ninth resistor R29 and the fifth capacitor C5, and the output end is connected with the nineteenth resistor R19, the twenty-ninth resistor R29 and the fifth capacitor C5, and the output end is the output end V.

[0037] The circuit comprises a sine nonlinear function circuit, a four-stage linear differential equation circuit and a five-stage linear differential equation circuit, the sine nonlinear function circuit is composed of the operational amplifier A1 and resistors R1-R16 and diodes D1-D6, and the output and the input have a sine nonlinear function relationship; the four-stage and five-stage linear differential equation circuits are composed of inverting operational amplifiers, capacitors and resistors, and can generate multiple Chua chaotic signals of a sine nonlinear four-stage and five-stage Chua circuit; the circuit can form various chaotic circuit systems and chaotic secure communication systems.

[0038] The parameters of the components used in the circuit are as follows:

[0039] The A1 is TL082 or TL084;

[0040] The diode is 2CK11;

[0041] R1 = R2 = 5.1KΩ, R3 = R6 = 18KΩ, R4 = R7 = 6.8KΩ, R5 = R8 = 1.3KΩ;

[0042] R9 = R12 = 129KΩ, R10 = R13 = 28.5KΩ, R11 = R14 = 4.56KΩ, R15 = 69KΩ;

[0043] R16 = 6.5KΩ, R17 = 1.7KΩ, R18 = 1KΩ, R19 = R22 = R24 = R26 = R27 = 10KΩ,

[0044] R20 = 3.9KΩ, R21 = 560KΩ, R23 = R25 = 5.6KΩ, R28 = 56KΩ, R29 = 200KΩ;

[0045] C1 = C2 = C3 = C4 = C5 = 1.12uF.

[0046] The four output terminals Vx, Vy, Vz and Vu in the device are connected to the signal terminals of an oscilloscope or the relevant interface of a computer, and the chaotic waveform signals of the four output terminals Vx, Vy, Vz and Vu can be displayed. Figure 1 The five output terminals Vx, Vy, Vz, Vu and Vv in the device are connected to the signal terminals of an oscilloscope or the relevant interface of a computer, and the chaotic waveform signals of the five output terminals Vx, Vy, Vz, Vu and Vv can be displayed. Figure 2 The phase diagram of x-y, x-z, x-u, x-v, y-z, y-y, y-v, z-u, z-v and u-v can be displayed. Figure 1 Figure 2 The phase diagram of x-y, x-z, x-u, x-v, y-z, y-y, y-v, z-u, z-v and u-v can be displayed. Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 Figure 12 The results are shown in Table 1. Figure 13 The effectiveness of the device is proved by the following equation. Figures 3 to 13

[0047] ​​​​​​​​​​​The application provides a sine nonlinear fourth-order fifth-order Chua circuit, which can output four chaotic voltage signals or five chaotic voltage signals of the sine nonlinear Chua chaotic circuit.

[0048] The above description is merely preferred specific embodiments of the application, but the protection scope of the application is not limited thereto, and any changes or replacements within the technical scope disclosed by the application can be easily thought of by those skilled in the art, which should be covered within the protection scope of the application. Therefore, the protection scope of the application should be subject to the protection scope of the claims.

Claims

1. A multi-order circuit system for sinusoidal non-linear signal processing, characterized by, The circuit comprises a sine nonlinear function circuit and a multi-order linear differential equation circuit, the multi-order linear differential equation circuit comprises a second operational amplifier A2, a third operational amplifier A3, a fourth operational amplifier A4, a fifth operational amplifier A5, a sixth operational amplifier A6, a plurality of capacitors and a plurality of resistors, wherein the non-inverting input terminal of the second operational amplifier A2 is grounded, the inverting input terminal of the second operational amplifier A2 is connected with the output terminal of the sine nonlinear function circuit, the first capacitor C1 and the twenty-first resistor R21, the output terminal of the second operational amplifier A2 is connected with the input terminal of the sine nonlinear function circuit and the first capacitor C1; the second capacitor C2 and the twentieth resistor R20 are connected in parallel between the inverting input terminal and the output terminal of the third operational amplifier A3, the non-inverting input terminal of the third operational amplifier A3 is grounded, the inverting input terminal of the third operational amplifier A3 is connected with the output terminal of the second operational amplifier A2 through the seventeenth resistor R17, the output terminal of the third operational amplifier A3 is connected with the inverting input terminal of the second operational amplifier A2 and the inverting input terminal of the fifth operational amplifier A5 through the twenty-first resistor R21 and the twenty-second resistor R22 respectively, the non-inverting input terminal of the fifth operational amplifier A5 is grounded, the twenty-fourth resistor R24 is connected in parallel between the inverting input terminal and the output terminal of the fifth operational amplifier A5, the output terminal of the fifth operational amplifier A5 is connected with the inverting input terminal of the fourth operational amplifier A4 through the twenty-fifth resistor R25, the non-inverting input terminal of the fourth operational amplifier A4 is grounded, the third capacitor C3 is connected in parallel between the inverting input terminal and the output terminal of the fourth operational amplifier A4, the output terminal of the fourth operational amplifier A4 is connected with the inverting input terminal of the third operational amplifier A3 and the inverting input terminal of the sixth operational amplifier A6 through the eighteenth resistor R18 and the twenty-seventh resistor R27 respectively, the non-inverting input terminal of the sixth operational amplifier A6 is grounded, the twenty-sixth resistor R26 and the fourth capacitor C4 are connected in parallel between the inverting input terminal and the output terminal of the sixth operational amplifier A6, the output terminal of the sixth operational amplifier A6 is connected with the inverting input terminal of the fifth operational amplifier A5 through the twenty-third resistor R23.

2. The system of claim 1, wherein, The multi-order linear differential equation circuit further comprises a seventh operational amplifier A7, the twenty-ninth resistor R29 and the fifth capacitor C5 are connected in parallel between the inverting input terminal and the output terminal of the seventh operational amplifier A7, the inverting input terminal of the seventh operational amplifier A7 is connected with the output terminal of the sixth operational amplifier A6 through the twenty-eighth resistor R28, the non-inverting input terminal is grounded, and the output terminal is connected with the inverting input terminal of the third operational amplifier A3 through the nineteenth resistor R19.

3. The system of claim 2, wherein, The sine nonlinear function circuit comprises a first resistor R1, one end of the first resistor R1 is connected to the output end of the second operational amplifier A2, the other end is connected to the inverting input end of the first operational amplifier A1, one end of a second resistor R2, the anode of a first diode D1, the anode of a second diode D2, the anode of a third diode D3, the cathode of a fourth diode D4, the cathode of a fifth diode D5 and the cathode of a sixth diode D6; the non-inverting input end of the first operational amplifier A1 is grounded; the cathode of the first diode D1 is respectively connected to a third resistor R3 and a ninth resistor R9, the cathode of the second diode D2 is respectively connected to a fourth resistor R4 and a tenth resistor R10, the cathode of the third diode D3 is respectively connected to a fifth resistor R5 and an eleventh resistor R11, the anode of the fourth diode D4 is respectively connected to a sixth resistor R6 and a twelfth resistor R12, the anode of the fifth diode D5 is respectively connected to a seventh resistor R7 and a thirteenth resistor R13, and the anode of the sixth diode D6 is respectively connected to an eighth resistor R8 and a fourteenth resistor R14; the second resistor R2, the third resistor R3, the fourth resistor R4, the fifth resistor R5, the sixth resistor, the seventh resistor and the eighth resistor are connected in parallel and are connected to the output end of the first operational amplifier A1; the output end of the first operational amplifier A1 is connected to the inverting input end of the second operational amplifier A2, the ninth resistor R9, the tenth resistor R10 and the eleventh resistor R11 are connected to the positive pole of a power supply EC1, the twelfth resistor R12, the thirteenth resistor R13 and the fourteenth resistor R14 are connected to the negative pole of a power supply EC2, and the power supply EC1 and the power supply EC2 are connected in series.

4. The system of claim 3, wherein, The sine nonlinear function circuit further comprises a fifteenth resistor R15 and a sixteenth resistor R16, one end of the fifteenth resistor R15 is connected to the output end of the first operational amplifier A1, the other end is connected to the inverting input end of the second operational amplifier A2, one end of the sixteenth resistor R16 is connected between the first resistor R1 and the output end of the second operational amplifier A2, and the other end is connected between the fifteenth resistor R15 and the inverting input end of the second operational amplifier A2.

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