Power module

Abstract

The invention provides a miniaturized power module. A power module (1) is provided with a first substrate (10), a second substrate (20), a first flow path forming section (30), and a second flow path forming section (40). The power semiconductor device includes a first substrate (10) including at least one pair of conductor parts (11) not connected to each other, one or more power semiconductor chips (12) connected to either of the conductor parts (11), and a cooler (13) provided on a side where the conductor parts (11) are not provided and configured to cool the power semiconductor chips (12), and a second substrate (20) configured similarly to the first substrate (10). And a first flow path forming section (30) which is provided on the surface of the first substrate (10) on which the cooler (13) is provided and which forms a first flow path (51) with the first substrate (10), and a second flow path forming section (40) which is provided on the surface of the second substrate (20) on which the cooler (23) is provided and which forms a second flow path (52) with the second substrate (20). The surface of the first substrate (10) on which the paired conductor parts (11) are provided and the surface of the second substrate (20) on which the paired conductor parts (21) are provided face each other and are arranged so as to be separated from each other.

Description

TECHNICAL FIELD

[0001] The present application relates to a power module used in a power conversion device that converts alternating current and direct current. BACKGROUND

[0002] In an electric vehicle or a hybrid vehicle, an inverter composed of an upper arm and a lower arm is used for converting from direct current to alternating current between a battery and a motor as a load. In a power conversion device having the inverter, an upper arm power semiconductor chip and a lower arm power semiconductor chip are disposed near a capacitor provided for smoothing (Patent Literature 1).

[0003] PRIOR ART DOCUMENTS

[0004] PATENT LITERATURE

[0005] Patent Literature 1: Japanese Patent Application Laid-Open No. 2012-84708

[0006] Thus, in the power conversion device having the inverter, the upper arm power semiconductor chip and the lower arm power semiconductor chip are disposed in a plane near the smoothing capacitor, resulting in an increase in their disposition area. SUMMARY

[0007] Therefore, an object of the present application is to provide a power module that is downsized. Other objects are described in embodiments for carrying out the application.

[0008] The power module according to the present application comprises:

[0009] a first substrate including at least one pair of conductor portions not connected to each other, one or more power semiconductor chips connected to either of the conductor portions, and a cooler provided on a side on which the conductor portions are not provided and used for cooling the power semiconductor chips;

[0010] a second substrate including at least one pair of conductor portions not connected to each other, one or more power semiconductor chips connected to either of the conductor portions, and a cooler provided on a side on which the conductor portions are not provided and used for cooling the power semiconductor chips;

[0011] a first flow path forming portion provided on a side of the first substrate on which the cooler is provided and forming a first flow path for causing a refrigerant to flow in the cooler of the first substrate; and

[0012] a second flow path forming portion provided on a side of the second substrate on which the cooler is provided and forming a second flow path for causing a refrigerant to flow in the cooler of the second substrate,

[0013] The face of the first substrate in which the pair of conductor portions are provided faces the face of the second substrate in which the pair of conductor portions are provided and is disposed in a separated manner.

[0014] Inventive Effects

[0015] According to the present application, the faces in which the pair of conductor portions are provided face each other, the first substrate and the second substrate are disposed in a separated manner, the first flow path forming portion is provided on the side of the first substrate in which the pair of conductor portions are not provided and in which the cooler is provided, forms the first flow path with the first substrate, and the second flow path forming portion is provided on the side of the second substrate in which the pair of conductor portions are not provided and in which the cooler is provided, forms the second flow path with the second substrate, thus the first substrate and the second substrate are disposed in a manner that at least overlap when viewed in the thickness direction, thus the power semiconductor chips are three-dimensionally disposed, and the power module is downsized. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is a cross-sectional view along the II line-II line schematically showing the power module to which the present application is applied.

[0017] Figure 2 is a cross-sectional view along the I line-I line schematically showing the power module to which the present application is applied.

[0018] Figure 3 is a cross-sectional view along the IV line-IV line schematically showing the power module to which the present application is applied.

[0019] Figure 4 is a cross-sectional view along the III line-III line schematically showing the power module to which the present application is applied.

[0020] Figure 5 is a cross-sectional view along the V line-V line schematically showing the power module to which the present application is applied.

[0021] Figure 6 is a cross-sectional view along the IV line-IV line schematically showing the power module to which the present application is applied.

[0022] Figure 7 is a cross-sectional view schematically showing the power module to which the present application is applied.

[0023] Figure 8 is a view showing Figures 1 to 7 the pair of conductor portions included in the first substrate and the pair of conductor portions included in the second substrate shown.

[0024] Figure 9 is a circuit diagram constituted by the power module to which the present application is applied.

[0025] Figure 10is a perspective view of the power module from above, to which an embodiment of the present application relates.

[0026] Figure 11 is a perspective view of the power module from below, to which an embodiment of the present application relates.

[0027] Figure 12 is a perspective view of a component of the power module, to which an embodiment of the present application relates.

[0028] Figure 13 is a view showing a pair of conductor portions of a first substrate and a plate portion of a cooler in the power module, to which an embodiment of the present application relates.

[0029] Figure 14 is a view showing a pair of conductor portions of a second substrate and a plate portion of a cooler in the power module, to which an embodiment of the present application relates.

[0030] Figure 15 is Figure 10 is a sectional view at the XV-XV plane in

[0031] Figure 16 is Figure 15 is a partial enlarged view of the section shown in

[0032] Figure 17A is Figure 15 is a sectional view along the XVII-XVII line in

[0033] Figure 17B is a sectional view of a state in which the power module component including the second substrate is detached from the second flow path forming portion in Figure 17A

[0034] Figure 18 is a partial enlarged view of the section shown in Figure 17A

[0035] Figure 19 is a block diagram of a power conversion device including the power module, to which an embodiment of the present application relates.

[0036] Figure 20A is an image of the trial-manufactured power module, viewed obliquely from above.

[0037] Figure 20B is a view showing the main outlines shown in Figure 20A

[0038] Figure 21A is an image of the power module component, detached from the second flow path forming portion in the trial-manufactured power module, viewed obliquely from above.

[0039] Figure 21B is a view showing the main outlines shown in Figure 21A ​​​A view showing the main outlines.

[0040] Figure 22A is an image of a state in which the power module member is detached from the second flow path forming portion in the trial power module and the second substrate of the power module member is located above.

[0041] Figure 22B is a view showing Figure 22A A view showing the main outlines.

[0042] Figure 23A is an image showing the second flow path forming portion in the trial power module.

[0043] Figure 23B is a view showing Figure 23A A view showing the main outlines.

[0044] Figure 24A is a view showing a simulation result of heat distribution in a power module that constitutes a three-phase inverter.

[0045] Figure 24B is a view showing Figure 24A a simulation result together with the outline of the first conductor portion, the second conductor portion, and the power semiconductor chip.

[0046] Explanation of Reference Signs

[0047] 1: Power module

[0048] 2: Power module

[0049] 3: Power module member

[0050] 10: First substrate

[0051] 10a, 10b, 10c, 10d, 10e, 10f, 20a, 20b, 20c, 20d, 20e, 20f: Bonding layer

[0052] 11, 11U, 11V, 11W, 21, 21U, 21V, 21W: Conductor portion

[0053] 11a, 21a: First conductor portion

[0054] 11b, 21b: Second conductor portion

[0055] 12, 22: Power semiconductor chip

[0056] 13, 23: Cooler

[0057] 13a, 23a: Plate portion

[0058] 13b, 23b: Protrusion portion

[0059] 13c, 13d: cooling pipe

[0060] 13e, 23e: fastening link through-hole

[0061] 13f, 23f: flow path through-hole

[0062] 14, 24: circuit substrate

[0063] 14a, 24a: insulating substrate

[0064] 14b, 14c, 14d, 24b, 24c, 24d: metal layer

[0065] 15a: first AC connection terminal

[0066] 15b, 25b: chip mounting portion

[0067] 15c, 25c: extension portion

[0068] 16a: first DC connection terminal

[0069] 16b, 26b: adjacent portion

[0070] 16c, 26c: extension portion

[0071] 17a, 27a: first electrode connection portion

[0072] 17b, 27b: second electrode connection portion

[0073] 17c, 27c: third electrode connection portion

[0074] 17d, 27d: first electrode of thermistor

[0075] 17e, 27e: second electrode of thermistor

[0076] 17f, 17g, 17h, 27f, 27g, 27h: control needle

[0077] 17i, 17j, 27i, 27j: needle

[0078] 18, 19, 28, 29: connecting member

[0079] 20: second substrate

[0080] 25a: second DC connection terminal

[0081] 26a: second AC connection terminal

[0082] 30: first flow path forming portion

[0083] 40: second flow path forming portion

[0084] 51: first flow path

[0085] 52: second flow path

[0086] 60: sealing portion

[0087] 61: branch portion

[0088] 62: confluence portion

[0089] 63: support portion

[0090] 64: through-hole

[0091] 65: through-hole

[0092] 71: upper arm

[0093] 72: lower arm

[0094] 3: component for power module

[0095] 102: inlet

[0096] 103: outlet DETAILED DESCRIPTION

[0097] The basic concept of the present application will be described with reference to the accompanying drawings. Figure 1 is a cross-sectional view along the line-II line schematically showing a power module to which the present application is applied, Figure 2 is a cross-sectional view along the line-I line schematically showing a power module to which the present application is applied. The power module 1 to which the present application is applied is housed in a case not shown, connected with a capacitor in the case, and connected between a battery provided inside or outside the case and a load such as a motor.

[0098] The power module 1 includes a first substrate 10, a second substrate 20, a first flow path forming portion 30, and a second flow path forming portion 40. The first substrate 10 faces the second substrate 20 and is disposed in a separated manner in the thickness direction.

[0099] The first substrate 10 includes at least one pair of conductor portions 11 that are not connected to each other, one or more power semiconductor chips 12 connected to any of the conductor portions 11, and a cooler 13 provided on a side (a surface) on which the conductor portions 11 are not provided, for cooling the power semiconductor chips 12. In the illustrated example, a first conductor portion 11a and a second conductor portion 11b constitute a pair, one power semiconductor chip 12 is provided on the first conductor portion 11a, and the first conductor portion 11a is connected to the power semiconductor chip 12. At this time, the power semiconductor chip 12 is connected to the first conductor portion 11a through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a joining layer 10c. The second conductor portion 11b is provided on the same side (the same surface) as the first conductor portion 11a. The cooler 13 is provided on the opposite surface on which the first conductor portion 11a and the second conductor portion 11b are not provided. Here, the first conductor portion 11a is not electrically connected to the second conductor portion 11b.

[0100] The second substrate 20 includes at least one pair of conductor portions 21 that are not connected to each other, one or more power semiconductor chips 22 connected to any of the conductor portions 21, and a cooler 23 provided on a side (a surface) on which the conductor portions 21 are not provided, for cooling the power semiconductor chips 22. In the illustrated example, a first conductor portion 21a and a second conductor portion 21b constitute a pair, one power semiconductor chip 22 is provided on the first conductor portion 21a, and the first conductor portion 21a is connected to the power semiconductor chip 22. At this time, the power semiconductor chip 22 is connected to the first conductor portion 21a through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a joining layer 20c. The second conductor portion 21b is provided on the same side (the same surface) as the first conductor portion 21a, and the cooler 23 is provided on the opposite surface on which the first conductor portion 21a and the second conductor portion 21b are not provided. Here, the first conductor portion 21a is not electrically connected to the second conductor portion 21b.

[0101] The surface of the first substrate 10 on which the first conductor portion 11a and the second conductor portion 11b are provided faces the surface of the second substrate 20 on which the first conductor portion 21a and the second conductor portion 21b are provided and is disposed in a separated manner in the thickness direction. When viewed from the thickness direction, the power semiconductor chip 22 in the second substrate 20 can at least partially overlap the power semiconductor chip 12 in the first substrate 10.

[0102] The first flow path forming portion 30 is provided on the side of the first substrate 10 on which the cooler 13 is provided, and forms a first flow path 51 for causing a refrigerant to flow in the cooler 13 of the first substrate 10 with the first substrate 10.

[0103] The second flow path forming part 40 is disposed on the side of the second substrate 20 where the cooler 23 is disposed, and forms a second flow path 52 with the second substrate 20 for allowing the refrigerant to flow in the cooler 23 of the second substrate 20.

[0104] According to the power module 1 of the present invention, firstly, the second substrate 20 and the first substrate 10 are arranged facing each other and separated from the first substrate 10 in the thickness direction; secondly, a first flow path forming portion 30 is provided in the first substrate 10 on the side opposite to the second substrate 20, forming a first flow path 51 for refrigerant to flow in the first cooler 13; thirdly, a second flow path forming portion 40 is provided in the second substrate 20 on the side opposite to the first substrate 10, forming a second flow path 52 for refrigerant to flow in the second cooler 23. Thus, the first substrate 10 and the second substrate 20 are arranged in such a way that they at least overlap when viewed from the thickness direction, thereby enabling the three-dimensional arrangement of the power semiconductor chips 12, 22, miniaturizing the power module 1, and consequently miniaturizing the power conversion device.

[0105] That is, in the power module 1 of the present invention, the first substrate 10 and the second substrate 20 form a two-section structure or a double-layer structure, and the first flow path and the second flow path are formed in parallel. Therefore, it is not necessary to expand a substrate along the plane as in the past, and the planar size of the power module 1 can be reduced. This enables the power conversion device itself, which is constructed by housing the power module 1 in a housing, to be miniaturized.

[0106] like Figure 2 As shown, in the power module 1 of the present invention, a flow path connecting the first flow path 51 and the second flow path 52 in the thickness direction (Z-axis direction) is provided between the first substrate 10 and the second substrate 20, but no flow path parallel to the first flow path 51 and the second flow path 52 is provided. Therefore, the gap between the first substrate 10 and the second substrate 20 can be reduced, and the increase in thickness caused by the formation of a two-segment structure or a double-layer structure of the first substrate 10 and the second substrate 20 can be suppressed.

[0107] Next, the appropriate configuration selected in the power module 1 of the present invention will be described. For example... Figure 2 As shown, the power module 1 has a branch 61 that connects a first flow path 51 and a second flow path 52. The first flow path 51 is formed by a first flow path forming portion 30 and a first substrate 10, and the second flow path 52 is formed by a second flow path forming portion 40 and a second substrate 20. The branch 61 is located upstream of the power semiconductor chip 12 in the first substrate 10 and the power semiconductor chip 22 in the second substrate 20.

[0108] The second flow path 52 is arranged parallel to the first flow path 51, and the flow direction of the refrigerant in the second flow path 52 is the same as the flow direction of the refrigerant in the first flow path 51. Therefore, the flow path F of the refrigerant is parallel in both the first and second flow paths. Thus, the cooling performed by the refrigerant flowing in the first flow path 51 is the same as the cooling performed by the refrigerant flowing in the second flow path 52. Therefore, it is possible to suppress temperature deviations between the power semiconductor chip 12 in the first substrate 10 and the power semiconductor chip 22 in the second substrate 20 during operation.

[0109] Furthermore, such as Figure 2 As shown, as an appropriate configuration, the power module 1 has a confluence section 62 that connects a first flow path 51 and a second flow path 52. The first flow path 51 is formed by a first flow path forming section 30 and a first substrate 10, and the second flow path 52 is formed by a second flow path forming section 40 and a second substrate 20. The confluence section 62 is located downstream of the power semiconductor chip 12 in the first substrate 10 and the power semiconductor chip 22 in the second substrate 20.

[0110] like Figure 2 As shown, the branch portion 61 and the confluence portion 62 can also be arranged to penetrate through the thickness direction (Z-axis direction) of the first substrate 10 and the second substrate 20 (plate portion 13a and plate portion 23a). The second flow path 52 extends from its inlet along a direction opposite to the refrigerant flow and connects to the refrigerant inlet (not shown), and extends from its outlet along the refrigerant flow and connects to the refrigerant outlet (not shown). The refrigerant flows in the order of inlet, branch portion 61, confluence portion 62, and outlet, as in flow path F. The second flow path forming portion 40 is part of the housing or a component disposed in the housing of the power conversion device. The power module 1 can be assembled or configured by placing a power module component including the first substrate 10, the second substrate 20, and the first flow path forming portion 30 onto the second flow path forming portion 40, which is part of the housing or the component described therein.

[0111] That is, the power module-use component includes a first substrate 10 including at least one pair of conductor portions 11 (first conductor portion 11a, second conductor portion 11b) not connected to each other, one or more power semiconductor chips 12 connected to either of the conductor portions 11 (first conductor portion 11a, second conductor portion 11b), and a cooler 13 provided on a side (surface) on which the conductor portions 11 (first conductor portion 11a, second conductor portion 11b) are not provided and used to cool the power semiconductor chips 12, a second substrate 20 including at least one pair of conductor portions 21 (first conductor portion 21a, second conductor portion 21b) not connected to each other, one or more power semiconductor chips 22 connected to either of the conductor portions 21 (first conductor portion 21a, second conductor portion 21b), and a cooler 23 provided on a side (surface) on which the conductor portions 21 (first conductor portion 21a, second conductor portion 21b) are not provided and used to cool the power semiconductor chips 22, and a first flow path forming portion 30 provided on a side (surface) of the first substrate 10 on which the cooler 23 is provided, which forms a first flow path 51 for causing refrigerant to flow in the cooler 23 of the first substrate 10 in common with the first substrate 10. The surface of the first substrate 10 on which the pair of conductor portions 11 is provided faces the surface of the second substrate 20 on which the pair of conductor portions 21 is provided and is disposed in a separated manner. The cooler 23 in the second substrate 20 is mounted to a component of a second flow path forming portion 40 or mounted to the second flow path forming portion 40 formed in a housing portion, thereby forming a second flow path 52 for causing refrigerant to flow in the cooler 23 of the second substrate 20 with the second substrate 20.

[0112] In the power module 1, it can also be that the inlet for the refrigerant is connected to an extension line of a side of the second flow path 52 on which the flow of the refrigerant is opposite, the refrigerant is caused to flow to the branch portion 61, and the outlet for the refrigerant is not extended from the confluence portion 62 of the second flow path 52 but is connected by being extended along the flow direction of the refrigerant from the first flow path 51.

[0113] In any of the modes, the branch portion 61 and the confluence portion 62 that connect the first flow path 51 and the second flow path 52 can be provided inside the power module 1, and thus the arrangement of the power module 1 or the power module-use component and the assembly of the power conversion device become easy.

[0114] Next, another configuration suitable for use in the power module 1 according to the present application will be described. The cooler 13 in the first substrate 10 includes a plate portion 13a and a plurality of protrusion portions 13b extending from the plate portion 13a toward the corresponding flow path (the first flow path 51) regardless of whether the branch portion 61 and the confluence portion 62 are provided. The cooler 23 in the second substrate 20 includes a plate portion 23a and a plurality of protrusion portions 23b extending from the plate portion 23a toward the corresponding flow path (the second flow path). Either or both of the protrusion portions 13b and the protrusion portions 23b are preferably in the shape of a needle or a fin. Figure 1 and Figure 2 The dimensions shown are not accurate. The protrusion portions 13b increase the contact area of the cooler 13 with the refrigerant flowing in the first flow path 51 and transfer the heat generated in the power semiconductor chip 12 to the needle or the fin. Likewise, the protrusion portions 23b increase the contact area of the cooler 23 with the refrigerant flowing in the second flow path 52 and transfer the heat generated in the power semiconductor chip 22 to the needle or the fin. Thus, cooling can be performed efficiently.

[0115] The protrusion portions 13b and the protrusion portions 23b are selected from any of the following shapes: a substantially cylindrical shape including a cylindrical shape, a triangular prism shape, a quadrangular prism shape or other polygonal prism shape, a substantially conical shape in which the cross-sectional area gradually decreases toward the tip, a triangular pyramid shape, a quadrangular pyramid shape or other polygonal pyramid shape. The shapes of the protrusion portions 13b and the protrusion portions 23b can be the same or different. The dimensions of the protrusion portions 13b and the protrusion portions 23b at the positions where they protrude in the respective flow paths can also be different.

[0116] The protrusion portions 13b are provided for heat dissipation from the power semiconductor chip 12, and the protrusion portions 23b are provided for heat dissipation from the power semiconductor chip 22. Therefore, there is no need to provide the plate portion 13a with portions that are not helpful for heat dissipation from the power semiconductor chip 12, and there is no need to provide the plate portion 23a with portions that are not helpful for heat dissipation from the power semiconductor chip 22. In the first flow path 51 and the second flow path 52, the fluid resistance of the refrigerant can be reduced, and a pump provided inside or outside the housing of the power conversion device and used to deliver the refrigerant to the power module 1 can be downsized, thereby contributing to reduction in power consumption.

[0117] At least any of the dimensions of the protrusion portions 13b of the cooler 13 in the first substrate 10, the intervals between the protrusion portions, and the distances between the tips of the protrusion portions and the corresponding flow path forming portions can be the same as or of the same degree as those of the protrusion portions 23b of the cooler 23 in the second substrate 20.

[0118] At least any one of the size of the protruding portions 13b themselves, the interval of the protruding portions from each other, and the distance between the tip of the protruding portion and the corresponding flow path forming portion in the cooler 13 in the first substrate 10 can be different from that of the protruding portions 23b of the cooler 23 in the second substrate 20. Thereby, it is possible to suppress the deviation of the refrigerant flow amount flowing to the cooler 13 of the first flow path and the cooler 23 of the second flow path, respectively.

[0119] Therefore, as a first method, the size of the protruding portions 13b and the protruding portions 23b is set to be different. The cross-sectional dimension of the protruding portion 13b in a direction perpendicular to the direction of protruding toward the first flow path 51 is smaller than that of the protruding portion 23b. Thereby, the fluid resistance generated by the protruding portion 13b is smaller than that generated by the protruding portion 23b. Therefore, the flow amount of the refrigerant flowing through the first flow path 51 at the portion where the protruding portion 13b is provided can be the same degree as that of the refrigerant flowing through the second flow path 52 at the portion where the protruding portion 23b is provided.

[0120] As a second method, the interval of the protruding portions 13b and the protruding portions 23b from each other is set to be different. The interval of the protruding portions 13b from each other is larger than that of the protruding portions 23b. Thereby, the fluid resistance generated by the protruding portion 13b is smaller than that generated by the protruding portion 23b. Therefore, the flow amount of the refrigerant flowing through the first flow path 51 at the portion where the protruding portion 13b is provided can be the same degree as that of the refrigerant flowing through the second flow path 52 at the portion where the protruding portion 23b is provided.

[0121] As a third method, the region where the protruding portions 13b and the protruding portions 23b are provided is set to be different. The region where the protruding portion 13b is provided is smaller than that where the protruding portion 23b is provided. Thereby, the fluid resistance generated by the protruding portion 13b is smaller than that generated by the protruding portion 23b. Therefore, the flow amount of the refrigerant flowing through the first flow path 51 at the portion where the protruding portion 13b is provided can be the same degree as that of the refrigerant flowing through the second flow path 52 at the portion where the protruding portion 23b is provided.

[0122] It is not effective as shown in Figure 1 and Figure 2 in the case where the first substrate 10 and the second substrate 20 each have one pair of the conductor portions 11 and 21, but is effective in the case where the first substrate 10 and the second substrate 20 each have a plurality of pairs of the conductor portions 11 and 21. The first substrate 10 and the second substrate 20 each have a portion where neither the conductor portion 11 nor the conductor portion 21 is provided when viewed in the thickness direction, and therefore it is possible to provide the protruding portion 23b at the portion of the second substrate 20, and not to provide the protruding portion 13b at the portion of the first substrate 10.

[0123] As the fourth method, the gap between the tip of the protrusion 13b and the first flow path forming portion 30 is set to be different from the gap between the tip of the protrusion 23b and the second flow path forming portion 40. The gap between the tip of the protrusion 13b and the first flow path forming portion 30 is made larger than the gap between the tip of the protrusion 23b and the second flow path forming portion 40. Thus, the fluid resistance generated by the protrusion 13b is smaller than the fluid resistance generated by the protrusion 23b. Therefore, the flow rate of the refrigerant flowing through the first flow path 51 at the portion where the protrusion 13b is provided can be made the same degree as the flow rate of the refrigerant flowing through the second flow path 52 at the portion where the protrusion 23b is provided.

[0124] In the above description, the fluid resistance generated by the protrusion 13b is made smaller than the fluid resistance generated by the protrusion 23b. Conversely, in the case where the fluid resistance generated by the protrusion 13b is set to be larger than the fluid resistance generated by the protrusion 23b, the following is described.

[0125] As the first method, the cross-sectional dimension of the protrusion 13b in the direction perpendicular to the direction in which the protrusion 13b projects toward the first flow path 51 is made larger than the cross-sectional dimension of the protrusion 23b.

[0126] As the second method, the interval between the protrusions 13b is made smaller than the interval between the protrusions 23b.

[0127] As the third method, the region where the protrusion 13b is provided is made larger than the region where the protrusion 23b is provided. In the case where the first substrate 10 and the second substrate 20 each have a plurality of pairs of the conductor portions 11, 21, there are portions in the first substrate 10 and the second substrate 20 where neither of the conductor portions 11, 21 is provided when viewed in the thickness direction, and therefore the protrusion 23b is not provided at the portion of the second substrate 20, whereas the protrusion 13b is provided at the portion of the first substrate 10.

[0128] As the fourth method, the gap between the tip of the protrusion 13b and the first flow path forming portion 30 is made smaller than the gap between the tip of the protrusion 23b and the second flow path forming portion 40.

[0129] Any one of the first to fourth methods can be selected, or any plurality of the first to fourth methods can be selected.

[0130] As Figure 1 and Figure 2As shown, the first substrate 10 has a circuit substrate 14. The first conductor portion 11a is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10a. The second conductor portion 11b is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10b. The cooler 13 is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10d. Since the bonding layer 10a and the bonding layer 10b are interposed, heat conduction is good. Since the bonding layer 10d is interposed, heat conduction is good. The bonding layer 10a is not electrically connected to the bonding layer 10b.

[0131] As shown in FIG. 1 and FIG. 2, the first substrate 10 has a circuit substrate 14. The first conductor portion 11a is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10a. The second conductor portion 11b is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10b. The cooler 13 is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10d. Since the bonding layer 10a and the bonding layer 10b are interposed, heat conduction is good. Since the bonding layer 10d is interposed, heat conduction is good. The bonding layer 10a is not electrically connected to the bonding layer 10b. Figure 1 Figure 2 As shown in FIG. 1 and FIG. 2, the first substrate 10 has a circuit substrate 14. The first conductor portion 11a is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10a. The second conductor portion 11b is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10b. The cooler 13 is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10d. Since the bonding layer 10a and the bonding layer 10b are interposed, heat conduction is good. Since the bonding layer 10d is interposed, heat conduction is good. The bonding layer 10a is not electrically connected to the bonding layer 10b.

[0132] Next, another mode of selecting an appropriate one in the power module 1 related to the present application will be described. Figure 3 is a cross-sectional view along the IV-IV line schematically showing the power module related to the present application. Figure 4 is a cross-sectional view along the III-III line schematically showing the power module related to the present application.

[0133] As shown in FIG. 1 and FIG. 2, the first substrate 10 has a circuit substrate 14. The first conductor portion 11a is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10a. The second conductor portion 11b is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10b. The cooler 13 is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10d. Since the bonding layer 10a and the bonding layer 10b are interposed, heat conduction is good. Since the bonding layer 10d is interposed, heat conduction is good. The bonding layer 10a is not electrically connected to the bonding layer 10b. Figure 3 Figure 4 As shown in FIG. 1 and FIG. 2, the first substrate 10 has a circuit substrate 14. The first conductor portion 11a is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10a. The second conductor portion 11b is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10b. The cooler 13 is provided to the circuit substrate 14 through a metal layer (alloy layer) of solder or the like or a nano-silver bonding layer as a bonding layer 10d. Since the bonding layer 10a and the bonding layer 10b are interposed, heat conduction is good. Since the bonding layer 10d is interposed, heat conduction is good. The bonding layer 10a is not electrically connected to the bonding layer 10b.

[0134] ​​The circuit substrate 24 includes an insulating substrate 24a, metal layers 24b and 24c having a wiring pattern on the insulating substrate 24a, and a metal layer 24d for mounting the cooler 23 to a face on which the metal layers 24b and 24c are not formed. Thus, the circuit substrate 24 has a first face on which the metal layers 24b and 24c are provided and a second face on which the metal layer 24d is provided. The metal layer 24b is joined to the first conductor portion 21a by the joining layer 20a. The metal layer 24c is joined to the second conductor portion 21b by the joining layer 20b. The metal layer 24d is joined to the cooler 23 by the joining layer 20d. The metal layer 24b is not electrically connected to the metal layer 24c.

[0135] The first face of the circuit substrate 24 faces the first face of the circuit substrate 14 in the first substrate 10. That is, the first face is the facing face and the second face is the non-facing face. In the case where the cooler 13 includes the plate portion 13a and the protrusion portion 13b and the cooler 23 includes the plate portion 23a and the protrusion portion 23b, the plate portion 13a is provided to the second face of the circuit substrate 14 and the plate portion 23a is provided to the second face of the circuit substrate 24. As the insulating substrate 14a and the insulating substrate 24a, an insulating material such as silicon nitride, aluminum nitride, or the like is used.

[0136] The circuit substrate 14 is a substrate such as a DCB (Direct Copper Bonding) substrate or the like in which a metal layer 14b and a metal layer 14c formed of copper or aluminum or the like are joined to the first face of the insulating substrate 14a and a metal layer 24d formed of copper or aluminum or the like is joined to the second face of the insulating substrate 14a. The circuit substrate 24 is a substrate such as a DCB substrate or the like in which a metal layer 24b and a metal layer 24c formed of copper or aluminum or the like are joined to the first face of the insulating substrate 24a and a metal layer 24d formed of copper or aluminum or the like is joined to the second face of the insulating substrate 14a.

[0137] The first conductor portion 11a and the second conductor portion 11b are provided to the circuit substrate 14 with the joining layer 10a and the joining layer 10b interposed therebetween, respectively. The cooler 13 is provided to the circuit substrate 14 with the joining layer 10d interposed therebetween. The first conductor portion 21a and the second conductor portion 21b are provided to the circuit substrate 24 with the joining layer 20a and the joining layer 20b interposed therebetween, respectively. The cooler 23 is provided to the circuit substrate 24 with the joining layer 20d interposed therebetween. This is to reduce the contact thermal resistance between the circuit substrate 14 and the cooler 13 and the thermal resistance between the circuit substrate 24 and the cooler 23 as much as possible. That is, no thermal resistance material such as grease or the like is interposed between the circuit substrate 14 and the cooler 13 and between the circuit substrate 24 and the cooler 23. Thus, the heat generated by the power semiconductor chip 12 is efficiently transferred to the cooler 13 or the heat generated by the power semiconductor chip 22 is efficiently transferred to the cooler 23 by direct cooling rather than indirect cooling, thereby improving the cooling efficiency.

[0138] Also, the metal layer 14d can not be provided to the circuit substrate 14, and the metal layer 24d can not be provided to the circuit substrate 24, but in order to easily mount the cooler 13 to the circuit substrate 14 or the cooler 23 to the circuit substrate 24, it is preferable that the metal layer 14d be provided to the side on which the metal layer 14b and the metal layer 14c are not provided, and it is preferable that the metal layer 24d be provided to the side on which the metal layer 24b and the metal layer 24c are not provided. Thereby, it is easier to transfer the heat generated by the power semiconductor chip 12 and the power semiconductor chip 22 to the cooler 13 and the cooler 23.

[0139] Next, another mode of selection of the power module 1 according to the present application will be described. An unillustrated spacer can be provided between the first substrate 10 and the second substrate 20, at least a part of or the entire periphery of the first substrate 10 and the second substrate 20. Figure 5 is a schematic cross-sectional view of the power module according to the present application along the VI-VI line. Figure 6 is a schematic cross-sectional view of the power module according to the present application along the V-V line. Between the opposing surfaces of the first substrate 10 and the second substrate 20, the spacer can function by a seal portion 60 formed of a sealing material. A part or the entire seal portion 60 is formed of an insulating material, and can cover the surfaces of the pair of conductor portions 11 and the power semiconductor chip 12 in the first substrate 10, and cover the surfaces of the pair of conductor portions 21 and the power semiconductor chip 22 in the second substrate 20. Thereby, the first substrate 10 and the second substrate 20 can be electrically insulated. Further, in Figures 1 to 6 in which the connection of the second conductor portion 11b and the power semiconductor chip 12, and the connection of the second conductor portion 21b and the power semiconductor chip 22 are not shown. The seal portion 60 is provided with one or more holes in a manner to form branch portions 61, and the first flow path 51 and the second flow path 52 are connected in a manner to form the branch portions 61. It is preferable that the seal portion 60 be formed of a material such as an epoxy resin-based resin that is difficult to leak liquid.

[0140] Next, another mode of selection of the power module 1 according to the present application will be described. Figure 7is a cross-sectional view schematically showing a power module 1 to which the present application is applied. The plate portion 13a of the cooler 13 in the first substrate 10, the cooling pipe 13c and the cooling pipe 13d protrude to the side opposite to the protruding portion 13b, and are provided at the portions where the protruding portion 13b is not provided (specifically, the portions of the branch portion 61 and the confluence portion 62). Also, the first substrate 10 and the second substrate 20 are arranged in a spaced-apart manner in the thickness direction, and the top end portions of the cooling pipe 13c and the cooling pipe 13d are connected to the plate portion 23a of the second substrate 20 by welding or the like. Thus, regardless of the material of the sealing portion 60, leakage of the refrigerant can be prevented with high performance by the connecting portions of the first flow path 51 and the second flow path 52. It is preferable that the cooling pipe 13c and the cooling pipe 13d be formed of the same material (metal) as the plate portion 13a.

[0141] Unlike the above structure, the plate portion 23a of the cooler 23 in the second substrate 20, the cooling pipe 23c and the cooling pipe 23d protrude to the side opposite to the protruding portion 23b, and are provided at the portions where the protruding portion 23b is not provided (specifically, the portions of the branch portion 61 and the confluence portion 62). Also, the first substrate 10 and the second substrate 20 can be arranged in a spaced-apart manner in the thickness direction, and the top end portions of the cooling pipe 23c and the cooling pipe 23d are connected to the plate portion 13a of the first substrate 10 by welding or the like. Thus, regardless of the material of the sealing portion 60, leakage of the refrigerant can be prevented by the connecting portions of the first flow path 51 and the second flow path 52. It is preferable that the cooling pipe 13c and the cooling pipe 13d be formed of the same material (metal) as the plate portion 13a.

[0142] Next, another mode of selection of application in the power module 1 to which the present application is applied will be described. Figure 8 is a view showing Figures 1 to 6 the first substrate 10 shown in FIG. 6. In the upper portion of FIG. 7, the pair of conductor portions 11 (the first conductor portion 11a, the second conductor portion 11b) included in the first substrate 10 are shown, and in the lower portion of FIG. 7, the pair of conductor portions 21 (the first conductor portion 21a, the second conductor portion 21b) included in the second substrate 20 are shown. Figure 8 In the upper portion of FIG. 7, the pair of conductor portions 11 (the first conductor portion 11a, the second conductor portion 11b) included in the first substrate 10 are shown, and in the lower portion of FIG. 7, the pair of conductor portions 21 (the first conductor portion 21a, the second conductor portion 21b) included in the second substrate 20 are shown. Figure 8 In the upper portion of FIG. 7, the pair of conductor portions 11 (the first conductor portion 11a, the second conductor portion 11b) included in the first substrate 10 are shown, and in the lower portion of FIG. 7, the pair of conductor portions 21 (the first conductor portion 21a, the second conductor portion 21b) included in the second substrate 20 are shown. Figure 8 In FIG. 7, a portion of the metal layer in the pair of conductor portions 11 (the first conductor portion 11a, the second conductor portion 11b), the pair of conductor portions 21 (the first conductor portion 21a, the second conductor portion 21b) connected in the Z-axis direction by the bonding layers 10a, 10b, 20a, 20b is shown in black.

[0143] The pair of conductor portions 11 in the first substrate 10 are formed so as to cross the first flow path 51 in the direction in which the first flow path 51 extends (the direction of the Z axis).Figure 8 The second conductor portion 11b, which is the other conductor portion, extends in the opposite direction to the first conductor portion 11a, which is the one conductor portion, in the Y-axis direction in the second substrate 20. The first conductor portion 11a, which is the one conductor portion, has the first AC connection terminal 15a. The second conductor portion 11b, which is the other conductor portion, has the first DC connection terminal 16a. Figure 8 The pair of conductor portions 21 in the second substrate 20 are formed so as to extend in the opposite direction to each other in the Y-axis direction (in the direction intersecting the second flow path 52), that is, are formed in parallel with the pair of conductor portions 21 in the first substrate 10. The first conductor portion 21a, which is the one conductor portion, has the second DC connection terminal 25a. The second conductor portion 21b, which is the other conductor portion, has the second AC connection terminal 26a.

[0144] The current flowing through the second conductor portion 11b between the first DC connection terminal 16a and the power semiconductor chip 12 in the first substrate 10 is in the opposite direction to the current flowing through the first conductor portion 21a between the second DC connection terminal 25a and the power semiconductor chip 22 in the second substrate 20. The second conductor portion 11b (extension portion 16c) has substantially the same shape as the first conductor portion 21a (extension portion 25c). The second conductor portion 11b (extension portion 16c) is arranged so as to partially coincide with the first conductor portion 21a (extension portion 25c) when viewed in the thickness direction. The inductance generated by the second conductor portion 11b and the first conductor portion 21a can be reduced. The second conductor portion 11b is arranged symmetrically with the first conductor portion 21a with respect to the XY plane, and is arranged in a separated manner in the Z-axis direction.

[0145] Further, in the first substrate 10, the pair of conductor portions 11 pass from the first DC connection terminal 16a through the mounting region of the power semiconductor chip 12 to the first AC connection terminal 15a in a manner that does not bend and meander, and are formed as short paths as possible when viewed in the thickness direction. In the second substrate 20, the pair of conductor portions 21 pass from the second DC connection terminal 25a through the mounting region of the power semiconductor chip 22 to the second AC connection terminal 26a in a manner that does not bend and meander, and are formed as short paths as possible when viewed in the thickness direction. Therefore, the power loss can be reduced as much as possible by reducing the inductance and the resistance.

[0146] In the case where the first conductor portion 11a in the first substrate 10 has the first AC connection terminal 15a and the second conductor portion 21b in the second substrate 20 has the second AC connection terminal 26a, the first AC connection terminal 15a and the second AC connection terminal 26a are arranged in a separated manner only in the thickness direction, in order to make the wiring for connection to the load shorter and make the connection to the load easier.

[0147] As Figure 8In the upper portion of FIG. 1, in the pair of conductor portions 11 that the first substrate 10 has, the first conductor portion 11a includes a chip mounting portion 15b that mounts the power semiconductor chip 12 and an extension portion 15c that extends from the chip mounting portion 15b, and a top end portion of the extension portion 15c constitutes a first AC connection terminal 15a. The second conductor portion 11b includes an adjacent portion 16b that is adjacent to the chip mounting portion 15b in a non-contact manner and an extension portion 16c that extends from the adjacent portion 16b to a side opposite to the chip mounting portion 15b, and a top end portion of the extension portion 16c constitutes a first DC connection terminal 16a. A top end portion of a first electrode that is provided between the chip mounting portion 15b and the adjacent portion 16b is connected to, for example, a gate electrode that is a control electrode of the power semiconductor chip 12, and a connection portion 17a of the first electrode is drawn out from the top end portion of the first electrode. A connection portion 17b of a second electrode that is provided in parallel with the chip mounting portion 15b and the connection portion 17a of the first electrode is connected to, for example, a collector electrode that is one of main electrodes of the power semiconductor chip 12. A connection portion 17c of a third electrode that is drawn out from the adjacent portion 16b along a drawn-out electrode of the first electrode is connected to, for example, an emitter electrode that is one of the main electrodes of the power semiconductor chip 12. Here, the connection portion 17a of the first electrode, the connection portion 17b of the second electrode, and the connection portion 17c of the third electrode can not be a part of the conductor portion 11, but can be provided in the metal layer 14b, the metal layer 14c, and the metal layer 14d of the circuit substrate 14, respectively, as illustrated, or can be a part of the conductor portion 11, as not illustrated.

[0148] The power semiconductor chip 12 includes, for example, a power semiconductor element such as a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), or the like, and preferably has a longitudinal type power semiconductor element, and a large current is turned on / off (ON / OFF) between upper and lower main electrodes by electrically controlling the electrodes with main electrodes on each of the upper and lower surfaces of the chip. The main electrode on the side of the first conductor portion 11a of the power semiconductor chip 12 is electrically connected to the chip mounting portion 15b by solder or nano-silver bonding. The main electrode on the side opposite to the first conductor portion 11a of the power semiconductor chip 12 is electrically connected to the adjacent portion 16b by a connecting member 18 such as a lead or a clip. The control electrode on the side opposite to the first conductor portion 11a of the power semiconductor chip 12 is electrically connected to the top end portion of the first electrode by a connecting member 19 such as a lead or a clip. The connection of the electrodes of the power semiconductor chip 12 to the first conductor portion 11a and the second conductor portion 11b is not limited to this. Either or both of the connecting member 18 and the connecting member 19 is preferably a clip rather than a lead, which can further reduce the size of the power module 1 in the thickness direction.

[0149] As Figure 7In the lower portion of FIG. 1, in the pair of conductor portions 21 that the second substrate 20 has, the first conductor portion 21a includes a chip mounting portion 25b that mounts the power semiconductor chip 22 and an extension portion 25c that extends from the chip mounting portion 25b, and a top end portion of the extension portion 25c constitutes a second DC connection terminal 25a. The second conductor portion 21b includes a proximate portion 26b that is adjacent to the chip mounting portion 25b in a non-contact manner and an extension portion 26c that extends from the proximate portion 26b to a side opposite to the chip mounting portion 25b, and a top end portion of the extension portion 26c constitutes a second AC connection terminal 26a. A top end portion of a first electrode that is provided between the chip mounting portion 25b and the proximate portion 26b is connected to, for example, a gate electrode that is a control electrode of the power semiconductor chip 22, and a connection portion 27a of the first electrode is drawn out from the top end portion of the first electrode. A connection portion 27b of a second electrode that is provided in parallel with the connection portion 27a of the first electrode from the chip mounting portion 25b is connected to, for example, a collector electrode that is one of main electrodes of the power semiconductor chip 22. A connection portion 27c of a third electrode that is provided by drawing out a drawn-out electrode of the first electrode from the proximate portion 26b is connected to, for example, an emitter electrode that is one of the main electrodes of the power semiconductor chip 22. Here, the connection portion 27a of the first electrode, the connection portion 27b of the second electrode, and the connection portion 27c of the third electrode can not be a part of the conductor portion 21, but can be provided in the metal layer 24b, the metal layer 24c, and the metal layer 24d of the circuit substrate 24, respectively, as illustrated, or can be a part of the conductor portion 11, as not illustrated.

[0150] The power semiconductor chip 22, like the power semiconductor chip 12, includes, for example, a power semiconductor element such as a MOSFET or an IGBT, and preferably has a vertical power semiconductor element that is electrically controlled by a main electrode pair of a top surface and a bottom surface of the chip with respect to a control electrode to turn on / off (ON / OFF) a large current between the main electrodes. The main electrode of the bottom surface of the power semiconductor chip 22 is electrically connected to the chip mounting portion 25b by solder or nano-silver bonding. The main electrode of the top surface of the power semiconductor chip 22 is electrically connected to the proximate portion 26b by a connection member 28 such as a lead or a stud. The control electrode of the top surface of the power semiconductor chip 22 is electrically connected to the top end portion of the first electrode by a connection member 29 such as a lead or a stud. The connection of the electrodes of the power semiconductor chip 22 to the first conductor portion 21a and the second conductor portion 21b is not limited to this. Either or both of the connection member 28 and the connection member 29 is preferably a stud, compared to a lead, to further reduce the size of the power module 1 in the thickness direction.

[0151] Moreover, the power semiconductor chip 12 and the power semiconductor chip 22 can each be single-chipped with a FWD (Free Wheeling Diode) connected in reverse to the power semiconductor element, or the power semiconductor element can be single-chipped, and a chip constituting a diode of the FWD can be disposed adjacent to the chip and electrically connected by a connecting member such as a lead or a terminal post.

[0152] Next, another configuration suitable for use in the power module 1 according to the present application will be described. One power semiconductor chip 12 in the first substrate 10 and a corresponding one power semiconductor chip 22 in the second substrate 20 constitute an upper arm circuit and a lower arm circuit that output a single-phase alternating current. Figure 9 is a circuit diagram of a power module 1 constituted by Figures 1 to 7 as shown in Figure 9 The upper arm 71 includes the power semiconductor element 12a in the power semiconductor chip 12 and the FWD 12b inside or outside the chip 12, and the lower arm 72 includes the power semiconductor element 22a in the power semiconductor chip 22 and the FWD 22b inside or outside the chip 22.

[0153] With this circuit configuration, in the power module 1, the first DC connection terminal 16a in the second conductor portion 11b mounted on the first substrate 10 and the second DC connection terminal 25a in the first conductor portion 21a mounted on the second substrate 20 are connected to a capacitor (not shown), and a battery capable of charging and discharging is connected in parallel to the capacitor. A converter (not shown) is connected to the battery, and converts alternating current from an alternator or the like into direct current and stores the direct current. The first AC connection terminal 15a of the first conductor portion 11a in the first substrate 10 and the second AC connection terminal 26a of the second conductor portion 21b in the second substrate 20 are connected to a load (not shown) such as a motor. The power module 1 can convert direct current from the battery into electric power and output the electric power to the load. In Figure 9 In the circuit shown in

[0154] In each of the above-described modes, the power module 1 can also include the first substrate 10 and the second substrate 20 as follows. The first substrate 10 includes: three pairs of conductor portions 11 that are not connected to each other; a plurality of power semiconductor chips 12 that are connected to any one of the conductor portions in each pair of the conductor portions 11; and a cooler 13 for cooling the power semiconductor chips 12 on a side (a face) opposite to any one of the conductor portions in each pair of the conductor portions, in each pair of the conductor portions. Three phases of U phase, V phase, W phase, and the like can be outputted through the three pairs of the conductor portions.

[0155] In each of the above-described modes, the paired conductor portions 11 in the first substrate 10 and the paired conductor portions 21 in the second substrate 20 are formed in a plate shape using a metal such as copper that has excellent thermal and electrical conductivity. A portion in which a large current flows in the conductor portions 11, 21 can be referred to as a bus bar. The thickness of the bus bar is 0.3 mm or more and 1.0 mm or less. The first substrate 10 can be formed by forming a metal layer 14b in which a circuit pattern is formed on a polyimide insulating substrate 14a that has insulating properties, and the second substrate 20 can be formed by forming a metal layer 24b in which a circuit pattern is formed on a polyimide insulating substrate 24a that has insulating properties.

[0156] The power semiconductor chip 12 and the conductor portion 11b, and the power semiconductor chip 12 and the conductor portion 11b are preferably made of a metal such as Cu, and can more suppress the height of the chip bonding portion compared to wire bonding. The stud is not limited to the shape illustrated.

[0157] The first flow path forming portion 30 is formed of, for example, various resins or metals (including alloys). If it is made of resin, it is bonded to the cooler 13, particularly to the plate portion 13a, by heat bonding or the like. If it is made of metal, it is connected to the cooler 13, particularly to the plate portion 13a, by welding. The kind of metal is preferably formed of the same material as the cooler 13. This is to facilitate welding to the cooler 13.

[0158] The cooler 13 and the cooler 23 are formed of a metal material such as copper, aluminum, or the like that has excellent heat conduction. The second flow path forming portion 40 is formed of, for example, various resins or metals (including alloys). The plate portion 23a of the cooler 23 and the second flow path forming portion 40 are installed in a liquid-tight manner by a packing or a ring, or the like.

[0159] The second flow path forming portion 40 forms a second flow path 52 in parallel at least along the second substrate 20, and on either one or both of the inlet port and the outlet port, it can be formed as Figure 1 andFigure 2 The second flow path 52 can be formed in a flat shape as shown, in an angular shape, or in a crank shape.

[0160] Next, a specific embodiment will be described. Hereinafter, the case where three-phase alternating current is output will be described, but in the case where single-phase alternating current is output, the pair of conductor portions 11 provided to the first substrate 10 and the pair of conductor portions 21 provided to the second substrate 20 can be provided in one pair, and in the case where two-phase alternating current is output, the pair of conductor portions 11 provided to the first substrate 10 and the pair of conductor portions 21 provided to the second substrate 20 can be provided in two pairs.

[0161] Figure 10 is a perspective view of the power module 2 from above, to which the embodiment of the present application relates, Figure 11 is a perspective view of the power module 2 from below, to which the embodiment of the present application relates, Figure 12 is a perspective view of a component of the power module 2, to which the embodiment of the present application relates, Figure 13 is a view showing the pair of conductor portions of the first substrate and the plate portion of the cooler in the power module 2, to which the embodiment of the present application relates, Figure 14 is a view showing the pair of conductor portions of the second substrate and the plate portion of the cooler in the power module 2, to which the embodiment of the present application relates, Figure 15 is Figure 10 is a sectional view at the XV-XV plane in Figure 16 is Figure 15 is a partial enlarged view of the section shown in Figure 17A is Figure 15 is a sectional view along the XVII-XVII line in Figure 17B is a sectional view of the state in Figure 17A where the second substrate is detached from the second flow path formation portion, Figure 18 is Figure 17A is a partial enlarged view of the section shown in

[0162] The power module 2 to which the embodiment of the present application relates includes a first substrate 10, a second substrate 20, a first flow path formation portion 30, and a second flow path formation portion 40. The first substrate 10 and the second substrate 20 are arranged in opposition to each other and in a separated manner in the thickness direction. Identical reference numerals are assigned to identical or corresponding parts and components.

[0163] The first substrate 10 includes: three pairs of conductor portions 11 (first conductor portion 11a, second conductor portion 11b) that are not connected to each other; a plurality of power semiconductor chips 12, which are connected to any one of the conductor portions (first conductor portion 11a) in each pair of conductor portions 11; and a cooler 13 for cooling the power semiconductor chips 12. The three pairs of conductor portions 11 include a first pair of conductor portions 11U, a second pair of conductor portions 11V, and a third pair of conductor portions 11W. The first pair of conductor portions 11U, the second pair of conductor portions 11V, and the third pair of conductor portions 11W respectively include the first conductor portion 11a and the second conductor portion 11b as described above.

[0164] The second substrate 20 includes: three pairs of conductor portions 21 (first conductor portion 21a, second conductor portion 21b) that are not connected to each other; a plurality of power semiconductor chips 22, which are connected to any one of the conductor portions (first conductor portion 21a) in each pair of conductor portions 21 (first conductor portion 21a, second conductor portion 21b); and a cooler 23 for cooling the power semiconductor chips 22. The three pairs of conductor portions 21 include a first pair of conductor portions 21U, a second pair of conductor portions 21V, and a third pair of conductor portions 21W. The pairs of conductor portions 21U, 21V, and 23W respectively include the first conductor portion 21a and the second conductor portion 21b as described above.

[0165] like Figure 13 and Figures 15 to 18 As shown, the first substrate 10 includes a circuit board 14, comprising three pairs of conductor portions: a first pair 11U, a second pair 11V, and a third pair 11W. Circuit patterns are formed on each pair on the first surface of the insulating substrate 14a via metal layers 14b and 14c. Regarding the first pair of conductor portions 11U, metal layer 14b is connected to the first conductor portion 11a via bonding layer 10a, and metal layer 14c is connected to the second conductor portion 11b via bonding layer 10b. In the first conductor portion 11a, a power semiconductor chip 12 is mounted on the side opposite to bonding layers 10a and 10b, via bonding layer 10c. On the side of the power semiconductor chip 12 opposite to the first conductor portion 11a, one end of a connecting member 19, such as a terminal or lead, is mounted via bonding layer 10f. The other end of the connecting member 19 is mounted on the second conductor portion 11b via bonding layer 10d. The same applies to the second pair of conductor portions 11V and the third pair of conductor portions 11W.

[0166] On the second side of the insulating substrate 14a, which is opposite to the first side, instead of the three pairs of conductor portions 11U, 11V, and 11W, a metal layer 14d is provided on one side, and a plate portion 13a of the cooler 13 is provided across the bonding layer 10e.

[0167] As shown in Figure 14 and Figures 15 to 18 In the second substrate 20, there are three pairs of the first pair of conductor portions 21U, the second pair of conductor portions 21V, and the third pair of conductor portions 21W, and a circuit substrate 24 is provided in the second substrate 20. Circuit patterns are formed in each pair by a metal layer 24b and a metal layer 24c on a first face of an insulating substrate 24a. The first pair of conductor portions 21U will be described. The metal layer 24b is connected to the first conductor portion 21a through a bonding layer 20a, and the metal layer 24c is connected to the second conductor portion 21b through a bonding layer 20b. On the first conductor portion 21a, a power semiconductor chip 22 is mounted on the side opposite the bonding layer 20a and the bonding layer 20b through a bonding layer 20c. On the side of the power semiconductor chip 22 opposite the first conductor portion 21a, one end of a connecting member 29 such as a stud or a lead is mounted through a bonding layer 20f. On the second conductor portion 21b, the other end of the connecting member 29 is mounted through a bonding layer 20d. The same applies to the second pair of conductor portions 21V and the third pair of conductor portions 21W.

[0168] On a second face of the insulating substrate 24a opposite the first face, a metal layer 24d is provided on one face, and a plate portion 23a of a cooler 23 is provided through a bonding layer 20e.

[0169] As shown in Figure 13 In the first substrate 10, a plurality of, specifically four, power semiconductor chips 12 are mounted on each first conductor portion 11a. A metal layer of a circuit substrate 14 forms a connecting portion 17a of a first electrode, a connecting portion 17b of a second electrode, and a connecting portion 17c of a third electrode. In addition, the metal layer of the circuit substrate 14 forms a first electrode 17d of a thermistor and a second electrode 17e of the thermistor, and a thermistor is mounted on the first electrode 17d and the second electrode 17e. As shown in Figure 10 and Figure 12 Each connecting portion 17a, 17b, 17c is connected to a corresponding control pin 17f, 17g, 17h, for example, in an L shape. As shown in Figure 10 The first electrode 17d and the second electrode 17e are connected to a corresponding pin 17i, 17j, for example, in an L shape. Each control pin 17f, 17g, 17h, and pin 17i, 17j is connected to a control substrate (not shown) mounted to a plurality of support portions 63 of the power module 2, and the power module 2 is controlled by input and output of a control signal, and output of a signal from the thermistor.

[0170] As shown in Figure 14As shown, in the second substrate 20, a plurality of, specifically four, power semiconductor chips 22 are mounted on each first conductor portion 21a, and the metal layer of the circuit substrate 24 forms a connection portion 27a of the first electrode, a connection portion 27b of the second electrode, and a connection portion 27c of the third electrode. In addition, the metal layer of the circuit substrate 24 forms a first electrode 27d of the thermistor and a second electrode 27e of the thermistor, and a thermistor is mounted on the first electrode 27d and the second electrode 27e. As shown in Figure 10 and Figure 12 As shown, each connection portion 27a, 27b, 27c is connected to a corresponding control pin 27f, 27g, 27h, for example, in an L shape. As shown in Figure 10 As shown, the first electrode 27d and the second electrode 27d are connected to corresponding pins 27i, 27j, for example, in an L shape. Each control pin 27f, 27g, 27h, pin 27i, 27j is connected to a control substrate (not shown) mounted to a plurality of support portions 63 of the power module 2, and controls the power module 2 by inputting and outputting control signals, outputting signals from the thermistor.

[0171] As shown in Figure 12 , Figure 15 and Figure 17A As shown, the plate portion 13a of the cooler 13 has a flow passage through-hole 13f at each of the both ends in the X-axis direction (the direction in which the three pairs of conductor portions 11 are arranged side by side), and the plate portion 23a of the cooler 23 has a flow passage through-hole 23f at each of the both ends in the X-axis direction, and the flow passage through-hole 13f, the flow passage through-hole 23f, and the through-hole 65 of the sealing portion 60 are connected in a manner that allows liquid-tight flow. Here, the flow passage through-hole 13f, the flow passage through-hole 23f, and the through-hole 65 can each be composed of a plurality of holes, except in the case of being a long hole as shown in the drawing.

[0172] The cooler 13 and the cooler 23 include the plate portion 13a and the plate portion 23a having shapes symmetrical to each other, and each of the plate portions 13a, 23a has any one of the corresponding flow passage through-hole 13f, flow passage through-hole 23f at each of the both ends in the X-axis direction. Each of the plate portions 13a, 23a has a protruding portion protruding to both sides in the Y-axis direction (the direction in which the first conductor portion 11a and the second conductor portion 11b extend) at each of the both ends in the X-axis direction, and a protruding portion protruding to both sides in the Y-axis direction is provided in the region where each of the first conductor portion 11a and the second conductor portion 11b is not provided, and a fastening link through-hole 13e or a fastening link through-hole 23e is provided in each of these protruding portions.

[0173] In the first substrate 10, the control needles 17f, 17g, 17h and the needles 17i, 17j are provided in each pair, and the control needles 17f, 17g, 17h and the needles 17i, 17j each include a first extension portion extending to one side in the Y-axis direction of the sealing portion 60 and a second extension portion extending upward from the first extension portion. A part of the second extension portion of each of the control needles 17f, 17g, 17h is held at the fixed portion extending in the X-axis direction at the Y-axis direction end portion of the sealing portion 60 and extends upward.

[0174] In the second substrate 20, the control needles 27f, 27g, 27h and the needles 27i, 27j are provided in each pair, and the control needles 27f, 27g, 27h and the needles 27i, 27j each include a first extension portion extending to the other side in the Y-axis direction of the sealing portion 60 and a second extension portion extending upward from the first extension portion. A part of the second extension portion of each of the control needles 27f, 27g, 27h is held at the fixed portion extending in the X-axis direction at the Y-axis direction end portion (-the end portion in the -Y-axis direction) of the sealing portion 60 and extends upward.

[0175] In the first substrate 10, the extension portion 15c of the first conductor portion 11a is disposed between the control needles 17f, 17g, 17h and the needles 17i, 17j, and the first AC connection terminal 15a on the tip end side of the extension portion 15c is provided. The first conductor portion 11a is configured such that the first AC connection terminal 15a protrudes outward from the sealing portion 60, specifically, from the portion of the sealing portion 60 that holds the control needles 17f, 17g, 17h and the needles 17i, 17j. In addition, the second conductor portion 11b is configured such that the first DC connection terminal 16a protrudes outward from the sealing portion 60. The first conductor portion 11a and the second conductor portion 11b are each configured to protrude to the corresponding one side in the Y-axis direction from the plate portion 13a of the cooler 13.

[0176] In the second substrate 20, the extension 25c of the first conductor portion 21a is arranged between the control pins 27f, 27g, 27h and the pins 27i, 27j, and the second DC connection terminal 25a on the tip side of the extension 25c is provided. The first conductor portion 21a is configured so that the second DC connection terminal 25a protrudes outwardly compared to the sealing portion 60, specifically, compared to the portion of the sealing portion 60 that holds the control pins 27f, 27g, 27h and the pins 27i, 27j. The portion that holds the control pins 27f, 27g, 27h and the pins 27i, 27j and the portion that holds the control pins 17f, 17g, 17h and the pins 17i, 17j are located on opposite sides in the Y-axis direction (the direction in which the extension 26c extends) and are arranged along the Z-axis direction (the thickness direction of the power module 2). In addition, the second conductor portion 21b is configured so that the second AC connection terminal 26a protrudes outwardly from the sealing portion 60. The first conductor portion 21a and the second conductor portion 21b are each configured to protrude to the corresponding one side in the Y-axis direction compared to the plate portion 23a of the cooler 23.

[0177] The first substrate 10 and the second substrate 20 face each other, are sealed, for example, using a transfer molding method, and form a molded portion that is the sealing portion 60, whereby the sealing portion 60 is sandwiched by the first substrate 10 and the second substrate 20 as shown in Figure 10 and Figure 11 The first substrate 10 and the second substrate 20 face each other, are sealed, for example, using a transfer molding method, and form a molded portion that is the sealing portion 60, whereby the sealing portion 60 is sandwiched by the first substrate 10 and the second substrate 20 as shown in Figure 12 The fastening link through hole 13e of the plate portion 13a in the cooler 13 and the through hole 23e of the plate portion 23a in the cooler 23 of the second substrate 20 are provided at the middle of the four corners of each plate portion 13a, 23a and at the middle of the lengthwise end portions, and at the middle of the gaps of the first conductor portion 11a and the middle of the gaps of the second conductor portion 21b. A fastening link member, not shown, is fitted and installed in the fastening link through hole 13e, the through hole 64 of the sealing portion 60, and the fastening link through hole 23e.

[0178] The fastening link through hole 13e of the plate portion 13a in the cooler 13 and the through hole 23e of the plate portion 23a in the cooler 23 of the second substrate 20 are provided at the middle of the four corners of each plate portion 13a, 23a and at the middle of the lengthwise end portions, and at the middle of the gaps of the first conductor portion 11a and the middle of the gaps of the second conductor portion 21b. A fastening link member, not shown, is fitted and installed in the fastening link through hole 13e, the through hole 64 of the sealing portion 60, and the fastening link through hole 23e. Figure 17A The fastening link through hole 13e of the plate portion 13a in the cooler 13 and the through hole 23e of the plate portion 23a in the cooler 23 of the second substrate 20 are provided at the middle of the four corners of each plate portion 13a, 23a and at the middle of the lengthwise end portions, and at the middle of the gaps of the first conductor portion 11a and the middle of the gaps of the second conductor portion 21b. A fastening link member, not shown, is fitted and installed in the fastening link through hole 13e, the through hole 64 of the sealing portion 60, and the fastening link through hole 23e.

[0179] The fastening link through hole 13e of the plate portion 13a in the cooler 13 and the through hole 23e of the plate portion 23a in the cooler 23 of the second substrate 20 are provided at the middle of the four corners of each plate portion 13a, 23a and at the middle of the lengthwise end portions, and at the middle of the gaps of the first conductor portion 11a and the middle of the gaps of the second conductor portion 21b. A fastening link member, not shown, is fitted and installed in the fastening link through hole 13e, the through hole 64 of the sealing portion 60, and the fastening link through hole 23e. Figure 11 and Figure 12As shown, the first flow path forming portion 30 is in a disc shape, and the flange portion is attached to the plate portion 13a. In the case where the first flow path forming portion 30 is made of metal, the plate portion 13a of the cooler 13 in the first substrate 10 is attached by welding or the like. In the case where the first flow path forming portion 30 is made of resin, the plate portion 13a of the cooler 13 in the first substrate 10 is attached by welding or the like.

[0180] As shown, the plate portion 23a of the cooler 23 in the second substrate 20 is attached to the second flow path forming portion 40 in a liquid-tight manner by means of the packing or seal 41. As shown, Figure 15 and Figure 17A As shown, the plate portion 23a of the cooler 23 in the second substrate 20 is attached to the second flow path forming portion 40 in a liquid-tight manner by means of the packing or seal 41. As shown, Figure 17B As shown, the plate portion 23a of the cooler 23 in the second substrate 20 is attached to the second flow path forming portion 40 in a liquid-tight manner by means of the packing or seal 41. As shown, Figure 19 As shown, the plate portion 23a of the cooler 23 in the second substrate 20 is attached to the second flow path forming portion 40 in a liquid-tight manner by means of the packing or seal 41. As shown, Figure 19 As shown, the plate portion 23a of the cooler 23 in the second substrate 20 is attached to the second flow path forming portion 40 in a liquid-tight manner by means of the packing or seal 41. As shown,

[0181] According to the embodiment of the present application, three-phase alternating current can be output as the output of the inverter, and the inlet and outlet of the refrigerant are not provided for each phase, and the power module can be attached to a part of the housing of the power conversion device as the second flow path forming portion 40 or to the second flow path forming portion 40 provided in the housing. At this time, the upper and lower two-stage configuration or double-layer configuration is formed by the first flow path 51 and the second flow path 52, and the upper arm and the lower arm are respectively constituted by the first conductor portion 11a, 21a and the second conductor portion 11b, 21b corresponding to the upper and lower power semiconductor chips 12, 22, and thus the power semiconductor chips are arranged in a three-dimensional manner rather than in a planar manner. As a result, the size of the power module is 130 mm x 50 mm x 20 mm except for the second flow path forming portion, the maximum current is 200 A to 400 A, the maximum voltage is 400 V, four 5 mm square chips are connected in parallel and mounted as the power semiconductor chips for the upper arm and the lower arm, and the direct water cooling method can be employed. Compared with the configuration in which the power semiconductor chips are not arranged in a three-dimensional manner but the power semiconductor chips for the upper arm and the power semiconductor chips for the lower arm are arranged on one face as in the past, the thickness dimension of the power module can be made approximately the same degree, and the planar dimension can be suppressed to about half or so, and the power conversion device itself can be miniaturized.

[0182] Figure 19is a block diagram of a power conversion device including a power module to which the embodiment of the present application relates. In the power conversion device 100, a power module 101 includes one inlet port 102 and one outlet port 103, an upstream pipe 104 is connected to the inlet port 102, and a downstream pipe 105 is connected to the outlet port 103. The upstream pipe 104 is connected to a radiator 106, and the downstream pipe 105 is connected to a pump 107. A medium cooled by the radiator 106 flows from the upstream pipe 104 to the inlet port 102 by pressure of the pump 107. Then, the medium is branched to a first flow path and a second flow path via a branch portion 61 shown in Figures 1 to 7 、 Figure 15 and Figure 17A , and then flows from the outlet port 103 to the downstream pipe 105 via a merging portion 62. In addition, the order of the radiator 106 and the pump 107 can be reversed.

[0183] Figure 20A is an image of a trial-manufactured power module viewed obliquely from above, Figure 21A is an image of a trial-manufactured power module viewed obliquely from above with a power module member removed from a second flow path formation portion, Figure 22A is an image of a state in which a second substrate of the power module member is located above. Figure 23A is an image showing a second flow path formation portion in a trial-manufactured power module. Figure 20B 、 Figure 21B 、 Figure 22B 、 Figure 23B are images showing main outlines of Figure 20A 、 Figure 21A 、 Figure 22A 、 Figure 23A , respectively. Reference numerals indicated in these images use those shown in Figures 10 to 18 , for example, in the plate portion 23a of the cooler 23, flow path through holes (through holes) 23f as long holes are provided at both ends in the length direction thereof, respectively. The gasket or packing 41 is installed to a peripheral portion of an upper surface opening of the second flow path formation portion 40 (refer to Figure 15 、 Figure 17B ), and the protrusion portion 23b of the cooler 23 of the power module member 3 is inserted from the upper surface opening of the second flow path formation portion 40 to be installed. One inlet port 102 and one outlet port 103 are provided in the second flow path formation portion 40. It is possible to suppress the planar size of the power module to about half or so. It is confirmed that the power module member 3 including the first substrate, the second substrate, and the first flow path formation portion can be removed from the second flow path formation portion 40, and that the cooling medium does not leak by sealing the second flow path formation portion 40 and the plate portion 23a of the cooler 23 with the gasket or packing 41.

[0184] Figure 24Ais a graph showing simulation results of heat distribution in a power module constituting a three-phase inverter. Figure 24B Figure 24A is a graph showing the outline of the first conductor portion, the second conductor portion, and the power semiconductor chip, for simulation results of Figure 24A Figure 24B The upper part of each shows the temperature distribution or the outline of the first substrate, and the lower part of each shows the temperature distribution or the outline of the second substrate. It is assumed that U-phase, V-phase, and W-phase are output from the left side to the right side in the graph, and the first substrate and the second substrate are each provided with the first conductor portion and the second conductor portion, and four power semiconductor chips are mounted on the first conductor portion, and the cooling medium flows from one long hole to the other long hole.

[0185] The results of the simulation are that, among the power semiconductor chips mounted on the first conductor portion of U-phase in the first substrate, the chip disposed closest to the long hole is high in temperature (162°C), among the power semiconductor chips mounted on the first conductor portion of W-phase in the first substrate, the power semiconductor chip disposed closest to the long hole is high in temperature (170°C), among the power semiconductor chips mounted on the first conductor portion of U-phase in the second substrate, the power semiconductor chip disposed closest to the long hole is high in temperature (154°C), and among the power semiconductor chips mounted on the first conductor portion of W-phase in the second substrate, the power semiconductor chip disposed closest to the long hole is high in temperature (163°C). From this result, it is known that, when the flow path is provided in two stages, the branch portion side and the confluence portion side are cooled substantially uniformly.

[0186] Embodiments of the present application relate to a power module 1, 2 including:

[0187] the first substrate 10 includes at least one pair of conductor portions 11a, 11b not connected to each other, one or more power semiconductor chips 12 connected to any of the conductor portions, and a cooler 13 provided on a side on which the conductor portions are not provided, for cooling the power semiconductor chips;

[0188] the second substrate 20 includes at least one pair of conductor portions 21a, 21b not connected to each other, one or more power semiconductor chips 22 connected to any of the conductor portions, and a cooler 23 provided on a side on which the conductor portions are not provided, for cooling the power semiconductor chips;

[0189] the first flow path forming portion 30 is provided on a side of the first substrate on which the cooler 13 is provided, and forms a first flow path 51 for causing a refrigerant to flow in the cooler 13 of the first substrate, with the first substrate; and

[0190] ​​a second flow path forming portion 40 provided on a side of the second substrate on which the cooler 23 is provided, and configured to form a second flow path 52 for flowing a refrigerant in the cooler 23 of the second substrate, with the second substrate,

[0191] The side on which the pair of conductor portions are provided in the first substrate and the side on which the pair of conductor portions are provided in the second substrate face each other and are arranged in a separated manner.

[0192] Here, the power module 1, 2 is configured such that the first flow path forming portion 30 and the second flow path forming portion 40 sandwich the first substrate 10 and the second substrate 20. In addition, the first substrate 10 has a circuit substrate 14, and the conductor portions 11a, 11b are provided on a first surface (a surface opposite to the second substrate) of the circuit substrate, and the cooler 13 is provided on a second surface (a surface on the side opposite to the first surface) of the circuit substrate. The second substrate 20 has a circuit substrate 24, and the conductor portions 11a, 11b are provided on a first surface (a surface opposite to the second substrate) of the circuit substrate, and the cooler 23 is provided on a second surface (a surface on the side opposite to the first surface) of the circuit substrate.

[0193] When a plurality of power semiconductor chips are mounted, the conductor portions are arranged in a direction intersecting the extending direction of each of the extension portions of the conductor portions to be mounted. This can reduce the depth dimension of the power semiconductor module.

[0194] The pair of conductor portions in the first substrate are formed to extend in opposite directions in a direction intersecting the first flow path, and the other conductor portion (the second conductor portion 11b has the first DC connection terminal 16a. The pair of conductor portions in the second substrate are formed to extend in opposite directions in a direction intersecting the second flow path, and one of the pair of conductor portions (the first conductor portion 21a has the second DC connection terminal 25a. The direction of the DC flowing through the second conductor portion 11b is opposite to the direction of the DC flowing through the first conductor portion 21a. This can reduce the inductance generated by the first substrate and the second substrate.

[0195] The present application is configured by the following concept.

[0196] [1] A power module 1, 2, comprising:

[0197] a first substrate 10 including at least a pair of conductor portions 11a, 11b not connected to each other, one or more power semiconductor chips 12 connected to any of the conductor portions, and a cooler 13 provided on a side on which the conductor portions are not provided, for cooling the power semiconductor chips;

[0198] A second substrate 20 including: at least one pair of conductor portions 21a, 21b not connected to each other; one or more power semiconductor chips 22 connected to either of the conductor portions; and a cooler 23 provided on a side on which the conductor portions are not provided, for cooling the power semiconductor chips;

[0199] A first flow path forming portion 30 provided on a side of the first substrate on which the cooler 13 is provided, and forming a first flow path 51 for causing refrigerant to flow in the cooler 13 of the first substrate, with the first substrate; and

[0200] A second flow path forming portion 40 provided on a side of the second substrate on which the cooler 23 is provided, and forming a second flow path 52 for causing refrigerant to flow in the cooler 23 of the second substrate, with the second substrate,

[0201] The side on which the pair of conductor portions is provided in the first substrate and the side on which the pair of conductor portions is provided in the second substrate face each other and are arranged in a separated manner.

[0202] [2] In the power module 1, 2 described in the [1], a branch portion 61 connecting the first flow path and the second flow path is provided.

[0203] [3] In the power module 1, 2 described in the [1] or [2], the cooler 13 in the first substrate has a plate portion 13a, and the cooler 23 in the second substrate has a plate portion 23a, each of which has a hole through which the first flow path and the second flow path are branched.

[0204] [4] In the power module 1, 2 described in any one of the [1] to [3], the coolers 13, 23 in the first substrate and the second substrate include: a plate portion 13a, 23a; and a plurality of protrusion portions 13b, 23b extending from the plate portion toward the corresponding flow path.

[0205] [5] In the power module 1, 2 described in the [4], the protrusion portions 13b of the cooler in the first substrate differ from the protrusion portions 23b of the cooler in the second substrate in at least any one of the size of the protrusion portion itself, the interval of the protrusion portions from each other, and the distance between the top end of the protrusion portion and the corresponding flow path forming portion.

[0206] [6] In the power module 1, 2 described in any one of [1] to [5], the first substrate and the second substrate are configured so that a plurality of metal layers 14b, 14c, 24b, 24c are provided on the corresponding insulating substrates 14a, 24a, and the plurality of metal layers 14b, 14c, 24b, 24c are formed with a wiring pattern.

[0207] [7] In the power module described in any one of [1] to [6], the pair of conductor portions in the first substrate are formed so as to extend in opposite directions from each other in a direction intersecting the first flow path, one of the pair of conductor portions (first conductor portion 11a) has a first AC connection terminal 15a, the other of the pair of conductor portions (second conductor portion 11b) has a first DC connection terminal 16a,

[0208] the pair of conductor portions in the second substrate are formed so as to extend in opposite directions from each other in a direction intersecting the second flow path, one of the pair of conductor portions (first conductor portion 21a) has a second DC connection terminal 25a, the other of the pair of conductor portions (second conductor portion 21b) has a second AC connection terminal 26a,

[0209] one of the pair of conductor portions in the second substrate (an extension 25c of the first conductor portion 21a) has a portion having the same shape as the other of the pair of conductor portions in the first substrate (an extension 16c of the second conductor portion 11b),

[0210] the current direction flowing between the first DC connection terminal 16a and the power semiconductor chip 12 in the first substrate is opposite to the current direction flowing between the second DC connection terminal 25a and the power semiconductor chip 22 in the second substrate.

[0211] [8] In the power module described in any one of [1] to [7], one of the power semiconductor chips 12 in the first substrate and the corresponding one of the power semiconductor chips 22 in the second substrate are configured as an upper arm and a lower arm that output a single-phase AC current.

[0212] In the embodiments of the present application, modifications can be made as appropriate without departing from the technical scope of the present application. In addition, the metal layer or the bonding layer used when connecting or bonding the components or the portions can be composed of a single layer or a plurality of layers. The metal layer includes an alloy layer.

Claims

1. A power module, characterized by Comprising: a first substrate including at least one pair of conductor portions not connected to each other, one or more power semiconductor chips connected to either of the conductor portions, and a cooler provided on a side on which the conductor portions are not provided and used to cool the power semiconductor chips; a second substrate including at least one pair of conductor portions not connected to each other, one or more power semiconductor chips connected to either of the conductor portions, and a cooler provided on a side on which the conductor portions are not provided and used to cool the power semiconductor chips; a first flow path forming portion provided on a side of the first substrate on which the cooler is provided and forming a first flow path for causing refrigerant to flow in the cooler of the first substrate with the first substrate; and a second flow path forming portion provided on a side of the second substrate on which the cooler is provided and forming a second flow path for causing refrigerant to flow in the cooler of the second substrate with the second substrate, a surface of the first substrate on which the pair of conductor portions is provided faces a surface of the second substrate on which the pair of conductor portions is provided and is arranged in a separated manner.

2. The power module according to claim 1, characterized in that: the power module has a branch portion connecting the first flow path and the second flow path.

3. The power module according to claim 1 or 2, characterized in that: the cooler in the first substrate has a plate portion, the cooler in the second substrate has a plate portion, the plate portions each have a hole through which the first flow path and the second flow path are branched.

4. The power module according to claim 1 or 2, characterized in that: the coolers in the first substrate and the second substrate include a plate portion and a plurality of protrusion portions extending from the plate portion toward the corresponding flow path.

5. The power module according to claim 4, characterized in that: the protrusion portions of the cooler in the first substrate differ from the protrusion portions of the cooler in the second substrate in at least any one of a size of the protrusion portions themselves, a spacing of the protrusion portions from each other, and a distance between the top ends of the protrusion portions and the corresponding flow path forming portion.

6. The power module according to claim 1, characterized in that: the first substrate and the second substrate are configured to have a plurality of metal layers provided on an insulating substrate, the plurality of metal layers being formed with a wiring pattern.

7. The power module according to claim 1, characterized in that: the pair of conductor portions in the first substrate are formed to extend in opposite directions from each other in a direction crossing the first flow path, one of the pair of conductor portions having a first AC connection terminal and the other of the pair of conductor portions having a first DC connection terminal, the pair of conductor portions in the second substrate are formed to extend in opposite directions from each other in a direction crossing the second flow path, one of the pair of conductor portions having a second DC connection terminal and the other of the pair of conductor portions having a second AC connection terminal, One of the pair of the conductor portions in the second substrate has a same portion of a shape as the other of the pair of the conductor portions in the first substrate, A direction of a current flowing between the first direct-current connection terminal and the power semiconductor chip in the first substrate is opposite to a direction of a current flowing between the second direct-current connection terminal and the power semiconductor chip in the second substrate.

8. The power module according to claim 1, characterized in that: One of the power semiconductor chips in the first substrate and a corresponding one of the power semiconductor chips in the second substrate constitute upper and lower arms in a manner to output a single-phase alternating current.

Images