Cable fault detection circuit and detection method

Abstract

The application discloses a cable fault detection method, comprising the following steps: sending a forward step signal to a to-be-detected cable, and counting a second clock signal to obtain a corresponding count value; receiving a reflected signal returned when the forward step signal reaches a fault point from the to-be-detected cable, and superimposing the reflected signal and the forward step signal to obtain a detection signal; and judging a fault state of the to-be-detected cable according to a step change of the detection signal, and when the to-be-detected cable is faulty, judging a fault position of the to-be-detected cable according to a time when the detection signal occurs the step change, so that accurate positioning of the fault position can be realized.

Description

Technical Field

[0001] This invention relates to the field of cable testing technology, and in particular to a cable fault detection circuit and testing method. Background Technology

[0002] In the field of automotive electronics, in-vehicle cameras are core sensing components for functions such as environmental perception, driver assistance, and in-vehicle monitoring. The real-time performance and stability of their data transmission directly affect the realization of vehicle functions and driving safety. With the increase in resolution, frame rate, and demand for multi-camera collaborative applications of in-vehicle cameras, the amount of data transmitted has increased significantly. To optimize wiring space and reduce the cost and weight of vehicle cabling, current in-vehicle camera data transmission generally adopts an asymmetric full-duplex mode. This mode requires simultaneous data reception and transmission on the same transmission cable to achieve bidirectional data interaction and improve transmission efficiency.

[0003] To adapt to the aforementioned asymmetric full-duplex transmission mode, the key component in the vehicle camera data transmission system—the vehicle serial-to-parallel converter (SERDES, i.e., serializer / deserializer)—must integrate independent transmitting and receiving circuits for both its transmitting and receiving chips. The transmitting chip serializes the data to be transmitted via the transmitting circuit and sends it through the cable, while simultaneously receiving feedback data or control signals from the other end via the receiving circuit. The receiving chip deserializes the serial data transmitted via the cable through the receiving circuit to obtain valid data, and simultaneously transmits control commands or status information to the transmitting chip through the transmitting circuit, thereby achieving stable bidirectional data transmission.

[0004] However, in the complex operating environment of automobiles (such as vibration, high and low temperature cycles, and electromagnetic interference), the transmission cable between the transmitting and receiving chips is prone to failure, such as cable breakage, poor contact of the core wires, short circuits caused by insulation damage, or signal leakage. Since this transmission cable is the only channel for bidirectional data transmission in asymmetric full-duplex mode, a cable failure will directly lead to data transmission interruption or signal distortion. This will not only cause the vehicle camera to malfunction but may also lead to safety hazards such as misjudgments by the driver assistance system and disorder in the vehicle's control logic. Therefore, fault detection of the transmission cable between the transmitting and receiving chips is a necessary prerequisite for ensuring the safe operation of the entire vehicle.

[0005] Meanwhile, when transmission cables malfunction, the complexity of vehicle wiring systems—with cables typically hidden within the vehicle frame, interior trim, or wiring harness assemblies—means that traditional troubleshooting methods require disassembling and inspecting each component individually. This is not only time-consuming and labor-intensive but can also damage the vehicle structure or other parts, severely impacting repair efficiency and the user experience. Therefore, beyond simply detecting cable faults, achieving precise fault location—to quickly pinpoint the problem, shorten repair time, and reduce repair costs—has become a critical issue that current vehicle camera data transmission systems urgently need to address. Summary of the Invention

[0006] In view of the above problems, the purpose of this invention is to provide a cable fault detection circuit and detection method, so as to accurately locate the fault location of the cable.

[0007] According to one aspect of the present invention, a cable fault detection method is provided, comprising sending a positive step signal to a cable under test and counting a second clock signal to obtain a corresponding count value; receiving a reflected signal returned when the positive step signal reaches a fault point from the cable under test, and superimposing the reflected signal with the positive step signal to obtain a detection signal; determining the fault state of the cable under test based on the step change of the detection signal; and determining the fault location of the cable under test based on the time of the step change of the detection signal when the cable under test is faulty.

[0008] Optionally, when the cable under test has an open circuit fault, the reflected signal is a positive step signal, and the detection signal undergoes a positive step; when the cable under test has a short circuit fault, the reflected signal is a negative step signal, and the detection signal undergoes a negative step.

[0009] Optionally, determining the fault state of the cable under test based on the step change of the detection signal includes comparing the detection signal with a first threshold voltage at the effective edge of a first clock signal to obtain a first comparison value, and comparing the detection signal with a second threshold voltage to obtain a second comparison value; at the current effective edge of the second clock signal, converting serial data composed of multiple first comparison values ​​obtained within the interval between two adjacent effective edges of the second clock signal into first parallel data, and converting serial data composed of multiple second comparison values ​​into second parallel data; and determining the fault state of the cable under test based on the values ​​in the first parallel data and the second parallel data, and determining the fault location of the cable under test based on the values ​​in the first parallel data and the second parallel data and the count value, wherein when the detection signal does not undergo a step change, it is greater than the second threshold voltage and less than the first threshold voltage; when the detection signal undergoes a positive step change, it is greater than both the first threshold voltage and the second threshold voltage; and when the detection signal undergoes a negative step change, it is less than both the first threshold voltage and the second threshold voltage.

[0010] Optionally, determining the fault state of the cable under test based on the values ​​in the first parallel data and the second parallel data includes: determining the cable under test to be normal when all values ​​in the first parallel data are first logical values ​​and all values ​​in the second parallel data are second logical values; determining the cable under test to be open-circuited when at least one value in the first parallel data is a second logical value and all values ​​in the second parallel data are second logical values; determining the cable under test to be short-circuited when all values ​​in the first parallel data are first logical values ​​and at least one value in the second parallel data is a first logical value; and determining a detection anomaly when all values ​​in the first parallel data are second logical values ​​and all values ​​in the second parallel data are first logical values.

[0011] Optionally, the distance d between the fault location of the cable under test and the transmitting end of the positive step signal is d = Td / (2*Tunit), where Tunit represents the transmission speed of the positive step signal in the cable under test, and Td represents the time interval between transmitting the positive step signal and receiving the reflected signal. Td = M×tper×(N-1) + tper×m, where tper represents the period length of the first clock signal, N represents the current count value, and M represents the number of multiple first comparison values ​​or multiple second comparison values ​​in the serial data. When the cable under test is open-circuited, m represents the first second logic value appearing in the first parallel data, which is converted from the m-th first comparison value in its corresponding serial data. When the cable under test is short-circuited, m represents the first first logic value appearing in the second parallel data, which is converted from the m-th second comparison value in its corresponding serial data.

[0012] Optionally, the period length of the second clock signal is M times that of the first clock signal, and the first parallel data / second parallel data obtained by converting the M-bit first serial data / second serial data is M bits or M / 2 bits.

[0013] According to another aspect of the present invention, a cable fault detection circuit is provided for performing the cable fault detection method described above. The cable fault detection circuit includes a signal transmitting and receiving module for transmitting a positive step signal to the cable under test, receiving a reflected signal returned when the positive step signal reaches a fault point from the cable under test, and superimposing the reflected signal with the positive step signal to obtain a detection signal; a counter for counting a second clock signal while transmitting the positive step signal to obtain a corresponding count value; and a fault detection module for determining the fault state of the cable under test based on the step change of the detection signal, and determining the fault location of the cable under test based on the time of the step change of the detection signal when the cable under test is faulty.

[0014] Optionally, the signal transmitting and receiving module includes a transmitting unit having a positive output terminal and a negative output terminal, used to transmit the positive step signal to the cable under test through its positive output terminal when fault detection begins, and to superimpose the reflected signal and the positive step signal at its positive output terminal; a receiving unit having a positive input terminal connected to the positive output terminal of the transmitting unit and a negative input terminal connected to the negative output terminal of the transmitting unit, used to generate the detection signal based on the signals at its positive and negative input terminals; a first resistor connected between the power supply voltage and the positive output terminal of the transmitting unit; a second resistor connected between the power supply voltage and the negative output terminal of the transmitting unit; and a third resistor connected between the negative output terminal of the transmitting unit and the ground terminal.

[0015] Optionally, the fault detection module includes: a first comparator, with two input terminals connected to the output terminal of the receiving unit and a first threshold voltage, respectively, and the output terminal providing a first comparison value; a second comparator, with two input terminals connected to the output terminal of the receiving unit and a second threshold voltage, respectively, and the output terminal providing a second comparison value; a first serial-to-parallel conversion unit, used to convert serial data composed of multiple first comparison values ​​obtained within the interval between two adjacent valid edges of the second clock signal into first parallel data at the current valid edge of the second clock signal; a second serial-to-parallel conversion unit, used to convert serial data composed of multiple second comparison values ​​obtained within the interval between two adjacent valid edges of the second clock signal into second parallel data at the current valid edge of the second clock signal; and a fault judgment unit, used to judge the fault state of the cable under test based on the values ​​in the first parallel data and the second parallel data, and, when the cable under test is faulty, to judge the fault location of the cable under test based on the values ​​in the first parallel data and the second parallel data and the count value, wherein the data transmission rate of the detection circuit when performing fault detection on the cable under test can be up to 12 billion bits / second.

[0016] Optionally, the two ends of the cable under test are connected to a transmitting chip and a receiving chip, respectively. Both the transmitting chip and the receiving chip include a signal transmitting and receiving module. The signal transmitting and receiving module in the detection circuit reuses the signal transmitting and receiving module in the transmitting chip or the receiving chip.

[0017] The cable fault detection circuit and method provided by this invention include sending a positive step signal to the cable under test and counting a second clock signal; receiving the reflected signal returned when the positive step signal reaches the fault point from the cable under test, and superimposing the reflected signal with the positive step signal to obtain a detection signal; determining the fault state of the cable under test based on the step change of the detection signal, and determining the fault location of the cable under test based on the time of the step change of the detection signal, thereby achieving precise fault location. Furthermore, the cable fault detection circuit has a simple structure, can simultaneously detect short-circuit and open-circuit faults in the cable under test, and by reusing the signal transmission and reception modules in the transmitting or receiving chip, circuit costs can be reduced and chip area saved.

[0018] In a preferred embodiment, the detection accuracy can be improved when the data transmission rate is high by converting high-speed serial data into low-speed parallel data before counting. Attached Figure Description

[0019] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0020] Figure 1 A circuit diagram of a signal transmission device is shown;

[0021] Figure 2 A circuit diagram of a cable fault detection circuit according to an embodiment of the present invention is shown;

[0022] Figure 3 A schematic diagram of the signal change at the positive output terminal of the transmitting unit of the cable fault detection circuit according to an embodiment of the present invention is shown when the cable under test is faulty.

[0023] Figures 4a-4b The diagrams show the relationship between the detection signal and the threshold voltage when the cable under test is open-circuited and short-circuited, respectively.

[0024] Figure 5 A timing diagram of a cable fault detection circuit according to an embodiment of the present invention is shown;

[0025] Figure 6 A flowchart illustrating a cable fault detection method according to an embodiment of the present invention is shown. Detailed Implementation

[0026] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements or modules are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0027] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0028] Furthermore, certain terms are used in this patent specification and claims to refer to specific components. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same component. This patent specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0029] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0030] Figure 1 A circuit diagram of a signal transmission device is shown.

[0031] See Figure 1 The signal transmission device 1000 includes a transmitting chip 100, a receiving chip 200, and a cable connecting the transmitting chip 100 and the receiving chip 200. The cable can be a communication cable or a power cable. For example, the signal transmission device 1000 is a vehicle-mounted SerDes, and the cable is a transmission cable between the transmitting chip and the receiving chip in the vehicle-mounted SerDes.

[0032] Both the transmitting chip 100 and the receiving chip 200 include signal transmitting and receiving modules. Each signal transmitting and receiving module includes an impedance matching unit, a resistor R3, a transmitting unit TX, and a receiving unit RX. The impedance matching unit includes resistors R1 and R2. Resistor R1 is connected between the power supply voltage Vdd and the positive output terminal of the transmitting unit TX, and resistor R2 is connected between the power supply voltage Vdd and the negative output terminal of the transmitting unit TX. The positive and negative input terminals of the receiving unit RX are connected to the positive and negative output terminals of the transmitting unit TX, respectively. The negative output terminal of the transmitting unit TX is also grounded via resistor R3. For example, the resistance of resistor R3 is 50Ω.

[0033] Existing technologies require separate fault detection for short circuits and open circuits when the aforementioned cables fail, resulting in cumbersome detection methods. Furthermore, achieving fault detection necessitates adding numerous circuit components to the transmitting chip 100 or receiving chip 200, which may impact the existing signal transmission device 1000. Moreover, at high data transmission rates (e.g., 12Gbps) in the signal transmission device 1000, the digital circuitry cannot achieve such high-speed counting, leading to low detection accuracy. Therefore, this invention proposes a cable fault detection circuit and method to address these problems.

[0034] Figure 2 A circuit diagram of a cable fault detection circuit according to an embodiment of the present invention is shown.

[0035] See Figure 2 The cable fault detection circuit 300 provided in this embodiment of the invention includes a signal transmitting and receiving module 310 and a fault detection module 320. The signal transmitting and receiving module 310 is used to transmit a positive step signal to the cable under test, receive the reflected signal returned when the positive step signal reaches the fault point from the cable under test, and superimpose the reflected signal with the positive step signal to obtain a detection signal. The fault detection module 320 is used to determine the fault state of the cable under test based on the step change of the detection signal. A positive step signal refers to a signal that suddenly changes from a relatively low level to a relatively high level and remains there at the time of signal generation / transmission. A negative step signal refers to a signal that suddenly changes from a relatively high level to a relatively low level and remains there at the time of signal generation / transmission.

[0036] The signal transmission and reception module 310 includes an impedance matching unit 311, a transmission unit TX, a reception unit RX, and a resistor R3. The fault detection module 320 includes comparators COMP1-COMP2, serial-to-parallel conversion units 321 and 322, and a fault judgment unit 323. For example, the signal transmission and reception module 310 in the cable fault detection circuit 300 can reuse the signal transmission and reception modules in the transmitting chip 100 or the receiving chip 200.

[0037] In this configuration, resistor R1 is connected between the power supply voltage Vdd and the positive output terminal of the transmitting unit TX, and resistor R2 is connected between the power supply voltage Vdd and the negative output terminal of the transmitting unit TX. The positive and negative input terminals of the receiving unit RX are connected to the positive and negative output terminals of the transmitting unit TX, respectively. The negative output terminal of the transmitting unit TX is also grounded via resistor R3. The negative input terminal of comparator COMP1 receives the threshold voltage Vth1, and its positive input terminal is connected to the output terminal of the receiving unit RX. The negative input terminal of comparator COMP2 receives the threshold voltage Vth2, and its positive input terminal is connected to the output terminal of the receiving unit RX. The input terminal of the serial-to-parallel conversion unit 321 is connected to the output terminal of comparator COMP1, and its output terminal is connected to the input terminal of the fault judgment unit 323. The input terminal of the serial-to-parallel conversion unit 321 is connected to the output terminal of comparator COMP2, and its output terminal is connected to the input terminal of the fault judgment unit 323. For example, the resistance of resistor R3 is 50Ω.

[0038] Furthermore, when fault detection begins, the transmitting unit TX sends a positive step signal to the cable under test through its positive output terminal, and after detecting the reflected signal returned when the positive step signal reaches the fault point, it superimposes the reflected signal with the positive step signal; since its negative output terminal is grounded through resistor R3, the positive step signal can remain unchanged during the fault detection process.

[0039] The receiving unit RX is used to generate a detection signal based on the signals at the positive and negative output terminals, i.e., the positive and negative input terminals, of the transmitting unit TX.

[0040] Comparator COMP1 compares the signals at its two inputs on the effective edge of clock signal clk1 to obtain a comparison value D1. Comparator COMP2 compares the signals at its two inputs on the effective edge of clock signal clk1 to obtain a comparison value D2. Serial-to-parallel conversion unit 321 converts the serial data consisting of multiple comparison values ​​D1 obtained during the interval between adjacent effective edges of clock signal clk2 (i.e., the current effective edge of clock signal clk2 and the previous effective edge) into first parallel data data1. Serial-to-parallel conversion unit 322 converts the serial data consisting of multiple comparison values ​​D2 obtained during the interval between adjacent effective edges of clock signal clk2 into second parallel data data2. The serial data consisting of multiple comparison values ​​D1 / multiple comparison values ​​D2 is high-speed serial data, while the first parallel data data1 / second parallel data data2 is low-speed parallel data.

[0041] Furthermore, clock signals clk1 and clk2 are square wave signals. The period length of clock signal clk2 is M times that of clock signal clk1. Each serial data includes M comparison values ​​D1 / D2. For example, M=20. The valid edges of clock signals clk and clk2 are rising edges.

[0042] Furthermore, the cable fault detection circuit 300 also includes a counter 324, which is used to count the clock signal clk2 to obtain the corresponding count value while the transmitting unit TX sends a positive step signal.

[0043] In this application, the counter 324 only needs to count the clock signal clk2 with a longer period, without the need for high-speed counting, which improves the counting accuracy and thus improves the accuracy of fault location.

[0044] The fault judgment unit 323 is used to judge the fault status of the cable under test based on the values ​​in the first parallel data data1 and the second parallel data data2, and to determine the fault location of the cable under test based on the values ​​in the first parallel data data1 and the second parallel data data2 and the count value when the cable under test is faulty.

[0045] Furthermore, when the cable fault detection circuit 300 performs fault detection on the cable under test, the data transmission rate can be up to 12Gbps, or 12 billion bits per second.

[0046] Figure 3 A schematic diagram of the signal change at the positive output terminal of the transmitting unit of the cable fault detection circuit according to an embodiment of the present invention is shown when the cable under test is faulty.

[0047] See Figure 3 Assume that at time t1, the positive output of the transmitting unit TX sends a positive step signal to the cable under test. If the cable under test is open-circuited, then at time t2, the positive output of the transmitting unit TX receives a reflected positive step signal and superimposes this reflected signal with the original positive step signal, causing the voltage at the positive output of the transmitting unit TX to undergo another positive step. Therefore, if the cable under test is open-circuited, the signal change at the positive output of the transmitting unit TX is as follows: Figure 3 As shown in TX1+.

[0048] Assume that at time t1, the positive output of the transmitting unit TX sends a positive step signal to the cable under test. If the cable under test is short-circuited, at time t2, the positive output of the transmitting unit TX receives a reflected negative step signal and superimposes this reflected signal with the positive step signal, causing the voltage at the positive output of the transmitting unit TX to return to its un-stepped state. Therefore, if the cable under test is short-circuited, the signal change at the positive output of the transmitting unit TX is as follows: Figure 3 As shown in TX2+.

[0049] It is understandable that the time interval td between time t2 and time t1 is related to the fault location of the cable under test and is not a fixed value.

[0050] Figures 4a-4b The diagrams show the relationship between the detection signal and the threshold voltage when the cable under test is open-circuited and short-circuited, respectively.

[0051] See Figure 4a When the cable under test is normal, no reflected signal is generated, and the detection signal is always 0V, which is less than the threshold voltage Vth1. Therefore, the comparison value D1 is always 0. When the cable is open-circuited, after time t2, the detection signal undergoes a positive step, thus exceeding the threshold voltages Vth1 and Vth2, and the comparison value D1 switches from 0 to 1.

[0052] See Figure 4b When the cable under test is normal, no reflected signal is generated, and the detection signal is always 0V, which is greater than the threshold voltage Vth2. Therefore, the comparison value D2 is always 1. When the cable under test is short-circuited, after time t2, the detection signal undergoes a negative step, thus becoming less than the threshold voltages Vth1 and Vth2, and the comparison value D2 switches from 1 to 0.

[0053] Figure 5 A timing diagram of a cable fault detection circuit according to an embodiment of the present invention is shown.

[0054] See Figure 5 At the same time that the positive step signal is sent to the cable under test at the positive output terminal of the transmitting unit TX, the clock signals clk1 and clk2 simultaneously have rising edges. The comparators COMP1 / COMP2 start to generate comparison values ​​D1 / D2, and the counter 324 starts counting the clock signal clk2 from 0.

[0055] Then, at each rising edge of the clock signal clk2, the multiple comparison values ​​D1 / D2 generated between two adjacent rising edges are converted into corresponding parallel data (not shown in the figure).

[0056] The working principle of the cable fault detection circuit 300 of this application is as follows: at the start of fault detection, the transmitting unit TX first outputs a positive step signal to the cable under test, and at the same time, the counter 324 counts the clock signal clk2 to obtain the corresponding count value. If the cable is open-circuited or short-circuited, the positive step signal will generate a reflected signal after passing through the fault point of the cable under test. The reflected signal and the positive step signal are superimposed to obtain a superimposed signal. The superimposed signal is received by the receiving unit RX and converted into a detection signal by the receiving unit RX and provided to the comparators COMP1 and COMP2 to compare the detection signal with the threshold voltages Vth1 and Vth2 respectively to obtain the corresponding comparison value. Then, the serial-to-parallel conversion units 321 and 322 obtain the first parallel data data1 and the second parallel data data2 according to the input signal, respectively. The fault judgment unit 323 judges the fault state of the cable under test according to the values ​​in the first parallel data data1 and the second parallel data data2, and when the cable under test is faulty, it determines the fault location of the cable under test according to the values ​​in the first parallel data data1 and the second parallel data data2 and the count value.

[0057] In other embodiments of this application, the detection signal needs to be amplified and processed by modules such as the analog front end before it is sent to comparators COMP1 and COMP2.

[0058] In summary, the fault judgment unit 323 can be configured to determine that the cable under test is normal when all values ​​in the first parallel data data1 are first logic values ​​and all values ​​in the second parallel data data2 are second logic values; to determine that the cable under test is open-circuited when at least one value in the first parallel data data1 is a second logic value and all values ​​in the second parallel data data2 are second logic values; to determine that the cable under test is short-circuited when all values ​​in the first parallel data data1 are first logic values ​​and at least one value in the second parallel data data2 is a first logic value; and to determine that the cable fault detection circuit 300 is abnormal when all values ​​in the first parallel data data1 are second logic values ​​and all values ​​in the second parallel data data2 are first logic values.

[0059] It is understandable that, although the first logic value is 0 and the second logic value is 1 in the example of this application, if the signals received at the positive and negative input terminals of comparators COMP1 and COMP2 are interchanged, the first and second logic values ​​will also change accordingly.

[0060] Furthermore, the distance d between the fault location of the cable under test and the transmitting unit TX / receiving unit RX is d = Td / (2*Tunit), where Tunit represents the transmission speed of the positive step signal in the cable under test, and Td represents the interval between the transmitting unit TX / receiving unit RX sending the positive step signal and receiving the reflected signal.

[0061] Furthermore, Td = M × tper × (N-1) + tper × m, where tper represents the period length of the clock signal clk1, N represents the current count value, and M represents the number of comparison values ​​D1 / D2 in each serial data. When the cable is open, m represents the first second logic value appearing in the first parallel data data1, which is obtained by converting the m-th comparison value D1 in its corresponding serial data. When the cable is short-circuited, m represents the first first logic value appearing in the second parallel data data2, which is obtained by converting the m-th comparison value D2 in its corresponding serial data.

[0062] Furthermore, when the transmission rate of the cable fault detection circuit 300 is 12Gbps, tper=1 / 12G≈83ps.

[0063] Furthermore, in one example of this application, M bits of serial data are converted into M bits of parallel data. In another example of this application, M bits of serial data are converted into M / 2 bits of parallel data, in which case only the odd-numbered or even-numbered values ​​in the serial data can be converted into parallel data.

[0064] Figure 6 A flowchart illustrating a cable fault detection method according to an embodiment of the present invention is shown.

[0065] See Figure 6 The cable fault detection method provided in this embodiment of the invention includes steps S1-S3.

[0066] In step S1, a positive step signal is sent to the cable under test, and the second clock signal is counted to obtain the corresponding count value.

[0067] In step S2, the reflected signal returned when the positive step signal reaches the fault point is received from the cable under test, and the reflected signal is superimposed with the positive step signal to obtain the detection signal.

[0068] Specifically, when the cable under test has an open circuit fault, the reflected signal is a positive step signal, and the detection signal undergoes a positive step; when the cable under test has a short circuit fault, the reflected signal is a negative step signal, and the detection signal undergoes a negative step.

[0069] In step S3, the fault state of the cable under test is determined based on the step change of the detection signal, and when the cable under test is faulty, the fault location of the cable under test is determined based on the time of the step change of the detection signal.

[0070] Among them, determining the fault state of the cable under test based on the step change of the detection signal includes:

[0071] The detection signal is compared with a first threshold voltage at the effective edge of the first clock signal to obtain a first comparison value, and the detection signal is compared with a second threshold voltage to obtain a second comparison value;

[0072] At the current valid edge of the second clock signal, serial data consisting of multiple first comparison values ​​obtained within the interval between two adjacent valid edges of the second clock signal is converted into first parallel data, and serial data consisting of multiple second comparison values ​​is converted into second parallel data; and

[0073] The fault status of the cable under test is determined based on the values ​​in the first parallel data and the second parallel data, and when the cable under test is faulty, the fault location of the cable under test is determined based on the values ​​in the first parallel data and the second parallel data and the count value.

[0074] Specifically, when the detection signal does not undergo a step change, it is greater than the second threshold voltage and less than the first threshold voltage; when the detection signal undergoes a positive step change, it is simultaneously greater than both the first threshold voltage and the second threshold voltage; and when the detection signal undergoes a negative step change, it is simultaneously less than both the first threshold voltage and the second threshold voltage.

[0075] The step of determining the fault status of the cable under test based on the values ​​in the first parallel data and the second parallel data includes:

[0076] When all values ​​in the first parallel data are first logical values ​​and all values ​​in the second parallel data are second logical values, the cable under test is determined to be normal.

[0077] If at least one value in the first parallel data is a second logical value, and all values ​​in the second parallel data are second logical values, the cable under test is determined to be open-circuited.

[0078] When all values ​​in the first parallel data are first logical values, and at least one value in the second parallel data is a first logical value, the cable under test is determined to be short-circuited; and

[0079] An anomaly is detected when all values ​​in the first parallel data are second logical values ​​and all values ​​in the second parallel data are first logical values.

[0080] Furthermore, the distance d between the fault location of the cable under test and the transmitting unit TX / receiving unit RX is d = Td / (2*Tunit), where Tunit represents the transmission speed of the positive step signal in the cable under test, and Td represents the interval between the transmitting unit TX / receiving unit RX sending the positive step signal and receiving the reflected signal.

[0081] Furthermore, Td = M × tper × (N-1) + tper × m, where tper represents the period length of the clock signal clk1, N represents the current count value, and M represents the number of comparison values ​​D1 / D2 in each serial data. When the cable is open, m represents the first second logic value appearing in the first parallel data data1, which is obtained by converting the m-th comparison value D1 in its corresponding serial data. When the cable is short-circuited, m represents the first first logic value appearing in the second parallel data data2, which is obtained by converting the m-th comparison value D2 in its corresponding serial data.

[0082] Furthermore, when the transmission rate of the cable fault detection circuit 300 is 12Gbps, tper=1 / 12G≈83ps.

[0083] Furthermore, in one example of this application, M bits of serial data are converted into M bits of parallel data. In another example of this application, M bits of serial data are converted into M / 2 bits of parallel data, in which case only the odd-numbered or even-numbered values ​​in the serial data can be converted into parallel data.

[0084] The cable fault detection circuit and method provided in this invention can simultaneously detect short-circuit and open-circuit faults in the cable under test. Furthermore, by reusing the signal transmission and reception modules in the transmitting and / or receiving chips, circuit costs can be reduced and chip area saved. In addition, by converting high-speed serial data into low-speed parallel data before counting, detection accuracy can be improved at high data transmission rates.

[0085] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims and their equivalents.

Claims

1. A cable fault detection method, comprising: A positive step signal is sent to the cable under test, and the second clock signal is counted to obtain the corresponding count value; The reflected signal returned when the positive step signal reaches the fault point is received from the cable under test, and the reflected signal is superimposed with the positive step signal to obtain the detection signal; as well as The fault state of the cable under test is determined based on the step change of the detection signal, and the location of the fault is determined based on the time of the step change of the detection signal when the cable under test is faulty. The step of determining the fault state of the cable under test based on the step change of the detection signal includes: The detection signal is compared with a first threshold voltage at the effective edge of a first clock signal to obtain a first comparison value, and the detection signal is compared with a second threshold voltage to obtain a second comparison value; At the current valid edge of the second clock signal, serial data consisting of multiple first comparison values ​​obtained within the interval between two adjacent valid edges of the second clock signal is converted into first parallel data, and serial data consisting of multiple second comparison values ​​is converted into second parallel data; and The fault state of the cable under test is determined based on the values ​​in the first parallel data and the second parallel data, and the fault location of the cable under test is determined based on the values ​​in the first parallel data and the second parallel data and the count value. When the detection signal does not undergo a step change, it is greater than the second threshold voltage and less than the first threshold voltage. When the detection signal undergoes a positive step change, it is greater than both the first threshold voltage and the second threshold voltage. When the detection signal undergoes a negative step change, it is less than both the first threshold voltage and the second threshold voltage. The distance d between the fault location of the cable under test and the positive step signal transmitter is d = Td / (2*Tunit). Tunit represents the transmission speed of the positive step signal in the cable under test, and Td represents the time interval between sending the positive step signal and receiving the reflected signal. Where Td = M × tper × (N-1) + tper × m, tper represents the period length of the first clock signal, N represents the current count value, and M represents the number of multiple first comparison values ​​or multiple second comparison values ​​in the serial data. When the cable under test is open-circuited, m represents the first second logic value appearing in the first parallel data, which is obtained by converting the m-th first comparison value in the corresponding serial data. When the cable under test is short-circuited, m represents the first logic value appearing in the second parallel data, which is obtained by converting the m-th second comparison value in the corresponding serial data. The period length of the second clock signal is M times that of the first clock signal, and the first parallel data / second parallel data obtained by converting the M-bit first serial data / second serial data is M bits or M / 2 bits.

2. The detection method according to claim 1, wherein, When the cable under test has an open circuit fault, the reflected signal is a positive step signal, and the detection signal undergoes a positive step. When a short circuit fault exists in the cable under test, the reflected signal is a negative step signal, and the detection signal undergoes a negative step.

3. The detection method according to claim 1, wherein, The step of determining the fault status of the cable under test based on the values ​​in the first parallel data and the second parallel data includes: When all values ​​in the first parallel data are first logical values ​​and all values ​​in the second parallel data are second logical values, the cable under test is determined to be normal. If at least one value in the first parallel data is a second logical value, and all values ​​in the second parallel data are second logical values, the cable under test is determined to be open-circuited. When all values ​​in the first parallel data are first logical values, and at least one value in the second parallel data is a first logical value, the cable under test is determined to be short-circuited; and An anomaly is detected when all values ​​in the first parallel data are second logical values ​​and all values ​​in the second parallel data are first logical values.

4. A cable fault detection circuit, used to execute the cable fault detection method according to any one of claims 1-3, the cable fault detection circuit comprising: The signal transmitting and receiving module is used to transmit a positive step signal to the cable under test, receive the reflected signal returned when the positive step signal reaches the fault point from the cable under test, and superimpose the reflected signal with the positive step signal to obtain a detection signal. A counter is used to count the second clock signal while sending the positive step signal to obtain a corresponding count value; as well as The fault detection module is used to determine the fault state of the cable under test based on the step change of the detection signal, and to determine the fault location of the cable under test based on the time of the step change of the detection signal when the cable under test is faulty.

5. The detection circuit according to claim 4, wherein, The signal transmitting and receiving module includes: The transmitting unit has a positive output terminal and a negative output terminal, and is used to transmit the positive step signal to the cable under test through its positive output terminal when fault detection begins, and to superimpose the reflected signal and the positive step signal at its positive output terminal. The receiving unit has a positive input terminal connected to the positive output terminal of the transmitting unit and a negative input terminal connected to the negative output terminal of the transmitting unit, and is used to generate the detection signal based on the signals at its positive and negative input terminals. The first resistor is connected between the power supply voltage and the positive output terminal of the transmitting unit; The second resistor is connected between the power supply voltage and the negative output terminal of the transmitting unit; The third resistor is connected between the negative output terminal of the transmitting unit and the ground terminal.

6. The detection circuit according to claim 5, wherein, The fault detection module includes: The first comparator has two input terminals connected to the output terminal of the receiving unit and a first threshold voltage, respectively, and the output terminal provides a first comparison value. The second comparator has two input terminals connected to the output terminal of the receiving unit and the second threshold voltage, respectively, and the output terminal provides a second comparison value. The first serial-to-parallel conversion unit is used to convert serial data consisting of multiple first comparison values ​​obtained within the time interval between two adjacent valid edges of the second clock signal into first parallel data at the current valid edge of the second clock signal. The second serial-to-parallel conversion unit is used to convert serial data consisting of multiple second comparison values ​​obtained within the interval between two adjacent valid edges of the second clock signal into second parallel data at the current valid edge of the second clock signal; and The fault determination unit is used to determine the fault state of the cable under test based on the values ​​in the first parallel data and the second parallel data, and, when the cable under test is faulty, to determine the fault location of the cable under test based on the values ​​in the first parallel data and the second parallel data and the count value. The detection circuit has a maximum data transmission rate of 12 billion bits per second when performing fault detection on the cable under test.

7. The detection circuit according to claim 6, wherein, The two ends of the cable under test are connected to a transmitting chip and a receiving chip, respectively. Both the transmitting chip and the receiving chip include a signal transmitting and receiving module. The signal transmitting and receiving module in the detection circuit reuses the signal transmitting and receiving module in the transmitting chip or the receiving chip.

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