Fan-out type packaging structure of biological chip product and manufacturing method of fan-out type packaging structure
By using a fan-out packaging structure and copper pin fabrication process, the problems of photoresist residue and metal thin film layer breakage were solved, achieving efficient signal transmission and stability of the biochip and reducing packaging costs.
Patent Information
- Application Number
- CN202511347001.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-19
- Publication Date
- 2025-12-12
AI Technical Summary
Traditional biochip packaging suffers from problems such as photoresist residue, PVD metal film layer breakage, and wire bonding wire contour deformation caused by potting, which affect the accuracy and reliability of test results.
It adopts a fan-out packaging structure, uses copper pin process to avoid photoresist residue and metal thin film layer breakage, uses PDMS material layer and copper pin connection, combined with multi-layer dielectric layer and metal interconnect layer to ensure lead stability.
It improves the accuracy and reliability of biochip detection results, reduces packaging costs, and maintains the advantages of short production cycles and thin, lightweight packaging.
Smart Images

Figure CN121103445A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of microfluidic chip fan-out packaging technology, specifically referring to a fan-out packaging structure and manufacturing method for a biochip product. Background Technology
[0002] In the field of biochips, especially in the packaging of microfluidic biochip products, traditional packaging methods have revealed many problems that urgently need to be solved. For microfluidic biochip products, the stability and integrity of the packaging structure are crucial. In traditional packaging processes, photoresist residue is a common problem. Photoresist should be completely removed at specific stages of the process; however, in practice, due to factors such as process precision, photoresist characteristics, and cleaning procedures, some photoresist remains on the chip surface or in critical areas. This residual photoresist not only alters the chemical properties of the chip surface, interfering with subsequent chemical reactions and biological detection processes, but may also gradually age and decompose over long-term use, releasing impurities and contaminating the test samples, thus seriously affecting the accuracy and reliability of biochip detection results. Simultaneously, the problem of fracture in the physical vapor deposition (PVD) metal thin film layer of the electrode is also prominent. As a key component of the electrode, the PVD metal thin film layer plays a vital role in electrical signal conduction. However, under traditional packaging processes, the chip experiences multiple temperature changes, mechanical stresses, and interactions with other materials, which may lead to stress concentration within the PVD metal thin film layer. Over time or under extreme operating conditions, these stress concentration areas are prone to developing microcracks that gradually propagate and eventually lead to the fracture of the metal thin film layer. Once the metal thin film layer fractures, the electrical connection of the electrodes is interrupted, causing partial or complete failure of the biochip's functionality. Furthermore, lead contour deformation caused by potting during traditional wire bonding is a significant challenge. In wire bonding, potting aims to protect the bonded leads and enhance the mechanical stability of the package structure. However, factors such as the flow characteristics of the adhesive, curing shrinkage, and interaction with the lead material during potting often cause deformation of the originally regular wire bond. Lead contour deformation alters the electrical parameters of the leads, such as increasing resistance and inductance, reducing signal transmission quality and speed, and affecting the effective transmission of signals within the biochip. Moreover, deformed leads are more susceptible to mechanical stress damage during long-term use, reducing the reliability and lifespan of the package structure. Summary of the Invention
[0003] In response to the above situation and to overcome the shortcomings of the prior art, the present invention provides a fan-out packaging structure and manufacturing method for biochip products, which effectively solves the risks of contact area corrosion and deformation and contamination of test samples in the old methods currently on the market, as well as the problem of lead contour deformation caused by potting in traditional wire bonding.
[0004] The technical solution adopted by this invention is as follows: This invention proposes a fan-out packaging structure and manufacturing method for a biochip product, step one: preparing a base;
[0005] Step 2: Set through holes on the base;
[0006] Step 3: Implant a biochip above the base and wire bond the biochip to the base;
[0007] Step 4: Prepare glass substrate 1, and set circuit layer 1 on the glass substrate;
[0008] Step 5: Apply solder above the first circuit layer;
[0009] Step 6: Attach the base formed in Step 3 onto the top of the circuit layer 1, and align the through-hole with the solder.
[0010] Step 7: Insert a copper needle into the through hole of the base;
[0011] Step 8: Prepare the top cover, place the top cover above the base, and connect the electrode of the top cover to the copper needle;
[0012] Step 9: Install a pre-flow port on the upper cover;
[0013] Step 10: Solder printing is performed on the upper part of the circuit layer one, and copper pin two is implanted;
[0014] Step 11: Fill the area around the glass substrate 1 and copper pin 2 to form the product to be processed;
[0015] Step 12: Grind the product to expose the copper needles and the pre-flow port;
[0016] Step 13: Install a second circuit layer above the second copper needle, with the second circuit layer exposing the pre-flow port;
[0017] Step Fourteen: Remove glass substrate one and place solder balls below circuit layer one;
[0018] Step 15: Mount the product onto the first surface of the circuit board, and place the analysis device on the second surface of the circuit board;
[0019] Step 16: Complete the final packaging using the reflow soldering process.
[0020] Further, in step one, the preparation of the base includes:
[0021] Prepare a second glass substrate, and set a PDMS material layer on the top of the second glass substrate. Set electrodes at both ends above the PDMS material layer. The middle of the PDMS material layer has a groove structure, and set resin adhesive on the top of the groove structure.
[0022] Furthermore, in step three, the biochip includes pads, a sensor, and a base; the sensor is disposed on the top of the base, and pads are disposed at both ends of the top of the base.
[0023] Furthermore, in step three, the biochip is disposed in the groove structure of the PDMS material layer, and the pads are connected to the electrodes at both ends of the PDMS material layer via bonding wires.
[0024] Furthermore, in step four, the first circuit layer includes three dielectric layers and two metal interconnect layers.
[0025] Furthermore, in step eight, preparing the top cover includes:
[0026] Prepare a glass substrate three, and set a PDMS material layer on the glass substrate three. Set electrodes at both ends above the PDMS material layer. The middle part of the PDMS material layer is a groove structure. Etch or drill the groove structure to form a flow channel.
[0027] Furthermore, in step nine, the pre-flow port is positioned above the flow channel opening, and the sensor is positioned below the pre-flow port.
[0028] Furthermore, in step thirteen, the second circuit layer includes two dielectric layers and three metal interconnect layers.
[0029] Furthermore, the circuit includes a first circuit layer, a base and a second copper needle on top of the first circuit layer, a biochip on top of the base, through holes at both ends of the base, a first copper needle inside the through holes, a top cover on top of the first copper needle, a second circuit layer on top of the second copper needle, a flow channel opening on the upper middle part of the top cover, a filler between the first circuit layer and the second circuit layer, a metal ball below the first circuit layer, the metal ball being disposed on the first surface of the circuit board, and an analytical device on the other surface of the circuit board.
[0030] Furthermore, it is prepared by any one of the preparation methods according to claims 1-9.
[0031] The beneficial effects of the present invention using the above structure are as follows: This solution proposes a fan-out packaging structure and manufacturing method for biochip products. This method uses a copper pin process instead of copper pillar plating; it avoids the lead contour deformation caused by potting in traditional wire bonding, as well as the common problems of photoresist residue and electrode physical vapor deposition metal thin film layer breakage, thereby improving cost control, quality and yield. At the same time, compared with the traditional method, it retains the advantages of advanced packaging itself, such as short production cycle, thin and small package, large number of inputs and outputs, and good electrothermal efficiency. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of step one of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0033] Figure 2 This is a schematic diagram of step two of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0034] Figure 3 This is a schematic diagram of step three of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0035] Figure 4 This is a schematic diagram of step four of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0036] Figure 5 This is a schematic diagram of step five of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0037] Figure 6 This is a schematic diagram of step six of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0038] Figure 7 This is a schematic diagram of step seven of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0039] Figure 8 This is a schematic diagram of step eight of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0040] Figure 9 This is a schematic diagram of step nine of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0041] Figure 10 This is a schematic diagram of step 10 of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0042] Figure 11This is a schematic diagram of step eleven of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0043] Figure 12 This is a schematic diagram of step twelve of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0044] Figure 13 This is a schematic diagram of step thirteen of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0045] Figure 14 This is a schematic diagram of step fourteen of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0046] Figure 15 This is a schematic diagram of step fifteen of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0047] Figure 16 This is a schematic diagram of step sixteen of the fan-out packaging structure and manufacturing method of a biochip product proposed in this invention.
[0048] The components are as follows: 1. Base; 2. Glass substrate one; 3. PDMS material layer; 4. Electrode; 5. Resin adhesive; 6. Biochip; 61. Pad; 62. Sensor; 63. Base; 7. Bonding wire; 8. Circuit layer one; 9. Top cover; 10. Copper pin one; 11. Pre-flow port; 12. Circuit layer two; 13. Circuit board; 14. Analytical device; 15. Solder; 16. Through hole; 17. Dielectric layer; 18. Metal interconnect layer; 19. Glass substrate three; 20. Flow channel; 21. Filler; 22. Metal ball; 23. Glass substrate two; 24. Copper pin two.
[0049] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. Detailed Implementation
[0050] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.
[0051] In the description of this invention, it should be understood that the terms "upper", "lower", "front", "rear", "left", "right", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.
[0052] like Figures 1-16 As shown, this invention proposes a fan-out packaging structure and fabrication method for biochip products, such as... Figure 1 As shown, the process includes step one: preparing base 1 as a temporary carrier to provide a stable substrate for subsequent needle implantation and sealing.
[0053] In some embodiments, the preparation of the base 1 includes:
[0054] Prepare a second glass substrate (23). A PDMS material layer 3 is disposed on the upper part of the second glass substrate 23. Electrodes 4 are disposed at both ends above the PDMS material layer 3. The middle part of the PDMS material layer has a groove structure. A resin adhesive 5 is disposed on the upper part of the groove structure. PDMS layer: Polydimethylsiloxane (PDMS).
[0055] like Figure 2 As shown, step two: a through hole 16 is set on the base 1. The through hole 16 is used for subsequent implantation of copper needle 10. According to the implantation size and position requirements of the copper needle 10, the through hole 16 can be opened in the preset area of the base 1 by laser drilling. During the drilling process, by controlling the hole diameter and depth, it is ensured that the through hole 16 penetrates the upper and lower surfaces of the base 1.
[0056] like Figure 3 As shown, step three: implant the biochip 6 above the base 1, and bond the biochip 6 and the base 1 with lead wires 7;
[0057] The biochip 6 includes pads 61, a sensor 62, and a base 63. The base 63 can be a silicon wafer, a glass wafer, or a III-V compound wafer. The sensor 62 is disposed on the top of the base 63, and pads 61 are disposed at both ends of the top of the base 63. The sensor 62 has high sensitivity and specificity to ensure the accurate realization of subsequent detection functions.
[0058] During the implantation of biochip 6 above base 1, the base 63 of biochip 6 is placed in the groove structure of PDMS material layer 3 of base 1. The positioning function of the groove and the flexible bonding characteristics of PDMS material are used to ensure the stable position of biochip 6.
[0059] In the wire bonding stage, gold wire bonding technology is used to connect the pads 61 at both ends of the biochip 6 base 63 to the electrodes 4 at both ends of the PDMS material layer 3 one by one through the bonding wire, thus completing the construction of the electrical signal transmission path between the biochip and the base.
[0060] like Figure 4 As shown, step four: Prepare glass substrate 2, and set circuit layer 8 on glass substrate 2. Specifically, a release layer can be set on glass substrate 2, and circuit layer 8 can be set on the release layer. The release layer is not shown in the diagram.
[0061] The circuit layer 8 includes three dielectric layers 17 and two metal interconnect layers 18. The dielectric layers 17 can be made of polyimide material and are prepared by coating and baking curing processes to ensure interlayer insulation performance. The metal interconnect layers 18 can be made of copper material with high conductivity and are prepared by sputtering film formation, photolithography patterning, and etching processes. The two metal interconnect layers are electrically connected through vias in the dielectric layers to form a circuit layout that meets the signal transmission requirements.
[0062] like Figure 5 As shown, step five: Solder 15 is placed above the circuit layer 8. Solder is printed on the preset connection area on the surface of the circuit layer 8. The solder can be solder paste. The thickness and area of solder 15 are determined according to the subsequent mounting requirements of the base 1.
[0063] Step 6: Mount the base 1 formed in Step 3 onto the top of the circuit layer 8, and align the through hole 16 with the solder 15. Through the mounting process, transfer the base 1, which has completed the biochip implantation and wire bonding, onto the top of the circuit layer 8, and align the through hole 16 on the base 1 with the solder 15 on the surface of the circuit layer 8.
[0064] like Figure 6 As shown, step seven: insert a copper pin 10 into the through hole 16 of the base 1. For example, an implantation process can be used to vertically press the tin-plated copper pin 10 into the through hole 16 of the base 1. The bottom of the copper pin 10 is in close contact with the solder 15 above the circuit layer 8. Then, the solder 15 is melted by heating and a strong welded connection is formed after cooling, so that the copper pin 10 and the circuit layer 8 are electrically connected. The top of the copper pin 10 protrudes from the surface of the base 1, which is a reserved interface for the connection of the top cover 9.
[0065] like Figure 7 As shown, step eight: prepare the upper cover 9, place the upper cover 9 above the base 1, and connect the electrode of the upper cover 9 to the copper needle 10.
[0066] In some embodiments, the preparation of the top cover 9 specifically includes: setting a PDMS material layer on the glass substrate 19 by coating and curing processes; preparing electrodes at both ends of the PDMS material layer using processes such as sputtering and photolithography; and processing the groove structure in the middle of the PDMS material layer by means of RIE reactive ion etching or laser drilling to form a flow channel 20 penetrating the PDMS layer. The size and position of the flow channel 20 need to correspond to the sensor 62 of the biochip 6.
[0067] like Figure 8 As shown, when the top cover 9 is placed, the electrodes at both ends of the PDMS material layer of the top cover 9 are brought into contact with the top of the copper needle-10 protruding in the through hole 16 of the base 1, ensuring a stable connection between the electrodes and the copper needle-10, while ensuring the sealing performance between the top cover 9 and the base 1 to prevent leakage of subsequent test samples.
[0068] like Figure 9 As shown, step nine: install a pre-flow port 11 on the upper cover 9; the pre-flow port 11 is made of transparent plastic and is fixed to the surface of the upper cover 9 by an adhesive process, and the pre-flow port 11 needs to be accurately positioned above the flow channel 20 to form a vertically connected sample transmission channel; at the same time, ensure that the sensor 62 of the biochip 6 is positioned below the pre-flow port 11 so that the sample can directly act on the sensor 62 after passing through the pre-flow port 11 and the flow channel 20, ensuring the effective acquisition of the detection signal.
[0069] like Figure 10 As shown, in step ten: solder is printed on the top of the first circuit layer 8, and copper pin 24 is implanted. Referring to the solder printing process in step five, solder is applied to the preset area on the top of the first circuit layer 8 that is not covered by the base 1. Then, using the same implantation and welding process as copper pin 10, copper pin 24 is implanted into the corresponding position of the solder. The bottom of copper pin 24 is electrically connected to the first circuit layer 8, and the top protrudes from the surface of the first circuit layer 8, providing a connection node for the subsequent fabrication of the second circuit layer 12.
[0070] like Figure 11 As shown, step eleven: fill the area around the glass substrate 2 and the copper pin 24 to form the product to be processed; select a suitable epoxy resin underfill adhesive 21, and inject the underfill adhesive into the gap between the glass substrate 2 and the copper pin 24, as well as the edge gap between the circuit layer 8 and the glass substrate 2, through dispensing or molding process, to ensure that the underfill adhesive completely covers the copper pin 24 to form the product to be processed and improve the product's impact resistance and thermal stress resistance.
[0071] like Figure 12 As shown, step 12: Grind the product to expose the copper needle 24 and the pre-flow port 11. The product can be ground using a grinding process. Grind the side of the top cover 9 until the top of the flow channel port 20 is fully exposed to avoid damaging the internal circuitry and biochip 6.
[0072] like Figure 13 As shown, step thirteen: A second circuit layer 12 is disposed above the second copper pin 24, and the second circuit layer 12 exposes the flow channel opening 20. In some embodiments, the second circuit layer 12 includes two dielectric layers 17 and three metal interconnect layers 18. The dielectric layers 17 may be made of polyimide material and are prepared by coating and curing processes to ensure good bonding with the underlying circuit layer and the second copper pin 24;
[0073] The metal interconnect layer 18 is made of copper and is prepared in three layers through sputtering, photolithography and etching processes. The layers are electrically connected through vias in the dielectric layer 17. The circuit layout needs to be precisely aligned with the copper pin 24 to construct a multi-channel signal transmission path.
[0074] During the preparation process, an opening is reserved in the area corresponding to the flow channel 20 to ensure that the second layer of the circuit 12 does not cover the flow channel 20, thus ensuring the integrity of the sample transmission channel.
[0075] like Figure 14 As shown, step fourteen: remove glass substrate 2 and place solder balls under circuit layer 8.
[0076] Photodissociation or irradiation products are used to reduce the viscosity of the dissociation agent on the glass substrate 2 after being irradiated by light, so that the glass substrate can be completely peeled off. Then, a solder ball implantation process is used to implant solder balls at the preset pad positions below the circuit layer 8. The diameter of the solder balls is selected according to the subsequent connection requirements with the circuit board 13. After the balls are implanted, they are tested to ensure that the solder ball positions are accurate and the adhesion meets the standards.
[0077] like Figure 15 As shown, step fifteen: mount the product on the first surface of the circuit board 13, set the analysis device 14 on the second surface of the circuit board 13, and mount the product with solder balls on the first surface of the circuit board 13 through surface mount technology (SMT), so that the solder balls under the product circuit layer 8 are precisely aligned with the pads on the first surface of the circuit board 13. Then, reflow soldering is performed to achieve electrical connection and fixation between the product and the circuit board.
[0078] On the second surface of the circuit board 13, which is opposite to the first surface, the analysis device 14 is fixed by a soldering process. The analysis device 14 can be a signal processing chip, a data acquisition module, etc., to ensure that the pins of the analysis device 14 are reliably connected to the circuit of the circuit board 13, thus constructing a complete detection data processing system.
[0079] like Figure 16As shown, step sixteen: complete the final packaging through reflow soldering process; place the circuit board 13 with the product and analysis device 14 mounted on it into the reflow soldering oven and perform soldering according to the preset temperature profile, so that the connection points between the product and the circuit board 13, and between the analysis device 14 and the circuit board 13 are fully melted and form stable solder joints; after the reflow soldering is completed, perform appearance inspection, electrical performance test and reliability test on the packaged product, and if it passes the test, the fan-out packaging of the entire biochip product is completed.
[0080] The present invention discloses a fan-out packaging structure for a biochip product, comprising a circuit layer 1, a base and copper pins 24 disposed above the circuit layer 1, a biochip disposed above the base 1, through holes 16 disposed at both ends of the base 1, copper pins 10 disposed inside the through holes 16, a top cover disposed above the copper pins 1, a circuit layer 2 disposed above the copper pins 24, a flow channel 20 disposed above the middle of the top cover 9, a filler 21 disposed between the circuit layer 1 and the circuit layer 2, a metal ball 22 disposed below the circuit layer 1, the metal ball 22 disposed on the first surface of a circuit board 13, and an analytical device 14 disposed on the other surface of the circuit board 13.
[0081] The filler 21 fills the gap between the first circuit layer 8 and the second circuit layer 12, fixes the position of the second copper pin 24, and absorbs the thermal and mechanical stress during the packaging process; the metal ball 22 realizes the electrical and mechanical connection between the packaging structure and the circuit board 13, and transmits the signal of the biochip 6 to the circuit board; the analysis device 14 receives the signal transmitted by the circuit board and completes data processing, storage or output of detection results.
[0082] The above is the overall workflow of this invention. Simply repeat this process the next time you use it.
[0083] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus.
[0084] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
[0085] The present invention and its embodiments have been described above. This description is not restrictive, and the accompanying drawings are only one embodiment of the present invention; the actual structure is not limited thereto. In conclusion, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the spirit of the invention, such designs should fall within the protection scope of the present invention.
Claims
1. A fan-out packaging structure and manufacturing method for a biochip product, characterized in that: Step 1: Prepare the base (1); Step 2: Provide a through hole (16) on the base (1); Step 3: Implant a biochip (6) above the base (1) and bond the biochip (6) and the base (1) with wires (7); Step 4: Prepare glass substrate 1 (2), and set circuit layer 1 (8) on the glass substrate; Step 5: Apply solder (15) above the first circuit layer (8); Step 6: Mount the base (1) formed in step 3 above the circuit layer 1 (8) and make the through hole (16) opposite to the solder; Step 7: Insert a copper needle (10) into the through hole (16) of the base (1); Step 8: Prepare the top cover (9), place the top cover (9) above the base (1), and connect the electrode (4) of the top cover (9) to the copper needle (10); Step 9: Install a pre-flow port (11) on the upper cover (9); Step 10: Solder printing is performed on the top of the first circuit layer (8), and copper pins (24) are implanted. Step 11: Fill the bottom around the glass substrate 1 (2) and copper pin 2 (24) to form the product to be processed; Step 12: Grind the product to expose the copper needle 2 (24) and the pre-flow port (20); Step 13: A second circuit layer (12) is set above the second copper needle (24), and the second circuit layer (12) exposes the pre-flow port (20); Step 14: Remove glass substrate 1 (2) and place solder balls under circuit layer 1 (8); Step 15: Mount the product on the first surface of the circuit board (13), and place the analysis device (14) on the second surface of the circuit board (13); Step 16: Complete the final packaging using the reflow soldering process.
2. The fan-out packaging structure and manufacturing method of a biochip product according to claim 1, characterized in that: In step one, the preparation of the base (1) includes: Prepare a second glass substrate (23), and set a PDMS material layer (3) on the upper part of the second glass substrate (23). Set electrodes (4) at both ends above the PDMS material layer (3). The middle part of the PDMS material has a groove structure, and set resin adhesive (5) on the groove structure.
3. The fan-out packaging structure and manufacturing method of a biochip product according to claim 2, characterized in that: In step three, the biochip (6) includes pads (61), sensors (62) and a base (63); the sensor (62) is disposed on the base (63), and pads (61) are disposed at both ends of the base (63).
4. The fan-out packaging structure and manufacturing method of a biochip product according to claim 3, characterized in that: In step three, the biochip (63) is disposed in the groove structure of the PDMS material layer (3), and the pad (61) is connected to the electrodes (4) at both ends of the PDMS material layer (3) via bonding wires.
5. The fan-out packaging structure and manufacturing method of a biochip product according to claim 1, characterized in that: In step four, the first line layer (8) includes three dielectric layers (17) and two metal interconnect layers (18).
6. The fan-out packaging structure and manufacturing method of a biochip product according to claim 1, characterized in that: In step eight, preparing the top cover (9) includes: Prepare a glass substrate three (19), and set a PDMS material layer on the glass substrate three (19). Set electrodes at both ends above the PDMS material layer. The middle part of the PDMS material layer is a groove structure. Etch or drill the groove structure to form a flow channel (20).
7. The fan-out packaging structure and manufacturing method of a biochip product according to claim 1, characterized in that: In step nine, the pre-flow port (11) is located above the flow channel port (20), and the sensor (62) is located below the pre-flow port (11).
8. The fan-out packaging structure and manufacturing method of a biochip product according to claim 1, characterized in that: In step thirteen, the second line layer (12) includes two dielectric layers (17) and three metal interconnect layers (18).
9. The fan-out packaging structure and manufacturing method of a biochip product according to claim 1, characterized in that: The circuit includes a first circuit layer, a base and a second copper needle (24) are provided above the first circuit layer, a biochip is provided above the base (1), through holes (16) are provided at both ends of the base (1), a first copper needle (10) is provided inside the through holes (16), a top cover is provided above the first copper needle (10), a second circuit layer is provided above the second copper needle (24), a flow channel (20) is provided above the middle part of the top cover (9), a filler (21) is provided between the first circuit layer and the second circuit layer, a metal ball (22) is provided below the first circuit layer, the metal ball (22) is provided on the first surface of the circuit board (13), and an analytical device (14) is provided on the other surface of the circuit board (13).
10. A fan-out packaging structure for a biochip product is characterized in that, Prepared by any one of the preparation methods according to claims 1-9.