Manufacturing exposure detection method and system for composite circuit board

By calculating initial energy, analyzing interlayer images, and using multispectral scanning imaging, the accuracy and consistency issues in exposure detection of multilayer composite circuit boards were resolved, achieving high-precision exposure quality assessment and improving product quality and user experience.

CN121115418APending Publication Date: 2025-12-12SUMITOMO ELECTRIC INTERCONNECT PROD SHENZHEN LTD
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Patent Information

Application Number
CN202511234108.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-01
Publication Date
2025-12-12

AI Technical Summary

Technical Problem

Existing technologies cannot effectively solve the exposure and inspection problem of multilayer composite circuit boards, resulting in low exposure accuracy, poor quality inspection effect, and poor user experience.

Method used

By calculating the initial energy of the exposure point, the interlayer image of the circuit board is obtained and the overlay error is calculated. The energy is corrected, and the corrected energy is used for exposure. Photo analysis and quality assessment are then performed. Combined with multispectral scanning imaging, the exposure accuracy and consistency are improved.

Benefits of technology

This improved the exposure accuracy and consistency of circuit boards, reduced the defect rate, and enhanced product quality and user experience.

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Abstract

The invention is applicable to the technical field of circuit board detection, and provides a composite circuit board manufacturing exposure detection method and system, and the method comprises the steps: obtaining standard energy for exposing a circuit board; performing multispectral scanning imaging on the circuit board to obtain a field uniformity factor of the circuit board and an interlayer image of the circuit board; calculating the initial energy of the exposure point; obtaining an interlayer image of the circuit board, carrying out superposition error calculation, and outputting a superposition error prediction value; correcting the initial energy according to the superposition error predicted value, and outputting corrected energy; exposing the circuit board by using the correction energy; photographing and analyzing the circuit board to obtain one or more defect areas; performing exposure quality evaluation according to the one or more defect areas, and outputting an exposure quality evaluation score; therefore, the exposure precision and consistency of the circuit board are improved, the defect rate is greatly reduced, the product quality is improved, and the user experience is further improved.
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Description

Technical Field

[0001] This invention belongs to the field of circuit board testing technology, and particularly relates to a method and system for exposure testing of composite circuit boards. Background Technology

[0002] Current circuit board exposure inspection mainly relies on a single light source for image recognition, which is difficult to deal with the complex materials and strong optical interference of multilayer composite boards. Especially in high-precision circuit board manufacturing, interlayer alignment errors and uneven exposure can easily cause short circuits and open circuits, leading to a decrease in product yield. Summary of the Invention

[0003] In view of the shortcomings of the prior art, the purpose of this invention is to provide a method and system for exposure inspection in the fabrication of composite circuit boards, aiming to solve the problems of low exposure accuracy, poor quality inspection effect, and poor user experience caused by the inability of the prior art to provide an effective exposure inspection method for the fabrication of composite circuit boards.

[0004] On one hand, the present invention provides an exposure and inspection method for the fabrication of a composite circuit board, the method comprising the following steps:

[0005] Calculate the initial energy at the exposure point;

[0006] Acquire interlayer images of the circuit board and calculate the overlay error, then output the predicted overlay error value;

[0007] The initial energy is corrected based on the predicted superposition error value, and the corrected energy is output.

[0008] The circuit board is exposed using the corrected energy;

[0009] The circuit board is photographed and analyzed to identify one or more defective areas;

[0010] An exposure quality assessment is performed based on one or more of the defective areas, and an exposure quality assessment score is output.

[0011] The method of the present invention, wherein, prior to calculating the initial energy of the exposure point, includes:

[0012] Obtain the standard energy for exposing the circuit board;

[0013] Multispectral scanning imaging is performed on the circuit board to obtain the field uniformity factor and interlayer image of the circuit board.

[0014] The method of the present invention further includes: obtaining the initial energy according to Formula 1;

[0015] Formula 1: Wherein, L(i,j) is the initial energy, D0 is the standard energy, U(i,j) is the field uniformity factor, and φ(i,j) is the correction factor for the material and the spectrum.

[0016] The method described in this invention further includes: obtaining interlayer alignment offset in the X-axis direction and interlayer alignment offset in the Y-axis direction based on the interlayer image of the circuit board;

[0017] The predicted value of the superposition error is obtained according to Formula 2;

[0018] Formula 2: Among them, E p The superposition error prediction value is given by Δx, where Δx is the interlayer alignment offset in the X-axis direction, Δy is the interlayer alignment offset in the Y-axis direction, θ is the rotation error angle, α is the weighting factor for translation error, and β is the weighting factor for rotation error.

[0019] The method described in this invention further includes: obtaining the corrected energy according to formula 3;

[0020] Formula 3: Where L′(i,j) is the corrected energy, γ is the compensation coefficient, and E max This represents the maximum allowable error.

[0021] The method of the present invention further includes: obtaining the exposure quality assessment score according to Formula 4;

[0022] Formula 4: Where Q is the exposure quality assessment score, N is the number of one or more defective regions, and A k D is the area of ​​the k-th defect region. k w1 is the grayscale difference of the k-th defect region, w2 is the weight of the area of ​​the defect region, and w1 is the weight of the grayscale difference of the defect region.

[0023] The method of the present invention, wherein the multispectral scanning of the circuit board includes: sequentially scanning and imaging the circuit board using red light, green light, blue light, and ultraviolet light.

[0024] On the other hand, the present invention provides an exposure and inspection system for the fabrication of composite circuit boards, the system comprising:

[0025] Energy calculation unit calculates the initial energy at the exposure point;

[0026] The error calculation unit acquires the interlayer image of the circuit board and performs the superposition error calculation, and outputs the superposition error prediction value.

[0027] An energy correction unit corrects the initial energy based on the predicted superposition error value and outputs the corrected energy.

[0028] An exposure unit uses the corrected energy to expose the circuit board;

[0029] The defect analysis unit takes pictures of the circuit board and analyzes them to identify one or more defect areas.

[0030] The quality assessment unit performs an exposure quality assessment based on one or more of the defective areas and outputs an exposure quality assessment score.

[0031] On the other hand, the present invention also provides a non-volatile computer-readable storage medium storing computer-executable instructions, which, when executed by one or more processors, cause the one or more processors to perform the above-described exposure and inspection method for fabricating a composite circuit board.

[0032] On the other hand, the present invention also provides a computer program product, the computer program product comprising a computer program stored on a non-volatile computer-readable storage medium, the computer program comprising program instructions, which, when executed by a processor, cause the processor to perform the above-described exposure and detection method for fabricating a composite circuit board.

[0033] The beneficial effects of this invention are as follows: It obtains a standard energy for exposing a circuit board; performs multispectral scanning imaging on the circuit board to obtain the field uniformity factor and interlayer image of the circuit board; calculates the initial energy of the exposure point; acquires the interlayer image of the circuit board and calculates the overlay error, outputting a predicted overlay error value; corrects the initial energy based on the predicted overlay error value, outputting a corrected energy; exposes the circuit board using the corrected energy; analyzes the circuit board by taking pictures to identify one or more defective areas; evaluates the exposure quality based on one or more defective areas, outputting an exposure quality evaluation score; thereby improving the exposure accuracy and consistency of the circuit board, significantly reducing the defect rate, improving product quality, and ultimately enhancing the user experience. Attached Figure Description

[0034] Figure 1 This is a flowchart illustrating the implementation of the exposure and testing method for fabricating a composite circuit board provided in Embodiment 1 of the present invention.

[0035] Figure 2 This is a schematic diagram of the structure of the composite circuit board fabrication exposure and inspection system provided in Embodiment 2 of the present invention. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0037] The specific implementation of the present invention will be described in detail below with reference to specific embodiments:

[0038] Example 1:

[0039] Figure 1 The implementation flow of the exposure and inspection method for fabricating a composite circuit board according to Embodiment 1 of the present invention is shown. For ease of explanation, only the parts related to the embodiments of the present invention are shown, and are described in detail below:

[0040] In step S101, the initial energy of the exposure point is calculated;

[0041] In an embodiment of the present invention, the calculation of the initial energy at the exposure point includes:

[0042] Obtain the standard energy for exposing the circuit board; this standard energy is the exposure standard energy under ideal conditions.

[0043] Multispectral scanning imaging of the circuit board is used to obtain the field uniformity factor (exposure field uniformity factor) and interlayer images of the circuit board.

[0044] Multispectral scanning of the circuit board includes: sequentially scanning and imaging the circuit board with red, green, blue and ultraviolet light, and acquiring images with a high-resolution camera; based on the principle that light of different wavelengths can penetrate or reflect different layers, the high-resolution camera can acquire images of each layer; among them, the interlayer image is the comparison result image between two adjacent layers, which is used to calculate the interlayer offset.

[0045] Furthermore, the method also includes: obtaining the initial energy according to Formula 1;

[0046] Formula 1: Where L(i,j) is the initial energy, D0 is the standard energy, U(i,j) is the field homogeneity factor, and φ(i,j) is the correction factor for the material and the spectrum.

[0047] In step S102, the interlayer image of the circuit board is acquired and the overlay error is calculated, and the predicted overlay error value is output.

[0048] In an embodiment of the present invention, the method further includes: obtaining interlayer alignment offset in the X-axis direction and interlayer alignment offset in the Y-axis direction based on the interlayer image of the circuit board;

[0049] The predicted value of the superposition error is obtained according to Formula 2;

[0050] Formula 2: Among them, E p Δx is the predicted value of the overlay error, Δy is the interlayer alignment offset in the X-axis direction, θ is the rotation error angle, α is the weighting factor of the translation error, and β is the weighting factor of the rotation error.

[0051] For example: Δx=2μm, Δy=3μm, θ=0.5°, α=1, β=0.1;

[0052] but:

[0053] In step S103, the initial energy is corrected based on the predicted value of the superposition error, and the corrected energy is output.

[0054] In an embodiment of the present invention, the method further includes: obtaining the corrected energy according to Formula 3;

[0055] Formula 3: Where L′(i,j) is the correction energy, γ is the compensation coefficient, and E max This represents the maximum allowable error.

[0056] For example: L = 100, E p =3.6,E max =10, γ=0.5;

[0057] but:

[0058] In step S104, the circuit board is exposed using corrected energy;

[0059] In embodiments of the present invention, the aim is to improve product quality.

[0060] In step S105, the circuit board is photographed and analyzed to identify one or more defective areas;

[0061] In embodiments of the present invention, areas that are abnormally bright or dark are considered defective areas.

[0062] In step S106, an exposure quality assessment is performed based on one or more defective areas, and an exposure quality assessment score is output.

[0063] In an embodiment of the present invention, the method further includes: obtaining an exposure quality assessment score according to Formula 4;

[0064] Formula 4: Where Q is the exposure quality assessment score (a higher score indicates a more severe defect), N is the number of one or more defective areas, and A k Let D be the area of ​​the k-th defect region. kLet w1 be the grayscale difference of the k-th defect region, w2 be the weight of the area of ​​the defect region, and w1 be the weight of the grayscale difference of the defect region.

[0065] For example: Two defective areas were detected;

[0066] Defect area 1: A1=5, D1=20;

[0067] Defect area 2: A2=3, D2=15;

[0068] Weights: w1 = 0.6, w2 = 0.4;

[0069]

[0070] In embodiments of the present invention, a standard energy for exposing a circuit board is obtained; multispectral scanning imaging of the circuit board is performed to obtain the field uniformity factor and interlayer image of the circuit board; the initial energy of the exposure point is calculated; the interlayer image of the circuit board is acquired and the overlay error is calculated, and the overlay error prediction value is output; the initial energy is corrected according to the overlay error prediction value, and the corrected energy is output; the circuit board is exposed using the corrected energy; the circuit board is photographed and analyzed to identify one or more defect areas; the exposure quality is evaluated based on one or more defect areas, and the exposure quality evaluation score is output; thereby improving the exposure accuracy and consistency of the circuit board, greatly reducing the defect rate, improving product quality, and thus improving the user experience.

[0071] Example 2:

[0072] Figure 2 The structure of the fabrication exposure and inspection system for the composite circuit board provided in Embodiment 2 of the present invention is shown. For ease of explanation, only the parts related to the embodiments of the present invention are shown, including:

[0073] Energy calculation unit 210 calculates the initial energy at the exposure point;

[0074] Error calculation unit 220 acquires interlayer images of the circuit board and performs superposition error calculation, and outputs the superposition error prediction value;

[0075] The energy correction unit 230 corrects the initial energy based on the superposition error prediction value and outputs the corrected energy.

[0076] Exposure unit 240 uses corrected energy to expose the circuit board;

[0077] Defect analysis unit 250 takes pictures of the circuit board and analyzes them to identify one or more defect areas.

[0078] The quality assessment unit 260 performs exposure quality assessment based on one or more defective areas and outputs an exposure quality assessment score.

[0079] In this embodiment of the invention, each unit of the exposure and detection system for the fabrication of composite circuit boards can be implemented by corresponding hardware or software units. Each unit can be an independent hardware or software unit, or it can be integrated into a single hardware or software unit. This is not intended to limit the invention.

[0080] Example 3:

[0081] Embodiment 3 of the present invention provides a non-volatile computer-readable storage medium storing computer-executable instructions that are executed by one or more processors, for example, executing the instructions described above. Figure 1 The method steps S101 to S106.

[0082] As an example, non-volatile storage media can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) as an external cache memory. By way of explanation, RAM can be obtained in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct Rambus RAM (DRRAM). The memory components or memories disclosed in the operating environment described herein are intended to include one or more of these and / or any other suitable types of memory.

[0083] Example 4:

[0084] Embodiment 4 of the present invention provides a computer program product, which includes a computer program stored on a non-volatile computer-readable storage medium. The computer program includes program instructions, which, when executed by a processor, cause the processor to perform the fabrication exposure and detection method for a composite circuit board described in the above-described method embodiments. For example, performing the above-described method... Figure 1 The method steps S101 to S106.

[0085] The embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0086] Through the description of the above embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus a general-purpose hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can exist in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer electronic device (which may be a personal computer, server, or network electronic device, etc.) to execute the methods of each embodiment or some parts of the embodiments.

[0087] Among other things, conditional language such as “can,” “may,” “may,” or “may,” unless otherwise specifically stated or otherwise understood as in the context in which they are used, is generally intended to convey that a particular implementation may include (but not others) certain features, elements, and / or operations. Therefore, such conditional language is generally not intended to imply that features, elements, and / or operations are necessary for one or more implementations in any way, or that one or more implementations must include logic for determining whether such features, elements, and / or operations are included or will be performed in any particular implementation, with or without student input or prompts.

[0088] The contents already described herein in this specification and accompanying drawings include examples of methods and systems for fabricating exposure inspection of composite circuit boards. Of course, it is not possible to describe every conceivable combination of elements and / or methods for the purpose of describing the various features of this disclosure, but it will be appreciated that many other combinations and substitutions of the disclosed features are possible. Therefore, it will be apparent that various modifications can be made to this disclosure without departing from the scope or spirit of this disclosure. Furthermore, or in alternatives, other embodiments of this disclosure may become apparent from consideration of this specification and accompanying drawings and from practice of this disclosure as presented herein. It is intended that the examples presented in this specification and accompanying drawings be considered illustrative rather than restrictive in all respects. Although specific terminology is used herein, it is used in a general and descriptive sense and is not intended for limiting purposes.

Claims

1. A method for exposure and inspection in the fabrication of a composite circuit board, characterized in that, The method includes the following steps: Calculate the initial energy at the exposure point; Acquire interlayer images of the circuit board and calculate the overlay error, then output the predicted overlay error value; The initial energy is corrected based on the predicted superposition error value, and the corrected energy is output. The circuit board is exposed using the corrected energy; The circuit board is photographed and analyzed to identify one or more defective areas; An exposure quality assessment is performed based on one or more of the defective areas, and an exposure quality assessment score is output.

2. The method as described in claim 1, characterized in that, The calculation of the initial energy at the exposure point includes: Obtain the standard energy for exposing the circuit board; Multispectral scanning imaging is performed on the circuit board to obtain the field uniformity factor and interlayer image of the circuit board.

3. The method as described in claim 2, characterized in that, The method further includes: obtaining the initial energy according to Formula 1; Formula 1: Wherein, L(i,j) is the initial energy, D0 is the standard energy, U(i,j) is the field uniformity factor, and φ(i,j) is the correction factor for the material and the spectrum.

4. The method as described in claim 3, characterized in that, The method further includes: obtaining interlayer alignment offset in the X-axis direction and interlayer alignment offset in the Y-axis direction based on the interlayer image of the circuit board; The predicted value of the superposition error is obtained according to Formula 2; Formula 2: Among them, E p The superposition error prediction value is given by Δx, where Δx is the interlayer alignment offset in the X-axis direction, Δy is the interlayer alignment offset in the Y-axis direction, θ is the rotation error angle, α is the weighting factor for translation error, and β is the weighting factor for rotation error.

5. The method as described in claim 4, characterized in that, The method further includes: obtaining the corrected energy according to formula 3; Formula 3: Where L′(i,j) is the corrected energy, γ is the compensation coefficient, and E max This represents the maximum allowable error.

6. The method as described in claim 1, characterized in that, The method further includes: obtaining the exposure quality assessment score according to Formula 4; Formula 4: Where Q is the exposure quality assessment score, N is the number of one or more defective regions, and A k D is the area of ​​the k-th defect region. k w1 is the grayscale difference of the k-th defect region, w2 is the weight of the area of ​​the defect region, and w1 is the weight of the grayscale difference of the defect region.

7. The method as described in claim 1, characterized in that, The multispectral scanning of the circuit board includes: sequentially scanning and imaging the circuit board using red light, green light, blue light, and ultraviolet light.

8. A fabrication exposure and inspection system for composite circuit boards, characterized in that, The system includes: Energy calculation unit calculates the initial energy at the exposure point; The error calculation unit acquires the interlayer image of the circuit board and performs the superposition error calculation, and outputs the superposition error prediction value. An energy correction unit corrects the initial energy based on the predicted superposition error value and outputs the corrected energy. An exposure unit uses the corrected energy to expose the circuit board; The defect analysis unit takes pictures of the circuit board and analyzes them to identify one or more defect areas. The quality assessment unit performs an exposure quality assessment based on one or more of the defective areas and outputs an exposure quality assessment score.

9. A non-volatile computer-readable storage medium, characterized in that, The non-volatile computer-readable storage medium stores computer-executable instructions that, when executed by one or more processors, cause the one or more processors to perform the fabrication exposure and inspection method for the composite circuit board according to any one of claims 1-7.

10. A computer program product, characterized in that, The computer program product includes a computer program stored on a non-volatile computer-readable storage medium, the computer program including program instructions that, when executed by a processor, cause the processor to perform the fabrication exposure and inspection method for the composite circuit board according to any one of claims 1-7.