Floating point data parallel computing method and device of vector processor and vector processor

Abstract

The invention provides a floating point data parallel computing method and device based on a vector processor and the vector processor, and the method comprises the steps: carrying out vectorization and parallel absolute value calculation on a plurality of pieces of input floating point data, and dividing each piece of data into different computing intervals according to the calculated absolute value; for data located in different calculation intervals, calculating branches in different intervals are combined, branch differences are uniformly represented through symbol transformation variables, and fitting intermediate variables corresponding to all the data are obtained through uniform vector operation instruction parallel calculation; and performing parallel calculation on the basis of the intermediate variable for fitting to obtain a preliminary result corresponding to each data, and correcting the preliminary result according to a symbol of original input data to output a final calculation result in a vector form. According to the method, the problems of low hardware resource utilization rate and poor calculation efficiency of high-precision floating point function calculation realized by adopting a scalar serial processing mode in the prior art are solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of high-precision floating-point function calculation for processor architecture, and particularly relates to a floating-point data parallel calculation method and device based on a vector processor and the vector processor. BACKGROUND

[0002] In the field of implementing high-precision floating-point function calculation based on a traditional processor architecture, a scalar serial processing mode is generally adopted. This scheme processes a single data input each time, determines the numerical interval to which the data belongs through a conditional judgment instruction, and then calls a specific calculation subroutine optimized for the interval to perform fitting solution. The inherent defect of this method is that the hardware resource utilization rate is extremely low: when the processor performs conditional judgment and flow control, the large-scale parallel operation unit is in an idle state; conversely, when the operation unit performs calculation, the control logic unit is waiting. This serial mode makes the calculation efficiency much lower than the theoretical peak computing power of the processor, and cannot meet the urgent needs of modern scientific calculation and engineering simulation for efficient processing of huge amounts of data.

[0003] With the continuous improvement of application requirements for calculation precision and scale, the above technical defects are particularly prominent in high-performance computing scenarios. In particular, in applications that need to process massive FP64 format data, such as electromagnetic simulation, financial modeling or artificial intelligence training, the calculation time of the traditional scalar serial method has become the core bottleneck of the performance of the entire system. Although attempts have been made to improve performance by increasing the processor frequency, etc., the effect is very limited because it does not fundamentally change the problem of low instruction-level parallelism and insufficient hardware resource utilization.

[0004] Therefore, it is necessary to propose a new solution that can fully tap the potential of modern processor hardware and significantly improve the efficiency of double-precision floating-point function calculation to solve the above technical problems. SUMMARY

[0005] The present application aims to provide a floating-point data parallel calculation method and device based on a vector processor and the vector processor to solve the problem of low hardware resource utilization and poor calculation efficiency in the prior art when implementing high-precision floating-point function calculation using a scalar serial processing mode, which cannot meet the needs of high-throughput processing of massive double-precision floating-point data.

[0006] To achieve the above-mentioned purpose, the present application is implemented as follows:

[0007] In a first aspect, the present application provides a floating-point data parallel calculation method based on a vector processor, comprising:

[0008] vectorizing and performing parallel absolute value calculation on a plurality of input floating-point data, and dividing each data into different calculation intervals according to the calculated absolute value size;

[0009] For data located in different computing intervals, the branch difference is uniformly represented by merging the computing branches of different intervals and using a sign transformation variable, and the intermediate variables for fitting corresponding to each data are obtained by parallel computing with unified vector operation instructions;

[0010] The preliminary results corresponding to each data are obtained by parallel computing based on the intermediate variables for fitting, and the preliminary results are modified according to the signs of the original input data to output the final computing results in the form of a vector.

[0011] In a second aspect, a floating point data parallel computing device based on a vector processor is provided, comprising:

[0012] A data preprocessing module is configured to vectorize and perform parallel absolute value calculation on a plurality of input floating point data, and divide each data into different computing intervals according to the calculated absolute value size;

[0013] An intermediate variable calculation module is configured to, for data located in different computing intervals, uniformly represent the branch difference by merging the computing branches of different intervals and using a sign transformation variable, and obtain the intermediate variables for fitting corresponding to each data by parallel computing with unified vector operation instructions;

[0014] A preliminary result synthesis module is configured to obtain the preliminary results corresponding to each data by parallel computing based on the intermediate variables for fitting; and

[0015] An output module is configured to modify the preliminary results according to the signs of the original input data to output the final computing results in the form of a vector.

[0016] In a third aspect, a vector processor is provided, comprising:

[0017] One or more operation units; a vector register group connected with the operation units;

[0018] A memory storing instructions; wherein the instructions, when executed, configure the vector processor to perform the method of the first aspect.

[0019] In a fourth aspect, the present application further provides a computer readable storage medium, which stores a computer program, and the computer program, when executed by a processor, implements the steps of the method of the first aspect.

[0020] The present application has the following beneficial effects:

[0021] The vector processor-based floating point data parallel computing method of the present application realizes parallel absolute value calculation of multiple floating point data, interval division and synchronous processing of intermediate variables in fitting by adopting vector processing, merging calculation branches and using a symbol transformation variable to uniformly represent differences, effectively eliminates the control flow divergence in the traditional serial algorithm, enables the hardware operation unit to continuously perform saturation operation with a unified vector operation instruction, thereby greatly improving the calculation throughput and hardware resource utilization rate of the vector processor, and ensuring the correct output of the high-precision fitting result. In this way, the problem of low hardware resource utilization rate and poor calculation efficiency in the prior art in which a scalar serial processing mode is adopted to realize high-precision floating point function calculation is solved, and the high-throughput processing demand for massive double-precision floating point data is difficult to meet.

[0022] Further, the present application introduces a special value processing step, pre-screens and records abnormal values before the main calculation process, and centrally replaces them in the final output stage, effectively avoiding the redundant overhead and potential errors caused by putting special values into complex fitting calculation, and further improving the robustness and efficiency of the overall calculation.

[0023] In addition, the present application generates a fitting polynomial by uniformly adjusting the common fitting parameters based on the symbol transformation variable, ensures the consistency of the algorithm accuracy in different calculation intervals, fundamentally avoids the accuracy fluctuation problem that may be introduced due to the use of different approximate formulas, and improves the calculation efficiency while ensuring the high-precision result output. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a schematic flowchart of the vector processor-based floating point data parallel computing method according to an embodiment of the present application;

[0025] Figure 2 is a schematic flowchart of the vector processor-based floating point data parallel computing method according to another embodiment of the present application;

[0026] Figure 3 is a schematic flowchart of the vector processor-based floating point data parallel computing method according to another embodiment of the present application;

[0027] Figure 4 is a schematic flowchart of the vector processor-based floating point data parallel computing method according to another embodiment of the present application;

[0028] Figure 5 is a schematic flowchart of interval transformation and intermediate variable generation;

[0029] Figure 6 is a schematic flowchart of branch merging and fitting parameter generation;

[0030] Figure 7 a schematic flowchart of result synthesis and output;

[0031] Figure 8 a comparison diagram of traditional scalar branch processing and optimized vector parallel processing flow;

[0032] Figure 9 a schematic structural diagram of a floating-point data parallel computing device based on a vector processor;

[0033] Figure 10 a topological structure diagram of a computer-readable storage medium according to the present disclosure. DETAILED DESCRIPTION

[0034] The present disclosure will be described in detail below with reference to the embodiments shown in the drawings, but it should be noted that these embodiments are not limiting of the present disclosure, and equivalent transformations or substitutions of functions, methods, or structures made by those of ordinary skill in the art based on these embodiments are within the scope of the present disclosure.

[0035] The technical solutions provided by the embodiments of the present disclosure will be described in detail below with reference to the drawings.

[0036] Example One:

[0037] To solve the problems of low hardware resource utilization and poor computing efficiency caused by the method of adopting scalar serial and no instruction pipelining to generate only one result per round of calculation in the prior art, the present embodiment provides a floating-point data parallel computing method based on a vector processor (referred to as "parallel computing method" or "computing method" or "method" for short) for implementing FP64 format high-precision tangent function calculation. The method greatly improves the computing throughput through multiple optimization means such as vectorization and branch merging. As shown in FIG. 1, the method comprises the following steps: Figure 1

[0038] Step 102. Vectorize and perform parallel absolute value calculation on the input multiple floating-point data, and divide each data into different calculation intervals according to the calculated absolute value size.

[0039] The present embodiment utilizes the processor vector unit to simultaneously process multiple data (such as a 256-bit vector unit processing 4 FP64 data in parallel), thereby optimizing the traditional scalar loop unrolling into a single vector operation. The division of each data into different calculation intervals according to the calculated absolute value size is generated by a vector comparison instruction to generate all data interval masks at one time, laying the foundation for subsequent branch merging. In this way, the instruction overhead and resource idling caused by scalar serial processing are fundamentally eliminated, greatly improving the throughput in the data preprocessing stage.

[0040] ​The operations after step 102 further include a step of processing special values, such as Figure 2 as shown, specifically including:

[0041] Step 1031. Record the position index of the data belonging to the special value interval in the vector;

[0042] Step 1032. Before outputting the final calculation result, replace the calculation result corresponding to the position index with a preset special value result.

[0043] In this embodiment, before the main line calculation process, the abnormal values (such as NaN, Inf or maximum value, etc.) are quickly identified and the index positions are recorded through the vector comparison instruction, so that the subsequent calculation can focus on the normal value interval; after the main line calculation is completed, the preset result (such as NaN or a specific constant) is directly written into the corresponding position of the output vector according to the index. In this way, unnecessary performance loss and potential errors caused by abnormal values participating in complex fitting calculation can be avoided, which not only ensures the calculation efficiency but also enhances the robustness of the algorithm.

[0044] Step 104. For data located in different calculation intervals, the calculation branches of different intervals are merged, and a sign transformation variable is used to uniformly represent the branch difference, so that the corresponding fitting intermediate variables of each data are calculated in parallel by a unified vector operation instruction.

[0045] Among them, "using a sign transformation variable to uniformly represent the branch difference" refers to the interval selection logic (such as trans = 1 / -1) realized by a scalar conditional branch, which is converted into a vectorized mask control mechanism. The mask (one or more bit width) is generated by the interval division result in the early stage through the vector comparison instruction, and each bit corresponds to an interval belonging identifier of each data element, so as to realize the synchronous description of all data calculation paths at the hardware level, and lay a foundation for subsequent unified instruction stream processing. The sign transformation variable is a mask of one or more bit width, which is used to identify the original calculation branch to which each data element belongs.

[0046] As shown in Figure 3 , the operation of step 104 specifically includes:

[0047] Step 301. Based on the sign transformation variable, adjust a set of common fitting calculation parameters to simultaneously generate a fitting polynomial corresponding to each data element.

[0048] As shown in Figure 4 , the operation of "adjusting a set of common fitting calculation parameters" in step 301 includes:

[0049] Step 401. Calculate an interval identifier value for each data element in the vector according to the calculation interval.

[0050] Step 402. Map the interval identifier values ​​to a unified sign control factor, and the sign control factor constitutes the sign transformation variable.

[0051] Step 403. Use the sign control factor to selectively flip or set the signs of the coefficients in the common fitting formula to zero, so as to generate a fitting polynomial corresponding to the interval where each data element is located.

[0052] Step 302. Calculate the intermediate variables for fitting in parallel based on the fitting polynomial.

[0053] It should be understood that steps 301-302 are essentially the specific implementation of the "branch merging" scheme: selective adjustment of a set of common fitting parameters (such as polynomial coefficient vectors) is performed through mask control (step 301). Specifically, in steps 401-403, the interval identifiers are first mapped to sign control factors (such as converting interval numbers into coefficient sign bitmasks), and then the coefficient vectors are batch-flipped or set to zero through bit manipulation instructions, ultimately generating diverse fitting polynomial sets suitable for different intervals. This process integrates the fitting calculations that originally required multiple branches into a single vector operation flow (step 302). In this way, the risk of pipeline stalls caused by conditional jumps can be completely eliminated, allowing the vector operation unit to work continuously at full capacity, significantly improving parallel computing efficiency and hardware resource utilization.

[0054] Step 106. Based on the fitting, the preliminary results corresponding to each data are obtained by parallel calculation using intermediate variables, and the preliminary results are corrected according to the sign of the original input data to output the final calculation results in vector form.

[0055] It should be understood that step 106 first takes the intermediate variables (i.e., vectors representing the transformed values ​​such as R and RR) generated in the previous steps as input, and performs a unified rational polynomial calculation (such as a fitting formula in the form of x + r1 / r2) through a Single Instruction Multiple Data Stream (SIMD) architecture, thereby generating preliminary results (i.e., the absolute values ​​of the function values) for all data elements in the vector at once. Subsequently, the true y-value is solved according to the sign of the input value. Through vector XOR conditional selection instructions, the sign bits of the original input data are applied to the preliminary results in batches to achieve sign correction, and finally the correct vector form result is output.

[0056] Step 106, "Obtaining preliminary results for each data point through parallel computation using intermediate variables based on fitting," includes the following operations:

[0057] The fitting process uses intermediate variables as input, performs a rational polynomial calculation, and uses the result as a preliminary result.

[0058] In a preferred embodiment, the rational polynomial is calculated in the form T1 + T2 / (1.0 + T3 * T2), where T1, T2, and T3 are intermediate terms calculated based on the fitting intermediate variables. Other rational fraction forms, such as (A * R + B) / (C * RR + D), can also be used for calculation, where R and RR are the fitting intermediate variables. T1 + T2 / (1.0 + T3 * T2) is an optimized variation of the aforementioned "x + r1 / r2" fitting form, while (A * R + B) / (C * RR + D) reveals that the rational polynomial calculation can be directly constructed based on the fitting intermediate variables R and RR, demonstrating its flexibility.

[0059] As can be seen, this embodiment integrates the final calculation stage, which originally relied on multiple scalar branches, into a purely branchless vector operation process. By unifying the fitting formulas for different intervals through a single rational polynomial calculation structure, the compiler or hardware can generate extremely efficient and branchless vector instruction code (such as the continuous multiply-accumulate instruction FMA), completely eliminating the risk of branch prediction errors. Thus, while ensuring high computational accuracy, it maximizes the data parallel throughput capability of the vector processor.

[0060] It should be noted that the method in this embodiment is used to calculate transcendental functions. Through vectorized parallel processing, branch merging, and a unified sign control mechanism, it provides an efficient computational framework for various transcendental functions. Furthermore, this method is particularly suitable for high-precision calculation of the tangent function (tan(x)). In this application scenario, the division of the "computation interval" corresponds to the intervals related to the periodicity and symmetry of the tangent function (such as the modular arithmetic interval based on π / 2), while the "sign transformation variable" is used to uniformly handle the sign change rules of the function values ​​(such as the positive-to-negative reversal caused by quadrant switching). By abstracting the computational rules of the tangent function in different intervals into a unified fitting polynomial generation logic, the calculation of the tangent function, a transcendental function with complex periodicity and discontinuity, can be completely vectorized.

[0061] This embodiment, through a generalized parallel computing architecture, not only achieves efficient computation of the tangent function but also naturally adapts to other transcendental functions with similar piecewise characteristics (such as sine and cosine functions), demonstrating good scalability. For tangent function computation, interval preprocessing and sign control effectively avoid computational overflow issues at critical points (such as near π / 2). Simultaneously, while ensuring FP64 accuracy requirements, it fully leverages the high-speed parallel computing capabilities of the vector processor, significantly improving computational throughput and providing reliable performance support for scenarios requiring extensive transcendental function computations, such as scientific computing and graphics rendering.

[0062] In a specific embodiment, the implementation process of the vector processor-based floating-point data parallel computing method is as follows:

[0063] I. Interval Transformation and Intermediate Variable Generation (Combined) Figure 5 (Explanation)

[0064] 1. Read input X: Pack multiple double-precision floating-point numbers (FP64) into a vector for input.

[0065] 2. Calculate absolute value and divide intervals: Calculate the absolute value of each data point in parallel and divide it into different calculation intervals (such as normal interval, large value interval, and special value interval) according to the size of the absolute value.

[0066] 3. Calculate and store R, RECIP, and RR:

[0067] For normal intervals, the algorithm calculates and generates intermediate variables R (calculating the main part of the split) and RR (calculating the corrected part of the split). Simultaneously, RECIP (used to identify which π / 2 interval the input value falls into) is calculated.

[0068] 4. Record the position of special values: Identify and record the position index of special values ​​(such as NaN, Infinity, or maximum values) in the vector.

[0069] 5. Output: Cache the generated R, RR, RECIP and special value position indexes for use in subsequent stages.

[0070] The "Calculate and store R, RECIP, RR" function provides high-precision input for subsequent fitting calculations through precision decomposition (calculating R and RR), ensuring the accuracy of the final result from the source (solving the problem of low calculation precision). The "Record special value positions" function "screens out" special values ​​and records them, preventing them from entering subsequent complex calculation processes, avoiding unnecessary consumption of computing resources and potential calculation errors, and improving the overall efficiency and robustness of the calculation.

[0071] II. Fitting Preparation and Branch Merging (see reference) Figure 6 (As shown)

[0072] 1. Read input X, intermediate variables RR, R: Read the input and generated intermediate variables of the first stage.

[0073] 2. Calculate the intermediate variables TRANS, T1, and T2:

[0074] Based on intermediate variables such as RECIP, TRANS (sign transformation variable, a mask or control variable that uniformly represents the differences between different branches) is calculated. According to TRANS, through a unified process after branch merging, intermediate results T1 and T2 (corresponding to the numerator and denominator parts or other forms in the fitting formulas for different intervals) are calculated for fitting.

[0075] Among them, "computing intermediate variable TRANS" transforms the complex logic that originally required multiple if-else branches into a unified control variable (mask) that can be processed in parallel by vector instructions, thereby eliminating the pipeline stall caused by the failure of conditional branch prediction and enabling subsequent calculations to run continuously and saturated.

[0076] "Calculating intermediate variables T1 and T2" is performed under the control of TRANS. It uses unified vector instructions to generate the fitting parameters for all different intervals of data simultaneously, realizing a parallel computing mode of "multiple branches, one set of instructions", which greatly improves instruction-level parallelism (ILP) and the utilization rate of hardware computing units.

[0077] III. Result Synthesis and Output (Refer to) Figure 7 (As shown)

[0078] 1. Read TRANS, RR, R, T1, T2, X: Gather all intermediate variables and raw inputs from the first two stages.

[0079] 2. Calculate the preliminary result (i.e., the absolute value of Y): Based on intermediate variables (such as T1 and T2), perform the final rational polynomial calculation to obtain the preliminary result.

[0080] 3. Sign Correction: Based on the sign of the original input data X, perform batch sign correction on the preliminary results to obtain results with the correct sign.

[0081] 4. Special value replacement: Replace the data in the special value positions in the above results with preset special values ​​to form the final calculation result Y.

[0082] 5. Output the final calculation result Y: Output the final calculation result in vector form after correction and replacement.

[0083] The "preliminary result calculation" core computation is performed through a single branchless rational polynomial instruction stream, maximizing the utilization of vector operation units (such as FMA units) and computational throughput. "Sign correction" and "outlier replacement" are performed in batches using efficient vector bit operations (such as XOR) or conditional assignment instructions. This ensures the mathematical correctness of the results while also being highly parallelized, avoiding the reintroduction of performance bottlenecks and ensuring the overall pipeline efficiency.

[0084] It should be noted that this embodiment performs differentiated calculations based on the interval to which the absolute value of the input value X belongs. This interval includes one special value interval, two regular calculation intervals, and one large value interval. For the special value interval, there is no need to calculate the intermediate variables R, RR, and RECIP; for the other regular calculation intervals, the above three intermediate variables need to be calculated. To improve computational efficiency, this embodiment prioritizes the calculation of intermediate variables for the two regular intervals, while treating the large value interval as a special case and temporarily omitting it to save computational resources. Subsequently, the intermediate variables obtained from these two calculation branches are replaced and merged according to the interval identifier to form unified vector data for subsequent processing. The merged intermediate variables will be used together to calculate the absolute value of the preliminary result Y, and finally, based on the sign information of the original input value, the true function calculation result Y is solved and obtained.

[0085] The serial calculation principle of this embodiment is as follows:

[0086] 1. Interval Transformation and Fitting Framework: First, the input value X is mapped to a reduced interval (such as [-π / 4, π / 4] or [-0.68, 0.68]) through interval transformation. Then, the target function is approximated using a polynomial fitting method. This process is therefore divided into two main stages: interval transformation and function fitting.

[0087] 2. Output of Interval Transformation: The interval transformation stage generates three key intermediate variables: R, RR, and RECIP. Among them, R and RR jointly represent the transformed value. This decomposition strategy separates the original value into a dominant large value (R) and a compensating small value (RR), aiming to improve the calculation accuracy. RECIP is used to identify the periodic interval (e.g., which π / 2 interval) the input value X belongs to.

[0088] 3. Step-by-step calculations in the fitting stage (the function fitting stage is further divided into two sub-stages):

[0089] (1) The first stage calculates intermediate control variables and fitting parameters, including TRANS, T1 and T2. TRANS is the control variable obtained by integrating the differences in the signs of each branch, which is used to support subsequent parallel processing; T1 and T2 are fitting parameters, which are used to construct a rational approximate expression of the form "X+r1 / r2" in a specific interval, where X is T1 for this segment and r1 / r2 is T2 for this segment.

[0090] (2) The second stage calculates the final function value Y based on the results of the previous stage.

[0091] To achieve efficient computation, this embodiment employs branch merging techniques (such as...). Figure 8As shown in the diagram: Extract the common operations and differentiated parts (such as TRANS) from each computational branch, pre-calculate the differentiated parts and encapsulate them as vector control signals, and then uniformly perform the calculation of the common parts. In this way, the condition judgments and distributed calculations of multiple branches are merged into a single batch judgment and vector calculation, thereby significantly reducing instruction overhead and improving computational efficiency. Tests have shown that this method can bring several times the computational speed improvement (for example, when merging three branches, the performance improvement is about three times).

[0092] It should be understood that the vectorized operation involved in this embodiment is based on the transformation and optimization of the existing scalar calculation process by the vector operation unit, realizing the processing of X FP64 data in one complete operation process. Here, X is related to a specific processor. For example, if the bit width of the vector operation unit is 256 bits, then X = 256 / 64, that is, X is 4.

[0093] Branch merging combines low-precision computational branches from scalar operations into high-precision computational branches. Since each branch in vector operations needs to be executed in a single round of computation, merging branches can effectively reduce the number of instructions in a complete round of computation. It also allows for the reuse of independent but similar processes by replacing variables. Merging branches can effectively reduce the number of instructions in a complete round of computation.

[0094] Multi-stage pipelining utilizes multi-stage pipelining techniques to streamline tasks, thereby achieving parallel execution of all computational units at a macroscopic level. Compared to sequential scalar algorithms, the method in this embodiment distributes computational tasks evenly across multiple computational units, using vector computational units and multi-stage pipelining techniques to parallelize the tasks. Load balancing involves the computing platform having multiple computational units with the same purpose, evenly distributing computational tasks among each unit to achieve optimized multi-stage pipelining.

[0095] By segmenting tasks and utilizing data caching, the complete computation task is divided into multiple logically independent task segments, reducing inefficient data turnover. Specifically, this embodiment segments the task according to key intermediate variables, simplifying the pipeline code, improving computational efficiency, and reducing processing difficulty.

[0096] In the independent low-probability branch stage, computational branches with extremely low probability of occurrence are removed from the main pipeline, thereby significantly reducing the computational workload. Low-probability branches are more complex and are processed separately after data filtering. Compared to parallel algorithms that do not specifically handle multiple branches, this method processes low-probability branches independently, reduces the execution frequency of high-task-load branches, merges low-precision requirement intervals, and writes multiple pipeline code segments.

[0097] This embodiment is particularly suitable for high-precision (allowing only a few eps errors) fitting calculation of the tangent function y=tan(x) under the FP64 data format of a specific processor platform, where x is the input and y is the output.

[0098] Example Two:

[0099] like Figure 9 As shown, this embodiment provides a floating-point data parallel computing device 900 based on a vector processor, including a data preprocessing module 901, used to vectorize and perform parallel absolute value calculation on multiple input floating-point data, and divide each data into different calculation intervals according to the magnitude of the calculated absolute value; an intermediate variable calculation module 902, used to, for data located in different calculation intervals, merge the calculation branches of different intervals and use sign transformation variables to uniformly represent the differences of the branches, and use unified vector operation instructions to calculate the corresponding fitting intermediate variables for each data in parallel; a preliminary result synthesis module 903, used to calculate the preliminary results corresponding to each data in parallel based on the fitting intermediate variables; and an output module 904, used to correct the preliminary results according to the sign of the original input data, and output the final calculation results in vector form.

[0100] The device 900 in this embodiment completes data normalization and classification through the data preprocessing module 901, laying the foundation for subsequent parallel processing. Its vector absolute value calculation and interval partitioning functions directly improve the efficiency of data processing from the source. Through the intermediate variable calculation module 902, branch merging and sign transformation variable generation are performed, transforming the unavoidable conditional branches in traditional scalar algorithms into a regular data stream that can be processed by vector instructions. This eliminates processor pipeline stalls caused by failed conditional branch predictions, allowing the hardware computing unit to work continuously at full capacity, greatly improving throughput and resource utilization. The preliminary result synthesis module 903 performs efficient branchless fitting calculations, and finally, the output module 904 performs vector bit operations to efficiently complete sign correction and output the final result. Thus, through the collaborative work of each module, the device 900 in this embodiment solidifies algorithmic innovation into efficient hardware execution logic, significantly improving the performance and energy efficiency of complex function calculations.

[0101] It should be noted that the scheme or principle involved in the floating-point data parallel computing device based on vector processor in this embodiment is the same as the scheme or principle of the floating-point data parallel computing method based on vector processor, and the same or similar contents will not be described in detail.

[0102] Example Three:

[0103] This invention also provides a vector processor, comprising: one or more arithmetic units; a vector register group connected to the arithmetic units; and a memory storing instructions; wherein, when executed, the instructions configure the vector processor to perform the above-mentioned... Figures 1-7 The various processes of the vector processor-based floating-point data parallel computing method embodiment shown herein can achieve the same technical effect, and will not be described again here to avoid repetition.

[0104] Combination Figure 10 As shown, this embodiment also discloses a specific implementation of a computer-readable storage medium 1000. The computer-readable storage medium 1000 can be configured wholly or partially in a physical computer, server, cluster server, or data center.

[0105] In this embodiment, the computer-readable storage medium 1000 stores computer program instructions 1001. The computer program instructions 1001 are read and executed by a processor 1002 to perform the steps in the floating-point data parallel computing method based on a vector processor as disclosed in Embodiment 1.

[0106] Optionally, the computer-readable storage medium 1000 can be configured as a server, and the server runs on a physical device used to build a private cloud, hybrid cloud, or public cloud. The computer-readable storage medium 1000 can also be configured as random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0107] The computer-readable storage medium 1000 is used to store a program, and the processor 1002, upon receiving an execution instruction, executes the floating-point data parallel computing method based on a vector processor disclosed in Embodiment 1.

[0108] Meanwhile, the processor 1002 disclosed in this embodiment may be an integrated circuit chip with signal processing capabilities. The processor 1002 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor.

[0109] The technical solution of the same part in the computer-readable storage medium 1000 disclosed in this embodiment as in Embodiment 1 and / or Embodiment 2 is described in Embodiment 1 and / or Embodiment 2, and will not be repeated here.

[0110] The detailed descriptions listed above are merely specific descriptions of feasible embodiments of the present invention, and are not intended to limit the scope of protection of the present invention. All equivalent embodiments or modifications made without departing from the spirit of the present invention should be included within the scope of protection of the present invention.

[0111] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0112] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A floating-point data parallel computing method based on a vector processor, characterized in that, include: The system performs vectorization and parallel absolute value calculation on multiple input floating-point data, and divides each data into different calculation intervals based on the magnitude of the calculated absolute value. For data located in different calculation intervals, the calculation branches of different intervals are merged and the differences between the branches are uniformly represented by the sign transformation variables. The intermediate variables for fitting corresponding to each data are obtained by parallel calculation using a unified vector operation command. Based on the fitting, preliminary results corresponding to each data point are obtained through parallel calculation using intermediate variables. The preliminary results are then corrected according to the sign of the original input data to output the final calculation results in vector form.

2. The method according to claim 1, characterized in that, After dividing the data into different calculation intervals based on the calculated absolute values, the process also includes a step of handling special values: Record the position index in the vector of data whose absolute value belongs to a specific range; Before outputting the final calculation result, the calculation result corresponding to the position index is replaced with a preset special value result.

3. The method according to claim 1 or 2, characterized in that, The symbol transformation variable is a one- or multi-bit wide mask used to identify the original computation branch to which each data element belongs.

4. The method according to claim 1, characterized in that, The process involves merging computational branches from different intervals and using sign transformation variables to uniformly represent branch differences. Intermediate variables for fitting each data point are then calculated in parallel using unified vector operation instructions. These variables include: Based on the symbol transformation variables, a set of common fitting calculation parameters are adjusted to simultaneously generate fitting polynomials corresponding to the intervals where each data element is located. The intermediate variables used for fitting are calculated in parallel based on the fitting polynomial.

5. The method according to claim 4, characterized in that, The adjustment of a set of common fitting calculation parameters includes: Calculate an interval identifier value for each data element in the vector based on the calculation interval; The interval identifier values ​​are mapped to a unified sign control factor, and the sign control factor constitutes the sign transformation variable; The sign control factor is used to selectively flip or set the signs of the coefficients in the common fitting formula to zero, so as to generate a fitting polynomial corresponding to the interval where each data element is located.

6. The method according to claim 1, characterized in that, The preliminary results obtained by parallel calculation of intermediate variables based on the fitting include: The fitting is performed using intermediate variables as input, a rational polynomial is calculated, and the result is used as the preliminary result.

7. The method according to claim 1, characterized in that, The method described is used to calculate transcendental functions.

8. The method according to claim 7, characterized in that, The transcendental function is the tangent function.

9. A floating-point data parallel computing device based on a vector processor, characterized in that, include: The data preprocessing module is used to vectorize and perform parallel absolute value calculations on multiple input floating-point data, and divide each data into different calculation intervals according to the size of the calculated absolute value; The intermediate variable calculation module is used to calculate the fitting intermediate variables for each data point by merging the calculation branches of different intervals and using sign transformation variables to uniformly represent the differences between the branches, and using unified vector operation instructions to calculate them in parallel. The preliminary result synthesis module is used to calculate the preliminary results corresponding to each data in parallel based on the intermediate variables used for fitting. as well as, The output module is used to correct the preliminary results based on the sign of the original input data, so as to output the final calculation results in vector form.

10. A vector processor, comprising: One or more arithmetic units; The vector register group connected to the arithmetic unit; A memory storing instructions; wherein, when executed, the instructions configure the vector processor to perform the method as described in any one of claims 1 to 8.

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