A method of adjusting resources in a processor and related products

Abstract

The application discloses a method for adjusting resources in a processor and related products. The method comprises the following steps: obtaining a first feature of a first processing stage currently executed by a model, wherein the running of the model requires the use of resources on the processor, the model comprises a plurality of processing stages, and the plurality of processing stages comprise the first processing stage; determining a processing layer corresponding to the first processing stage based on the first feature; obtaining a resource configuration parameter matched with the processing layer, wherein the resource configuration parameter is used for adjusting the resource configuration in the processor; and sending a configuration instruction to the processor, wherein the configuration instruction comprises the resource configuration parameter, and the configuration instruction is used for instructing the processor to adjust the resources. The method avoids the resource waste or bottleneck problem caused by the traditional fixed resource configuration, improves the model inference efficiency, reduces the power consumption, enhances the adaptability and execution efficiency of the processor to the deep learning work load, and realizes the on-demand allocation of the computing resources and the performance maximization.

Description

Technical Field

[0001] This application relates to the field of data processing technology, and in particular to a method for adjusting resources in a processor and related products. Background Technology

[0002] With the widespread application of neural networks in edge computing, server inference, and hybrid heterogeneous platforms, the Central Processing Unit (CPU) is no longer just responsible for general control tasks; it is also used to execute key computational stages of some artificial intelligence models. For example, preprocessing, lightweight convolution, activation functions, and pooling operations in the initial stage of an artificial intelligence model are often performed in the CPU to reduce system complexity or switching overhead. However, traditional CPU microarchitecture designs generally adopt fixed-width pipeline structures, such as fixed issue width; and fixed-size structures such as reorder buffers (ROBs) and load-store queues (LSQs).

[0003] In the inference process of artificial intelligence models, the dependence on microstructure varies greatly at different stages. Convolutional layers (Conv) are computationally intensive and have intensive instruction scheduling; activation layers (such as Rectified Linear Units (ReLU) and Gaussian Error Linear Units (GELU)) have a high proportion of control instructions but low emission density; pooling layers are memory-access oriented and have low computational density; fully connected layers (FC) have bursty scheduling needs and are computationally intensive. Adopting a uniform structural configuration would lead to a waste of resources and power consumption in some stages. Summary of the Invention

[0004] To address the aforementioned issues, this application provides a method and related products for adjusting processor resources, with the aim of reducing the waste of processor resources and power consumption.

[0005] The embodiments of this application disclose the following technical solutions:

[0006] The first aspect of this application provides a method for adjusting resources in a processor, the method being applied to a controller, comprising:

[0007] Obtain the first feature of the first processing stage currently being executed by the model. The operation of the model requires the use of resources on the processor. The model includes multiple processing stages, including the first processing stage.

[0008] Based on the first feature, determine the processing layer corresponding to the first processing stage;

[0009] Obtain resource configuration parameters that match the processing layer. These resource configuration parameters are used to adjust the resource configuration in the processor. The resources include at least one of the following: Load or Store Queue (LSQ), Emit Width, and Reorder Buffer (ROB).

[0010] A configuration instruction is sent to the processor, the configuration instruction including the resource configuration parameters, the configuration instruction being used to instruct the processor to adjust the resources.

[0011] A second aspect of this application provides a method for adjusting resources in a processor, the method being applied to the processor, comprising:

[0012] The system receives configuration instructions sent by the controller; the configuration instructions include resource configuration parameters, which are obtained by the controller based on the processing layer corresponding to the currently executed first processing stage; the processing layer corresponding to the currently executed first processing stage is identified and determined by the controller based on the first feature of the currently executed first processing stage of the model; the operation of the model requires the use of resources on the processor;

[0013] Adjust resources based on the configuration instructions.

[0014] A third aspect of this application provides an apparatus for adjusting resources in a processor, the apparatus being applied to a controller, comprising:

[0015] The acquisition module is used to acquire the first feature of the first processing stage currently being executed by the model. The operation of the model requires the use of resources on the processor. The model includes multiple processing stages, including the first processing stage.

[0016] The identification module is used to determine the processing layer corresponding to the first processing stage based on the first feature.

[0017] The acquisition module is further configured to acquire resource configuration parameters that match the processing layer. The resource configuration parameters are used to adjust the resource configuration in the processor. The resources include at least one of the load or store queue (LSQ), transmit width, and reorder buffer (ROB).

[0018] A sending module is used to send configuration instructions to the processor. The configuration instructions include the resource configuration parameters and are used to instruct the processor to adjust the resources.

[0019] A fourth aspect of this application provides an apparatus for adjusting resources in a processor, the apparatus being applied to the processor and comprising:

[0020] A receiving module is used to receive configuration instructions sent by the controller; the configuration instructions include resource configuration parameters, which are obtained by the controller based on the processing layer corresponding to the currently executed first processing stage; the processing layer corresponding to the currently executed first processing stage is identified and determined by the controller based on the first feature of the currently executed first processing stage of the model; the operation of the model requires the use of resources on the processor;

[0021] The adjustment module is used to adjust resources based on the configuration instructions.

[0022] The fifth aspect of this application provides a computer device, including: a controller and a processor, wherein the controller executes the computer program to implement the method for adjusting resources in the processor provided in the first aspect;

[0023] The processor executes the computer program to implement the method for adjusting resources in the processor provided in the second aspect.

[0024] The sixth aspect of this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method for adjusting resources in a processor provided in the first or second aspect.

[0025] The seventh aspect of this application provides a computer program product, including a computer program that, when executed by a processor, implements the method for adjusting resources in the processor provided in the first or second aspect.

[0026] Compared with the prior art, this application has the following beneficial effects:

[0027] The method for adjusting resources in a processor provided in this application includes obtaining a first feature of a first processing stage currently being executed by a model, wherein the model requires resources on the processor to run, the model includes multiple processing stages, and the multiple processing stages include the first processing stage; determining a processing layer corresponding to the first processing stage based on the first feature; obtaining resource configuration parameters matching the processing layer, the resource configuration parameters being used to adjust resource configuration in the processor, the resources including at least one of a load or store queue (LSQ), a transmit width, and a reorder buffer (ROB); and sending a configuration instruction to the processor, the configuration instruction including the resource configuration parameters, the configuration instruction being used to instruct the processor to adjust the resources.

[0028] This application analyzes the first feature of the first processing stage currently being executed by the model to determine the processing layer corresponding to the first processing stage. Then, it obtains resource configuration parameters matching the processing layer, including Load or Store Queue (LSQ) configuration parameters, Emit Width configuration parameters, and Reorder Buffer (ROB) configuration parameters. Based on these resource configuration parameters, the allocation of key resources within the processor can be dynamically adjusted, thereby achieving fine-grained control of processor microarchitecture resources at runtime. Finally, by sending a configuration instruction containing the resource configuration parameters to the processor, dynamic reconfiguration of hardware resources is triggered, ensuring that the processor's resource allocation is highly matched to the actual needs of the currently executed first processing stage. This avoids resource waste or bottleneck problems caused by traditional fixed resource configuration, improves model inference efficiency while reducing power consumption, enhances the processor's adaptability and execution efficiency for deep learning workloads, and achieves on-demand allocation of computing resources and performance maximization. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 A flowchart illustrating a method for adjusting resources in a processor, as provided in an embodiment of this application;

[0031] Figure 2 A schematic diagram illustrating a method for adjusting resources in a processor, provided in an embodiment of this application;

[0032] Figure 3 A structural diagram of a device for adjusting resources in a processor applied to a controller, provided in an embodiment of this application;

[0033] Figure 4 This is a structural diagram of an apparatus for adjusting resources in a processor, provided in an embodiment of this application. Detailed Implementation

[0034] As described earlier, with the widespread application of neural networks in edge computing, server inference, and hybrid heterogeneous platforms, CPUs are no longer limited to general control tasks. They are increasingly taking on the execution of key computational stages in artificial intelligence models, such as preprocessing, lightweight convolutions, activation functions, and pooling operations, to reduce system overhead and hardware switching latency. However, traditional CPU microarchitectures typically employ fixed configurations, such as fixed instruction issue width, ROB capacity, and LSQ depth, making it difficult to adapt to the significant differences in AI workloads across different processing stages. Maintaining a uniform hardware resource configuration throughout the inference process will lead to resource redundancy and increased power consumption in some stages, while other stages will suffer from insufficient resources and limited performance.

[0035] In view of the above problems, this application provides a method and related products for adjusting processor resources. By using the first feature of the first processing stage currently being executed by the model, the processing layer (such as convolutional layer, activation layer, etc.) corresponding to the current processing stage is determined, and matching resource configuration parameters are obtained accordingly. By sending resource configuration instructions to the processor, the processor is guided to reconfigure the resources, realizing on-demand reconfiguration of runtime resources, matching hardware configuration with computing needs, breaking the limitations of fixed configuration of traditional CPU resources, and reducing processor resource and power consumption waste.

[0036] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0037] Figure 1 A flowchart illustrating a method for adjusting resources in a processor, as provided in this application embodiment, is shown below. Figure 1 As shown, a method for adjusting resources in a processor includes:

[0038] S101: The controller obtains the first feature of the first processing stage currently being executed by the model.

[0039] Since the primary characteristics exhibited by the model at different processing stages (such as the proportion of multiply-accumulate instructions, comparison instructions, and memory access instructions) differ significantly, these characteristics can serve as the basis for distinguishing typical processing layers such as convolutional layers, activation layers, pooling layers, and fully connected layers. Therefore, this application uses the primary characteristics of the first processing stage currently being executed by the model as the data basis for determining its corresponding processing layer. By extracting and analyzing this characteristic, fine-grained perception of the model's runtime behavior can be achieved.

[0040] Given that the core of this application lies in dynamically optimizing the configuration and allocation of microarchitectural resources within the processor, the model is deployed on the processor in practical applications to achieve real-time control of runtime resources. However, this deployment method does not mean that the model is limited to execution on the processor. In fact, the model can be deployed on various platforms, including general-purpose computers, edge devices, servers, or other computing devices. As long as the processor on which it depends has configurable microarchitectural resources and corresponding control interfaces, the resource allocation within the processor can be dynamically adjusted according to the characteristics of each processing stage during the model's execution.

[0041] In other words, this application focuses on the dynamic adaptation relationship between the model execution stage and the underlying processor resources, rather than the uniqueness of the model deployment platform. Regardless of the device on which the model runs, as long as the resource configuration parameters matching the first processing stage can be determined based on the first feature, fine-grained and adaptive control of the target processor resources can be achieved, thereby improving inference efficiency and system energy efficiency.

[0042] Typically, a model includes multiple processing stages, including the first processing stage. The processing layers corresponding to different processing stages usually differ. For example, the processing layer corresponding to the first processing stage may be a convolutional layer, while the processing layer corresponding to the second processing stage may be an activation layer or a pooling layer, reflecting the stage-wise changes in the computational pattern in the model. However, considering the diversity of model structures, such as the presence of residual connections, repeated modules, or composite layers, a processing stage may correspond to multiple sub-processing layers, or multiple processing stages may share the same type of processing layer (e.g., multiple consecutive activation layers or stacked convolutional blocks).

[0043] Therefore, this application does not mandate that "one processing stage must uniquely correspond to one processing layer," but rather allows for flexible mapping of processing stages to corresponding processing layers or combinations of layers based on actual execution behavior and resource requirements. This enhances the compatibility and robustness of the identification mechanism, enabling it to adapt to a wider range of network structures, including but not limited to serial, branching, or cyclic topologies, thereby ensuring the accuracy and effectiveness of resource allocation strategies in diverse model scenarios.

[0044] S102: The controller determines the processing layer corresponding to the first processing stage based on the first feature.

[0045] Because the first features differ between each processing stage, the processing layer corresponding to the first processing stage can be determined relatively accurately based on the first features. However, this application does not limit the specific method for determining the processing layer. For example, predefined rules or machine learning models can be used to identify which processing layer the current processing stage belongs to. If the first feature shows a large number of multiplication and accumulation operations and high-dimensional data access, it is likely to be in a convolutional layer. If the first feature mainly shows simple numerical comparison and selection operations, it may be an activation function layer (such as ReLU).

[0046] The processing layer corresponding to the first processing stage can be one processing layer or multiple processing layers; this embodiment does not limit this.

[0047] S103: The controller obtains resource configuration parameters that match the processing layer.

[0048] This application does not limit the specific method for obtaining resource configuration parameters. Regardless of the technical path used, as long as resource configuration parameters matching the processing layer can be obtained, and these parameters can be used to dynamically adjust the internal resources of the processor (i.e., the resource configuration parameters are used to adjust the resource configuration in the processor), it is acceptable. For example, a preset resource configuration library can be mapped and matched with the identified processing layer to obtain resource configuration parameters matching the processing layer; alternatively, a trained machine learning model can be used to predict resource configuration parameters matching the processing layer in real time based on the characteristics of the processing layer. All of the above methods are within the scope of protection of this application. The key is that the obtained resource configuration parameters should be able to effectively guide the processor to adapt its microarchitecture resources to meet the actual needs of different processing stages.

[0049] It should be noted that when the processing layer corresponding to the first processing stage includes multiple processing layers, the corresponding resource configuration parameters are obtained for each of these multiple processing layers.

[0050] Given that the processor's adjustable resources include at least one of the load or store queue (LSQ), issue width, and reorder buffer (ROB), the resource configuration parameters also include at least one of the corresponding LSQ configuration parameters, issue width configuration parameters, or reorder buffer (ROB) configuration parameters, thereby ensuring that the control of processor resources is both practically operable and hardware-executable.

[0051] S104: The controller sends a configuration command to the processor.

[0052] After determining the resource allocation parameters that match the processing layer, a configuration instruction can be sent to the processor. To ensure that the processor can adjust resources based on the configuration instruction, the configuration instruction in this application includes the resource configuration parameters, and the configuration instruction is used to instruct the processor to adjust the resources. As described in S103, the resource configuration parameters include at least one of the following: LSQ configuration parameters, transmit width configuration parameters, or ROB configuration parameters.

[0053] Considering that LSQs in processors typically employ a segmented architecture (e.g., a 2×32 structure), the LSQ configuration parameters in this application can cover multi-segment layouts and dynamic activation strategies based on gating mechanisms. For example, the LSQ can be divided into multiple independent segments (e.g., LSQ-A and LSQ-B), and the corresponding segments can be flexibly enabled based on the memory access behavior characteristics (e.g., memory access density) of the current processing stage to achieve dynamic adjustment of the load depth. In memory-intensive stages (e.g., pooling layers), all segments can be enabled to improve memory access parallelism, while in compute-intensive stages, some unnecessary segments can be disabled to reduce power consumption.

[0054] For the transmitter, considering that it typically supports a maximum of 8 transmits and is switched via a multiplexer (MUX) and an enable signal, the transmit width configuration parameter in this application can include precise control over the number of enabled transmits in the transmitter's Dispatch Width. That is, it dynamically adjusts the number of instructions that can be scheduled to the execution unit per cycle according to the instruction throughput requirements of the current execution stage of the model. For example, a wide transmit mode (e.g., 6–8 transmits) can be enabled during the high-parallel computation stage of GEMM to maximize the utilization of backend execution resources, while a narrow transmit mode (e.g., 2–4 transmits) can be switched during control flow intensive or computationally simple stages (e.g., ReLU) to reduce redundant resource consumption.

[0055] For a Recurrent Block (ROB), it is typically divided into multiple independent banks (e.g., A: 0–31, B: 32–63, C: 64–95), and supports independent activation on demand. Therefore, the ROB configuration parameters in this application can include activation instructions for each bank segment. By identifying the out-of-order execution requirements of the current stage, the corresponding number of banks can be dynamically activated. Unused banks can enter a low-power state through clock gating. For example, all banks (A+B+C) can be activated during the high-schedule-pressure computation phase, while only Bank A can be kept running during the lightweight activation phase, and the rest can enter sleep mode.

[0056] Furthermore, if other structures in the processor also support controlling resource activity through clock gating or valid-bit gating mechanisms, the resource configuration parameters can be extended to include timing control of various structures during switching processes, resource freezing and wake-up timing, etc., thereby achieving refined, full-cycle dynamic management of processor microarchitecture resources, ensuring that resource configuration is highly matched with the actual needs of the model execution stage, and effectively optimizing energy efficiency while improving performance.

[0057] This application dynamically adjusts the configuration of key pipeline resources within the CPU core by identifying the computational characteristics of different processing stages. These resources include issue width, ROB capacity, and LSQ depth. Based on the workload characteristics of different stages, such as the high parallel computing requirements of convolutional layers, the low issue density of activation layers, or the memory-intensive mode of pooling layers, the CPU resource configuration is adjusted as needed. This ensures performance targets at each stage while avoiding resource idleness and power waste caused by fixed or over-configuration. Through fine-grained runtime resource adaptation, efficient utilization of processor microarchitecture resources is achieved, significantly reducing energy consumption while improving model inference efficiency, thereby enhancing the adaptability and overall energy efficiency of general-purpose CPUs under artificial intelligence workloads.

[0058] The above describes the main technical solution of this application. Further implementations of the main technical solution are now introduced. Details are as follows:

[0059] Regarding the S102 controller determining the processing layer corresponding to the first processing stage based on the first feature, this application provides an optional embodiment:

[0060] The first feature is input into the classifier, and the processing layer corresponding to the first processing stage output by the classifier is obtained.

[0061] By inputting a first feature into a classifier and obtaining the processing layer corresponding to the first processing stage output by the classifier, intelligent and automated identification of the model execution stage can be achieved. The first feature includes at least one of the following: the proportion of multiply-accumulate instructions, the proportion of comparison instructions, and the proportion of memory access instructions. These features effectively characterize the differences in resource usage patterns of different processing layers (such as convolutional layers, fully connected layers, activation function layers, and pooling layers) during execution. The classifier can be a pre-trained machine learning model, such as a lightweight decision tree, support vector machine (SVM), k-nearest neighbors (KNN), or a small neural network, or it can be a rule-based logical judgment module (such as a state machine or pattern matching table).

[0062] In a specific embodiment, a low-overhead classification engine can be integrated on the processor. This engine receives the first feature and completes the processing layer determination within several clock cycles. For example, the network layers of the model sequentially include convolutional layers, activation layers, pooling layers, and fully connected layers. Each layer exhibits significantly different underlying execution characteristics during execution, which can serve as the basis for the classifier to perform accurate identification.

[0063] Specifically, convolutional layers primarily employ a large number of multiply-accumulate (MAC) instructions, exhibiting high instruction parallelism and loop density. Their compiled code is typically concentrated within a specific loop (e.g., Loop 1) and mapped to a fixed program address space (e.g., PC range 0x1000–0x10FF), forming recognizable static and dynamic behavior patterns. Activation layers (e.g., ReLU, GELU) mainly consist of conditional judgments and element-wise comparison operations, characterized by a high proportion of comparison instructions (CMP), dense control flow, but low computational intensity. Their code logic is usually encapsulated in independent loop structures (e.g., Loop 2) and located within a specific PC range (e.g., 0x1100–0x11FF).

[0064] Pooling layers are characterized by frequent memory loading and storage operations, with memory access instructions (LD / ST) accounting for a significantly higher proportion than computation instructions. Data access patterns exhibit regular jumps or sliding window characteristics, corresponding to independent code blocks (such as Loop 3) and PC address ranges (such as 0x1200–0x12FF). Fully connected layers, on the other hand, require both high-density MAC operations and large-scale data transfer, resulting in a high proportion of both MAC and memory access instructions. They often correspond to large weight matrix processing logic, with execution concentrated in specific loops (such as Loop 4) and PC regions (such as 0x1300–0x13FF). Based on these differences, the specific classification process of the classifier can be refined as follows:

[0065] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to a first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer. If the proportion of comparison instructions in the first feature is greater than or equal to a second preset threshold, then the processing layer corresponding to the first processing stage is determined to be an activation layer. If the proportion of memory access instructions in the first feature is greater than or equal to a third preset threshold, then the processing layer corresponding to the first processing stage is determined to be a pooling layer. If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to a fourth preset threshold and the proportion of memory access instructions is greater than or equal to a fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

[0066] Compared to methods that rely on fixed configurations or software labeling, classifier-based recognition mechanisms have stronger versatility and adaptability, and can be applied to different model structures (such as ResNet, MobileNet, and Transformer) without reprogramming or manual labeling. Secondly, classifiers can make decisions in real time at runtime, supporting fine-grained stage switching awareness, which significantly improves the timeliness and accuracy of resource adjustments. Thirdly, by entrusting complex pattern recognition tasks to classifiers, the design complexity of control logic is simplified, making it easier to deploy on resource-constrained edge devices.

[0067] The above describes in detail the method for determining the processing layers. During the actual execution of the model, its runtime behavior exhibits significant "structural jump" characteristics, with identifiable start and end boundaries between different processing layers. For example, computationally intensive stages such as convolutional layers, fully connected layers, or matrix multiplication (GEMM) typically consist of large-scale nested loops (e.g., for-loops), whose execution patterns are highly regular, and the loop count tends to be stable and predictable. Through offline analysis or runtime learning, the system can obtain the total number of iterations or exit points of typical loops in each layer. Therefore, when the execution count of the current loop approaches the exit point in the historical record, it can be inferred that the processing stage is about to end and the next stage is about to begin. Based on this observation, this application provides an optional embodiment:

[0068] If the first feature of the first processing stage meets the preset conditions, then the resource configuration parameters that match the processing layer corresponding to the second processing stage are obtained. The second processing stage is the next processing stage after the first processing stage.

[0069] A preparatory instruction is sent to the processor. The preparatory instruction includes resource configuration parameters that match the processing layer corresponding to the second processing stage. The preparatory instruction is used to instruct the processor to adjust the resources.

[0070] In practice, a configuration command is typically sent to the processor first, triggering it to adjust its internal microarchitecture resources (such as issue width, ROB Bank, LSQ segmentation, etc.). After the processor completes the resource configuration adjustment, the controller continues to monitor the running status of the first processing stage, collecting and analyzing its primary characteristics in real time, including instruction mixing ratio, loop count, and program counter (PC) hash value. Only when these primary characteristics meet preset conditions will the controller determine that the current stage is about to end and generate preparatory instructions for the next stage.

[0071] This application does not limit the specific form of the preset conditions. Its core lies in utilizing the differences in the first characteristics exhibited by different processing stages during runtime to identify the processing layer corresponding to the second processing stage, and thereby determine the resource configuration parameters matching that processing layer. This provides necessary preparatory data for the dynamic conversion of processor microarchitecture resources. In specific implementation, by continuously monitoring key characteristics in the instruction stream, including the proportion of instruction types, the number of loops, and the hash value of the program counter (PC), combined with the context execution state, accurate determination of stage jumps is achieved.

[0072] For example, if the processing layer in the first processing stage is a convolutional layer and the processing layer in the second processing stage is an activation layer, considering that CMP is often used in ReLU (activation function layer), conditional judgment, Pooling, etc., a high proportion of CMP indicates that the current stage may be a precursor to structural transformation, such as entering ReLU or Pooling after convolution. Therefore, the preset conditions include: the first value is less than the sixth preset threshold and the proportion of comparison instructions is greater than or equal to at least one of the seventh preset threshold; the first value is calculated based on the hash value of the loop count and the corresponding count value of the program counter; the seventh preset threshold is less than the second preset threshold; the first feature also includes the hash value of the loop count and the corresponding count value of the program counter.

[0073] The seventh preset threshold is used to identify control flow-intensive behaviors, and its value is less than the second preset threshold used for convolutional layer identification, so as to reflect the distinguishability of instruction patterns between different layers. The first value is used to reflect the probability of the current code block execution ending, and the first value can be the absolute value of the difference between the loop count and the hash value of the corresponding count value of the program counter.

[0074] In practical applications, the number of loops is usually preset based on the actual application scenario. For example, the expected total number of loops for a certain convolutional layer is set to 250 to represent the complete execution range of this processing stage. At the same time, the program counter will periodically enter the key position of the loop body during the operation, and its corresponding count value is used to dynamically record the number of loops that have been executed. For example, when 230 loops have been completed, the relevant counting mechanism will record 230.

[0075] However, due to the diversity of program counter counting methods under different processor architectures or compilation strategies (such as differences in counting granularity, address offset, and jump encoding), directly comparing the original loop count with the PC count may lead to matching errors. To enhance the robustness and platform adaptability of the judgment, the first value defined in this application is the absolute value of the difference between the loop count and the hash value of the corresponding program counter count. That is, the hash value corresponding to the program counter is first hashed, then the difference between the hash value and the loop count is calculated, and the absolute value is taken.

[0076] By introducing a hashing mechanism, interference caused by differences in hardware implementation or inconsistent address encoding is effectively reduced, improving feature consistency across platforms and architectures. When the first value approaches zero or falls below a set threshold, it can be determined that the current processing stage is nearing completion and the next stage is about to begin.

[0077] If the processing layer in the first processing stage is the activation layer, and the processing layer in the second processing stage is the pooling layer, the preset conditions include: a first value being less than an eighth preset threshold and the proportion of memory access instructions being greater than or equal to a ninth preset threshold, wherein the ninth preset threshold is less than a third preset threshold. The ninth preset threshold is less than the third preset threshold used for activation layer identification to ensure accurate triggering of stage switching when memory access behavior is significantly enhanced.

[0078] If the processing layer in the first processing stage is a pooling layer and the processing layer in the second processing stage is a fully connected layer, considering that MAC (multiply-accumulate) instructions are mostly used in high computational density stages such as Conv, FC, and matrix operations, it indicates that the current model is in a computationally intensive stage. Therefore, the preset conditions include: the first value is less than the tenth preset threshold, the proportion of multiply-accumulate instructions is greater than or equal to the eleventh preset threshold, and the proportion of memory access instructions is greater than or equal to the twelfth preset threshold, at least one of the following: the eleventh preset threshold is less than the fourth preset threshold; the twelfth preset threshold is less than the fifth preset threshold; wherein, the eleventh preset threshold is less than the fourth preset threshold used for convolutional layer identification, and the twelfth preset threshold is less than the fifth preset threshold used for pooling layer identification, in order to adapt to the requirement that the fully connected layer has both high computational and high memory access characteristics.

[0079] If the processing layer in the first processing stage is a fully connected layer, and the processing layer in the second processing stage is a convolutional layer, the preset conditions include: a first value being less than the thirteenth preset threshold and the proportion of multiply-accumulate instructions being greater than or equal to the fourteenth preset threshold; and a fourth preset threshold being less than the fourteenth preset threshold being less than the first preset threshold. The fourteenth preset threshold is between the fourth and first preset thresholds, meaning it satisfies both conditions: the fourth preset threshold is less than the fourteenth preset threshold and the fourteenth preset threshold is less than the first preset threshold. This ensures that during the model's iterative execution, the re-entry of the convolutional layer can be accurately identified and distinguished from other high MAC load stages.

[0080] While relying solely on loop counts can effectively predict the execution progress of the current loop and determine whether it is nearing its end, it cannot determine the type of subsequent stages. Similarly, relying solely on the statistical characteristics of the proportion of MAC and CMP instructions can distinguish between computationally intensive (e.g., convolutional layers) and control-intensive (e.g., activation layers) stages, but it is difficult to accurately perceive the timing of stage switching. Therefore, relying on a single feature or conditional judgment has significant limitations and cannot support high-precision, low-latency dynamic resource allocation.

[0081] This application achieves joint perception and prediction of processing stages by integrating multi-dimensional information such as program counter (PC) hash matching, loop counter status, and the proportion of instruction types like MAC / CMP. Specifically, the loop counter provides a "time" or "execution location" dimension judgment, reflecting whether the current stage is nearing its end; the MAC / CMP instruction proportion provides a "type" or "behavioral pattern" dimension judgment, used to identify the computational characteristics of the current and subsequent stages; and PC hash matching provides auxiliary verification at the "structure" level, confirming the start or jump boundary of a specific layer by identifying known function entry points or code block address ranges. The synergistic effect of these three factors not only determines that "the loop is about to end," but also accurately infers "what type of next stage will be entered after the loop ends."

[0082] For example, when the count of a loop is detected to be approaching its historical exit point, and the PC hash value enters the tail region (e.g., 0x10F0–0x10FF), and the CMP ratio significantly increases while the MAC ratio decreases in the subsequent instruction stream, it can be determined in advance that the processor is about to switch from the convolutional layer to the activation layer. This allows for early triggering of processor pipeline reconfiguration operations before the current stage ends, such as dynamically reducing the issue width from 8 channels to 2–4 channels, disabling some ROB banks, and reducing the LSQ depth, achieving a smooth transition from high-parallel computing mode to low-power control mode. This multi-dimensional feature fusion mechanism significantly improves the accuracy and foresight of stage identification, avoiding resource misallocation problems caused by fluctuations or misjudgments of a single indicator.

[0083] Regarding the S103 controller acquiring resource configuration parameters that match the processing layer, this application provides an optional embodiment:

[0084] The processing layer is matched with the resource configuration library to obtain the resource configuration parameters that match the processing layer.

[0085] This embodiment achieves dynamic adjustment of critical microarchitectural resources within the processor by matching the identified processing layer with a resource configuration library to obtain the resource configuration parameters corresponding to that processing layer. The resource configuration library stores the mapping relationship between processing layers and resource configuration parameters; its specific implementation is not limited, as long as it contains corresponding entries for processing layer types and their compatible resource configuration parameters.

[0086] Table 1 Resource Allocation Library

[0087]

[0088] As shown in Table 1, the resource configuration library sets the emission width to 6, ROB to enable Bank A+B+C, and LSQ to enable LSQ A for convolutional layers to meet their high parallel computing, high out-of-order depth, and medium memory access requirements. For activation layers (such as ReLU), the configuration parameters are set to emission width to 2, ROB to enable Bank A, and LSQ to enable LSQ A to adapt to their characteristics of dense control flow, lightweight computation, and strong memory access locality, thereby reducing power consumption by reducing the resource scale.

[0089] This resource configuration library can be pre-built through offline performance analysis, simulation modeling, or experimental optimization, and embedded in the system firmware or runtime library. It can also be dynamically updated to adapt to new network structures or hardware platforms. Since this application does not limit the specific organization of the resource configuration library (such as hash tables, lookup tables, tree structures, etc.) or its deployment location (such as on-chip storage, cache, microcode ROM, etc.), it possesses good versatility and portability. As long as the basic mapping logic of "processing layer → resource configuration parameters" is satisfied, any implementation falls within the protection scope of this application. Through this mechanism, after identifying the current execution stage, the optimal configuration can be quickly retrieved from the table, achieving low-latency, high-reliability resource reconfiguration, providing the processor with refined, on-demand microarchitecture support for AI inference tasks.

[0090] In practical applications, when a processor performs dynamic resource adjustments, issues such as inconsistencies in execution, data hazards, or control flow anomalies may occur due to the asynchrony between configuration changes and the instruction pipeline state. For example, during issue width switching or ROB structure reorganization, if the instructions from the previous stage have not yet been committed while the new configuration has taken effect, resource conflicts or state inconsistencies may arise. To ensure the security and system stability of microarchitecture refactoring, this application provides an optional embodiment: while sending configuration instructions to the processor, the configuration instructions are also used to instruct the processor to perform corresponding resource configuration protection processing to ensure the atomicity and consistency of the resource switching process.

[0091] Resource configuration protection processing includes at least one of two operations: bubble insertion and flushing. Bubble insertion involves inserting idle cycles or invalid operations at critical nodes in the pipeline (such as after decoding or before scheduling) to block subsequent instructions from flowing into the currently refactoring execution unit, thus reserving a safe window for resource configuration switching. This method is suitable for lightweight adjustment scenarios, minimizing performance loss while ensuring correctness. Flushing, on the other hand, involves clearing uncommitted instructions from the pipeline, especially those pending execution entries in the reorder buffer (ROB), issue queue, or load / store queue, ensuring that all execution states related to the old configuration are completely cleared before enabling the new resource configuration. This method is suitable for large-scale cross-mode refactoring (such as switching from wide issue to narrow issue) and can completely avoid interference from residual states.

[0092] In practical implementation, after detecting the stage switching boundary and generating configuration instructions, a flushing or bubble insertion mechanism can be triggered first. New resource configuration parameters can then be activated once the pipeline reaches a stable state. For example, when switching from a convolutional layer to an activation layer, the ROB and launch queue are flushed first, redundant ROB banks are closed, the launch width is reduced, and bubbles for 1-2 cycles are inserted into the pipeline to prevent highly parallel instructions from entering narrow launch paths. Through these protection mechanisms, the risks of instruction execution errors, data inconsistencies, or deadlocks caused by sudden changes in resource configuration are effectively avoided, improving the reliability of dynamic reconfiguration. This application integrates resource protection semantics into configuration instructions, achieving coordinated control between hardware resource adjustment and program execution flow. This not only enhances the robustness of the system but also provides a guarantee for the safe and efficient operation under complex AI workloads.

[0093] This application achieves precise perception of the processing layer corresponding to the model processing stage by comprehensively analyzing the behavioral characteristics of the model processing stage. Specifically, it utilizes multi-dimensional features such as the address range where the program counter (PC) is located, the proportion distribution of various instructions (such as MAC, CMP, LD / ST), and the execution progress of the loop counter to identify the current processing layer, such as a convolutional layer, activation layer, pooling layer, or fully connected layer, thereby establishing a fine-grained judgment capability for stage boundaries. Based on this, key components in the processor microarchitecture are designed as reconfigurable structural modules. The reorder buffer (ROB) is divided into multiple independent banks (such as A, B, C), the load / store queue (LSQ) adopts a segmented structure (such as LSQ-A / LSQ-B), the transmitter supports dynamic switching of multiple transmit widths, and each module achieves on-demand activation and power consumption control through clock gating or segment enable signals.

[0094] To coordinate runtime changes in resource configuration, a dynamic switching controller is integrated. This controller, based on a lightweight finite state machine (FSM) or a preset configuration lookup table, generates corresponding resource configuration parameters upon detecting a stage transition, triggering a rapid hardware architecture switch. To ensure execution consistency during resource refactoring and avoid instruction flow chaos or state conflicts caused by configuration changes, this application also introduces a cross-stage switching protection mechanism. At stage boundaries, pipeline flushing or bubble insertion operations are automatically performed to clear residual execution states and block the inflow of new instructions, ensuring the safety and stability of the refactoring process.

[0095] Further optimizations are made based on the typical characteristics of AI workloads. For example, in memory-intensive stages such as pooling layers, all LSQ segments are activated to improve memory parallelism; in convolutional layers, wide issue mode and a full ROB bank are enabled to support high-throughput out-of-order execution; and in control-flow-intensive activation layers, issue width is reduced and unnecessary resources are disabled to save power. This achieves closed-loop control from program behavior awareness to hardware structure response, significantly improving processor resource utilization and energy efficiency during model processing.

[0096] Figure 2 A schematic diagram illustrating a method for adjusting resources in a processor, as provided in an embodiment of this application, is shown below. Figure 2 As shown, a method for adjusting resources in a processor includes:

[0097] S201: The processor receives configuration instructions sent by the controller.

[0098] The configuration instructions include resource configuration parameters, which are obtained by the controller based on the processing layer corresponding to the currently executed first processing stage. The processing layer corresponding to the currently executed first processing stage is identified and determined by the controller based on the first feature of the currently executed first processing stage of the model. The operation of the model requires the use of resources on the processor.

[0099] S202: The processor adjusts resources based on the configuration instructions.

[0100] As an optional embodiment, the process for determining the processing layer corresponding to the currently executed first processing stage includes:

[0101] After the controller obtains the first feature, it inputs the first feature into the classifier and obtains the processing layer corresponding to the first processing stage currently being executed, as output by the classifier.

[0102] As an optional embodiment, the network layers of the model sequentially include convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature includes at least one of the following: the proportion of multiply-accumulate instructions, the proportion of compare instructions, and the proportion of memory access instructions. The classification process of the classifier includes:

[0103] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer.

[0104] If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer.

[0105] If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be the pooling layer.

[0106] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

[0107] As an optional embodiment, the method further includes:

[0108] The processor receives preparatory instructions sent by the controller.

[0109] The processor adjusts resources based on preparatory instructions.

[0110] The preparatory instruction includes resource configuration parameters that match the processing layer corresponding to the second processing stage. The preparatory instruction is used to instruct the processor to adjust the resources. The resource configuration parameters that match the processing layer corresponding to the second processing stage are obtained by the controller when it determines that the first feature of the currently executed first processing stage meets the preset conditions. The second processing stage is the next processing stage after the first processing stage.

[0111] As an optional embodiment, if the processing layer of the first processing stage is a convolutional layer and the processing layer corresponding to the second processing stage is an activation layer, the preset conditions include: at least one of the following: a first value is less than a sixth preset threshold and the proportion of comparison instructions is greater than or equal to a seventh preset threshold; the first value is calculated based on the hash value of the loop count and the corresponding count value of the program counter; the seventh preset threshold is less than a second preset threshold; the first feature also includes the hash value of the loop count and the corresponding count value of the program counter.

[0112] If the processing layer in the first processing stage is the activation layer, and the processing layer in the second processing stage is the pooling layer, the preset conditions include: the first value is less than the eighth preset threshold and the proportion of memory access instructions is greater than or equal to the ninth preset threshold, and the ninth preset threshold is less than the third preset threshold.

[0113] If the processing layer in the first processing stage is a pooling layer, and the processing layer corresponding to the second processing stage is a fully connected layer, the preset conditions include: the first value is less than the tenth preset threshold, the proportion of multiply-accumulate instructions is greater than or equal to the eleventh preset threshold, and the proportion of memory access instructions is greater than or equal to the twelfth preset threshold; the eleventh preset threshold is less than the fourth preset threshold; and the twelfth preset threshold is less than the fifth preset threshold.

[0114] If the processing layer in the first processing stage is a fully connected layer, and the processing layer in the second processing stage is a convolutional layer, the preset conditions include: the first value is less than the thirteenth preset threshold and the proportion of multiply-accumulate instructions is greater than or equal to the fourteenth preset threshold; the fourth preset threshold is less than the fourteenth preset threshold and less than the first preset threshold.

[0115] As an optional embodiment, the process of obtaining resource configuration parameters includes:

[0116] After the controller determines the processing layer, it matches the processing layer with the resource configuration library to obtain the resource configuration parameters that match the processing layer. The resource configuration library includes the correspondence between the processing layer and the resource configuration parameters.

[0117] As an optional embodiment, the method further includes:

[0118] Upon receiving a configuration instruction, the processor performs resource configuration protection processing, which includes at least one of a bubble insertion operation and a flushing operation.

[0119] Based on the method for adjusting processor resources provided in the foregoing embodiments, this application also provides a corresponding apparatus for adjusting processor resources in a controller. For example... Figure 3 As shown, Figure 3 A structural diagram of an apparatus for adjusting resources in a processor applied to a controller, provided in an embodiment of this application, includes:

[0120] The acquisition module is used to acquire the first feature of the first processing stage currently being executed by the model. The model requires resources on the processor to run. The model includes multiple processing stages, including the first processing stage.

[0121] The identification module is used to determine the processing layer corresponding to the first processing stage based on the first feature.

[0122] The acquisition module is also used to acquire resource configuration parameters that match the processing layer. These resource configuration parameters are used to adjust the resource configuration in the processor. The resources include at least one of the load or store queue (LSQ), the transmit width, and the reorder buffer (ROB).

[0123] The sending module is used to send configuration instructions to the processor. The configuration instructions include resource configuration parameters and are used to instruct the processor to adjust the resources.

[0124] As an optional embodiment, the recognition module is specifically used to input the first feature into the classifier and obtain the processing layer corresponding to the first processing stage output by the classifier.

[0125] As an optional embodiment, the network layers of the model sequentially include convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature includes at least one of the following: the proportion of multiply-accumulate instructions, the proportion of compare instructions, and the proportion of memory access instructions. The classification process of the classifier includes:

[0126] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer.

[0127] If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer.

[0128] If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be the pooling layer.

[0129] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

[0130] As an optional embodiment, the acquisition module is further configured to acquire resource configuration parameters that match the processing layer corresponding to the second processing stage if the first feature of the first processing stage meets the preset conditions, wherein the second processing stage is the next processing stage after the first processing stage.

[0131] The sending module is also used to send a preparatory instruction, which includes resource configuration parameters that match the processing layer corresponding to the second processing stage. The preparatory instruction is used to instruct the processor to adjust the resources.

[0132] As an optional embodiment, if the processing layer of the first processing stage is a convolutional layer and the processing layer corresponding to the second processing stage is an activation layer, the preset conditions include: at least one of the following: a first value is less than a sixth preset threshold and the proportion of comparison instructions is greater than or equal to a seventh preset threshold; the first value is calculated based on the hash value of the loop count and the corresponding count value of the program counter; the seventh preset threshold is less than a second preset threshold; the first feature also includes the hash value of the loop count and the corresponding count value of the program counter.

[0133] If the processing layer in the first processing stage is the activation layer, and the processing layer in the second processing stage is the pooling layer, the preset conditions include: the first value is less than the eighth preset threshold and the proportion of memory access instructions is greater than or equal to the ninth preset threshold, and the ninth preset threshold is less than the third preset threshold.

[0134] If the processing layer in the first processing stage is a pooling layer, and the processing layer corresponding to the second processing stage is a fully connected layer, the preset conditions include: the first value is less than the tenth preset threshold, the proportion of multiply-accumulate instructions is greater than or equal to the eleventh preset threshold, and the proportion of memory access instructions is greater than or equal to the twelfth preset threshold; the eleventh preset threshold is less than the fourth preset threshold; and the twelfth preset threshold is less than the fifth preset threshold.

[0135] If the processing layer in the first processing stage is a fully connected layer, and the processing layer in the second processing stage is a convolutional layer, the preset conditions include: the first value is less than the thirteenth preset threshold and the proportion of multiply-accumulate instructions is greater than or equal to the fourteenth preset threshold; the fourth preset threshold is less than the fourteenth preset threshold and less than the first preset threshold.

[0136] As an optional embodiment, the acquisition module is specifically used to match the processing layer with the resource configuration library and acquire the resource configuration parameters that match the processing layer. The resource configuration library includes the correspondence between the processing layer and the resource configuration parameters.

[0137] As an optional embodiment, the configuration instructions are also used to instruct the processor to perform resource configuration protection processing, which includes at least one of a bubble insertion operation and a flushing operation.

[0138] Based on the method for adjusting processor resources provided in the foregoing embodiments, this application also provides a corresponding apparatus for adjusting processor resources. For example... Figure 4 As shown, Figure 4 A structural diagram of an apparatus for adjusting resources in a processor, provided in an embodiment of this application, includes:

[0139] The receiving module is used to receive configuration commands sent by the controller.

[0140] The configuration instructions include resource configuration parameters, which are obtained by the controller based on the processing layer corresponding to the currently executed first processing stage. The processing layer corresponding to the currently executed first processing stage is identified and determined by the controller based on the first feature of the currently executed first processing stage of the model. The operation of the model requires the use of resources on the processor.

[0141] The adjustment module is used to adjust resources based on the configuration instructions.

[0142] As an optional embodiment, the process for determining the processing layer corresponding to the currently executed first processing stage includes:

[0143] After the controller obtains the first feature, it inputs the first feature into the classifier and obtains the processing layer corresponding to the first processing stage currently being executed, as output by the classifier.

[0144] As an optional embodiment, the network layers of the model sequentially include convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature includes at least one of the following: the proportion of multiply-accumulate instructions, the proportion of compare instructions, and the proportion of memory access instructions. The classification process of the classifier includes:

[0145] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer.

[0146] If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer.

[0147] If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be the pooling layer.

[0148] If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

[0149] As an optional embodiment, the receiving module is also used to receive preparatory instructions sent by the controller.

[0150] The preparatory instruction includes resource configuration parameters that match the processing layer corresponding to the second processing stage. These resource configuration parameters are obtained by the controller when it determines that the first feature of the currently executed first processing stage meets a preset condition. The preparatory instruction is used to instruct the processor to adjust the resources. The second processing stage is the next processing stage after the first processing stage.

[0151] The adjustment module is used to adjust resources based on pre-defined instructions.

[0152] As an optional embodiment, if the processing layer of the first processing stage is a convolutional layer and the processing layer corresponding to the second processing stage is an activation layer, the preset conditions include: at least one of the following: a first value is less than a sixth preset threshold and the proportion of comparison instructions is greater than or equal to a seventh preset threshold; the first value is calculated based on the hash value of the loop count and the corresponding count value of the program counter; the seventh preset threshold is less than a second preset threshold; the first feature also includes the hash value of the loop count and the corresponding count value of the program counter.

[0153] If the processing layer in the first processing stage is the activation layer, and the processing layer in the second processing stage is the pooling layer, the preset conditions include: the first value is less than the eighth preset threshold and the proportion of memory access instructions is greater than or equal to the ninth preset threshold, and the ninth preset threshold is less than the third preset threshold.

[0154] If the processing layer in the first processing stage is a pooling layer, and the processing layer corresponding to the second processing stage is a fully connected layer, the preset conditions include: the first value is less than the tenth preset threshold, the proportion of multiply-accumulate instructions is greater than or equal to the eleventh preset threshold, and the proportion of memory access instructions is greater than or equal to the twelfth preset threshold; the eleventh preset threshold is less than the fourth preset threshold; and the twelfth preset threshold is less than the fifth preset threshold.

[0155] If the processing layer in the first processing stage is a fully connected layer, and the processing layer in the second processing stage is a convolutional layer, the preset conditions include: the first value is less than the thirteenth preset threshold and the proportion of multiply-accumulate instructions is greater than or equal to the fourteenth preset threshold; the fourth preset threshold is less than the fourteenth preset threshold and less than the first preset threshold.

[0156] As an optional embodiment, the process of obtaining resource configuration parameters includes:

[0157] After the controller determines the processing layer, it matches the processing layer with the resource configuration library to obtain the resource configuration parameters that match the processing layer. The resource configuration library includes the correspondence between the processing layer and the resource configuration parameters.

[0158] As an optional embodiment, the device further includes:

[0159] The protection module is used to perform resource configuration protection processing after receiving a configuration instruction. The resource configuration protection processing includes at least one of the following: inserting a bubble operation and performing a flushing operation.

[0160] This application provides a computer device, including a controller and a processor.

[0161] The controller executes computer programs to achieve Figure 1 The method for adjusting resources in the processor.

[0162] The processor executes computer programs to achieve Figure 2 The method for adjusting resources in the processor.

[0163] This application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements a method for adjusting resources in the processor.

[0164] This application provides a computer program product, including a computer program that, when executed by a processor, implements a method for adjusting resources in the processor.

[0165] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for the device and equipment embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the method embodiments. The device and equipment embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components indicated as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of the solution in this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0166] The above description is merely one specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for adjusting resources in a processor, characterized in that, The method is applied to a controller and includes: Obtain the first feature of the first processing stage currently being executed by the model. The operation of the model requires the use of resources on the processor. The model includes multiple processing stages, including the first processing stage. Based on the first feature, determine the processing layer corresponding to the first processing stage; Obtain resource configuration parameters that match the processing layer. These resource configuration parameters are used to adjust the resource configuration in the processor. The resources include at least one of the following: Load or Store Queue (LSQ), Emit Width, and Reorder Buffer (ROB). A configuration instruction is sent to the processor, the configuration instruction including the resource configuration parameters, the configuration instruction being used to instruct the processor to adjust the resources; The step of determining the processing layer corresponding to the first processing stage based on the first feature specifically includes: The first feature is input into the classifier to obtain the processing layer corresponding to the first processing stage output by the classifier; The network layers of the model sequentially include convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature includes at least one of the following: the proportion of multiply-accumulate instructions, the proportion of comparison instructions, and the proportion of memory access instructions. The classification process of the classifier includes: If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer. If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer. If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be a pooling layer. If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

2. The method for adjusting resources in a processor according to claim 1, characterized in that, The method further includes: If the first feature of the first processing stage meets the preset conditions, then the resource configuration parameters matching the processing layer corresponding to the second processing stage are obtained, and the second processing stage is the next processing stage after the first processing stage. A preparatory instruction is sent to the processor, the preparatory instruction including resource configuration parameters matching the processing layer corresponding to the second processing stage, the preparatory instruction being used to instruct the processor to adjust the resources.

3. The method for adjusting resources in a processor according to claim 2, characterized in that, If the processing layer of the first processing stage is the convolutional layer, and the processing layer corresponding to the second processing stage is the activation layer, the preset conditions include at least one of the following: a first value is less than a sixth preset threshold and the proportion of comparison instructions is greater than or equal to a seventh preset threshold; the first value is calculated based on the hash value of the loop count and the corresponding count value of the program counter; the seventh preset threshold is less than the second preset threshold; the first feature also includes the hash value of the loop count and the corresponding count value of the program counter; If the processing layer of the first processing stage is the activation layer, and the processing layer corresponding to the second processing stage is the pooling layer, the preset conditions include at least one of the following: the first value is less than the eighth preset threshold and the proportion of memory access instructions is greater than or equal to the ninth preset threshold, wherein the ninth preset threshold is less than the third preset threshold. If the processing layer of the first processing stage is the pooling layer, and the processing layer corresponding to the second processing stage is the fully connected layer, the preset conditions include at least one of the following: the first value is less than the tenth preset threshold, the proportion of multiply-accumulate instructions is greater than or equal to the eleventh preset threshold, and the proportion of memory access instructions is greater than or equal to the twelfth preset threshold; the eleventh preset threshold is less than the fourth preset threshold; and the twelfth preset threshold is less than the fifth preset threshold. If the processing layer of the first processing stage is the fully connected layer, and the processing layer corresponding to the second processing stage is the convolutional layer, the preset conditions include: at least one of the following: the first value is less than the thirteenth preset threshold and the proportion of the multiply-accumulate instruction is greater than or equal to the fourteenth preset threshold; the fourth preset threshold is less than the fourteenth preset threshold and less than the first preset threshold.

4. The method for adjusting resources in a processor according to claim 1, characterized in that, The acquisition of resource configuration parameters matching the processing layer specifically includes: The processing layer is matched with the resource configuration library to obtain the resource configuration parameters that match the processing layer. The resource configuration library includes the correspondence between the processing layer and the resource configuration parameters.

5. The method for adjusting resources in a processor according to claim 1, characterized in that, The configuration instruction is also used to instruct the processor to perform resource configuration protection processing, which includes at least one of inserting a bubble operation and performing a flushing operation.

6. A method for adjusting resources in a processor, characterized in that, The method is applied to a processor and includes: The system receives configuration instructions sent by the controller; the configuration instructions include resource configuration parameters, which are obtained by the controller based on the processing layer corresponding to the currently executed first processing stage; the processing layer corresponding to the currently executed first processing stage is identified and determined by the controller based on the first feature of the currently executed first processing stage of the model; the operation of the model requires the use of resources on the processor; Adjust resources based on the configuration instructions; The process of determining the processing layer corresponding to the first processing stage currently being executed includes: After the controller obtains the first feature, it inputs the first feature into the classifier and obtains the processing layer corresponding to the first processing stage currently being executed, as output by the classifier. The model's network layers consist of convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature must include at least one of the following: the proportion of multiply-accumulate instructions, the proportion of compare instructions, and the proportion of memory access instructions. The classifier's classification process includes: If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer. If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer. If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be a pooling layer. If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

7. An apparatus for adjusting resources in a processor, characterized in that, The means for adjusting resources in the processor is applied to the controller and includes: The acquisition module is used to acquire the first feature of the first processing stage currently being executed by the model. The operation of the model requires the use of resources on the processor. The model includes multiple processing stages, including the first processing stage. The identification module is used to determine the processing layer corresponding to the first processing stage based on the first feature. The acquisition module is further configured to acquire resource configuration parameters that match the processing layer. The resource configuration parameters are used to adjust the resource configuration in the processor. The resources include at least one of the load or store queue (LSQ), transmit width, and reorder buffer (ROB). A sending module is used to send configuration instructions to the processor, the configuration instructions including the resource configuration parameters, and the configuration instructions are used to instruct the processor to adjust the resources; The process of determining the processing layer corresponding to the first processing stage currently being executed includes: After the controller obtains the first feature, it inputs the first feature into the classifier and obtains the processing layer corresponding to the first processing stage currently being executed, as output by the classifier. The model's network layers consist of convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature must include at least one of the following: the proportion of multiply-accumulate instructions, the proportion of compare instructions, and the proportion of memory access instructions. The classifier's classification process includes: If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer. If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer. If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be a pooling layer. If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

8. An apparatus for adjusting resources in a processor, characterized in that, The means for adjusting resources in the processor is applied to the processor and includes: A receiving module is used to receive configuration instructions sent by the controller; the configuration instructions include resource configuration parameters, which are obtained by the controller based on the processing layer corresponding to the currently executed first processing stage; the processing layer corresponding to the currently executed first processing stage is identified and determined by the controller based on the first feature of the currently executed first processing stage of the model; the operation of the model requires the use of resources on the processor; The adjustment module is used to adjust resources based on the configuration instructions; The process of determining the processing layer corresponding to the first processing stage currently being executed includes: After the controller obtains the first feature, it inputs the first feature into the classifier and obtains the processing layer corresponding to the first processing stage currently being executed, as output by the classifier. The model's network layers consist of convolutional layers, activation layers, pooling layers, and fully connected layers. The first feature must include at least one of the following: the proportion of multiply-accumulate instructions, the proportion of compare instructions, and the proportion of memory access instructions. The classifier's classification process includes: If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the first preset threshold, then the processing layer corresponding to the first processing stage is determined to be a convolutional layer. If the proportion of comparison instructions in the first feature is greater than or equal to the second preset threshold, then the processing layer corresponding to the first processing stage is determined to be the activation layer. If the proportion of memory access instructions in the first feature is greater than or equal to the third preset threshold, then the processing layer corresponding to the first processing stage is determined to be a pooling layer. If the proportion of multiply-accumulate instructions in the first feature is greater than or equal to the fourth preset threshold and the proportion of memory access instructions is greater than or equal to the fifth preset threshold, then the processing layer corresponding to the first processing stage is determined to be a fully connected layer; the fourth preset threshold is less than the first preset threshold; and the fifth preset threshold is less than the third preset threshold.

9. A computer device, comprising: A controller and a processor, characterized in that the controller executes a computer program to implement the method for adjusting resources in the processor as described in any one of claims 1-5; The processor executes the computer program to implement the method for adjusting resources in the processor as described in claim 6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the method of adjusting resources in the processor as described in any one of claims 1-6.

11. A computer program product, comprising a computer program, characterized in that, When executed by a processor, the computer program implements the method of adjusting resources in the processor as described in any one of claims 1-6.

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