Core particle module and packaging structure

Abstract

The embodiments of the present disclosure provide a core particle module and a packaging structure, comprising: a plurality of core particles and a controller, wherein each core particle comprises a plurality of interface areas, and each interface area is configured to be able to match a plurality of interface areas of other core particles; the controller is configured to control the interconnection between the plurality of core particles, and is configured to control the connection of an interface area of one of the plurality of core particles with different interface areas of another of the plurality of core particles in different core particle arrangement cases.

Description

TECHNICAL FIELD

[0001] Embodiments of the present disclosure relate to the technical field of semiconductor packaging, and in particular, to a chiplet module and a packaging structure. BACKGROUND

[0002] In the field of semiconductor packaging, chiplet technology can split a large chip into multiple small chips (or chiplets), and integrate these small chips together through packaging technology to achieve the function of a large chip. This chip architecture formed by integrating multiple small chips together can improve the performance of the chip, reduce costs, and shorten the development cycle. SUMMARY

[0003] According to at least one embodiment of the present disclosure, a chiplet module is provided, comprising: a plurality of chiplets, wherein each chiplet comprises a plurality of interface regions, and each interface region is configured to be able to match a plurality of interface regions of other chiplets; and a controller configured to control the interconnection between the plurality of chiplets, and configured to control a connection of an interface region of one of the plurality of chiplets to a different interface region of another of the plurality of chiplets in different chiplet arrangement cases.

[0004] In the chiplet module according to at least one embodiment of the present disclosure, each of the plurality of chiplets has a plurality of edges and a plurality of edge interface regions respectively disposed on the plurality of edges; and the controller is configured to control a connection of an edge interface region of one of the plurality of chiplets to an edge interface region of another of the plurality of chiplets located on a different edge in different chiplet arrangement cases.

[0005] In the chiplet module according to at least one embodiment of the present disclosure, each of the plurality of chiplets has a first edge and a second edge, and has a first edge interface region and a second edge interface region respectively located on the first edge and the second edge; and the controller is configured to control a connection of the first edge interface region of a first chiplet of the plurality of chiplets to the second edge interface region of a second chiplet of the plurality of chiplets in a first chiplet arrangement case, and control a connection of the first edge interface region of the first chiplet to a first edge interface region of the second chiplet in a second chiplet arrangement case.

[0006] In the chiplet module according to at least one embodiment of the present disclosure, the first chiplet arrangement case includes that the first chiplet and the second chiplet have the same orientation and are arranged in translation in a first arrangement direction parallel to a main surface of the chiplet, and the first edge interface region of the first chiplet and the second edge interface region of the second chiplet are opposite to each other in the first arrangement direction; and the second chiplet arrangement case includes that the first chiplet and the second chiplet are rotationally symmetrical to each other, and the first edge interface region of the first chiplet and the first edge interface region of the second chiplet are opposite to each other in the first arrangement direction.

[0007] According to at least one of the embodiments of the present disclosure, the plurality of core particles each further has a third edge and a fourth edge, and has a third edge interface region and a fourth edge interface region located at the third edge and the fourth edge respectively, wherein the third edge and the fourth edge extend in a direction intersecting with the first edge and the second edge; and the controller is configured to control the third edge interface region of the first core particle to be connected with the fourth edge interface region of a third core particle in the plurality of core particles in a third core particle arrangement, and to control the third edge interface region of the first core particle to be connected with a third edge interface region of the third core particle in a fourth core particle arrangement.

[0008] According to at least one of the embodiments of the present disclosure, the third core particle arrangement includes that the first core particle and the third core particle have the same orientation and are arranged in translation parallel to a second arrangement direction of a main surface of a core particle, and the third edge interface region of the first core particle and the fourth edge interface region of the third core particle are opposite to each other in the second arrangement direction; and the fourth core particle arrangement includes that the first core particle and the third core particle are rotationally symmetrical to each other, and the third edge interface region of the first core particle and the third edge interface region of the fourth core particle are opposite to each other in the second arrangement direction.

[0009] According to at least one of the embodiments of the present disclosure, the first edge and the second edge of the plurality of core particles have the same first length, and the third edge and the fourth edge of the plurality of core particles have the same second length, the first length being greater than or equal to the second length.

[0010] According to at least one of the embodiments of the present disclosure, the controller is further configured to control the first edge interface region of the first core particle to be connected with a third edge interface region or a fourth edge interface region of a second core particle in another core particle arrangement, the another core particle arrangement including that the first core particle and the second core particle are rotationally symmetrical to each other, and the first edge interface region of the first core particle and the third edge interface region or the fourth edge interface region of the second core particle are opposite to each other in the first arrangement direction.

[0011] According to at least one of the embodiments of the present disclosure, the first edge, the second edge, the third edge and the fourth edge of the plurality of core particles each have the same length.

[0012] According to at least one embodiment of the present disclosure, in a chip module, one of the plurality of chips is a first connecting chip, and the other of the plurality of chips is a second connecting chip, wherein the first connecting chip and the second connecting chip are adjacent to each other and electrically connected; the first connecting chip includes a first interface area, the first interface area including n first interfaces; the second connecting chip includes a second interface area, the second interface area including n second interfaces, where n≥1; and the controller is configured to control the first interface area of ​​the first connecting chip and the second interface area of ​​the second connecting chip to be connected in a first connection order in a first chip arrangement, and to control the first interface area of ​​the first connecting chip and the second interface area of ​​the second connecting chip to be connected in a second connection order in a second chip arrangement, wherein in the first connection order, the i-th first interface of the first connecting chip is configured to be connected to the i-th second interface of the second connecting chip; and in the second connection order, the i-th first interface of the first connecting chip is configured to be connected to the (n-i+1)-th second interface of the second connecting chip, where 1≤i≤n.

[0013] In a core module provided according to at least one embodiment of the present disclosure, one of the first core arrangement and the second core arrangement includes the first connecting core and the second connecting core having the same orientation and being arranged in a translational manner in a direction parallel to the main surface of the core, and the other of the first core arrangement and the second core arrangement includes the first connecting core and the second connecting core being rotationally symmetrical to each other.

[0014] In a core module provided according to at least one embodiment of the present disclosure, the first connecting core and the second connecting core are rotationally symmetrical, meaning that the orientation of the first connecting core and the orientation of the second connecting core are rotated 180° or 90° relative to each other.

[0015] In a core module provided according to at least one embodiment of the present disclosure, each core includes an edge interface region located on a core edge, the edge interface region being symmetrically arranged with respect to an axis of symmetry perpendicular to the core edge, the axis of symmetry extending through the center of the core edge.

[0016] In the core module provided according to at least one embodiment of the present disclosure, one or more of the plurality of cores are each a single core, and the edge of the core is the edge of the single core; or one or more of the plurality of cores are each a core combination including a plurality of sub-cores, and the edge of the core is the edge of the corresponding sub-core or a combined edge composed of the edges of the plurality of sub-cores in the core combination.

[0017] According to at least one embodiment of the present disclosure, the plurality of core particles are arranged in an array along a first arrangement direction and / or a second arrangement direction parallel to the main surface of the core particle, and any two adjacent core particles in the plurality of core particles are configured to be arranged in translation with the same orientation or to be rotationally symmetric to each other along the first arrangement direction or the second arrangement direction.

[0018] According to at least one embodiment of the present disclosure, a package structure is provided, comprising: the core particle module according to any one of the above; and an interconnection member, wherein the plurality of core particles are electrically connected to each other through the interconnection member. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only related to some embodiments of the present disclosure and not limited to the present disclosure.

[0020] FIG. 1A and FIG. 1B A schematic plan view of a core particle module according to some embodiments of the present disclosure is shown.

[0021] FIG. 2A to FIG. 2D A schematic plan view of a core particle module according to some other embodiments of the present disclosure is shown.

[0022] FIG. 3A to FIG. 3D A schematic plan view of a core particle module according to yet some other embodiments of the present disclosure is shown.

[0023] FIG. 4A and FIG. 4B A schematic plan view of a core particle module according to still some other embodiments of the present disclosure is shown.

[0024] FIG. 5A and FIG. 5B A schematic view of the interconnection between core particles in a core particle module according to some embodiments of the present disclosure is shown.

[0025] FIG. 6A to FIG. 6C A schematic plan view of a core particle according to some embodiments of the present disclosure is shown.

[0026] FIG. 7 A schematic plan view of a package structure according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0027] In order to make the objects, technical solutions and advantages of the embodiments of the present disclosure clearer, the following will be combined with the drawings of the embodiments of the present disclosure to clearly and completely describe the technical solutions of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative effort belong to the protection scope of the present disclosure.

[0028] Unless otherwise defined, technical terms or scientific terms used in the present disclosure shall have the ordinary meaning understood by a person of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are used to distinguish different components. The terms "comprise", "comprising", "include", "including" and similar terms mean that the elements or objects before the terms encompass the elements or objects listed after the terms and their equivalents, and do not exclude other elements or objects. The terms "connect" or "connected" and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0029] Chiplet technology splits a large chip into multiple small chips (i.e., chiplets), each of which can be made smaller, reducing chip design difficulty and design cycle, and improving product yield. With the continuous development of chip manufacturing and packaging technology, the demand for bandwidth of chiplets is increasing, but the power consumption of chiplets and the chip width occupied by chiplets are expected to be smaller and smaller; based on the bandwidth and width requirements, the chiplets can be provided with multiple interface areas, and when the chiplets include multiple interface areas, how to maximize the reuse of chiplets and optimize the interconnection between chiplets is an important research topic of chiplet technology.

[0030] Embodiments of the present disclosure provide a chiplet module, comprising: a plurality of chiplets, wherein each chiplet comprises a plurality of interface areas, and each interface area is configured to be able to match a plurality of interface areas of other chiplets; and a controller configured to control the interconnection between the plurality of chiplets, and configured to control an interface area of one of the plurality of chiplets to be connected with a different interface area of another of the plurality of chiplets in different chiplet arrangement cases.

[0031] In the chiplet module of the embodiments of the present disclosure, each interface area of each chiplet can match a plurality of interface areas of other chiplets, and the controller supports the interface areas of each chiplet to be connected with different interface areas of other chiplets in different chiplet arrangement cases, so that the chiplets can be interconnected in multiple arrangement and connection modes, thereby improving the reuse rate of chiplets and the flexibility of chiplet arrangement and connection, and further greatly saving the tape-out cost.

[0032] In this context, that an interface region of a chiplet is configured to be able to match with multiple interface regions of other chiplets means that the interface region of the chiplet has an interface that matches with each of the multiple interface regions of other chiplets, and the interface that matches with each other can transmit signals when connected; the interface region of the chiplet is connected with the corresponding interface region of other chiplets based on the arrangement of the corresponding chiplet, and it is not limited that the interface region of the chiplet needs to be connected with multiple interface regions of other chiplets at the same time. In some embodiments, in a chiplet module, the interface regions between chiplets can be connected one by one.

[0033] FIG. 1A to FIG. 4B A schematic plan view of a chiplet module according to some embodiments of the present disclosure is shown, which schematically shows the plan arrangement of multiple chiplets in the chiplet module.

[0034] In some embodiments, the chiplet module 500 includes multiple chiplets 100, and each chiplet 100 includes multiple interface regions IR; the multiple chiplets 100 are connected with each other, and the interface region of each chiplet is electrically connected with the corresponding interface region of another chiplet. Each interface region is configured to be able to match with multiple interface regions of other chiplets. For example, the chiplet module further includes a controller configured to control the interconnection between the multiple chiplets 100, and support any interface region IR of one of the multiple chiplets to be connected with different interface regions IR of another of the multiple chiplets in different chiplet arrangements. In some embodiments, the controller can include control modules (not shown) embedded in each chiplet interconnected with each other; or the controller can also be or include a control module arranged in a separate control chiplet, and the present disclosure does not limit this.

[0035] Reference is made to FIG. 1A to FIG. 3D In some embodiments, the multiple interface regions IR of each chiplet include interface region 1, interface region 2, interface region 3, interface region 4, interface region 5, interface region 6, interface region 7, and interface region 8, each of which can match with multiple interface regions of other chiplets. Taking the interface region 1 as an example, the interface region 1 of each chiplet can match with the interface region 6 and the interface region 2 of other chiplets, and can be connected with the interface region 6 or the interface region 2 of other chiplets based on the chiplet arrangement.

[0036] For example, FIG. 1A and FIG. 1B Two chiplet arrangements of two chiplets 100 are shown. For ease of description, the chiplet 100 on the left side of the figure is referred to as a first chiplet D1, and the chiplet 100 on the right side of the figure is referred to as a second chiplet D2. In FIG. 1A In the chiplet arrangement shown, the first chiplet D1 and the second chiplet D2 are arranged along a first arrangement direction AD1, and the interface region 1 and the interface region 2 of the first chiplet D1 are opposite to the interface region 6 and the interface region 5 of the second chiplet D2 in the first arrangement direction AD1 and are electrically connected with each other; in FIG. 1BIn the shown core particle arrangement, the first core particle D1 and the second core particle D2 are arranged along a first arrangement direction AD1, and the interface region 1 of the first core particle D1 and the interface region 2 of the second core particle D2 are opposite to each other in the first arrangement direction AD1 and connected to each other. In this context, two interface regions being opposite to each other in an arrangement direction means that the two interface regions face each other and at least partially overlap in the arrangement direction.

[0037] For example, the controller controls the interface region 1 of the first core particle D1 to be connected to the interface region 6 of the second core particle D2 in the first core particle arrangement, and controls the interface region 1 of the first core particle D1 to be connected to the interface region 2 of the second core particle D2 in the second core particle arrangement. For example, the controller controls the interface region 2 of the first core particle D1 to be connected to the interface region 5 of the second core particle D2 in the first core particle arrangement, and controls the interface region 2 of the first core particle D1 to be connected to the interface region 1 of the second core particle D2 in the second core particle arrangement.

[0038] In some embodiments, the plurality of core particles each has a plurality of edges and a plurality of edge interface regions respectively disposed on the plurality of edges, and the controller is configured to control an edge interface region of one of the plurality of core particles to be connected to an edge interface region of another of the plurality of core particles located on a different edge in different core particle arrangements.

[0039] In some embodiments, the plurality of core particles each has a first edge and a second edge, and has a first edge interface region and a second edge interface region respectively located on the first edge and the second edge, and the controller is configured to control the first edge interface region of a first core particle of the plurality of core particles to be connected to the second edge interface region of a second core particle of the plurality of core particles in a first core particle arrangement, and control the first edge interface region of the first core particle to be connected to the first edge interface region of the second core particle in a second core particle arrangement.

[0040] In some embodiments, the first core particle arrangement includes that the first core particle and the second core particle have the same orientation and are arranged in translation in a first arrangement direction parallel to the main surface of the core particle, and the first edge interface region of the first core particle and the second edge interface region of the second core particle are opposite to each other in the first arrangement direction, and the second core particle arrangement includes that the first core particle and the second core particle are rotationally symmetric to each other, and the first edge interface region of the first core particle and the first edge interface region of the second core particle are opposite to each other in the first arrangement direction.

[0041] The first edge and the second edge are two different edges of the core particle. In some embodiments, the first edge and the second edge can be edges of the core particle that are parallel to each other, or can also be edges of the core particle that intersect with each other. Hereinafter, an example is illustrated with the first edge and the second edge being edges of the core particle that are parallel to each other. FIG. 1A andFIG. 1B For example, each core particle 100 has a plurality of core particle sides, such as including a first side S1, a second side S2, a third side S3, and a fourth side S4, and includes a plurality of edge interface regions respectively disposed at the plurality of core particle sides. For example, the first side S1 and the second side S2 are parallel to each other, the third side S3 and the fourth side S4 are parallel to each other, and the third side S3 and the fourth side S4 are perpendicular to the first side S1 and the second side S2. Here, the core particle side refers to an edge (i.e., a sidewall) of the core particle, and the edge interface region located at the core particle side refers to that the edge interface region is disposed close to the core particle side.

[0042] For example, the plurality of edge interface regions of the core particle 100 includes two or more of a first side interface region 101 located at the first side S1, a second side interface region 102 located at the second side S2, a third side interface region 103 located at the third side S3, and a fourth side interface region 104 located at the fourth side S4. Disposing a plurality of interface regions on a plurality of sides in the core particle can be advantageous to increase the bandwidth of the core particle and can be advantageous to make the core particle smaller. In this context, the first side interface region, the second side interface region, the third side interface region, and the fourth side interface region are merely for distinguishing the interface regions located at different core particle sides, and do not limit the types of the interface regions.

[0043] For example, in some examples, the first side interface region 101 includes an interface region 1 and an interface region 2, the second side interface region 102 includes an interface region 5 and an interface region 6, the third side interface region 103 includes an interface region 3 and an interface region 4, and the fourth side interface region 104 includes an interface region 7 and an interface region 8. It should be understood that the number of interface regions included in each edge interface region shown in the figure is merely illustrative, and in other examples, an edge interface region can include a single interface region or more than two interface regions, which is not limited by the present disclosure.

[0044] In some embodiments, the first side interface region 101 and the second side interface region 102 of each core particle are each configured to be matchable with a plurality of edge interface regions of other core particles, such as being matchable with the first side interface region 101 and the second side interface region 102 of other core particles.

[0045] For example, as shown in FIG. 1, the first side interface region 101 of the core particle 100a is matchable with the first side interface region 101 of the core particle 100b, and the second side interface region 102 of the core particle 100a is matchable with the second side interface region 102 of the core particle 100b. FIG. 1AAs shown, the controller is configured to control the first edge interface region 101 of the first core particle D1 to connect with the second edge interface region 102 of the second core particle D2 in the first core particle arrangement. For example, in the first core particle arrangement, the first core particle D1 and the second core particle D2 have the same orientation and are arranged in translation in a first arrangement direction AD1 parallel to the main surface of the core particle; the first edge interface region 101 of the first core particle D1 and the second edge interface region 102 of the second core particle D2 are opposite to each other in the first arrangement direction AD1, so that the first edge interface region 101 and the second edge interface region 102 can be connected at a shorter interconnection distance. The translation arrangement of the plurality of core particles means that the plurality of core particles are translated relative to each other in a direction parallel to the main surface of the core particle without changing the orientation, such as rotation.

[0046] As shown, the controller is configured to control the first edge interface region 101 of the first core particle D1 to connect with the second edge interface region 102 of the second core particle D2 in the first core particle arrangement. For example, in the first core particle arrangement, the first core particle D1 and the second core particle D2 have the same orientation and are arranged in translation in a first arrangement direction AD1 parallel to the main surface of the core particle; the first edge interface region 101 of the first core particle D1 and the second edge interface region 102 of the second core particle D2 are opposite to each other in the first arrangement direction AD1, so that the first edge interface region 101 and the second edge interface region 102 can be connected at a shorter interconnection distance. The translation arrangement of the plurality of core particles means that the plurality of core particles are translated relative to each other in a direction parallel to the main surface of the core particle without changing the orientation, such as rotation. FIG. 1B As shown, the controller is configured to control the first edge interface region 101 of the first core particle D1 to connect with the second edge interface region 102 of the second core particle D2 in the first core particle arrangement. For example, in the first core particle arrangement, the first core particle D1 and the second core particle D2 have the same orientation and are arranged in translation in a first arrangement direction AD1 parallel to the main surface of the core particle; the first edge interface region 101 of the first core particle D1 and the second edge interface region 102 of the second core particle D2 are opposite to each other in the first arrangement direction AD1, so that the first edge interface region 101 and the second edge interface region 102 can be connected at a shorter interconnection distance. The translation arrangement of the plurality of core particles means that the plurality of core particles are translated relative to each other in a direction parallel to the main surface of the core particle without changing the orientation, such as rotation.

[0047] In this article, the rotational symmetry of the plurality of components means that the orientation of one component of the plurality of components after rotation by a certain angle is the same as the orientation of another component of the plurality of components, but it is not limited that the one component after rotation needs to be completely coincident with the another component. For example, in the example shown in FIG. 1B As shown, the controller is configured to control the first edge interface region 101 of the first core particle D1 to connect with the second edge interface region 102 of the second core particle D2 in the first core particle arrangement. For example, in the first core particle arrangement, the first core particle D1 and the second core particle D2 have the same orientation and are arranged in translation in a first arrangement direction AD1 parallel to the main surface of the core particle; the first edge interface region 101 of the first core particle D1 and the second edge interface region 102 of the second core particle D2 are opposite to each other in the first arrangement direction AD1, so that the first edge interface region 101 and the second edge interface region 102 can be connected at a shorter interconnection distance. The translation arrangement of the plurality of core particles means that the plurality of core particles are translated relative to each other in a direction parallel to the main surface of the core particle without changing the orientation, such as rotation.

[0048] The orientation of the core particle includes the orientation of each edge of the core particle and the relative position relationship thereof, and the plurality of core particles having the same orientation means that the orientation of the corresponding edge of the plurality of core particles is the same, and the relative position relationship between each edge is the same. For example, in the example shown in FIG. 1A As shown, the controller is configured to control the first edge interface region 101 of the first core particle D1 to connect with the second edge interface region 102 of the second core particle D2 in the first core particle arrangement. For example, in the first core particle arrangement, the first core particle D1 and the second core particle D2 have the same orientation and are arranged in translation in a first arrangement direction AD1 parallel to the main surface of the core particle; the first edge interface region 101 of the first core particle D1 and the second edge interface region 102 of the second core particle D2 are opposite to each other in the first arrangement direction AD1, so that the first edge interface region 101 and the second edge interface region 102 can be connected at a shorter interconnection distance. The translation arrangement of the plurality of core particles means that the plurality of core particles are translated relative to each other in a direction parallel to the main surface of the core particle without changing the orientation, such as rotation.

[0049] In FIG. 1B As shown, the controller is configured to control the first edge interface region 101 of the first core particle D1 to connect with the second edge interface region 102 of the second core particle D2 in the first core particle arrangement. For example, in the first core particle arrangement, the first core particle D1 and the second core particle D2 have the same orientation and are arranged in translation in a first arrangement direction AD1 parallel to the main surface of the core particle; the first edge interface region 101 of the first core particle D1 and the second edge interface region 102 of the second core particle D2 are opposite to each other in the first arrangement direction AD1, so that the first edge interface region 101 and the second edge interface region 102 can be connected at a shorter interconnection distance. The translation arrangement of the plurality of core particles means that the plurality of core particles are translated relative to each other in a direction parallel to the main surface of the core particle without changing the orientation, such as rotation.

[0050] In some embodiments, the plurality of chiplets 100 have the same interface region arrangement, e.g., can be the same chiplets formed in the same semiconductor process, i.e., the plurality of chiplets 100 have substantially the same structure inside the chiplets in addition to having the same interface region arrangement. In other embodiments, the plurality of chiplets 100 have the same interface region arrangement but can be chiplets formed in different semiconductor processes, e.g., the chiplets 100 have the same interface region arrangement but can have different structures inside the chiplets, e.g., can include different functional modules.

[0051] In some embodiments, the plurality of chiplets 100 of a chiplet module can be arranged in an array including one or more rows and / or one or more columns. Here, the array can include a single row array, a single column array, or an array including multiple rows and multiple columns.

[0052] FIG. 1A and FIG. 1B An example is shown in which the plurality of chiplets 100 are arranged in a single row array, e.g., the plurality of chiplets 100 are arranged in a row along a first arrangement direction AD1 in which the first and second edges of each chiplet extend in a direction intersecting (e.g., perpendicular to) the first arrangement direction AD1 and are opposite each other in the first arrangement direction AD1. In such examples, the chiplets 100 can include at least the first edge interface region 101 and the second edge interface region 102, and optionally the third edge interface region 103 and the fourth edge interface region 104 can be provided (e.g., can be omitted).

[0053] FIG. 2A to FIG. 2D An example is shown in which the plurality of chiplets 100 are arranged in a multiple row and multiple column array. In some embodiments, an edge interface region can be provided on each edge of the chiplets 100, which can facilitate expansion of the chiplet array.

[0054] In some embodiments, the plurality of chiplets each further have a third edge interface region and a fourth edge interface region located at the third edge and the fourth edge, respectively, where the third edge and the fourth edge extend in a direction intersecting the first edge and the second edge; the controller is configured to control the third edge interface region of the first chiplet to connect with the fourth edge interface region of a third chiplet of the plurality of chiplets in a third chiplet arrangement, and to control the third edge interface region of the first chiplet to connect with a third edge interface region of the third chiplet in a fourth chiplet arrangement.

[0055] In some embodiments, the third core particle arrangement includes that the first core particle and the third core particle have the same orientation and are translationally arranged in a second arrangement direction parallel to the main surface of the core particle, and the third edge interface region of the first core particle and the fourth edge interface region of the third core particle are opposite to each other in the second arrangement direction; and the fourth core particle arrangement includes that the first core particle and the third core particle are rotationally symmetrical to each other, and the third edge interface region of the first core particle and the third edge interface region of the fourth core particle are opposite to each other in the second arrangement direction.

[0056] Reference is made to FIG. 2A to FIG. 2D In some embodiments, the plurality of core particles 100 are arranged into an array including a plurality of rows and a plurality of columns along a first arrangement direction AD1 and a second arrangement direction AD2. The first arrangement direction AD1 and the second arrangement direction AD2 intersect with each other, for example, are substantially perpendicular to each other. For example, the first arrangement direction AD1 is the row direction, and the second arrangement direction AD2 is the column direction, or vice versa. For example, in each core particle, the first edge S1 and the second edge S2 extend in the same direction as the second arrangement direction AD2, and the first edge S1 and the second edge S2 are opposite to each other in a direction perpendicular to the extending direction; the third edge S3 and the fourth edge S4 extend in the same direction as the first arrangement direction AD1, and are opposite to each other in a direction perpendicular to the extending direction.

[0057] In some embodiments, the third edge interface region 103 and the fourth edge interface region 104 of each core particle are each configured to be matchable with a plurality of interface regions of other core particles, for example, matchable with the third edge interface region 103 and the fourth edge interface region 104 of other core particles, and connectable with the third edge interface region 103 of other core particles or the fourth edge interface region 104 of other core particles under the control of the controller based on the core particle arrangement.

[0058] For example, the plurality of core particles 100 includes a first core particle D1, a second core particle D2, a third core particle D3, and a fourth core particle D4. Taking the first core particle D1 as an example, in the core particle arrangement shown in FIG. 1A, the third edge interface region 103 of the first core particle D1 is connected with the fourth edge interface region 104 of the third core particle D3; in the core particle arrangement shown in FIG. 1B, the third edge interface region 103 of the first core particle D1 is connected with the third edge interface region 103 of the third core particle D3. FIG. 2A , FIG. 2B FIG. 2C , FIG. 2D

[0059] For example, in the core particle arrangement shown in FIG. 1C, the interface region 3 and the interface region 4 of the third edge interface region 103 of the first core particle D1 are respectively connected with the interface region 8 and the interface region 7 of the fourth edge interface region 104 of the third core particle D3. FIG. 2A , FIG. 2B ​​​

[0060] As shown in FIG. 2A and FIG. 2B , the first core particle D1 and the third core particle D3 have the same orientation, and are arranged in translation in the second arrangement direction AD2, the third edge S3 of the first core particle D1 and the third edge interface region 103 thereof are opposite to the fourth edge S4 of the third core particle D3 and the fourth edge interface region 104 thereof in the second arrangement direction AD2, so that the corresponding interfaces of the first core particle D1 and the third core particle D3 can be connected with a shorter interconnection distance.

[0061] For example, in the core particle arrangement shown in FIG. 2C and FIG. 2D , the interface region 3 and the interface region 4 of the third edge interface region 103 of the first core particle D1 are connected with the interface region 4 and the interface region 3 of the third edge interface region 103 of the third core particle D3, respectively.

[0062] As shown in FIG. 2C and FIG. 2D , the first core particle D1 and the third core particle D3 have different orientations, for example, are rotationally symmetrical to each other, the third edge S3 of the first core particle D1 and the third edge interface region 103 thereof are opposite to the third edge S3 of the third core particle D3 and the third edge interface region 103 thereof in the second arrangement direction AD2, so that the corresponding interfaces of the first core particle D1 and the third core particle D3 can be connected with a shorter interconnection distance. For example, the orientation of the third core particle D3 after being rotated by 180° along a direction parallel to the main surface of the core particle is the same as the orientation of the first core particle D1.

[0063] Referring to FIG. 2A to FIG. 2D , the arrangement and connection mode of other adjacent core particles arranged in the second arrangement direction AD2 are similar to those described above with respect to the first core particle D1 and the third core particle D3, and will not be described herein again.

[0064] The arrangement and connection mode of adjacent core particles arranged in the first arrangement direction AD1 are similar to those described above with respect to FIG. 1A and FIG. 1B the first core particle D1 and the second core particle D2.

[0065] For example, the first edge interface region 101 and the second edge interface region 102 of each core particle are respectively configured to be matchable with the first edge interface region 101 and the second edge interface region 102 of other core particles, and can be connected with the first edge interface region 101 or the second edge interface region 102 of other core particles based on the core particle arrangement. For example, in the core particle arrangement shown in FIG. 2A , the first core particle D1 and the second core particle D2 have the same orientation, and are arranged in translation in the first arrangement direction AD1; the first edge interface region 101 of the first core particle D1 is connected with the second edge interface region 102 of the second core particle D2.

[0066] InFIG. 2B to FIG. 2D In the shown arrangement of the core particles, the first core particle D1 and the second core particle D2 have different orientations, for example, are rotationally symmetrical to each other, for example, the orientation of the second core particle D2 after being rotated by 180 degrees is the same as that of the first core particle D1. The first edge interface region 101 of the first core particle D1 is connected with the first edge interface region 101 of the second core particle.

[0067] FIG. 2A to FIG. 2D Only some connection modes of the first core particle D1 and the second core particle D2 are shown by way of example, and the present disclosure is not limited thereto. In other examples, the second edge S2 of the first core particle D1 can be opposite to the second edge S2 of the second core particle D2 in the first arrangement direction AD1, and the second edge interface region 102 of the first core particle D1 can be connected with the second edge interface region 102 of the second core particle D2. In yet other examples, the second edge S2 of the first core particle D1 can be opposite to the first edge S1 of the second core particle D2 in the first arrangement direction AD1, and the second edge interface region 102 of the first core particle D1 can be connected with the first edge interface region 101 of the second core particle D2.

[0068] The arrangement and connection mode of the third core particle D3 and the fourth core particle D4 are similar to those of the first core particle D1 and the second core particle D2 described above, and will not be described again here. In the same core particle module, the arrangement and connection mode of the first core particle D1 and the second core particle D2 can be the same as or different from those of the third core particle D3 and the fourth core particle D4.

[0069] In some embodiments, the first edges and the second edges of the plurality of core particles have a same first length, and the third edges and the fourth edges of the plurality of core particles have a same second length, the first length being greater than or equal to the second length.

[0070] Reference FIG. 2A to FIG. 2D For example, the first edges S1 and the second edges S2 of the plurality of core particles 100 have a same first length, and the third edges S3 and the fourth edges S4 of the plurality of core particles 100 have a same second length. For example, the shape of the core particle 100 can be rectangular, and the first length is greater than the second length; the first edges S1 and the second edges S2 can be collectively referred to as long edges, and the third edges S3 and the fourth edges S4 can be collectively referred to as short edges. In this embodiment, each interface region of each core particle located at each long edge can be matched with any interface region of other core particles located at any long edge, and can be connected with the long edge interface region of the corresponding core particle based on the corresponding arrangement of the core particles; each interface region of each core particle located at each short edge can be matched with any interface region of other core particles located at any short edge, and can be connected with the short edge interface region of the corresponding core particle based on the corresponding arrangement of the core particles.

[0071] For example, the first edge interface region 101 of each core particle 100 can match the first edge interface region 101 and the second edge interface region 102 of any other core particle 100, and the controller can be configured to control the first edge interface region 101 of a core particle 100 to connect with the first edge interface region 101 of another core particle 100 in one core particle arrangement and to control the first edge interface region 101 of the core particle 100 to connect with the second edge interface region 102 of another core particle 100 in another core particle arrangement.

[0072] Correspondingly, the second edge interface region 102 of each core particle 100 can match the first edge interface region 101 and the second edge interface region 102 of any other core particle 100, and the controller can be configured to control the second edge interface region 102 of a core particle 100 to connect with the first edge interface region 101 of another core particle 100 in one core particle arrangement and to control the second edge interface region 102 of the core particle 100 to connect with the second edge interface region 102 of another core particle 100 in another core particle arrangement. In some embodiments, unless otherwise defined, if two interface regions connect with each other, the edges of the core particles on which the two interface regions are located are adjacent to each other and are arranged to face each other, so that the connection distance between the two interface regions can be reduced.

[0073] For example, the third edge interface region 103 of each core particle 100 can match the third edge interface region 103 and the fourth edge interface region 104 of any other core particle 100, and the controller can be configured to control the third edge interface region 103 of a core particle 100 to connect with the third edge interface region 103 of another core particle 100 in one core particle arrangement and to control the third edge interface region 103 of the core particle 100 to connect with the fourth edge interface region 104 of another core particle 100 in another core particle arrangement. Correspondingly, the fourth edge interface region 104 of each core particle 100 can match the third edge interface region 103 and the fourth edge interface region 104 of any other core particle 100, and the controller can be configured to control the fourth edge interface region 104 of a core particle 100 to connect with the third edge interface region 103 of another core particle 100 in one core particle arrangement and to control the fourth edge interface region 104 of the core particle 100 to connect with the fourth edge interface region 104 of another core particle 100 in another core particle arrangement.

[0074] Since each interface region of each core particle can match multiple interface regions of other core particles, different interface regions of other core particles can be connected based on different core particle arrangements, which supports and improves the multiplexing and interconnection of the same chip, greatly saves the tape-out cost, and the arrangement and connection mode of multiple core particles can be more flexible. For example, whether multiple core particles are arranged in translation or rotation, the interconnection between the core particles can be realized with a shorter interconnection distance. For example, in a core particle module, multiple core particles can include core particles facing the same and / or core particles facing different. In each adjacent two core particles connected with each other, the orientations of the adjacent two core particles can be the same or can be different.

[0075] For example, among multiple cores 100, the orientation of the first core D1 is used as the reference orientation, and the orientations of the other cores can be the same as the reference orientation, or they can be different from the reference orientation, for example, rotated 180 degrees relative to the reference orientation.

[0076] For example, such as FIG. 2A As shown, all cores 100 have the same orientation, i.e., none are rotated. The interface regions 1 and 2 of the first side S1 of the first core D1 are respectively opposite to and electrically connected to the interface regions 6 and 5 of the second side S2 of the second core D2 in the first arrangement direction AD1; the interface regions 3 and 4 of the third side S3 of the first core D1 are respectively opposite to and electrically connected to the interface regions 8 and 7 of the third core D3 in the second arrangement direction AD2; the interface regions 3 and 4 of the third side S3 of the second core D2 are respectively opposite to and electrically connected to the interface regions 8 and 7 of the fourth side S4 of the fourth core D4 in the second arrangement direction AD2; the interface regions 1 and 2 of the first side S1 of the third core D3 are respectively opposite to and electrically connected to the interface regions 6 and 5 of the second side S2 of the fourth core D4 in the first arrangement direction AD1.

[0077] For example, refer to FIG. 2B In some embodiments, some cores in a plurality of cores have the same orientation, while another portion of cores have a different orientation, for example, rotated 180 degrees relative to the first portion of cores. In some embodiments, adjacent cores arranged in a first arrangement direction have different orientations and are rotationally symmetrical to each other, for example, rotated 180 degrees relative to each other; adjacent cores arranged in a second arrangement direction have the same orientation.

[0078] For example, the first core D1 and the third core D3 have the same first orientation, and the second core D2 and the fourth core D4 have the same second orientation and are rotationally symmetrical with respect to the first core D1 and the third core D3. For example, the second orientation is rotated 180 degrees relative to the first orientation.

[0079] In this embodiment, interface regions 1 and 2 of the first side S1 of the first core particle D1 are respectively opposite to and electrically connected to interface regions 2 and 1 of the first side S1 of the second core particle D2 in the first arrangement direction AD1; interface regions 7 and 8 of the fourth side S4 of the second core particle D2 are respectively opposite to and electrically connected to interface regions 4 and 3 of the third side S3 of the fourth core particle D4 in the second arrangement direction AD2; interface regions 1 and 2 of the first side S1 of the third core particle D3 are respectively opposite to and electrically connected to interface regions 2 and 1 of the first side of the fourth core particle D4 in the first arrangement direction AD1. The connection method of the first core particle D1 and the third core particle D3 is the same as... FIG. 2A The same applies as shown, so I will not repeat it here.

[0080] Referring to FIG. 2C In some embodiments, adjacent core dies arranged in the first arrangement direction AD1 have different orientations, are rotationally symmetric to each other, for example, can be rotated by 180 degrees relative to each other; and adjacent core dies arranged in the second arrangement direction AD2 have different orientations, are rotationally symmetric to each other, for example, can be rotated by 180 degrees relative to each other. For example, the first core die D1 and the fourth core die D4 have the same first orientation, the second core die D2 and the third core die D3 have the same second orientation, and are rotationally symmetric relative to the first core die D1 and the fourth core die D4. For example, the second orientation is rotated by 180 degrees relative to the first orientation.

[0081] In this embodiment, the connection manner of the first core die D1 and the second core die D2 is the same as that shown in FIG. 2B ; the interface region 3 and the interface region 4 of the third edge S3 of the first core die D1 are respectively opposite to and electrically connected with the interface region 4 and the interface region 3 of the third core die D3 in the second arrangement direction AD2; the interface region 7 and the interface region 8 of the fourth edge S4 of the second core die D2 are respectively opposite to and electrically connected with the interface region 8 and the interface region 7 of the fourth core die D4; and the interface region 5 and the interface region 6 of the second edge S2 of the third core die D3 are respectively opposite to and electrically connected with the interface region 6 and the interface region 5 of the second edge S2 of the fourth core die D4 in the first arrangement direction AD1.

[0082] Referring to FIG. 2D In some embodiments, the first core die D1 has a first orientation, and the other second core die D2, the third core die D3 and the fourth core die D4 all have the same second orientation, and are rotationally symmetric relative to the first core die D1. For example, the second orientation is rotated by 180 degrees relative to the first orientation.

[0083] In this embodiment, the connection manner of the first core die D1 and the second core die D2 and the connection manner of the first core die D1 and the third core die D3 are the same as those shown in FIG. 2C ; and the interface region 7 and the interface region 8 of the fourth edge S4 of the second core die D2 are respectively opposite to and electrically connected with the interface region 4 and the interface region 3 of the third edge S3 of the fourth core die D4 in the second arrangement direction AD2. The interface region 5 and the interface region 6 of the second edge S2 of the third core die D3 are respectively opposite to and electrically connected with the interface region 2 and the interface region 1 of the first edge S1 of the fourth core die D4 in the first arrangement direction AD1.

[0084] In some embodiments, the controller is further configured to control the first edge interface region of the first die to be connected with a third edge interface region or a fourth edge interface region of the second die in another die arrangement, the other die arrangement including the first die and the second die being rotationally symmetrical to each other, and the first edge interface region of the first die and the third edge interface region or the fourth edge interface region of the second die being opposite to each other in the first arrangement direction.

[0085] In some embodiments, the first edge, the second edge, the third edge and the fourth edge of the plurality of dies have the same length.

[0086] FIG. 3A to FIG. 3D A schematic plan view of a die module according to some other embodiments of the present disclosure is shown.

[0087] In some embodiments, the interface region of each edge of each die can be configured to match with two or more edge interface regions of other dies, for example, can match with the edge interface region of each edge of a plurality of edge interface regions of other dies, and can be connected with the interface region of the corresponding edge under the control of the controller based on the corresponding die arrangement.

[0088] Reference is made to FIG. 3A to FIG. 3D For example, each of the first edge interface region 101, the second edge interface region 102, the third edge interface region 103 and the fourth edge interface region 104 of each die 100 of the plurality of dies 100 is configured to match with the first edge interface region 101, the second edge interface region 102, the third edge interface region 103 and the fourth edge interface region 104 of other dies 100, and for example, can be connected with the first edge interface region 101 of other dies 100 based on a die arrangement under the control of the controller, connected with the second edge interface region 102 of other dies 100 based on another die arrangement under the control of the controller, connected with the third edge interface region 103 of other dies 100 based on yet another die arrangement under the control of the controller, and connected with the fourth edge interface region 104 of other dies 100 based on yet another die arrangement under the control of the controller.

[0089] In some embodiments, the plurality of edges of each die 100 have the same edge length, and have substantially the same interface region arrangement. For example, the planar shape of the die 100 can be a square, i.e., the first edge S1, the second edge S2, the third edge S3 and the fourth edge S4 have the same length.

[0090] In some embodiments, the interface region of each edge of each die 100 can be oppositely arranged and electrically connected with the interface region of any edge of another die 100. In this way, the multiplexing of the dies can be further improved, the cost of tape-out can be reduced, and the flexibility of the die arrangement can be improved.

[0091] For example, asFIG. 3A As shown, the first core grain D1 and the second core grain D2 are rotationally symmetrical to each other, for example, the orientation of the second core grain D2 is rotated 180 degrees relative to the orientation of the first core grain D1. The interface region 1 and the interface region 2 of the first side S1 of the first core grain D1 (i.e., the first side interface region 101) are respectively opposite and electrically connected to the interface region 2 and the interface region 1 of the first side S1 of the second core grain D2 (i.e., the first side interface region 101).

[0092] For example, as shown in FIG. 1A, the first core grain D1 and the second core grain D2 are arranged in the first arrangement direction AD1. The interface region 1 and the interface region 2 of the first side S1 of the first core grain D1 (i.e., the first side interface region 101) are respectively opposite and electrically connected to the interface region 6 and the interface region 5 of the second side S2 of the second core grain D2 (i.e., the second side interface region 102). FIG. 3B For example, as shown in FIG. 1B, the first core grain D1 and the second core grain D2 are arranged in the first arrangement direction AD1. The interface region 1 and the interface region 2 of the first side S1 of the first core grain D1 (i.e., the first side interface region 101) are respectively opposite and electrically connected to the interface region 4 and the interface region 3 of the third side S3 of the second core grain D2 (i.e., the third side interface region 103).

[0093] FIG. 3C For example, as shown in FIG. 1C, the first core grain D1 and the second core grain D2 are arranged in the first arrangement direction AD1. The interface region 1 and the interface region 2 of the first side S1 of the first core grain D1 (i.e., the first side interface region 101) are respectively opposite and electrically connected to the interface region 8 and the interface region 7 of the fourth side S4 of the second core grain D2 (i.e., the fourth side interface region 104).

[0094] For example, as shown in FIG. 1D, the first core grain D1 and the second core grain D2 are arranged in the first arrangement direction AD1. The interface region 1 and the interface region 2 of the first side S1 of the first core grain D1 (i.e., the first side interface region 101) are respectively opposite and electrically connected to the interface region 6 and the interface region 5 of the second side S2 of the second core grain D2 (i.e., the second side interface region 102). FIG. 3D It should be understood that,

[0095] It should be understood that, FIG. 3A to FIG. 3D The number of core grains included in the core grain module shown is only illustrative, and the present disclosure is not limited thereto. In some embodiments, the core grain module can further include a plurality of core grains arranged in the column direction. Since each core grain is provided with interface regions on four sides, more core grains can be arranged in the row direction and the column direction based on product requirements.

[0096] FIG. 3A to FIG. 3D The first side interface region 101 of the first core grain is used as an example to show its connection with the interface regions of different edges of other core grains in different core grain arrangement cases. It should be understood that the first side interface region 101 of the first core grain in these figures can also be replaced by the second side interface region 102, the third side interface region 103, or the fourth side interface region 104.

[0097] ​In the above embodiments, the interface regions are provided on all four sides of the core particles, but the present disclosure is not limited thereto.

[0098] In some other embodiments, the interface regions can also be provided on part of the edges of the core particles 100. For example, when the core particle module only includes a single row of core particles arranged along the first arrangement direction or only includes a single column of core particles arranged along the second arrangement direction, the interface regions can be provided on the edges of the core particles perpendicular to the corresponding arrangement direction, and the interface regions on the edges with the same extension direction as the arrangement direction can be omitted. For example, in the example shown in FIG. 1A and FIG. 1B , FIG. 3A to FIG. 3D , the core particles are arranged along the first arrangement direction AD1, the interface regions can be provided on the first edge S1 and the second edge S2 perpendicular to the first arrangement direction AD1, and the interface regions on the third edge S3 and the fourth edge S4 with the same extension direction as the first arrangement direction AD1 can be omitted. In this example, the interface regions of the core particles are provided on two parallel edges, and the other two edges can not be provided with the interface regions.

[0099] In some other embodiments, the interface regions of the core particles can also be provided on two intersecting edges, and the other two edges can not be provided with the interface regions.

[0100] FIG. 4A and FIG. 4B show schematic plan views of core particle modules according to some other embodiments of the present disclosure.

[0101] Referring to FIG. 4A and FIG. 4B , for example, each core particle 100 has a first edge interface region 101 provided on the first edge S1 and a third edge interface region 103 provided on the third edge S3, and the first edge interface region 101 and the third edge interface region 103 of each core particle 100 can each match the first edge interface region 101 and the third edge interface region 103 of another core particle 100, and can be connected to the first edge interface region 101 of another core particle 100 under the control of the controller based on the core particle arrangement or to the third edge interface region 103 of another core particle under the control of the controller based on the arrangement of another core particle.

[0102] In this example, the core particle module includes an odd number of core particles, but the number of core particles shown is only illustrative, and the present disclosure is not limited thereto.

[0103] In some embodiments, one of the plurality of core particles is a first connection core particle, another of the plurality of core particles is a second connection core particle, and the first connection core particle and the second connection core particle are adjacent to each other and electrically connected; the first connection core particle comprises a first interface region comprising n first interfaces; the second connection core particle comprises a second interface region comprising n second interfaces, where n≥1; the controller is configured to control the first interface region of the first connection core particle and the second interface region of the second connection core particle to be connected in a first connection order in a first core particle arrangement, and to control the first interface region of the first connection core particle and the second interface region of the second connection core particle to be connected in a second connection order in a second core particle arrangement, where in the first connection order, an i th first interface of the first connection core particle is configured to be connected with an i th second interface of the second connection core particle; and in the second connection order, the i th first interface of the first connection core particle is configured to be connected with an n-i+1 th second interface of the second connection core particle, where 1≤i≤n.

[0104] In some embodiments, one of the first core particle arrangement and the second core particle arrangement comprises that the first connection core particle and the second connection core particle have the same orientation and are arranged in translation in a direction parallel to the main surface of the core particle, and the other of the first core particle arrangement and the second core particle arrangement comprises that the first connection core particle and the second connection core particle are rotationally symmetric to each other.

[0105] In some embodiments, the rotational symmetry of the first connection core particle and the second connection core particle comprises that the orientation of the first connection core particle and the orientation of the second connection core particle are rotated by 180° or 90° relative to each other.

[0106] FIG. 5A and FIG. 5B FIG. 6 shows a plan view of the interface regions of the adjacent core particles connected to each other in a core particle module according to some embodiments of the present disclosure, which schematically shows different connection manners between the interface regions. For simplicity of the drawing, FIG. 5A and FIG. 5B In FIGS. 6A-6D, only two connected interface regions of each core particle are shown, and the overall structure of the core particle is not shown.

[0107] Referring to FIG. 5A and FIG. 5BIn some embodiments, the plurality of core dies in the core die module includes a first connection core die cd1 and a second connection core die cd2 adjacent to and electrically connected to each other. The first connection core die cd1 includes a first interface region IR1 disposed adjacent to a core die edge thereof, the first interface region IR1 including n first interfaces; the second connection core die cd2 includes a second interface region IR2 disposed adjacent to a core die edge thereof, the second interface region IR2 including n second interfaces; wherein n > 1. FIG. 5A and FIG. 5B An example is shown with n = 4. Each interface region can also include more than 4 interfaces; or, in other examples, each interface region can also include 1 or 2 or 3 interfaces, and the disclosure does not limit the number of interfaces in each interface region. The interconnections between the interfaces are shown as double-headed arrows.

[0108] In some embodiments, the interface regions adjacent to each other can have substantially the same interface arrangement, e.g., the same number of interfaces. For example, the first connection core die cd1 and the second connection core die cd2 are arranged along an arrangement direction AD, the first interface region IR1 and the second interface region IR2 are opposite to each other along the arrangement direction AD, and the extension direction of the core die edge on which the first interface region IR1 and the second interface region IR2 are disposed is substantially perpendicular to the arrangement direction AD. In some embodiments, the plurality of interfaces included in each of the first interface region IR1 and the second interface region IR2 are arranged along a direction substantially perpendicular to the arrangement direction AD, i.e., along a direction of the length of the edge on which the interface region is disposed. For example, the four first interfaces included in the first interface region IR1 are arranged along a direction perpendicular to the arrangement direction AD, and are numbered as a first interface 11 (or a first first interface), a second interface 12 (or a second first interface), a third interface 13 (or a third first interface), and a fourth interface 14 (or a fourth first interface), respectively. For example, the four second interfaces included in the second interface region IR2 are arranged along a direction perpendicular to the arrangement direction AD, and are numbered as a first interface 11 (or a first second interface), a second interface 12 (or a second second interface), a third interface 13 (or a third second interface), and a fourth interface 14 (or a fourth second interface), respectively.

[0109] In some embodiments, the controller is configured to support the interface regions of the chip to be connected in a plurality of connection manners, e.g., can support the interface regions of the chip to be connected in opposite connection orders. For example, the controller can be configured to control the first interface region IR1 of the first connection core die cd1 and the second interface region IR2 of the second connection core die cd2 to be connected in a first connection order in a first core die arrangement, and to control the first interface region IR1 of the first connection core die cd1 and the second interface region IR2 of the second connection core die cd2 to be connected in a second connection order in a second core die arrangement.

[0110] For example, in the first connection sequence, the i th first interface of the first connection core grain cd1 is connected with the i th second interface of the second core grain, and in the second connection sequence, the i th first interface of the first connection core grain cd1 is connected with the n-i+1 th second interface of the second core grain, where 1≤i≤n. i is the serial number of the interface in the sequentially arranged plurality of interfaces.

[0111] With reference to FIG. 5A In some embodiments, the first connection core grain cd1 and the second connection core grain cd2 have the same orientation and are arranged in translation in the arrangement direction AD, at this time, the orientations of the first interface region IR1 and the second interface region IR2 are the same, the arrangement sequences of the plurality of interfaces in each interface region are the same, and the interfaces with the same serial numbers are opposite to each other in the arrangement direction AD and can be electrically connected to each other under the control of the controller. For example, the 1 st interface 11 of the first interface region IR1 is connected with the 1 st interface 11 of the second interface region IR2; the 2 nd interface 12 of the first interface region IR1 is connected with the 2 nd interface 12 of the second interface region IR2; the 3 rd interface 13 of the first interface region IR1 is connected with the 3 rd interface 13 of the second interface region IR2; the 4 th interface 14 of the first interface region IR1 is connected with the 4 th interface 14 of the second interface region IR2, and so on.

[0112] With reference to FIG. 5B In some embodiments, the first connection core grain cd1 and the second connection core grain cd2 have different orientations and are rotationally symmetrical to each other, for example, are rotated by 180 degrees relative to each other. At this time, the orientations of the first interface region IR1 and the second interface region IR2 are different, the arrangement sequences of the plurality of interfaces in each interface region are opposite, and the i th interface in the first interface region IR1 is opposite to the n-i+1 th interface in the second interface region IR2 in the arrangement direction AD and can be electrically connected to each other under the control of the controller. For example, the 1 st interface 11 of the first interface region IR1 is connected with the 4 th interface 14 of the second interface region IR2; the 2 nd interface 12 of the first interface region IR1 is connected with the 3 rd interface 13 of the second interface region IR2; the 3 rd interface 13 of the first interface region IR1 is connected with the 2 nd interface 12 of the second interface region IR2; the 4 th interface 14 of the first interface region IR1 is connected with the 1 st interface 11 of the second interface region IR2. When each interface region includes a smaller or larger number of interfaces, the same applies.

[0113] In some embodiments, the core grains can be interconnected using UCIe, PCIe, XSR, etc. interface standards, or can also be interconnected using a self-defined interface standard, and the disclosure does not make a limitation in comparison.

[0114] In the die module of the embodiments of the present disclosure, since the controller supports the connection between the interface regions in different connection orders, i.e., the interface regions are connected in a first connection order and the interface regions are connected in a second connection order opposite to the first connection order, the die can be arranged and connected in different arrangements, and the die can be interconnected in a smaller connection path in different arrangements.

[0115] For example, the first connection die cd1 and the second connection die cd2 can have the same orientation and be arranged in translation in the arrangement direction AD, and the first interface region IR1 and the second interface region IR2 are opposite to each other in the arrangement direction AD and are connected by one of the first connection order and the second connection order (for example, the first connection order as shown). FIG. 5A For example, the first connection die cd1 and the second connection die cd2 can be rotationally symmetrical to each other, and the first interface region IR1 and the second interface region IR2 are opposite to each other in the arrangement direction AD and are connected by the other of the first connection order and the second connection order (for example, the second connection order as shown). FIG. 5B

[0116] In some embodiments, FIG. 1A to FIG. 4B and FIG. 1A to FIG. 4B The first connection die cd1 and the second connection die cd2 as shown can be any two adjacent and electrically connected dies 100 in a plurality of dies in any arrangement direction AD (for example, the first arrangement direction AD1 or the second arrangement direction AD2 as shown in FIG. 1A to FIG. 2D For example, can be the adjacent first die D1 and the second die D2, the adjacent first die D1 and the third die D3, the adjacent second die D2 and the fourth die D4, or the adjacent third die D3 and the fourth die D4 as shown in FIG. 5A The first interface region IR1 can be an edge interface region of the corresponding die located at any side, and the second interface region IR2 can be an edge interface region of the corresponding die located at any side.

[0117] Referring to FIG. 5B and FIG. 5A and FIG. 5B In some embodiments, the interface regions on the same length side of each die 100 have substantially the same interface arrangement, for example, each interface region 1 / 2 / 5 / 6 in the first side interface region 101 and the second side interface region 102 has substantially the same interface arrangement and number of interfaces, and the interface arrangement order of the interface regions can be the same or different. Taking the first die D1 and the second die D2 as an example, when the interface arrangement and arrangement order of the first side and the second side of each die 100 are the same, if the first die D1 and the second die D2 are arranged in translation, the first side interface region 101 of the first die D1 and the second side interface region 102 of the second die D2 adopt FIG. 3A to FIG. 4B ​The connection sequence shown is connected; when the first core particle D1 and the second core particle D2 are arranged in rotational symmetry, the first edge interface area 101 of the first core particle D1 and the first edge interface area 101 of the second core particle D2 adopt FIG. 5A The connection sequence shown is connected. The connection mode of the third edge and the fourth edge of each core particle is similar to the description above about the first edge and the second edge, and is not described here.

[0118] Reference FIG. 5B And FIG. 6A And FIG. 6B In some embodiments, the interface areas on all edges of each core particle 100 have substantially the same interface arrangement, and because the controller supports connection between interface areas in different connection sequences, regardless of the arrangement (rotated or not, rotated by 90 degrees or 180 degrees) between core particles, connection can be made between interface areas opposite in the arrangement direction between adjacent core particles, and the interconnection distance is small.

[0119] FIG. 6A And FIG. 6B A schematic plan view of a core particle according to some embodiments of the present disclosure is shown.

[0120] In some embodiments, each core particle includes an edge interface area located at an edge of the core particle, the edge interface area being symmetrically arranged with respect to a symmetry axis of the core particle perpendicular to the edge of the core particle, the symmetry axis extending through the center of the edge of the core particle. The edge of the core particle can be any one of the first edge, the second edge, the third edge and the fourth edge of the core particle, and accordingly, the edge interface area can be any one of the first edge interface area, the second edge interface area, the third edge interface area and the fourth edge interface area of the core particle.

[0121] In some embodiments, one or more core particles of the plurality of core particles are each a single core particle, and the edge of the core particle is an edge of the single core particle; or one or more core particles of the plurality of core particles are each a core particle combination including a plurality of sub-core particles, and the edge of the core particle is an edge of a corresponding sub-core particle or is a combination edge composed of edges of a plurality of sub-core particles in the core particle combination.

[0122] FIG. 6A And FIG. 6B The positional relationship between the edge interface area of the core particle and the symmetry axis of the core particle is described taking the first edge interface area 101 located at the first edge S1 of the core particle 100 as an example.

[0123] As FIG. 6A And FIG. 6BAs shown, the core 100 is symmetric with respect to a symmetry axis AL, which is perpendicular to the first side S1 and extends through the center of the first side S1. The first side interface region 101 is symmetric with respect to the symmetry axis AL. In some embodiments, the first side interface region 101 can include one or more interface regions, and the first side interface region 101 being symmetric with respect to the symmetry axis means that the entirety of the one or more interface regions is symmetric with respect to the symmetry axis. For example, when the first side interface region 101 includes interface region 1 and interface region 2, interface region 1 and interface region 2 are symmetric with respect to the symmetry axis AL. In another example, when the first side interface region 101 includes one interface region, the one interface region itself is symmetric with respect to the symmetry axis AL; similarly, when the first side interface region 101 includes more than two interface regions, the entirety of the first side interface region composed of the more than two interface regions is symmetric with respect to the symmetry axis AL.

[0124] Referring to FIG. 6C In some embodiments, the core 100 can be a single core, and the first side S1 is a side of the single core, and the symmetry axis AL is a symmetry axis of the single core. Referring to FIG. 6A In some embodiments, the core 100 can be a core combination, which can include a plurality of sub-cores, such as including a first sub-core 100a and a second sub-core 100b. The plurality of core sides of the core combination includes the sides of the respective sub-cores and a combination side composed of the sides of the plurality of sub-cores. For example, the first side S1 is a combination side composed of the side of the first sub-core 100a and the side of the second sub-core 100b, and the symmetry axis AL is a symmetry axis of the core combination, for example, the symmetry axis AL is perpendicular to the combination side and extends through the center of the combination side. In this context, a single core refers to a single core alone.

[0125] In this context, the edge interface region being symmetric with respect to the symmetry axis of the core includes the edge interface region being completely symmetric with respect to the symmetry axis of the core, and also includes the case that the edge interface region is approximately symmetric with respect to the symmetry axis of the core. The completely symmetric means that the symmetry axis of the core and the symmetry axis of the edge interface region are completely coincident, so that the respective interface regions of the respective cores can be completely aligned after rotation. The approximately symmetric means that the symmetry axis of the core and the symmetry axis of the edge interface region are slightly offset, and the offset distance is within an acceptable range, so that the respective interface regions of the respective cores can be approximately aligned after rotation and do not affect the interconnection between the interface regions.

[0126] For example, FIG. 6BThe edge interface region is shown to be arranged approximately symmetrically relative to the core particle symmetry axis within the allowable error range. For example, the symmetry axis of the core particle 100 perpendicular to the first side S1 is the first symmetry axis AL1, and the symmetry axis of the first side interface region 101 perpendicular to the first side S1 is the second symmetry axis AL2. The first symmetry axis AL1 and the second symmetry axis AL2 have an offset distance in the extension direction of the first side S1. In some embodiments, the offset distance is less than or equal to 0.01% of the length of the first side S1. It should be understood that when the offset distance is zero, the first symmetry axis AL1 and the second symmetry axis AL2 coincide with each other, i.e., the case of complete symmetry shown in FIG. 1A to FIG. 4B and FIG. 6A the case of complete symmetry shown in

[0127] It should be understood that for other core particle sides of the core particle 100, the edge interface region is arranged symmetrically on the corresponding core particle side, similar to the above description of the first side and the first side interface region, which will not be described herein again. FIG. 6B FIG. 7 and FIG. 7 Similar to the description of the first side and the first side interface region, the description will not be repeated herein.

[0128] In the embodiments of the present disclosure, since each edge interface region is arranged symmetrically on the corresponding core particle side, the interface regions of the adjacent core particles can be opposite to each other and connected to each other with a shorter connection path, regardless of whether the adjacent core particles are arranged in translation or after rotation.

[0129] In some embodiments, the plurality of core particles are arranged in an array along a first arrangement direction and a second arrangement direction parallel to the main surface of the core particle, and any two adjacent core particles in the plurality of core particles in the first arrangement direction or the second arrangement direction are configured to have the same orientation and arranged in translation or rotationally symmetric to each other.

[0130] In some embodiments, the plurality of core particles have approximately the same size, and the plurality of core particles arranged along the first arrangement direction or the second arrangement direction can be approximately aligned with each other, i.e., having edges aligned in the corresponding arrangement direction. In this way, the core particle arrangement and the module occupation area can be optimized.

[0131] Since each interface region of the core particle is configured to be matched with a plurality of interface regions of other core particles, the plurality of core particles can be arranged and connected in various ways. Moreover, since the core particle has a plurality of edge interface regions, the core particle array can be expanded in multiple directions, and the size of each core particle can be set smaller, thereby greatly improving the yield. It should be understood that the number of core particles in each row or column in the core particle module shown in the figure is only illustrative, and the present disclosure is not limited thereto. The arrangement of the core particle array can be based on product requirements.

[0132] ​In some embodiments, the multiple chips in the chip module may be chips manufactured using the same semiconductor process. For example, these chips may be formed from the same wafer and have substantially the same chip structure. That is, multiple chips can be generated in a single tape-out, and interconnected with each chip in the manner described above, thereby scalable bandwidth and computing power. In other embodiments, the chip module of this disclosure can also be applied to the interconnection between chips manufactured using different processes (e.g., different process nodes). For example, this interconnection technology can be used to reuse previous generation chips, thereby also reducing tape-out costs.

[0133] This disclosure provides a packaging structure including a chip module and an interconnecting component as described in any of the above embodiments, wherein the plurality of chips are electrically connected to each other through the interconnecting component.

[0134] In some embodiments, multiple chips can be integrated together using various packaging methods. For example, interconnect components can be interposers, redistribution layers, packaging substrates, or other components used for interconnection between chips. The packaging structure can be flip-chip packaging, chip-on-wafer (CoW) packaging, chip-on-wafer-on-substrate (CoWoS) packaging, etc., and this disclosure does not limit the type of packaging structure.

[0135] FIG. 1A to FIG. 4B A schematic cross-sectional view of a packaging structure according to some embodiments of the present disclosure is shown.

[0136] refer to FIG. 7 For example, the packaging structure includes a chip module 500 and an interconnect component 600. The interconnect component 600 may be disposed on one side of the chip module 500 and provides interconnection between multiple chips 100. For example, the interconnect component 600 may include conductive lines for interconnecting multiple chips, and corresponding interfaces of the multiple chips are electrically connected to each other through the conductive lines. It should be noted that... ​ The illustration of adjacent cores in contact with each other is merely to show the corresponding interfaces connecting to each other, and does not imply that these cores are in physical contact with each other. ​ As shown, multiple core particles can be arranged side by side with intervals between them.

[0137] In some embodiments, the packaging structure may integrate one or more chip modules, each chip module being a chip; the packaging structure may also integrate other individual chips. In the chip modules and packaging structures of this disclosure, the chip type can be selected according to product requirements, and this disclosure does not impose any limitations on it.

[0138] In the die module and the packaging structure of the embodiments of the present disclosure, the interface area of each die can be matched with multiple interface areas of other dies, and the controller supports the interface area of the die to be connected with different interface areas in different die arrangement, so that the reuse of the same die can be supported, the cost of tape-out can be reduced, and the flexibility of die arrangement and connection can be improved.

[0139] The following points need to be explained:

[0140] (1) In the drawings of the embodiments of the present disclosure, only the structures related to the embodiments of the present disclosure are involved, and other structures can be referred to the general design.

[0141] (2) In the case of no conflict, the features in the same embodiment and different embodiments of the present disclosure can be combined with each other.

[0142] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited to this. Any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present disclosure, which should be covered within the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A chip module, characterized in that, include: Multiple cores, wherein each core includes multiple interface regions, and each interface region is configured to match multiple interface regions of other cores; as well as The controller is configured to control the interconnection between the plurality of cores, and is configured to control an interface region of one of the plurality of cores to connect with a different interface region of another of the plurality of cores in different core arrangements. One of the plurality of cores is a first connecting core, and the other of the plurality of cores is a second connecting core, wherein the first connecting core and the second connecting core are adjacent to each other in the arrangement direction and are electrically connected; Each of the multiple core edges of the first connecting core includes a first interface area, and the first interface area includes n first interfaces; Each of the multiple core edges of the second connecting core includes a second interface region, and the second interface region includes n second interfaces, where n≥1; and The controller is configured to connect the first interface area of ​​the first connecting core and the second interface area of ​​the second connecting core in a first core arrangement according to a first connection order, and to connect the first interface area of ​​the first connecting core and the second interface area of ​​the second connecting core in a second core arrangement according to a second connection order. In the first connection sequence, the i-th first interface of the first connection core is configured to connect to the i-th second interface of the second connection core; and in the second connection sequence, the i-th first interface of the first connection core is configured to connect to the (n-i+1)-th second interface of the second connection core, where 1≤i≤n. In both the first and second core arrangement scenarios, the first interface area of ​​the first connecting core and the second interface area of ​​the second connecting core are opposite to each other in the arrangement direction, and at least one of the first and second connecting cores has a different orientation in both scenarios.

2. The chip module according to claim 1, characterized in that, Each of the plurality of core particles has a plurality of core particle edges and a plurality of edge interface areas respectively disposed on the plurality of core particle edges; The first interface area is the edge interface area of ​​the first connecting core, the second interface area is the edge interface area of ​​the second connecting core, and the controller is configured to control an edge interface area of ​​the first connecting core to connect with an edge interface area of ​​the second connecting core located on a different side under different core arrangement conditions.

3. The chip module according to claim 1, characterized in that, Each of the plurality of core particles has a first side and a second side, and has a first side interface region and a second side interface region located respectively on the first side and the second side; and The controller is configured to connect the first side interface region of the first core in the plurality of cores to the second side interface region of the second core in the plurality of cores in the first core arrangement, and to connect the first side interface region of the first core to the first side interface region of the second core in the second core arrangement.

4. The chip module according to claim 3, characterized in that, The first core arrangement includes the first core and the second core having the same orientation and being arranged in a first arrangement direction parallel to the main surface of the core, such that the first side interface area of ​​the first core and the second side interface area of ​​the second core are opposite to each other in the first arrangement direction; The second core arrangement includes rotational symmetry between the first core and the second core, and the first side interface area of ​​the first core and the first side interface area of ​​the second core are opposite to each other in the first arrangement direction.

5. The chip module according to claim 3, characterized in that, Each of the plurality of core particles further comprises a third side and a fourth side, and has a third side interface region and a fourth side interface region respectively located on the third side and the fourth side, wherein the extending directions of the third side and the fourth side intersect the extending directions of the first side and the second side; and The controller is configured to connect the third side interface region of the first core to the fourth side interface region of the third core in the third core arrangement, and to connect the third side interface region of the first core to the third side interface region of the third core in the fourth core arrangement.

6. The chip module according to claim 5, characterized in that, The third core arrangement includes the first core and the third core having the same orientation and being arranged in a second arrangement direction parallel to the main surface of the core, and the third side interface area of ​​the first core and the fourth side interface area of ​​the third core being opposite to each other in the second arrangement direction; The fourth core arrangement includes the first core and the third core being rotationally symmetrical to each other, and the third side interface area of ​​the first core and the third side interface area of ​​the fourth core being opposite to each other in the second arrangement direction.

7. The chip module according to claim 5, characterized in that, The first and second sides of the plurality of core particles have the same first length, and the third and fourth sides of the plurality of core particles have the same second length, wherein the first length is greater than or equal to the second length.

8. The core module according to claim 5, characterized in that, The controller is also configured to control the connection of the first side interface area of ​​the first core to the third side interface area or the fourth side interface area of ​​the second core in another core arrangement, wherein the other core arrangement includes the first core and the second core being rotationally symmetrical to each other, and the first side interface area of ​​the first core and the third side interface area or the fourth side interface area of ​​the second core being opposite to each other in a first arrangement direction.

9. The chip module according to claim 8, characterized in that, The first, second, third, and fourth sides of the plurality of core particles all have the same length.

10. The chip module according to claim 1, characterized in that, One of the first and second core arrangement configurations includes the first and second connecting cores having the same orientation and being arranged in a translational manner in a direction parallel to the main surface of the core, and the other of the first and second core arrangement configurations includes the first and second connecting cores being rotationally symmetrical to each other.

11. The chip module according to claim 10, characterized in that, The rotational symmetry of the first connecting core and the second connecting core includes that the orientation of the first connecting core and the orientation of the second connecting core are rotated 180° or 90° relative to each other.

12. The chip module according to any one of claims 1-11, characterized in that, Each core includes an edge interface region located on a core edge, the edge interface region being symmetrically arranged with respect to an axis of symmetry perpendicular to the core edge, the axis of symmetry extending through the center of the core edge.

13. The chip module according to claim 12, characterized in that, One or more of the plurality of core particles are each a single core particle, and the edge of the core particle is the edge of the single core particle; or One or more of the core particles are each a core particle combination including multiple sub-core particles, and the core particle edge is the edge of the corresponding sub-core particle or a combination edge composed of the edges of multiple sub-core particles in the core particle combination.

14. The chip module according to any one of claims 1-11, characterized in that, The plurality of core particles are arranged in an array along a first arrangement direction and / or a second arrangement direction parallel to the main surface of the core particles. Any two adjacent core particles in the first arrangement direction or the second arrangement direction are configured to have the same orientation and be arranged in a translational or rotationally symmetrical manner.

15. A packaging structure, characterized in that, include: The chip module as described in any one of claims 1-14; as well as An interconnecting component, wherein the plurality of cores are electrically connected to each other via the interconnecting component.

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