Semiconductor device

Abstract

The invention provides a semiconductor device which can suppress inrush current during initial charging, shorten initial charging time and suppress driving voltage fluctuation. The lower-phase power supply (VccL) outputs a lower-phase-side drive voltage (VL). A lower-phase drive control circuit (1b) receives a lower-phase-side drive voltage (VL) and performs drive control of a lower-phase switching element (2b). When the lower-phase switching element (2b) is turned on by the drive control of the lower-phase drive control circuit (1b), the bootstrap circuit (1c) discharges charge generated by charging based on the charging current (Ib) flowing out from the lower-phase power supply (VccL). The upper-phase drive control circuit (1a) includes a charge current limiting circuit (1a1) that limits a charge current (Ib) flowing from the lower-phase power supply (VccL) into the bootstrap circuit (1c) in accordance with a voltage level of a charge voltage (Vchg), and performs drive control of the upper-phase switching element (2a) by receiving an upper-phase-side drive voltage (VH) when the charge voltage (Vchg) is determined.

Description

Technical Field

[0001] This invention relates to semiconductor devices. Background Technology

[0002] In a semiconductor device having an IPM (Intelligent Power Module) that incorporates a switching element as a power semiconductor element, the drive voltage for driving the gate of the switching element on the upper phase side uses a bootstrap circuit.

[0003] As related technologies, for example, a power conversion device has been proposed that includes a charge / discharge resistor that suppresses inrush current at the start of pre-charging of a smoothing capacitor and discharges charge at the start of discharging (Patent Document 1). In addition, a power control device has been proposed that uses the on-resistance of a semiconductor switching element after it is turned on to limit current for preventing inrush current during a predetermined period after the power is turned on (Patent Document 2).

[0004] Existing technical documents Patent documents Patent Document 1: Japanese Patent Application Publication No. 2015-107045 Patent Document 2: Japanese Patent Application Publication No. 2009-44914 Summary of the Invention

[0005] Technical issues The object of the present invention is to provide a semiconductor device that achieves suppression of inrush current during initial charging, reduction of initial charging time, and suppression of driving voltage fluctuations.

[0006] Technical solution To address the aforementioned problems, a semiconductor device is provided. The semiconductor device includes: an upper-phase switching element; a lower-phase switching element connected in series with the upper-phase switching element; a lower-phase power supply that outputs a lower-phase driving voltage; a lower-phase driving control circuit that receives the lower-phase driving voltage and performs driving control of the lower-phase switching element; a bootstrap circuit that, when the lower-phase switching element is turned on by the driving control of the lower-phase driving control circuit, generates a charging voltage by means of charge, said charge being charge generated by charging current flowing from the lower-phase power supply; and an upper-phase driving control circuit that includes a charging current limiting circuit that limits the charging current flowing from the lower-phase power supply into the bootstrap circuit based on the voltage level of the charging voltage, and receives the charging voltage as the upper-phase driving voltage to perform driving control of the upper-phase switching element.

[0007] Technical effect According to one aspect, it is possible to suppress inrush current during initial charging, shorten the initial charging time, and suppress driving voltage fluctuations. Attached Figure Description

[0008] Figure 1 This is a diagram used to illustrate an example of a semiconductor device.

[0009] Figure 2 This is a diagram illustrating an example of the overall structure of a semiconductor device for reference.

[0010] Figure 3 This diagram illustrates the operation of the bootstrap circuit during initial charging.

[0011] Figure 4 This is a diagram showing an example of the waveform of the charging current during initial charging.

[0012] Figure 5 This is a diagram showing an example of the waveform of the charging voltage during initial charging.

[0013] Figure 6 This is a diagram showing the state when the load current flowing during PWM operation is in the negative direction.

[0014] Figure 7 This is a diagram showing the state when the load current flowing during PWM operation is in the positive direction.

[0015] Figure 8 This is a diagram used to illustrate the variation of the upper phase drive voltage during PWM operation.

[0016] Figure 9 This is a diagram illustrating an example of the overall structure of the semiconductor device according to this embodiment.

[0017] Figure 10 This is a diagram illustrating an example of the structure of the LVIC and bootstrap circuit on the upper phase side.

[0018] Figure 11 This is a diagram illustrating an example of the operation of the charging current limiting circuit at the start of initial charging.

[0019] Figure 12 This diagram illustrates an example of the operation of a charging current limiting circuit when the charging voltage during initial charging reaches a predetermined level.

[0020] Figure 13 This is a diagram showing an example of the waveform of the charging current during initial charging.

[0021] Figure 14 This is a diagram showing an example of the waveform of the charging voltage during initial charging.

[0022] Figure 15 This is a diagram used to illustrate the variation of the upper phase drive voltage during PWM operation.

[0023] Figure 16This is a diagram showing a modified example of the structure of the semiconductor device according to this embodiment.

[0024] Figure 17 This is a diagram illustrating an example of the operation of the charging current limiting circuit at the start of initial charging.

[0025] Figure 18 This diagram illustrates an example of the operation of a charging current limiting circuit when the charging voltage during initial charging reaches a predetermined level.

[0026] Symbol Explanation 1. Semiconductor device 1a Upper phase drive control circuit 1a1 Charging Current Limiting Circuit 1b Lower phase drive control circuit 1c bootstrap circuit 2a Upper phase switching element 2b Lower phase switching element VccL lower phase power supply VL Lower phase-side drive voltage VH Phase-side drive voltage Ib charging current P positive extreme N negative extreme IN1 Upper Phase Input Terminal IN2 Lower Phase Input Terminal OUT output terminal Detailed Implementation

[0027] Hereinafter, this embodiment will be described with reference to the accompanying drawings. It should be noted that in this specification and drawings, repeated descriptions are sometimes omitted by labeling elements having substantially the same structure with the same symbols.

[0028] Figure 1 This is a diagram illustrating an example of a semiconductor device. The semiconductor device 1 includes an upper phase switching element 2a, a lower phase switching element 2b, an upper phase drive control circuit 1a, a lower phase drive control circuit 1b, a bootstrap circuit 1c, and a lower phase power supply VccL. Furthermore, the upper phase drive control circuit 1a includes a charging current limiting circuit 1a1.

[0029] The upper phase switching element 2a and the lower phase switching element 2b are connected in series. The high-potential main terminal of the upper phase switching element 2a is connected to the positive terminal P, and the low-potential main terminal of the upper phase switching element 2a is connected to the output terminal OUT, the reference potential terminal of the upper phase drive control circuit 1a, the reference potential terminal of the bootstrap circuit 1c, and the high-potential main terminal of the lower phase switching element 2b. The low-potential main terminal of the lower phase switching element 2b is connected to the negative terminal N, the reference potential terminal of the lower phase drive control circuit 1b, and the negative terminal of the lower phase power supply VccL.

[0030] Here, the lower phase power supply VccL outputs the lower phase side drive voltage VL. The lower phase drive control circuit 1b receives the lower phase side drive voltage VL and performs drive control of the lower phase switching element 2b based on the switch drive signal input via the lower phase input terminal IN2.

[0031] Furthermore, when the lower phase switching element 2b is turned on by the drive control of the lower phase drive control circuit 1b, the charging current Ib flows sequentially through the positive terminal of the lower phase power supply VccL, the bootstrap circuit 1c, the charging current limiting circuit 1a1, the bootstrap circuit 1c, from the high-potential main terminal to the low-potential main terminal of the lower phase switching element 2b, and the negative terminal of the lower phase power supply VccL.

[0032] The bootstrap circuit 1c generates a charging voltage Vchg by charging the charge generated based on the charging current Ib flowing from the lower phase power supply VccL. The charging current limiting circuit 1a1 limits the charging current Ib flowing from the lower phase power supply VccL into the bootstrap circuit 1c according to the voltage level of the charging voltage Vchg.

[0033] The upper phase drive control circuit 1a receives the charging voltage Vchg output from the bootstrap circuit 1c as the upper phase drive voltage VH to drive and control the upper phase switching element 2a.

[0034] Thus, the semiconductor device 1 has a structure that limits the charging current Ib flowing from the lower phase power supply VccL into the bootstrap circuit 1c according to the voltage level of the charging voltage Vchg. As a result, it is possible to suppress the generation of large charging current (inrush current) during initial charging, thereby shortening the initial charging time and suppressing fluctuations in the upper phase drive voltage.

[0035] Next, use Figures 2 to 8 The semiconductor device of the reference example will be described. Figure 2 This is a diagram illustrating an example of the overall structure of a semiconductor device according to a reference example. The semiconductor device 100 includes a semiconductor module 110 and a power supply unit 120.

[0036] The semiconductor module 110 has LVIC (Low Voltage IC) 11U, 11V, 11W, 12 and semiconductor chips 1U, 1V, 1W, 1X, 1Y, 1Z, and has IPM functionality.

[0037] LVIC 11U and semiconductor chip 1U are configured in phase U on the upper phase (high side), LVIC 11V and semiconductor chip 1V are configured in phase V on the upper phase, and LVIC 11W and semiconductor chip 1W are configured in phase W on the upper phase.

[0038] LVIC 12 is configured in the lower phase (lower side). Semiconductor chip 1X is configured in the X phase of the lower phase, semiconductor chip 1Y is configured in the Y phase of the lower phase, and semiconductor chip 1Z is configured in the Z phase of the lower phase.

[0039] Thus, the semiconductor device 100 has the following configuration: LVICs 11U, 11V, and 11W are respectively configured as gate drivers for driving the upper phase semiconductor chips 1U, 1V, and 1W, and LVIC 12 is configured as a gate driver for driving the lower phase semiconductor chips 1X, 1Y, and 1Z.

[0040] Semiconductor chip 1U includes a U-phase switching element 13a and an FWD (Freewheel Diode) 13b connected in reverse parallel with the U-phase switching element 13a. Semiconductor chip 1V includes a V-phase switching element 14a and an FWD 14b connected in reverse parallel with the V-phase switching element 14a. Semiconductor chip 1W includes a W-phase switching element 15a and an FWD 15b connected in reverse parallel with the W-phase switching element 15a.

[0041] Additionally, semiconductor chip 1X includes an X-phase switching element 16a and an FWD 16b connected in reverse parallel with the X-phase switching element 16a. Semiconductor chip 1Y includes a Y-phase switching element 17a and an FWD 17b connected in reverse parallel with the Y-phase switching element 17a. Semiconductor chip 1Z includes a Z-phase switching element 18a and an FWD 18b connected in reverse parallel with the Z-phase switching element 18a.

[0042] The U-phase switching element 13a, V-phase switching element 14a, W-phase switching element 15a, X-phase switching element 16a, Y-phase switching element 17a, and Z-phase switching element 18a are voltage-driven switching elements, which are IGBTs (Insulated Gate Bipolar Transistors). Alternatively, power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) can be used instead of IGBTs.

[0043] Additionally, FWD 13b, FWD 14b, FWD 15b, FWD 16b, FWD 17b, and FWD 18b are return current diodes that allow the load current to flow back. When the U-phase switching element 13a, V-phase switching element 14a, W-phase switching element 15a, X-phase switching element 16a, Y-phase switching element 17a, and Z-phase switching element 18a are power MOSFETs, FWD can also be implemented using parasitic diodes.

[0044] For the semiconductor module 110, as terminals on the upper phase side, there are terminals VccU (U-phase drive power supply terminal), VccV (V-phase drive power supply terminal), VccW (W-phase drive power supply terminal), VinU (U-phase input terminal), VinV (V-phase input terminal), VinW (W-phase input terminal), GNDU (U-phase GND terminal), GNDV (V-phase GND terminal), and GNDW (W-phase GND terminal).

[0045] In addition, the semiconductor module 110 has terminals Vcc, VinX (X-phase input terminal), VinY (Y-phase input terminal), VinZ (Z-phase input terminal), and GND as terminals on the lower phase side. The semiconductor module 110 also has a positive terminal P, a negative terminal N, an output terminal U, an output terminal V, and an output terminal W.

[0046] The collectors of each of the U-phase switching element 13a, V-phase switching element 14a, and W-phase switching element 15a are connected to the positive terminal P. The node n1, which connects the emitter of the U-phase switching element 13a to the collector of the X-phase switching element 16a, is connected to the terminal GNDU, the reference potential terminal of LVIC 11U, and the output terminal U.

[0047] Node n2, which connects the emitter of V-phase switching element 14a to the collector of Y-phase switching element 17a, is connected to terminal GNDV, the reference potential terminal of LVIC 11V, and the output terminal V.

[0048] Node n3, which connects the emitter of phase W switching element 15a to the collector of phase Z switching element 18a, is connected to terminal GNDW, the reference potential terminal of LVIC 11W, and output terminal W.

[0049] Node n4, which connects the emitters of X-phase switching element 16a, Y-phase switching element 17a, and Z-phase switching element 18a, is connected to terminal GND, the reference potential terminal of LVIC 12, and the negative terminal N.

[0050] On the other hand, the power supply unit 120 includes a lower phase power supply VccL, bootstrap circuits 21U, 21V, and 21W, and a smoothing capacitor C0. Bootstrap circuit 21U is located on the U phase of the upper phase, bootstrap circuit 21V is located on the V phase of the upper phase, and bootstrap circuit 21W is located on the W phase of the upper phase. The lower phase power supply VccL and the smoothing capacitor C0 are located on the lower phase side.

[0051] The positive terminal of the lower phase power supply VccL is connected to terminal Vcc, one end of the smoothing capacitor C0, and the first terminal p1 of each of the bootstrap circuits 21U, 21V, and 21W. The first terminal p1 is the terminal that receives the charging current during initial charging. The negative terminal of the lower phase power supply VccL is connected to the other end of the smoothing capacitor C0 and terminal GND.

[0052] The second terminal p2 of bootstrap circuit 21U is connected to terminal VccU, the second terminal p2 of bootstrap circuit 21V is connected to terminal VccV, and the second terminal p2 of bootstrap circuit 21W is connected to terminal VccW. The second terminal p2 is used for inputting charging current and discharging charging voltage.

[0053] The reference potential terminal gd of bootstrap circuit 21U is connected to terminal GNDU, the reference potential terminal gd of bootstrap circuit 21V is connected to terminal GNDV, and the reference potential terminal gd of bootstrap circuit 21W is connected to terminal GNDW.

[0054] Here, the bootstrap circuit 21U generates a drive voltage (upper phase drive voltage) for driving the gate of the U-phase switching element 13a based on the power supply voltage (lower phase drive voltage) output from the lower phase power supply VccL, and supplies the drive voltage to the LVIC 11U via the terminal VccU. The LVIC 11U receives the U-phase drive signal sent from a control unit such as a microcomputer (not shown) via the terminal VinU, and drives the U-phase switching element 13a (turn-on / turn-off switching drive) based on the U-phase drive signal.

[0055] Additionally, the bootstrap circuit 21V generates a drive voltage for driving the gate of the V-phase switching element 14a based on the power supply voltage output from the lower phase power supply VccL, and supplies the drive voltage to the LVIC 11V via the terminal VccV. The LVIC 11V receives the V-phase drive signal sent from the control unit via the terminal VinV, and drives the V-phase switching element 14a based on the V-phase drive signal.

[0056] Furthermore, the bootstrap circuit 21W generates a drive voltage for driving the gate of the W-phase switching element 15a based on the power supply voltage output from the lower phase power supply VccL, and supplies the drive voltage to the LVIC 11W via the terminal VccW. The LVIC 11W receives the W-phase drive signal sent from the control unit via the terminal VinW, and drives the W-phase switching element 15a based on the W-phase drive signal.

[0057] On the other hand, the LVIC 12 uses the power supply voltage of the lower phase power supply VccL as the driving voltage for the gate driving of the X-phase switching element 16a, the Y-phase switching element 17a, and the Z-phase switching element 18a. Moreover, the LVIC 12 receives the X-phase drive signal sent from the control unit via the VinX terminal and drives the X-phase switching element 16a based on the X-phase drive signal.

[0058] Similarly, LVIC 12 receives the Y-phase drive signal sent from the control unit via terminal VinY and drives the Y-phase switching element 17a based on the Y-phase drive signal. In addition, it receives the Z-phase drive signal sent from the control unit via terminal VinZ and drives the Z-phase switching element 18a based on the Z-phase drive signal.

[0059] Thus, the semiconductor device 100 applies bootstrap circuits 21U, 21V, and 21W to the power supply on the upper phase side. These bootstrap circuits 21U, 21V, and 21W are respectively composed of diodes, capacitors, and limiting resistors (the internal circuit structure will be described later). Therefore, compared to a structure where power supplies are configured separately for the U, V, and W phases, the structure of the semiconductor device 100 can reduce the size of the components.

[0060] Next, use Figures 3-5 The operation of the bootstrap circuit during the initial charging of the semiconductor device 100 will be explained. It should be noted that since the bootstrap circuit has the same circuit structure and operation in phases U, V, and W, phase U will be explained in the following description.

[0061] Figure 3 This diagram illustrates the operation of the bootstrap circuit during initial charging. The bootstrap circuit 21U includes a diode Db, a capacitor Cb, and a limiting resistor Rb.

[0062] One end of the limiting resistor Rb is connected to the positive terminal of the lower phase power supply VccL, one end of the smoothing capacitor C0, and the terminal Vcc. The other end of the limiting resistor Rb is connected to the anode of the diode Db. The cathode of the diode Db is connected to one end of the capacitor Cb and the terminal VccU. The other end of the capacitor Cb is connected to the terminal GNDU. In this bootstrap circuit 21U, the following operations are performed during initial charging.

[0063] [Step S11] LVIC 12 turns on the X-phase switching element 16a based on the X-phase drive signal input via terminal VinX.

[0064] [Step S12] If the X-phase switching element 16a is turned on, the other end of the capacitor Cb is connected to the negative terminal of the lower phase power supply VccL via terminals GNDU and GND. Therefore, the charging current Ib flows sequentially through the positive terminal of the lower phase power supply VccL, the limiting resistor Rb, from the anode to the cathode of the diode Db, from the collector to the emitter of the X-phase switching element 16a, and the negative terminal of the lower phase power supply VccL.

[0065] [Step S13] Charge is applied to capacitor Cb by passing a charging current Ib.

[0066] [Step S14] The charge charged into capacitor Cb is discharged. During this process, the discharged charging voltage is applied to LVIC 11U via terminal VccU. In addition, the upper phase drive voltage VH when the charging voltage is determined is used as the gate drive voltage of LVIC 11U. It should be noted that the lower phase drive voltage VL output from the lower phase power supply VccL is supplied as the gate drive voltage of LVIC 12.

[0067] Figure 4 This is a graph showing an example of the waveform of the charging current during the initial charging process. The vertical axis represents the charging current Ib, and the horizontal axis represents time.

[0068] [Interval t1] If LVIC 12 receives an X-phase drive signal indicating that X-phase switching element 16a is turned on via terminal VinX, then X-phase switching element 16a is turned on.

[0069] At this time, as described above, the charging current Ib flows in the capacitor Cb. However, since the capacitor Cb is in a state before it is charged, a large current (surge current Ibmax) flows in the capacitor Cb. However, since the bootstrap circuit 21U is equipped with a limiting resistor Rb to suppress the surge current, the peak value of the surge current Ibmax is suppressed to not exceed the rated current value Ir.

[0070] [Interval t2] If LVIC 12 receives an X-phase drive signal indicating the turn-off of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned off. At this time, the other end of capacitor Cb becomes non-conductive with the negative terminal of the lower phase power supply VccL, and therefore no charging current Ib flows.

[0071] [Interval t3] If LVIC 12 receives an X-phase drive signal indicating the conduction of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned on. In this case, although charging current Ib flows to capacitor Cb, the peak value of the charging current Ib flowing to capacitor Cb in interval t3 is smaller than the peak value of the charging current Ib flowing to capacitor Cb in interval t1 because the charge generated during charging in interval t1 has accumulated in capacitor Cb.

[0072] [Interval t4] If LVIC 12 receives an X-phase drive signal indicating the turn-off of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned off. At this time, the other end of capacitor Cb becomes non-conductive with the negative terminal of the lower phase power supply VccL, and therefore no charging current Ib flows.

[0073] The same operation is repeated until capacitor Cb is fully charged. Furthermore, if a charging time tb1 is required to fully charge capacitor Cb, the initial charging ends and the system transitions to the operational state.

[0074] Thus, during the initial charging operation, the X-phase switching element 16a (the IGBT of the lower phase) is switched on / off, charging the capacitor Cb (the capacitor of the bootstrap circuit of the upper phase) in the bootstrap circuit 21U.

[0075] In this case, the charging current Ib flows into capacitor Cb as a surge current Ibmax with the maximum current value before charge accumulates in capacitor Cb. As charge is added to capacitor Cb, the current value of the charging current Ib decreases.

[0076] Figure 5 This is a diagram showing an example of the waveform of the charging voltage during the initial charging. The vertical axis represents the charging voltage Vchg, and the horizontal axis represents time. As the charging current Ib flows into the capacitor Cb, charge gradually fills the capacitor Cb, and the charging voltage Vchg discharged from the capacitor Cb also increases.

[0077] Furthermore, since the charging voltage Vchg needs to reach a constant charging voltage value (upper phase driving voltage VH) from the start of charging capacitor Cb to the charging time tb1 after the charging is completed, the initial charging state ends and the device transitions to the operating state.

[0078] It should be noted that the more the charging current Ib increases, the faster the charge is applied to the capacitor Cb, and therefore the shorter the charging time tb1. Conversely, the more the charging current Ib decreases, the slower the charging speed, and therefore the longer the charging time tb1.

[0079] Next, use Figures 6 to 8The operation of the bootstrap circuit during PWM (Pulse Width Modulation) operation is explained. Once the initial charging is complete, the semiconductor device 100 transitions to an operational state and performs PWM-based power control using switching elements.

[0080] Figure 6 This diagram illustrates the state when the load current flowing during PWM operation is in the negative direction. A load 3a and a power supply Vccm are connected to semiconductor module 110. Load 3a is an inductive load such as a motor, comprising an inductor La and a variable resistor RXa. One end of inductor La is connected to the positive terminal P and the positive terminal of power supply Vccm, while the other end of inductor La is connected to one end of the variable resistor RXa. The other end of the variable resistor RXa is connected to the output terminal U. The negative terminal of power supply Vccm is connected to the negative terminal N.

[0081] In this circuit structure, if the X-phase switching element 16a is turned on, the charging current Ib flows along... Figure 3 The current flows in the direction described above. In addition, when the X-phase switching element 16a is turned on and the load current IL flowing from the load 3a is in the negative direction, the load current IL flows sequentially through the load 3a, the output terminal U, from the collector to the emitter of the X-phase switching element 16a, and the negative terminal N.

[0082] In the case of an operating mode where the load current IL is oriented in the negative direction (hereinafter referred to as mode m1), the upper phase drive voltage VH applied to the terminal VccU is calculated by the following equation (1).

[0083] VH=VL‐V FBD -Rb×Ib-V CE（sat） …(1) In the parameters of equation (1), VL is the voltage of the lower phase power supply VccL (lower phase drive voltage), V FBD V is the forward voltage of diode Db, Rb is the resistance value of limiting resistor Rb, Ib is the charging current value, and V CE（sat） It is the collector-emitter saturation voltage when the load current IL flows through the X-phase switching element 16a.

[0084] It should be noted that the direction from the negative terminal to the positive terminal of the lower phase power supply VccL is positive, and the lower phase drive voltage VL is positive. Therefore, when the charging current Ib flows in the direction of the arrow in the figure, the voltage (Rb×Ib) applied to the limiting resistor Rb relative to the lower phase drive voltage VL is negative, and the forward voltage V of the diode Db is negative. FBDIt is a negative value. Furthermore, in mode m1, the load current IL flows from the collector to the emitter of the X-phase switching element 16a; therefore, relative to the lower phase drive voltage VL, V CE（sat） It is a negative value.

[0085] Figure 7 This diagram illustrates the state when the load current flowing during PWM operation is in the positive direction. A load 3b and a power supply Vccm are connected to semiconductor module 110. Load 3b is an inductive load such as a motor, comprising an inductor Lb and a variable resistor RXb. One end of the inductor Lb is connected to the output terminal U, and the other end of the inductor Lb is connected to one end of the variable resistor RXb. The other end of the variable resistor RXb is connected to the negative terminal N and the negative terminal of the power supply Vccm. The positive terminal of the power supply Vccm is connected to the positive terminal P.

[0086] In this circuit structure, if the X-phase switching element 16a is turned on, the charging current Ib flows along... Figure 3 The current flows in the direction described above. In addition, when the load current IL flowing from the load 3b is in the positive direction due to the conduction of the X-phase switching element 16a, the load current IL flows sequentially from the load 3b, the negative terminal N, from the anode to the cathode of the FWD 16b, the output terminal U, and the load 3b.

[0087] In the case of an operating mode where the load current IL is oriented in the positive direction (hereinafter referred to as mode m2), the upper phase drive voltage VH applied to the terminal VccU is calculated by the following equation (2).

[0088] VH=VL‐V FBD -Rb×Ib+VF …(2) It should be noted that VF in equation (2) is the forward voltage when the load current IL flows back to FWD 16b. In addition, in mode m2, the load current IL flows in the direction from the anode to the cathode of FWD 16b, so VF is a positive value relative to the lower phase drive voltage VL.

[0089] Here, when the lower phase drive voltage VL of the lower phase power supply VccL is set to 15V, according to equation (1), the upper phase drive voltage VH in mode m1 is less than 15V (VH < 15V). Furthermore, when the lower phase drive voltage VL is set to 15V and (V... FBD When +Rb×Ib)<VF, according to Equation (2), the upper phase driving voltage VH in mode m2 becomes greater than 15V (VH>15V).

[0090] Figure 8 This is a diagram used to illustrate the variation of the upper phase drive voltage during PWM operation.

[0091] [Interval t11] refers to the PWM operation in mode m2, where the load current IL flows in the positive direction from the output terminal U to the load 3b. In this case, the upper phase drive voltage VH becomes larger in the positive direction than the lower phase drive voltage VL of the lower phase power supply VccL by an amount w1. It should be noted that since the lower phase power supply VccL is a constant power supply, the lower phase drive voltage VL is constant.

[0092] [Interval t12] describes the PWM operation in mode m1, where the load current IL flows in the negative direction from the load 3a to the output terminal U. In this case, the upper phase drive voltage VH becomes significantly larger in the negative direction than the lower phase drive voltage VL of the lower phase power supply VccL by an amount w1. Modes m1 and m2 are then repeated similarly.

[0093] Thus, the upper phase driving voltage VH varies according to the operating modes of modes m1 and m2. In addition, according to equations (1) and (2), the variation range w1 of the upper phase driving voltage VH is highly dependent on the resistance value of the limiting resistor Rb. The larger the resistance value of the limiting resistor Rb, the greater the variation of the upper phase driving voltage VH, and the smaller the resistance value of the limiting resistor Rb, the smaller the variation of the upper phase driving voltage VH.

[0094] As described above, the bootstrap circuit 21U includes a limiting resistor Rb, the value of which is set so that the peak value of the inrush current during initial charging does not exceed the rated value. However, since the limiting resistor Rb has a fixed resistance value, if the limiting resistor value is increased excessively, the charging time during initial charging will be longer, resulting in a problem of longer device startup time. In addition, if the limiting resistor value is too large, the voltage fluctuation of the upper phase drive voltage VH will increase during PWM operation, resulting in a problem of unstable circuit operation.

[0095] On the other hand, if the resistance value of the limiting resistor Rb is reduced in order to shorten the charging time during initial charging and reduce the voltage fluctuation of the upper phase drive voltage VH, the peak value of the surge current may exceed the rated value.

[0096] Thus, in the semiconductor device 100 of the reference example, the characteristic is the opposite of the fixed resistance value set for the limiting resistor Rb. The aforementioned problem occurs whether the resistance value is set too large or too small.

[0097] It should be noted that although the problem of the bootstrap circuit 21U configured on the upper phase side of U phase has been explained in the above description, the same problem will also occur for the bootstrap circuits 21V and 21W configured on the upper phase side of V phase and W phase respectively.

[0098] Next, the semiconductor device of this embodiment will be described in detail. Figure 9 This is a diagram illustrating an example of the overall structure of the semiconductor device according to this embodiment. The semiconductor device 1-1 includes a semiconductor module 10-1 and a power supply unit 20. The semiconductor module 10-1 includes LVIC 11U-1, LVIC 11V-1, LVIC 11W-1, LVIC 12 and semiconductor chips 1U, 1V, 1W, 1X, 1Y, and 1Z, and has IPM functionality.

[0099] In addition, for semiconductor module 10-1, as the terminal on the upper phase side, besides Figure 2 In addition to the terminals mentioned above, it also has terminals VBSU (U-phase bootstrap input terminal), VBSV (V-phase bootstrap input terminal), and VBSW (W-phase bootstrap input terminal).

[0100] On the other hand, the power supply unit 20 includes a lower phase power supply VccL, bootstrap circuits 2U, 2V, and 2W, and a smoothing capacitor C0. Bootstrap circuit 2U is located on the U phase of the upper phase, bootstrap circuit 2V is located on the V phase of the upper phase, and bootstrap circuit 2W is located on the W phase of the upper phase. The lower phase power supply VccL and the smoothing capacitor C0 are located on the lower phase side.

[0101] The third terminal p3 of bootstrap circuit 2U is connected to terminal VBSU; the third terminal p3 of bootstrap circuit 2V is connected to terminal VBSV; and the third terminal p3 of bootstrap circuit 2W is connected to terminal VBSW. It should be noted that other connections are the same as... Figure 2 Since they are the same, the explanation is omitted.

[0102] Figure 10 This diagram shows an example of the structure of the LVIC and bootstrap circuit on the upper phase side. It should be noted that since the circuit structure and operation are the same in phases U, V, and W, the LVIC11U-1 and bootstrap circuit 2U located on the U phase side will be described in the following description.

[0103] The LVIC 11U-1 within semiconductor module 10-1 includes a charging current limiting circuit 11a1 and internal circuitry 11b1. The charging current limiting circuit 11a1 includes a comparator cmp1, a threshold voltage output source V0, a ​​switch sw0, limiting resistors Rb1 (first limiting resistor) and Rb2 (second limiting resistor). The internal circuitry 11b1 includes circuitry such as a gate driver that drives the U-phase switching element 13a via a drive signal received from terminal VinU.

[0104] Additionally, the bootstrap circuit 2U within the power supply unit 20 includes a diode Db and a capacitor Cb. In the semiconductor device 1-1, the bootstrap circuit 2U does not include limiting resistors; instead, limiting resistors Rb1 and Rb2 are configured internally within the LVIC 11U-1.

[0105] Regarding the connection relationships of the components constituting the charging current limiting circuit 11a1, the non-inverting input terminal (+) of comparator cmp1 is connected to terminal VccU, one end of limiting resistor Rb1, one end of limiting resistor Rb2, and the power supply voltage supply terminal of internal circuit 11b1. The inverting input terminal (-) of comparator cmp1 is connected to the positive terminal of threshold voltage output source V0, and the negative terminal of threshold voltage output source V0 is connected to terminal GND.

[0106] The other end of the limiting resistor Rb1 is connected to the signal output terminal a2 and terminal VBSU of switch sw0. The other end of the limiting resistor Rb2 is connected to the signal input terminal a1 of switch sw0. The output terminal of comparator cmp1 is connected to the switching control terminal a0 of switch sw0.

[0107] Regarding the connection relationships of the components of the power supply section 20, the anode of diode Db is connected to the positive terminal of the lower phase power supply VccL, one end of the smoothing capacitor C0, and the terminal Vcc. The cathode of diode Db is connected to the terminal VBSU. One end of capacitor Cb is connected to the terminal VccU, and the other end of capacitor Cb is connected to the terminal GNDU. The negative terminal of the lower phase power supply VccL is connected to the other end of the smoothing capacitor C0 and the terminal GND.

[0108] Here, the limiting resistor Rb1 has a resistance value that limits the surge current Ibmax at the start of initial charging, such that the peak value of the surge current Ibmax does not exceed the rated current value Ir when the limiting resistor Rb1 is in operation. (The resistance value of the limiting resistor Rb1 can also be the same as...) Figure 3 (The resistance values ​​of the limiting resistors Rb shown are the same). In addition, the limiting resistor Rb2 has a resistance value that limits the surge current Ibmax so that its peak value does not exceed the rated current value Ir when the surge current Ibmax flows through the parallel combined resistance of the limiting resistors Rb1 and Rb2.

[0109] For example, the combined parallel resistance of limiting resistors Rb1 and Rb2 is 50Ω, and it is configured to limit the current such that the peak value of the surge current Ibmax does not exceed the rated current value Ir. In this case, if the limiting resistor Rb1 is set to 100Ω, the current can be limited such that the peak value of the surge current Ibmax does not exceed the rated current value Ir. Furthermore, if the resistance of limiting resistor Rb2 is set to 200Ω, the combined parallel resistance of limiting resistors Rb1 and Rb2 becomes 67Ω (>50Ω), so even when the surge current Ibmax flows through the combined parallel resistance of limiting resistors Rb1 and Rb2, the current can be limited such that the peak value of the surge current Ibmax does not exceed the rated current value Ir. Therefore, a resistance of 200Ω can be applied to limiting resistor Rb2. On the other hand, if the resistance of limiting resistor Rb2 is set to 80Ω, then the combined resistance of limiting resistors Rb1 and Rb2 in parallel becomes 44Ω. Since this is less than 50Ω, the 80Ω limiting resistor Rb2 becomes unsuitable. It should be noted that the combined resistance of limiting resistors Rb1 and Rb2 in parallel is smaller than the resistance of limiting resistor Rb1.

[0110] Figure 11 This is a diagram illustrating an example of the operation of the charging current limiting circuit at the start of initial charging.

[0111] [Step S21] LVIC 12 turns on the X-phase switching element 16a based on the X-phase drive signal input via terminal VinX.

[0112] [Step S22] At the start of initial charging, no predetermined voltage level is applied to terminal VccU, and the voltage level of terminal VccU is lower than the threshold voltage Vth output by the threshold voltage output source V0. It should be noted that the predetermined voltage level can be set to be the same as the threshold voltage Vth.

[0113] At this time, a low-level signal is output from comparator cmp1, and switch sw0 receives this low-level signal and disconnects. In this case, terminal VccU is connected to terminal VBSU via limiting resistor Rb1.

[0114] [Step S23] One end of capacitor Cb is connected to the positive terminal of the lower phase power supply VccL via terminal VccU, limiting resistor Rb1, and diode Db. Additionally, if the X-phase switching element 16a is turned on, the other end of capacitor Cb is connected to the negative terminal of the lower phase power supply VccL via terminal GNDU and terminal GND, thus allowing the charging current Ib to flow.

[0115] At this time, the charging current Ib flows sequentially through the positive terminal of the lower phase power supply VccL, from the anode to the cathode of diode Db, through the limiting resistor Rb1, through terminal VccU, through capacitor Cb, from the collector to the emitter of the X-phase switching element 16a, and through the negative terminal of the lower phase power supply VccL.

[0116] [Step S24] Since a charging current Ib is flowing through the capacitor, charge is introduced into the capacitor Cb.

[0117] [Step S25] Discharge the charge that has been charged into capacitor Cb, and discharge the charging voltage Vchg from capacitor Cb toward terminal VccU.

[0118] Figure 12 This diagram illustrates an example of the operation of a charging current limiting circuit when the charging voltage during initial charging reaches a predetermined level.

[0119] [Step S31] After the initial charging begins and a predetermined time has elapsed, the charging voltage Vchg rises, applying a predetermined voltage level to terminal VccU, thus exceeding the threshold voltage Vth. At this time, a level H signal is output from comparator cmp1, and switch sw0 receives this level H signal and turns on. In this case, terminal VccU is connected to terminal VBSU via a parallel resistor formed by limiting resistors Rb1 and Rb2.

[0120] [Step S32] The charging current Ib flows sequentially from the positive terminal of the lower phase power supply VccL to the anode and cathode of the diode Db. Additionally, since switch sw0 is turned on, the charging current Ib flows through the parallel combined resistance of limiting resistors Rb1 and Rb2. Furthermore, the charging current Ib flows sequentially through terminal VccU, capacitor Cb, from the collector to the emitter of the X-phase switching element 16a, and the negative terminal of the lower phase power supply VccL.

[0121] [Step S33] Charge is introduced into capacitor Cb by using charging current Ib.

[0122] [Step S34] The upper phase driving voltage VH is determined by the discharge of the capacitor Cb and the output charging voltage Vchg exceeding a predetermined level. The upper phase driving voltage VH is applied to LVIC 11U-1 via terminal VccU. The internal circuit 11b1 in LVIC 11U-1 receives the upper phase driving voltage VH and performs gate driving of U-phase switching element 13a.

[0123] Figure 13 This is a graph showing an example of the waveform of the charging current during the initial charging process. The vertical axis represents the charging current Ib, and the horizontal axis represents time.

[0124] [Time period T1] At the start of initial charging, the voltage level of terminal VccU (the voltage level of charging voltage Vchg) is less than the threshold voltage Vth, and the switch sw0 is open while the limiting resistor Rb1 is selected.

[0125] [Interval t11] If LVIC 12 receives an X-phase drive signal indicating that X-phase switching element 16a is turned on via terminal VinX, then X-phase switching element 16a is turned on.

[0126] At this point, since the capacitor Cb is in a pre-charging state before charge is introduced, a large surge current Ibmax flows through it. However, the surge current Ibmax flows through the limiting resistor Rb1, whose resistance is set to a high value to ensure that the peak value of the surge current Ibmax does not exceed the rated current value Ir. Therefore, at the start of the initial charging, the surge current Ibmax is suppressed to not exceed the rated value.

[0127] [Interval t12] If LVIC 12 receives an X-phase drive signal indicating the turn-off of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned off. At this time, since the other end of capacitor Cb becomes non-conductive with the negative terminal of the lower phase power supply VccL, no charging current Ib flows.

[0128] [Interval t13] If LVIC 12 receives an X-phase drive signal indicating the conduction of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned on. In this case, although the charging current Ib flows to capacitor Cb, the peak value of the charging current Ib flowing to capacitor Cb in interval t13 is smaller than the peak value of the charging current Ib flowing to capacitor Cb in interval t11 because the charge generated during charging in interval t11 has accumulated in capacitor Cb.

[0129] [Interval t14] If LVIC 12 receives an X-phase drive signal indicating the turn-off of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned off. At this time, no charging current Ib flows.

[0130] [Time period T2] After a predetermined time has elapsed since the start of initial charging, the voltage level of terminal VccU (the voltage level of charging voltage Vchg) becomes above the threshold voltage Vth, and switch sw0 is turned on, in a state where the parallel combined resistors Rb1 and Rb2 are selected.

[0131] [Interval t21] If LVIC 12 receives an X-phase drive signal indicating that X-phase switching element 16a is turned on via terminal VinX, then X-phase switching element 16a is turned on.

[0132] At this time, the charging current Ib flows through the parallel combined resistance of limiting resistors Rb1 and Rb2. Since the resistance value of the parallel combined resistance of limiting resistors Rb1 and Rb2 is smaller than the resistance value of limiting resistor Rb1, a surge current Ibmax flows through capacitor Cb. However, the parallel combined resistance value of limiting resistors Rb1 and Rb2 is set such that even if it is lower than the resistance value of limiting resistor Rb1, the peak value of surge current Ibmax will not exceed the rated current value Ir. Therefore, in interval t21, surge current Ibmax is also suppressed to not exceed the rated current value Ir.

[0133] [Interval t22] If LVIC 12 receives an X-phase drive signal indicating the turn-off of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned off. At this time, since the positive and negative terminals of the lower phase power supply VccL are in a non-conductive state, no charging current Ib flows.

[0134] [Interval t23] If LVIC 12 receives an X-phase drive signal indicating the conduction of X-phase switching element 16a via terminal VinX, then X-phase switching element 16a is turned on. Although charging current Ib flows to capacitor Cb, the charging current flowing to capacitor Cb is smaller than the charging current flowing to capacitor Cb in interval t21 because the capacitor Cb has accumulated charge from previous charging in interval t22. The same operation is repeated below.

[0135] Here, within the interval t21 of time period T2, the charging current Ib flows through the parallel resistance of limiting resistors Rb1 and Rb2, which have a resistance value smaller than that of limiting resistor Rb1, and charges capacitor Cb, thus increasing the charging current Ib flowing into capacitor Cb.

[0136] Therefore, during time period T2, due to the increase in charging current Ib, the time during which charging current Ib flows in semiconductor device 1-1 is shorter than the time during which charging current Ib flows in semiconductor device 100. That is, the charging time tb2 of semiconductor device 1-1 is shorter than the charging time tb1 of semiconductor device 100.

[0137] Figure 14 This is a graph showing an example of the waveform of the charging voltage during the initial charging process. The vertical axis represents the charging voltage Vchg, and the horizontal axis represents time.

[0138] [Interval t31] The charging voltage Vchg is less than the threshold voltage Vth, and the high-resistance limiting resistor Rb1 is in the selected state. The charging current Ib flows to the capacitor Cb, and the charge gradually fills the capacitor Cb, thereby increasing the charging voltage Vchg discharged from the capacitor Cb.

[0139] [Interval t32] The charging voltage Vchg is above the threshold voltage Vth, and the parallel combined resistor of the low-resistance limiting resistors Rb1 and Rb2 is in the selected state. Since the parallel combined resistor of limiting resistors Rb1 and Rb2 increases the charging current Ib, the rising rate of the charging voltage Vchg of semiconductor device 1-1 is greater than the rising rate of the charging voltage Vchg of semiconductor device 100.

[0140] Because the charging current Ib increases and the rate of rise of the charging voltage Vchg increases, the charging voltage Vchg reaches the upper phase drive voltage VH in semiconductor device 1-1 earlier than it does in semiconductor device 100. That is, the charging time tb2 of semiconductor device 1-1 is shorter than the charging time tb1 of semiconductor device 100. Thus, as... Figure 13 , Figure 14 As shown, the initial charging of semiconductor device 1-1 is completed earlier than the initial charging of semiconductor device 100.

[0141] Figure 15 This is a diagram used to illustrate the variation of the upper phase drive voltage during PWM operation.

[0142] [Interval t41] refers to the PWM operation in mode m2, where the load current IL flows in the positive direction from the output terminal U to the load 3b. In this case, the upper phase drive voltage VH increases by an amount w2 in the positive direction compared to the lower phase drive voltage VL of the lower phase power supply VccL.

[0143] However, since the PWM operation of the upper phase drive voltage VH is in the state of using the parallel combined resistor of the limiting resistors Rb1 and Rb2 with low resistance values, the variation amplitude w2 of semiconductor device 1-1 is less than the variation amplitude w1 of semiconductor device 100.

[0144] [Interval t42] refers to the PWM operation in mode m1, where the load current IL flows in the negative direction from the load 3a to the output terminal U. In this case, the upper phase drive voltage VH increases by an amount w2 in the negative direction compared to the lower phase drive voltage VL of the lower phase power supply VccL.

[0145] However, since the PWM operation of the upper phase drive voltage VH is in the state of using the parallel combined resistor of the limiting resistors Rb1 and Rb2 with low resistance values, the variation amplitude w2 of semiconductor device 1-1 is less than the variation amplitude w1 of semiconductor device 100.

[0146] Thus, when the PWM operation of the upper phase drive voltage VH is determined, it is in a state of switching to the parallel connection of limiting resistors Rb1 and Rb2, so the variation of the upper phase drive voltage VH is reduced.

[0147] As described above, in the semiconductor device 1-1, when the charging voltage is less than the threshold voltage, a high resistance value is selected to limit the charging current by connecting a limiting resistor, and when the charging voltage is greater than the threshold voltage, two limiting resistors are connected in parallel and a low resistance value is selected to limit the charging current.

[0148] Therefore, it is possible to shorten the initial charging time while suppressing the peak value of the inrush current at the start of the initial charging, and to suppress the variation of the upper phase drive voltage during PWM operation.

[0149] Next, use Figures 16 to 18 A variation of the semiconductor device according to this embodiment will be described. In this variation, the semiconductor device is configured such that when the charging voltage is less than a threshold voltage, the two limiting resistors are switched to a series connection and a high resistance value is selected; when the charging voltage is greater than or equal to the threshold voltage, a single limiting resistor is connected and a low resistance value is selected. It should be noted that since the circuit structure and operation are the same in the U-phase, V-phase, and W-phase, the description will focus on the U-phase side.

[0150] Figure 16 This is a diagram illustrating a modified example of the structure of the semiconductor device according to this embodiment. The semiconductor device 1-2 includes a semiconductor module 10-2 and a power supply unit 20. The semiconductor module 10-2 includes an LVIC 11U-2. Other structures within the semiconductor module 10-2 are similar to... Figure 10 same.

[0151] The LVIC 11U-2 features a charging current limiting circuit 11a2 and an internal circuit 11b1. The charging current limiting circuit 11a2 includes a comparator cmp1, a threshold voltage output source V0, a ​​switch sw1 (first switch), a switch sw2 (second switch), a limiting resistor Rb11 (first limiting resistor), and a limiting resistor Rb12 (second limiting resistor).

[0152] Regarding the connection relationships of the components constituting the charging current limiting circuit 11a2, the non-inverting input terminal (+) of comparator cmp1 is connected to terminal VccU, the signal input terminal a1 of switch sw1, the signal input terminal a1 of switch sw2, and the power supply voltage supply terminal of internal circuit 11b1. The inverting input terminal (-) of comparator cmp1 is connected to the positive terminal of the threshold voltage output source V0, and the negative terminal of the threshold voltage output source V0 is connected to terminal GND.

[0153] The output terminal of comparator cmp1 is connected to the switching control terminal a0 of switch sw1 and switch sw2. One end of limiting resistor Rb12 is connected to the signal output terminal a2 of switch sw1. The other end of limiting resistor Rb12 is connected to the signal output terminal a2 of switch sw2 and one end of limiting resistor Rb11. The other end of limiting resistor Rb11 is connected to terminal VBSU.

[0154] Figure 17 This is a diagram illustrating an example of the operation of the charging current limiting circuit at the start of initial charging.

[0155] [Step S41] LVIC 12 turns on the X-phase switching element 16a based on the X-phase drive signal input via terminal VinX.

[0156] [Step S42] At the start of initial charging, no predetermined voltage level is applied to terminal VccU, and the voltage level of terminal VccU is lower than the threshold voltage Vth output by the threshold voltage output source V0. At this time, an L-level signal is output from comparator cmp1. Switch sw1 turns on when it receives the L-level signal, and switch sw2 turns off when it receives the L-level signal. In this case, terminal VccU is connected to terminal VBSU via the series combined resistance of limiting resistors Rb11 and Rb12.

[0157] [Step S43] One end of capacitor Cb is connected to the positive terminal of the lower phase power supply VccL via terminal VccU, the series combined resistance of limiting resistors Rb11 and Rb12, and diode Db. Additionally, if the X-phase switching element 16a is turned on, the other end of capacitor Cb is connected to the negative terminal of the lower phase power supply VccL via terminals GNDU and GND, thus allowing the charging current Ib to flow.

[0158] The charging current Ib flows sequentially through the positive terminal of the lower phase power supply VccL, from the anode to the cathode of diode Db, through the series combined resistance of limiting resistors Rb11 and Rb12, through terminal VccU, through capacitor Cb, from the collector to the emitter of X-phase switching element 16a, and through the negative terminal of the lower phase power supply VccL.

[0159] It should be noted that the series combined resistor of limiting resistor Rb11 and limiting resistor Rb12 has a resistance value that limits the peak value of the surge current to not exceeding the rated current value when the switch sw1 is turned on and the switch sw2 is turned off, in the case of a surge current generated by the charging current Ib flowing through the series combined resistor.

[0160] [Step S44] Charge is applied to capacitor Cb by passing a charging current Ib.

[0161] [Step S45] Discharge the charge that has been charged into capacitor Cb, and discharge the charging voltage Vchg from capacitor Cb toward terminal VccU.

[0162] Figure 18 This diagram illustrates an example of the operation of a charging current limiting circuit when the charging voltage during initial charging reaches a predetermined level.

[0163] [Step S51] After the initial charging begins and a predetermined time has elapsed, the charging voltage Vchg rises, applying a predetermined voltage level to terminal VccU, thus exceeding the threshold voltage Vth. At this time, a high-level signal (H-level) is output from comparator cmp1. Switch sw1 receives this H-level signal and opens, while switch sw2 receives this H-level signal and opens. In this case, terminal VccU is connected to terminal VBSU via limiting resistor Rb11.

[0164] [Step S52] The charging current Ib flows sequentially from the positive terminal of the lower phase power supply VccL to the anode and cathode of the diode Db. Additionally, since switch sw1 is open and switch sw2 is closed, the charging current Ib flows through the limiting resistor Rb11. Furthermore, the charging current Ib flows through terminal VccU, capacitor Cb, from the collector to the emitter of the X-phase switching element 16a, and the negative terminal of the lower phase power supply VccL.

[0165] It should be noted that the limiting resistor Rb11 has a resistance value that ensures the peak value of the surge current does not exceed the rated current value even when the switch sw1 is open and the switch sw2 is closed, resulting in a surge current flowing through the limiting resistor Rb11 with the charging current Ib.

[0166] [Step S53] Charge is applied to capacitor Cb by using charging current Ib.

[0167] [Step S54] The upper phase drive voltage VH is determined by the discharge of the capacitor Cb and the output charging voltage Vchg exceeding a predetermined level. The upper phase drive voltage VH is applied to the LVIC 11U-2 via the terminal VccU. The internal circuit 11b1 in the LVIC 11U-2 receives the upper phase drive voltage VH and performs gate drive of the U-phase switching element 13a.

[0168] Thus, in the semiconductor device 1-2, when the charging voltage is less than the threshold voltage, the charging current is limited by a high resistance value selected by connecting a series combined resistor of two limiting resistors, and when the charging voltage is greater than the threshold voltage, the charging current is limited by connecting a low resistance value selected by connecting a single limiting resistor.

[0169] Therefore, it is possible to shorten the initial charging time while suppressing the peak value of the inrush current at the start of the initial charging, and to suppress the variation of the upper phase drive voltage during PWM operation.

[0170] While embodiments of the present invention have been described above, the technical scope of the present invention is not limited to the scope described in the above embodiments. Furthermore, various modifications or improvements can be made to the above embodiments. Moreover, within the technical scope of the present invention, modifications or improvements and their equivalents may also be included without departing from its spirit.

Claims

1. A semiconductor device, characterized in that, have: Upper phase switching element; The lower phase switching element is connected in series with the upper phase switching element; The lower phase power supply outputs the lower phase drive voltage. The lower phase drive control circuit receives the lower phase side drive voltage and performs drive control of the lower phase switching element; The bootstrap circuit, when the lower phase switching element is turned on by the drive control of the lower phase drive control circuit, generates a charging voltage through charge, the charge being the charge generated by charging current flowing from the lower phase power supply; as well as The upper phase drive control circuit includes a charging current limiting circuit that limits the charging current flowing from the lower phase power supply into the bootstrap circuit based on the voltage level of the charging voltage, and receives the charging voltage as the upper phase side drive voltage to drive and control the upper phase switching element.

2. The semiconductor device according to claim 1, characterized in that, The charging current limiting circuit limits the charging current with a high resistance value when the voltage level is less than a predetermined level, and limits the charging current with a low resistance value when the voltage level is above the predetermined level.

3. The semiconductor device according to claim 2, characterized in that, The bootstrap circuit includes diodes and capacitors. The capacitor is charged using the charging current flowing sequentially through the lower phase power supply, the diode, and the charging current limiting circuit, and the charging voltage is generated using the charge produced by the charging.

4. The semiconductor device according to claim 3, characterized in that, The charging current limiting circuit includes a comparator that compares the charging voltage with a predetermined threshold voltage and outputs a comparison result, a first limiting resistor, a second limiting resistor connected in parallel with the first limiting resistor, and a switch that switches on and off according to the output level of the comparator. The anode of the diode is connected to the positive terminal of the lower phase power supply. One end of the capacitor is connected to the non-inverting input terminal of the comparator, one end of the first limiting resistor, and one end of the second limiting resistor. When the lower phase switching element is turned on, the other end of the capacitor is connected to the negative terminal of the lower phase power supply. The threshold voltage is applied to the inverting input terminal of the comparator. The other end of the first limiting resistor is connected to the signal output terminal of the switch and the cathode of the diode, and the other end of the second limiting resistor is connected to the signal input terminal of the switch. When a low-level signal is output from the comparator, the switch opens, and the charging current is limited by the high resistance value generated by the first limiting resistor selected when the switch is open. When a high-level signal is output from the comparator, the switch is turned on, and the charging current is limited by the low resistance value generated by the parallel combination of the first limiting resistor and the second limiting resistor selected by the switch being turned on.

5. The semiconductor device according to claim 4, characterized in that, The first limiting resistor has a resistance value that limits the peak value of the surge current so that it does not exceed the rated current value when the charging current flows through the switch when it is open.

6. The semiconductor device according to claim 5, characterized in that, The parallel combined resistor of the first limiting resistor and the second limiting resistor has a resistance value that limits the surge current such that its peak value does not exceed the rated current value when the charging current flows through the switch when it is turned on.

7. The semiconductor device according to claim 3, characterized in that, The charging current limiting circuit includes a comparator that compares the charging voltage with a predetermined threshold voltage and outputs a comparison result, a first limiting resistor, a second limiting resistor connected in series with the first limiting resistor, a first switch that switches according to the output level of the comparator, and a second switch that switches according to the output level of the comparator. The anode of the diode is connected to the positive terminal of the lower phase power supply. One end of the capacitor is connected to the non-inverting input terminal of the comparator, the signal input terminal of the first switch, and the signal input terminal of the second switch. When the lower phase switching element is turned on, the other end of the capacitor is connected to the negative terminal of the lower phase power supply. The threshold voltage is applied to the inverting input terminal of the comparator. One end of the second limiting resistor is connected to the signal output terminal of the first switch, and the other end of the second limiting resistor is connected to both the signal output terminal of the second switch and one end of the first limiting resistor. The other end of the first limiting resistor is connected to the cathode of the diode. When a low-level signal is output from the comparator, the first switch is turned on and the second switch is turned off. The charging current is limited by the high resistance value generated by the series combined resistance of the first limiting resistor and the second limiting resistor, which is selected when the first switch is turned on and the second switch is turned off. When a high-level signal is output from the comparator, the first switch is turned off and the second switch is turned on, and the charging current is limited by the low resistance value generated by the first limiting resistor selected when the first switch is turned off and the second switch is turned on.

8. The semiconductor device according to claim 7, characterized in that, The series combined resistor of the first limiting resistor and the second limiting resistor has a resistance value that limits the peak value of the surge current so that it does not exceed the rated current value when the charging current flows through the first switch when the first switch is turned on and the second switch is turned off.

9. The semiconductor device according to claim 8, characterized in that, The first limiting resistor has a resistance value that limits the peak value of the surge current to not exceed the rated current value when the charging current flows through the first switch when the first switch is off and the second switch is on.

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