Crystalline silicon solar cell metallization method and crystalline silicon solar cell

Abstract

The invention provides a crystalline silicon solar cell metallization method and a crystalline silicon solar cell, and the method comprises the following steps: S1), carrying out the grooving of the surface of a solar cell semi-finished product, and obtaining a groove; s2) preparing a metal seed layer at the groove through laser chemical vapor deposition; and S3) electroplating copper on the metal seed layer to obtain the crystalline silicon solar cell. Compared with the prior art, the metal seed layer is prepared through laser chemical vapor deposition, the compactness of the seed layer can be remarkably improved, the copper internal expansion blocking capacity of the seed layer is improved, the corrosion resistance is improved, meanwhile, the binding force of the metal grid line and the silicon wafer is improved, and the electroplating tension is remarkably improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of solar cells, and particularly relates to a method for metallizing a crystalline silicon solar cell and the crystalline silicon solar cell. BACKGROUND

[0002] With the development of social economy and the increasing demand of human beings for energy, the finiteness of fossil energy and the impact on global climate and environment during use have attracted people's high attention, so now people pay more and more attention to the utilization of renewable resources such as wind energy, water energy, geothermal energy and solar energy.

[0003] A solar cell is a kind of semiconductor device capable of converting solar energy into electric energy. Under the condition of light, the solar cell will generate electric current, and the electric current will be collected by grid lines and electrodes and transmitted out. As an important material for improving the photoelectric conversion efficiency of solar cells and the power of photovoltaic modules, the conductive paste plays a crucial role in improving the efficiency of solar cells.

[0004] With the rapid increase of photovoltaic production capacity, the price of silver paste has a high risk of rising in the next few years or decades. Electroplated copper can significantly reduce the consumption of silver paste, and copper has the advantages of high electrical conductivity, narrow grid line width, excellent aspect ratio, etc., which can significantly reduce the shading loss and grid line resistance and improve the electrical performance. It is considered as an ideal alternative to silver paste. However, there are currently some problems in copper electroplating, such as poor seed layer adhesion, unqualified tensile force, and poor barrier effect, which cause the tensile force problem of the battery module to be prominent, and the internal expansion of copper elements, which damages the passivation performance and reduces the efficiency. SUMMARY

[0005] Therefore, the technical problem to be solved by the present application is to provide a method for metallizing a crystalline silicon solar cell and the crystalline silicon solar cell, which can improve the adhesion of the metal grid lines to the silicon wafer.

[0006] The present application provides a method for metallizing a crystalline silicon solar cell, comprising the following steps:

[0007] S1) slotting is performed on the surface of a solar cell semi-finished product to obtain a groove;

[0008] S2) a metal seed layer is prepared at the groove by laser chemical vapor deposition;

[0009] S3) copper electroplating is performed on the metal seed layer to obtain a crystalline silicon solar cell.

[0010] Preferably, the metal seed layer comprises one or more of nickel, nickel alloy, silver and silver alloy.

[0011] Preferably, the laser energy of the laser chemical vapor deposition is 100-500 mJ.

[0012] The pressure of the laser chemical vapor deposition is 0-200 Pa.

[0013] The temperature of the laser chemical vapor deposition is 20-300 DEG C.

[0014] The laser wavelength of the laser chemical vapor deposition is 157-353 nm.

[0015] The time of the laser chemical vapor deposition is 0.2-5 s.

[0016] Preferably, the temperature of the laser chemical vapor deposition is 80-300 DEG C.

[0017] Preferably, the precursor of the laser chemical deposition is one or more of nickel carbonyl, nickel chloride and silver acetylacetone.

[0018] Preferably, the electroplated copper is further electroplated with tin.

[0019] The application further provides a crystalline silicon solar cell, comprising:

[0020] The silicon layer, the dielectric layer and the grid line are stacked.

[0021] The dielectric layer is provided with a groove, and the grid line is located in the area of the groove and physically contacts the silicon layer.

[0022] The grid line comprises a metal seed layer and an electroplated metal layer disposed on the metal seed layer, and a metal silicon alloy layer is disposed between the metal seed layer and the silicon layer.

[0023] Preferably, the thickness of the metal seed layer is 100-1000 nm.

[0024] Preferably, the metal seed layer comprises nickel and / or nickel silicon alloy.

[0025] Preferably, the electroplated metal layer comprises an electroplated copper layer, and the thickness of the electroplated copper layer is 3-15 microns.

[0026] Preferably, the electroplated metal layer further comprises an electroplated tin layer, and the electroplated tin layer is disposed on the surface of the electroplated copper layer away from the metal seed layer; the thickness of the electroplated tin layer is 100 nm-2 microns.

[0027] Preferably, the bonding tensile strength of the grid line and the crystalline silicon solar cell is greater than or equal to 1.2 N.

[0028] The application provides a method for metallizing a crystalline silicon solar cell, comprising the following steps: S1) slotting on the surface of a solar cell semi-finished product to obtain a groove; S2) preparing a metal seed layer at the groove by laser chemical vapor deposition; and S3) electroplating copper on the metal seed layer to obtain the crystalline silicon solar cell. Compared with the prior art, the method can significantly improve the compactness of the seed layer, increase the copper internal diffusion resistance of the seed layer and improve the corrosion resistance, and simultaneously improve the bonding force between the metal grid line and the silicon wafer, and significantly improve the plating pulling force. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 A structure diagram of a TOPCon cell semi-finished product used in the embodiments 1-3 of the application. DETAILED DESCRIPTION

[0030] The technical solutions in the embodiments of the application will be clearly and completely described below with reference to the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments in the application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the application.

[0031] The application provides a method for metallizing a crystalline silicon solar cell, comprising the following steps: S1) slotting on the surface of a solar cell semi-finished product to obtain a groove; S2) preparing a metal seed layer at the groove by laser chemical vapor deposition; and S3) electroplating copper on the metal seed layer to obtain the crystalline silicon solar cell.

[0032] In the application, there is no special limitation on the sources of all raw materials, which can be commercially available.

[0033] According to the application, the solar cell semi-finished product can be a solar cell semi-finished product to be metallized after passivation coating, or a solar cell semi-finished product to be metallized without coating or with partial passivation coating, and there is no special limitation, and the specific structure can be different according to the type of the solar cell to be prepared.

[0034] In one specific embodiment provided by the present application, the solar cell semi-product comprises a silicon layer and a dielectric layer disposed on at least one surface of the silicon layer; the silicon layer can comprise a silicon substrate and a deposited silicon layer disposed on at least one surface of the silicon substrate; the front surface of the silicon substrate is provided with an emitter layer (which forms a PN junction with the silicon substrate); the deposited silicon layer is deposited on the front surface of the silicon substrate, and the emitter layer is disposed between the silicon substrate and the deposited silicon layer; the deposited silicon layer can be any deposited silicon layer known to those skilled in the art, and is not specifically limited in the present application, and can be a doped polysilicon layer, a doped microcrystalline silicon layer or a doped amorphous silicon layer; of course, one or more other film layers such as a tunneling layer and / or a conductive layer can also be disposed between the deposited silicon layer and the substrate, and the deposited silicon layer can be in direct physical contact with the substrate; the dielectric layer can be any dielectric layer known to those skilled in the art, and is not specifically limited in the present application, and can be a passivation layer and / or an anti-reflective layer.

[0035] In one specific embodiment provided by the present application, the solar cell semi-product comprises a silicon substrate; the front surface of the silicon substrate is sequentially provided with an emitter layer and a front dielectric layer; the back surface of the silicon substrate is sequentially provided with a tunneling oxide layer, a doped polysilicon layer and a back dielectric layer.

[0036] In one specific embodiment provided by the present application, the silicon substrate is an N-type silicon substrate; the front surface of the N-type silicon substrate is sequentially provided with an emitter layer formed by boron diffusion and a front dielectric layer; the back surface of the N-type silicon substrate is sequentially provided with a tunneling oxide layer, a doped polysilicon layer and a back dielectric layer.

[0037] In one specific embodiment provided by the present application, the silicon substrate is a P-type silicon substrate; the front surface of the P-type silicon substrate is sequentially provided with an emitter layer formed by phosphorus diffusion and a front dielectric layer; the back surface of the P-type silicon substrate is sequentially provided with a tunneling oxide layer, a doped polysilicon layer and a back dielectric layer.

[0038] According to the present application, the tunneling oxide layer is preferably a silicon dioxide layer; the thickness of the tunneling oxide layer is preferably 1-3 nm; optionally, the thickness of the tunneling oxide layer is 1 nm, 1.6 nm, 2 nm, 3 nm or a range between any two of the above values.

[0039] According to the present application, the thickness of the doped polysilicon layer is 50-300 nm; optionally, the thickness of the doped polysilicon layer is 50 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, 200 nm, 250 nm, 300 nm or a range between any two of the above values; the sheet resistance of the doped polysilicon layer is preferably 20-100 Ω / □; optionally, the sheet resistance of the doped polysilicon layer is 20 Ω / □, 30 Ω / □, 40 Ω / □, 50 Ω / □, 60 Ω / □, 70 Ω / □, 80 Ω / □, 90 Ω / □, 100 Ω / □ or a range between any two of the above values.

[0040] According to the present application, the front surface medium layer comprises a front surface passivation layer; the front surface passivation layer can be any passivation layer known to those skilled in the art and is not subject to special restrictions, and in the present application, an aluminum oxide passivation layer is preferred; the thickness of the front surface passivation layer is preferably 2-100 nm; optionally, the thickness of the front surface passivation layer is 2 nm, 5 nm, 10 nm, 15 nm, 50 nm, 70 nm, 80 nm, 90 nm, 100 nm or a range between any two of the above values.

[0041] Further specifically, the front surface medium layer further comprises a front surface anti-reflection layer; the front surface anti-reflection layer is arranged on the surface of the front surface passivation layer away from the emitter layer; the front surface anti-reflection layer can be any anti-reflection layer known to those skilled in the art and is not subject to special restrictions, and in the present application, a hydrogen-doped silicon nitride layer or a silicon nitride layer is preferred; the thickness of the front surface anti-reflection layer is preferably 60-110 nm; optionally, the thickness of the front surface anti-reflection layer is 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm or a range between any two of the above values.

[0042] In a specific embodiment provided by the present application, the refractive index of the front surface anti-reflection layer is preferably 1.9-2.15; optionally, the refractive index of the front surface anti-reflection layer is 1.9, 2, 2.1, 2.15 or a range between any two of the above values.

[0043] According to the present application, the back surface medium layer preferably comprises a back surface passivation layer; the back surface passivation layer can be any back surface passivation layer known to those skilled in the art and is not subject to special restrictions, and in the present application, one or more of an aluminum oxide passivation layer, a hydrogen-doped silicon nitride layer and a silicon nitride layer is preferred; the thickness of the back surface passivation layer is preferably 60-110 nm; optionally, the thickness of the back surface passivation layer is 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm or a range between any two of the above values.

[0044] In a specific embodiment provided by the present application, the refractive index of the back passivation layer is preferably 2-2.3; optionally, the refractive index of the back passivation layer is 2, 2.1, 2.2, 2.3 or a range between any two of the above values.

[0045] Further specifically, the back medium layer preferably further comprises a back anti-reflection layer; the back anti-reflection layer is arranged on the surface of the back passivation layer away from the doped polysilicon layer; the back anti-reflection layer can be any anti-reflection layer known to those skilled in the art and is not specifically limited, and in the present application is preferably a hydrogen-doped silicon nitride layer or a silicon nitride layer; the thickness of the back anti-reflection layer is preferably 60-110 nm; optionally, the thickness of the back anti-reflection layer is 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, 110 nm or a range between any two of the above values.

[0046] In the present application, laser grooving is preferably used; the laser light source of the laser grooving is preferably ultraviolet picosecond or ultraviolet femtosecond; the energy of the laser grooving is preferably 50-500 mJ; optionally, the energy of the laser grooving is 50 mJ, 100 mJ, 150 mJ, 200 mJ, 250 mJ, 300 mJ, 350 mJ, 400 mJ, 450 mJ, 500 mJ or a range between any two of the above values; the time of the laser grooving is 0.5-5 s; optionally, the time of the laser grooving is 0.5 s, 1 s, 2 s, 3 s, 4 s, 5 s or a range between any two of the above values; the groove width of the grooving is preferably 5-100 μm; optionally, the groove width of the grooving is 5 μm, 6 μm, 10 μm, 15 μm, 20 μm, 25 μm, 30 μm, 35 μm, 40 μm, 45 μm, 50 μm, 55 μm, 60 μm, 65 μm, 70 μm, 75 μm, 80 μm, 85 μm, 90 μm, 95 μm, 100 μm or a range between any two of the above values.

[0047] In a specific embodiment provided by the present application, if the solar cell semi-finished product is a back contact (BC) cell semi-finished product, the width of the groove obtained by the grooving is preferably 10-100 μm.

[0048] In a specific embodiment provided by the present application, if the solar cell semi-finished product is a tunnel oxide passivation (TOPCon) cell semi-finished product, the width of the groove obtained by the front grooving is preferably 5-20 μm, and the width of the groove obtained by the back grooving is preferably 5-30 μm.

[0049] In a specific embodiment of the present application, the grooving is performed on both surfaces of the solar cell semi-product, but the sequence of the grooving on the two surfaces is not particularly limited; in the present application, the front surface of the solar cell semi-product is preferably grooved to the bare PN junction surface; and the back surface of the solar cell semi-product is preferably grooved to the bare doped polysilicon layer surface.

[0050] In a specific embodiment of the present application, the depth of the grooving is preferably 30-200 nm; the passivation layer is opened by the grooving, and the substrate is not damaged.

[0051] According to the present application, the grooving is preferably followed by cleaning; the cleaning method is well known to those skilled in the art and is not particularly limited.

[0052] a metal seed layer is prepared by laser chemical vapor deposition at the groove; the thickness of the metal seed layer is preferably 100-1000 nm; optionally, the thickness of the metal seed layer is 100 nm, 200 nm, 300 nm, 400 nm, 500 nm, 600 nm, 700 nm, 800 nm, 900 nm, 1000 nm, or a range between any two of the above values; the metal seed layer preferably comprises one or more of nickel, nickel alloy, silver, and silver alloy; the precursor of the laser chemical vapor deposition is preferably one or more of nickel carbonyl, nickel chloride, and acetylacetone silver; the laser energy of the laser chemical vapor deposition is preferably 100-500 mJ; optionally, the laser energy of the laser chemical vapor deposition is 100 mJ, 200 mJ, 300 mJ, 400 mJ, 500 mJ, or a range between any two of the above values; the pressure of the laser chemical vapor deposition is preferably 0-200 Pa; optionally, the pressure of the laser chemical vapor deposition is 0 Pa, 10 Pa, 20 Pa, 30 Pa, 40 Pa, 50 Pa, 60 Pa, 70 Pa, 80 Pa, 90 Pa, 100 Pa, 110 Pa, 120 Pa, 130 Pa, 140 Pa, 150 Pa, 160 Pa, 170 Pa, 180 Pa, 190 Pa, 200 Pa, or a range between any two of the above values; the temperature of the laser chemical vapor deposition is preferably 20-300 °C; optionally, the temperature of the laser chemical vapor deposition is 20 °C, 30 °C, 40 °C, 50 °C, 60 °C, 70 °C, 80 °C, 90 °C, 100 °C, 110 °C, 120 °C, 130 °C, 140 °C, 150 °C, 160 °C, 170 °C, 180 °C, 190 °C, 200 °C, 210 °C, 220 °C, 230 °C, 240 °C, 250 °C, 260 °C, 270 °C, 280 °C, 290 °C, 300 °C, or a range between any two of the above values; the laser wavelength of the laser chemical vapor deposition is preferably 157-353 nm; optionally, the laser wavelength of the laser chemical vapor deposition is 157 nm, 170 nm, 190 nm, 210 nm, 230 nm, 250 nm, 270 nm, 300 nm, 320 nm, 340 nm, 353 nm, or a range between any two of the above values; the time of the laser chemical vapor deposition is preferably 0.2-5 s; optionally, the time of the laser chemical vapor deposition is 0.2 s, 0.5 s, 1 s, 1.5 s, 2 s, 2.5 s, 3 s, 3.5 s, 4 s, 4.5 s, 5 s, or a range between any two of the above values.

[0053] In a specific embodiment provided in the present application, the temperature of the laser chemical vapor deposition is 80-300°C; under this temperature condition, the nickel (silver) seed layer with high compactness can be generated by irradiating the nickel precursor and / or silver precursor with laser to make it pyrolysis reaction, so as to have the ability of blocking copper internal expansion and improve the corrosion resistance.

[0054] According to the present application, after the metal seed layer is prepared, the surface is preferably pretreated; the method of the pretreatment is well known to those skilled in the art, and there is no special limitation, and in the present application, it is preferably including oil removal, roughening and removing the oxide layer; the solution used for the oil removal preferably includes sodium hydroxide, sodium carbonate, trisodium phosphate and sodium silicate; the concentration of sodium hydroxide in the solution is preferably 5-15 g / L, more preferably 8-12 g / L, and more preferably 10 g / L; the concentration of sodium carbonate in the solution is preferably 20-25 g / L, more preferably 23 g / L; the concentration of trisodium phosphate in the solution is preferably 40-60 g / L, more preferably 45-55 g / L, and more preferably 50 g / L; the concentration of sodium silicate in the solution is preferably 5-15 g / L, more preferably 8-12 g / L, and more preferably 10 g / L; the temperature of the oil removal is preferably 40-60°C, more preferably 45-55°C, and more preferably 50°C; the time of the oil removal is preferably 5-20 s, more preferably 5-15 s, and more preferably 8-12 s, and most preferably 10 s; the solution of the roughening preferably includes potassium monopersulfate and sulfuric acid; the concentration of potassium monopersulfate in the solution of the roughening is preferably 10-15 g / L, and more preferably 12 g / L; the concentration of sulfuric acid in the solution of the roughening is preferably 2-5 mL / L; the time of the roughening is preferably 5-15 s, more preferably 8-12 s, and more preferably 10 s; the solution of the removing the oxide layer preferably includes ammonium fluoride and HF; the mass concentration of ammonium fluoride in the solution of the removing the oxide layer is preferably 30%-40%, more preferably 32%-36%, and more preferably 34%; the mass concentration of HF in the solution of the removing the oxide layer is preferably 5%-10%, more preferably 6%-8%, and more preferably 7%; the time of the removing the oxide layer is preferably 10-30 s, more preferably 15-25 s, and more preferably 20 s.

[0055] carrying out electroplating copper on the metal seed layer after surface pretreatment; the thickness of the copper layer obtained by the electroplating copper is preferably 3-15 μm; optionally, the thickness of the copper layer obtained by the electroplating copper is specifically 3 μm, 5 μm, 8 μm, 10 μm, 12 μm, 13 μm, 15 μm or a range between any two of the above values; the electroplating solution for the electroplating copper comprises copper sulfate, brightener and leveling agent; the concentration of copper sulfate in the electroplating solution is preferably 10-60 g / L; optionally, the concentration of copper sulfate in the electroplating solution is 10 g / L, 20 g / L, 30 g / L, 40 g / L, 50 g / L, 60 g / L or a range between any two of the above values; the concentration of brightener in the electroplating solution is preferably 0.5-10 mL / L; optionally, the concentration of brightener in the electroplating solution is 0.5 mL / L, 1 mL / L, 2 mL / L, 3 mL / L, 4 mL / L, 5 mL / L, 6 mL / L, 7 mL / L, 8 mL / L, 9 mL / L, 10 mL / L or a range between any two of the above values; the brightener can be any brightener known to those skilled in the art without special limitation, and in the present application, one or more of acrylic acid, vinyl benzophenone and polyethylene glycol are preferred; the molecular weight of the polyethylene glycol is preferably 200-600; the concentration of leveling agent in the electroplating solution is preferably 20-80 mL / L; optionally, the concentration of leveling agent in the electroplating solution is 20 mL / L, 30 mL / L, 40 mL / L, 50 mL / L, 60 mL / L, 70 mL / L, 80 mL / L or a range between any two of the above values; the leveling agent can be any leveling agent known to those skilled in the art without special limitation, and in the present application, polyethylene imine alkyl compound and / or fatty amine ethoxylated sulfonate are preferred; the temperature for the electroplating copper is preferably 20-35 °C; optionally, the temperature for the electroplating copper is 20 °C, 25 °C, 30 °C, 35 °C or a range between any two of the above values; the current density for the electroplating copper is preferably 1-15 ASD; optionally, the current density for the electroplating copper is 1 ASD, 3 ASD, 5 ASD, 8 ASD, 10 ASD, 12 ASD, 15 ASD or a range between any two of the above values; the time for the electroplating copper is preferably 3-10 min; optionally, the time for the electroplating copper is 3 min, 5 min, 8 min, 10 min or a range between any two of the above values.

[0056] In a specific embodiment provided in the present application, the electroplating copper can use direct current power or pulse power.

[0057] In a specific embodiment provided by the present application, the electroplating copper is preferably performed under light irradiation; the intensity of the light irradiation is preferably 0.1-1 sun, i.e. 0.1-1 sun light irradiation; optionally, the intensity of the light irradiation is 0.1 sun, 0.3 sun, 0.5 sun, 0.8 sun, 1 sun or a range between any two of the above values.

[0058] The copper layer obtained by electroplating copper is electroplated with tin to obtain a crystalline silicon solar cell; the thickness of the tin layer obtained by electroplating tin is preferably 100 nm to 2 microns; optionally, the thickness of the tin layer obtained by electroplating tin is 100 nm, 300 nm, 500 nm, 800 nm, 1 micron, 1.2 microns, 1.5 microns, 1.8 microns, 2 microns, or a range between any two of the above values; the electroplating solution for electroplating tin preferably comprises methyl sulfonic acid, divalent tin, and a tin plating additive; the concentration of methyl sulfonic acid in the electroplating solution is preferably 50 to 200 g / L; optionally, the concentration of methyl sulfonic acid in the electroplating solution is 50 g / L, 80 g / L, 100 g / L, 120 g / L, 150 g / L, 180 g / L, 200 g / L, or a range between any two of the above values; the concentration of divalent tin in the electroplating solution is preferably 30 to 90 g / L; optionally, the concentration of divalent tin in the electroplating solution is 30 g / L, 40 g / L, 50 g / L, 60 g / L, 70 g / L, 80 g / L, 90 g / L, or a range between any two of the above values; the divalent tin can be any divalent tin known to those skilled in the art and is not particularly limited, and stannous sulfate is preferred in the present application; the tin plating additive can be any tin plating additive known to those skilled in the art and is not particularly limited, and the present application preferably comprises one or more of a leveling agent, a brightener, a smoke suppressant, an antioxidant, and a foam suppressant; the concentration of the leveling agent in the electroplating solution is preferably 0.1 to 4 ml / L; the leveling agent can be any leveling agent known to those skilled in the art and is not particularly limited, and polyethylene glycol octylphenyl ether is preferred in the present application; the antioxidant preferably comprises phenol sulfonic acid and thiourea; the concentration of phenol sulfonic acid in the electroplating solution is preferably 2 to 7 ml / L; the concentration of thiourea in the electroplating solution is preferably 2 to 3 ml / L; the temperature for electroplating tin is preferably 30 to 50°C; optionally, the temperature for electroplating tin is 30°C, 40°C, 50°C, or a range between any two of the above values; the current density for electroplating tin is preferably 1 to 30 ASD; optionally, the current density for electroplating tin is preferably 1 ASD, 3 ASD, 5 ASD, 8 ASD, 10 ASD, 12 ASD, 15 ASD, 18 ASD, 20 ASD, 22 ASD, 25 ASD, 28 ASD, 30 ASD, or a range between any two of the above values; the time for electroplating tin is preferably 1 to 3 minutes; optionally, the time for electroplating tin is 1 minute, 2 minutes, 3 minutes, or a range between any two of the above values.

[0059] The present application can significantly improve the compactness of the seed layer, increase the barrier copper inward diffusion capacity of the seed layer, and improve the corrosion resistance, while improving the bonding force between the metal grid line and the silicon wafer, and significantly improving the electroplating pulling force.

[0060] The application further provides a crystalline silicon solar cell prepared by the above method, comprising: a stacked silicon layer, a dielectric layer and a grid line arranged on at least one surface of the stacked silicon layer; wherein the dielectric layer is provided with a groove, and the grid line is arranged in the area of the groove and physically contacts the silicon layer; the grid line comprises a metal seed layer and an electroplated metal layer arranged on the metal seed layer; and a metal silicon alloy layer is arranged between the metal seed layer and the silicon layer.

[0061] In a specific embodiment provided by the application, the stacked silicon layer can comprise a silicon substrate and a deposited silicon layer arranged on at least one surface of the silicon substrate; the front surface of the silicon substrate is provided with an emitter layer (which forms a PN junction with the silicon substrate); the deposited silicon layer is deposited on the front surface of the silicon substrate, and the emitter layer is arranged between the silicon substrate and the deposited silicon layer; the deposited silicon layer can be any deposited silicon layer known to those skilled in the art, and is not specifically limited in the application, and can be a doped polysilicon layer, a doped microcrystalline silicon layer or a doped amorphous silicon layer; of course, one or more other film layers such as a tunneling layer and / or a conductive layer can also be arranged between the deposited silicon layer and the substrate, and the deposited silicon layer can also be in direct physical contact with the substrate.

[0062] In a specific embodiment provided by the application, the stacked silicon layer comprises a silicon substrate, and the front surface of the silicon substrate is provided with an emitter layer; the back surface of the silicon substrate is sequentially provided with a tunneling oxide layer and a doped polysilicon layer.

[0063] In a specific embodiment provided by the application, the silicon substrate is an N-type silicon substrate; the front surface of the N-type silicon substrate is provided with an emitter layer formed by boron diffusion; and the back surface of the N-type silicon substrate is sequentially provided with a tunneling oxide layer and a doped polysilicon layer.

[0064] In a specific embodiment provided by the application, the silicon substrate is a P-type silicon substrate; the front surface of the P-type silicon substrate is provided with an emitter layer formed by phosphorus diffusion; and the back surface of the P-type silicon substrate is sequentially provided with a tunneling oxide layer and a doped polysilicon layer.

[0065] The tunneling oxide layer and the doped polysilicon layer are the same as described above, and will not be described here again.

[0066] In a specific embodiment provided by the application, the deposited silicon layer is provided with a dielectric layer away from the surface of the silicon substrate; the dielectric layer can be any dielectric layer known to those skilled in the art, and is not specifically limited in the application, and can be a passivation layer and / or an anti-reflection layer.

[0067] In a specific embodiment provided by the application, the front surface of the stacked silicon layer is provided with a front surface dielectric layer, and the back surface is provided with a back surface dielectric layer; the front surface dielectric layer and the back surface dielectric layer are the same as described above, and will not be described here again.

[0068] The medium layer is provided with a groove, and the gate line is located in the area where the groove is located and is in physical contact with the deposited silicon layer; the size of the groove is as described above, which is not repeated here.

[0069] In a specific embodiment provided by the present application, the front gate line of the crystalline silicon solar cell is in physical contact with the emitter layer; and the front gate line of the crystalline silicon solar cell is in physical contact with the doped polysilicon layer.

[0070] In a specific embodiment provided by the present application, the gate line comprises a metal seed layer and a plated metal layer disposed on the metal seed layer; and the metal seed layer and the silicon layer have a metal silicon alloy layer therebetween.

[0071] In a specific embodiment provided by the present application, the thickness of the metal seed layer is preferably 100-1000 nm; and the specific thickness is as described above, which is not repeated here.

[0072] In a specific embodiment provided by the present application, the plated metal layer comprises a plated copper layer, and the thickness of the plated copper layer is 3-15 μm; optionally, the thickness of the plated copper layer is 3 μm, 5 μm, 8 μm, 10 μm, 12 μm, 13 μm, 15 μm or a range between any two of the above values.

[0073] In a specific embodiment provided by the present application, the plated metal layer further comprises a plated tin layer, and the plated tin layer is disposed on the surface of the plated copper layer away from the metal seed layer; the thickness of the plated tin layer is 100 nm-2 μm; optionally, the thickness of the plated tin is 100 nm, 300 nm, 500 nm, 800 nm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2 μm or a range between any two of the above values.

[0074] In a specific embodiment provided by the present application, the bonding tensile force between the gate line and the cell piece is greater than or equal to 1.2 N.

[0075] In a specific embodiment provided by the present application, the bonding tensile force between the gate line and the cell piece is tested according to the following method: a copper band is welded on the cell piece to be tested, the cell piece is fixed with a tooling to expose the gate line, and a tensile testing machine is used for testing at an angle of 45 degrees, the peak value is recorded, and the copper band specification is 0.12×0.8 mm.

[0076] In order to further illustrate the present application, a method for metallizing a crystalline silicon solar cell provided by the present application is described in detail in the following examples.

[0077] The reagents used in the following examples are commercially available.

[0078] Examples 1-3

[0079] 1) Provide Figure 1 The TOPCon cell semi-finished product, wherein 1 is SiN x : H layer (thickness 75 nm, refractive index 2.06), 2 is Al2O3 layer (thickness 8 nm), 3 is B emitter (square resistance 600 Ω / □), 4 is tunneling oxide layer (1.7 nm), 5 is doped polysilicon layer (square resistance 60 Ω / □), 6 is SiN x : H layer (thickness 80 nm, refractive index 2.2).

[0080] 2) Laser grooving on the surface of the TOPCon cell semi-finished product, groove width 15 μm, laser energy 200 mJ, time 2 s.

[0081] 3) Cleaning the semi-finished product after grooving.

[0082] 4) Laser chemical vapor deposition is used to prepare a nickel seed layer at the metal grid line (the specific parameters are shown in Table 1), the seed layer thickness is 100-900 nm, the precursor is nickel carbonyl, the laser energy is set to 100-500 mJ, the reaction cavity pressure is 0-200 pa, the reaction temperature is 20-300 ℃, the laser wavelength range is 157-353 nm, and the laser scanning and reaction time is 0.2-5 s.

[0083] 5) Pretreatment

[0084] a. Oil removal: 10 g / L NaOH, 23 g / L sodium carbonate, 50 g / L trisodium phosphate, 10 g / L sodium silicate, 50 ℃, time 10 s,

[0085] b. Roughening: monopersulfate potassium 12 g / L sulfuric acid 3 mL / L, time 10 s;

[0086] c. Oxide removal: ammonium fluoride 34%, HF 7%, treatment 20 s.

[0087] 5) Copper plating:

[0088] a) Bath: main salt copper ion concentration 10-60 g / L, brightener 0.5-10 ml / L, leveling agent 20-80 ml / L, temperature 20-35 ℃, as shown in Table 1;

[0089] b) Use direct current source or pulse power source, current density range 1-15 ASD, can increase light to assist electroplating; process time 3-10 min; as shown in Table 1.

[0090] 6) Tin plating:

[0091] a) plating solution: methyl sulfonic acid 50-200 g / L, tin bichloride 30-90 g / L, tin plating additives (whole bottle, bright / dull, anti-oxidation, etc.), one or more of foam inhibitors; specific as shown in Table 1;

[0092] b) tin plating conditions: 40-50℃, 1-30 ASD, 1-3 min, specific as shown in Table 1.

[0093] Table 1 Formulation of Examples 1-3

[0094]

[0095]

[0096] The batteries prepared in the examples were subjected to light injection and testing, and the pull force of the grid lines and the batteries was tested, and the results are shown in Table 2.

[0097] The comparative examples are provided Figure 1 The TOPCon battery semi-product, wherein 1 is a SiN x : H layer (thickness 75 nm, refractive index 2.06), 2 is an Al2O3 layer (thickness 8 nm), 3 is a B emitter (sheet resistance 600 Ω / □), 4 is a tunneling oxide layer (1.7 nm), 5 is a doped polysilicon layer (sheet resistance 60 Ω / □), 6 is a SiN x : H layer (thickness 80 nm, refractive index 2.2).

[0098] A silver paste was screen printed on the surface of the TOPCon battery semi-product to obtain a solar cell.

[0099] The solar cell was subjected to IV testing and the pull force of the grid lines and the battery was tested, and the results are shown in Table 2.

[0100] The pull force was tested according to the following method: a copper strip was welded on the battery piece to be tested, the battery piece was fixed with a tool, the grid lines were exposed, and the pull force was tested with a pull force machine at an angle of 45 degrees, the peak value was recorded, and the copper strip specification was 0.12*0.8 mm.

[0101] Table 2 Performance data of batteries prepared in the examples and comparative examples of the application

[0102]

[0103] As can be seen from Table 2, the pull force between the grid lines and the batteries prepared in Examples 1-3 is greater than that prepared by conventional screen printing, and it can be seen that the use of laser chemical vapor deposition to prepare a metal seed layer can significantly improve the density of the seed layer, increase the ability of the seed layer to block copper internal expansion, and improve the corrosion resistance, while improving the bonding force between the metal grid lines and the silicon wafer, and significantly improving the plating pull force.

[0104] The above merely describes the preferred embodiments of the present application, and it should be pointed out that, for those skilled in the art, several improvements and refinements can be made without departing from the principles of the present application, and these improvements and refinements should also be considered as falling within the protection scope of the present application.

Claims

1. A method for metallizing crystalline silicon solar cells, characterized in that, Includes the following steps: S1) Grooves are cut into the surface of the semi-finished solar cell to obtain a groove; S2) A metal seed layer is prepared at the groove by laser chemical vapor deposition; S3) Copper is electroplated on the metal seed layer to obtain a crystalline silicon solar cell.

2. The method according to claim 1, characterized in that, The metal seed layer includes one or more of nickel, nickel alloys, silver and silver alloys.

3. The method according to claim 1, characterized in that, The laser energy for the laser chemical vapor deposition is 100–500 mJ; The pressure for laser chemical vapor deposition is 0–200 Pa; The temperature of the laser chemical vapor deposition is 20℃~300℃; The laser wavelength for the laser chemical vapor deposition is 157–353 nm; The laser chemical vapor deposition time is 0.2–5 s.

4. The method according to claim 3, characterized in that, The temperature of the laser chemical vapor deposition is 80℃~300℃.

5. The method according to any one of claims 1 to 3, characterized in that, The precursor for laser chemical deposition is one or more of nickel carbonyl, nickel chloride, and silver acetylacetonate.

6. The method according to claim 1, characterized in that, After copper electroplating, tin electroplating is also performed.

7. A crystalline silicon solar cell, characterized in that, include: A stacked silicon layer, a dielectric layer disposed on at least one surface of the stacked silicon layer, and a gate line; The dielectric layer has a groove, and the gate line is located in the area of ​​the groove and is in physical contact with the silicon layer; The gate line includes a metal seed layer and an electroplated metal layer disposed on the metal seed layer; a metal-silicon alloy layer is disposed between the metal seed layer and the silicon layer.

8. The battery according to claim 7, characterized in that, The thickness of the metal seed layer is 100–1000 nm; And / or, the metal seed layer comprises nickel and / or a nickel-silicon alloy.

9. The battery according to claim 7, characterized in that, The electroplated metal layer includes an electroplated copper layer with a thickness of 3–15 μm.

10. The battery according to claim 9, characterized in that, The electroplated metal layer further includes an electroplated tin layer, and the electroplated tin layer is disposed on the surface of the electroplated copper layer away from the metal seed layer; the thickness of the electroplated tin layer is 100nm to 2μm.

11. The battery according to claim 7, characterized in that, The bonding force between the grid lines and the crystalline silicon solar cell is greater than or equal to 1.2N.

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