Light emitting diode and preparation method thereof

Abstract

The invention discloses a light emitting diode and a preparation method thereof. The light emitting diode comprises a substrate; the N-type GaN layer is located on the substrate; the first epitaxial structure is located on the N-type GaN layer, the first epitaxial structure comprises an active layer, and the side wall of the first epitaxial structure is the M surface of the GaN crystal; the second epitaxial structure is located on the first epitaxial structure, the second epitaxial structure comprises an electron blocking layer and a P-type GaN layer which are stacked in sequence, and the side wall of the second epitaxial structure is the A face of the GaN crystal; the first electrode is electrically connected with the P-type GaN layer, and the second electrode is electrically connected with the N-type GaN layer; wherein the projection of the second epitaxial structure on the N-type GaN layer is located in the projection of the first epitaxial structure on the N-type GaN layer. According to the light-emitting diode, the light extraction efficiency is improved, meanwhile, non-defect recombination of the side wall of the active area is reduced, the internal quantum efficiency is improved, and the light-emitting efficiency of the light-emitting diode is improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor device technology, specifically relating to a light-emitting diode and its fabrication method. Background Technology

[0002] Among existing display technologies, GaN-based light-emitting diodes (LEDs) possess superior characteristics such as high brightness, long lifespan, and low power consumption compared to liquid crystal displays (LCDs) and organic light-emitting diodes (OLEDs), making them widely used in various fields such as solid-state lighting, displays, optical data communication, and photonics. In recent years, with the increasing demand from consumers for enhanced visual experiences, display technology has evolved from traditional televisions and smartphones to augmented reality (AR) and virtual reality (VR) systems.

[0003] However, limited by the image quality perceptible to the human eye, shorter viewing distances and higher pixel densities (e.g., >2000 PPI) have become the main research directions for AR and VR displays. This demand has driven the shift from traditional LCD displays to micron-scale light-emitting diode (Micro-LED) displays, requiring smaller device sizes to achieve higher resolution. For AR and VR displays, microdisplays must provide high-brightness red, green, and blue (RGB) subpixels with a size of less than 10 × 10 μm².

[0004] In existing technologies, to define the pixel units of Micro-LEDs, plasma etching or ion etching processes are typically used to etch epitaxial wafers to form mesa structures. However, these processes cause severe damage to the sidewalls of the mesa structures, resulting in numerous defects, impurities, and dangling bonds. These defects act as non-radiative recombination centers and leakage current channels, significantly degrading device performance. Furthermore, the size effect—the ratio of surface area to volume of the mesa structure increases as device size decreases—exacerbates the impact of sidewall damage. Despite extensive research efforts, researchers have yet to effectively address these issues, making the fabrication of small-sized, high-efficiency Micro-LEDs a significant challenge.

[0005] Therefore, in order to address the above-mentioned technical problems, it is necessary to provide a light-emitting diode and a method for its fabrication. Summary of the Invention

[0006] The purpose of this invention is to provide a light-emitting diode and its preparation method, which can improve the luminous efficiency of the light-emitting diode.

[0007] To achieve the above objectives, an embodiment of the present invention provides the following technical solution:

[0008] A light-emitting diode, the light-emitting diode comprising:

[0009] Substrate;

[0010] An N-type GaN layer is located on the substrate;

[0011] The first epitaxial structure is located on an N-type GaN layer. The first epitaxial structure includes an active layer, and the sidewalls of the first epitaxial structure are the M-planes of the GaN crystal.

[0012] The second epitaxial structure is located on the first epitaxial structure. The second epitaxial structure includes an electron blocking layer and a P-type GaN layer stacked sequentially. The sidewall of the second epitaxial structure is the A-plane of the GaN crystal.

[0013] A first electrode and a second electrode, wherein the first electrode is electrically connected to a P-type GaN layer and the second electrode is electrically connected to an N-type GaN layer;

[0014] The projection of the second epitaxial structure onto the N-type GaN layer is located within the projection of the first epitaxial structure onto the N-type GaN layer.

[0015] In one embodiment, the sidewalls of the second epitaxial structure have a triangular nanoprism structure.

[0016] In one embodiment, the first epitaxial structure further includes a first etch barrier layer located on the active layer; and / or,

[0017] The second epitaxial structure further includes a second etch barrier layer, wherein the electron blocking layer is located on the second etch barrier layer; and / or,

[0018] The N-type GaN layer has a first region and a second region on the side surface away from the substrate, with the first epitaxial structure located on the first region and the first region being higher than the second region.

[0019] In one embodiment, the electron blocking layer is an AlGaN layer, and the active layer comprises several alternating layers of In. x Ga (1-x) N quantum well layers and several GaN barrier layers or several In layers stacked alternately. x Ga (1-x) N quantum dot layer and several GaN barrier layers.

[0020] In one embodiment, the first extensional structure is a hexagonal prism or a triangular prism; and / or,

[0021] The second extensional structure is a hexagonal prism or a triangular prism.

[0022] Another embodiment of the present invention provides the following technical solution:

[0023] A method for fabricating a light-emitting diode, the method comprising the following steps:

[0024] Provide substrate;

[0025] An N-type GaN layer, an active layer, an electron blocking layer, and a P-type GaN layer are sequentially fabricated on a substrate.

[0026] Etching is performed on the P-type GaN layer, the electron blocking layer, and the active layer to form a first epitaxial structure and a second epitaxial structure on the N-type GaN layer. The projection of the second epitaxial structure on the N-type GaN layer is located within the projection of the first epitaxial structure on the N-type GaN layer.

[0027] A first electrode electrically connected to a P-type GaN layer and a second electrode electrically connected to an N-type GaN layer are prepared.

[0028] In one embodiment, after etching the P-type GaN layer, the electron blocking layer, and the active layer to form the first epitaxial structure and the second epitaxial structure on the N-type GaN layer, the method further includes:

[0029] The sidewalls of the first and second epitaxial structures were repaired using TMAH solution.

[0030] In one embodiment, the step of repairing the sidewalls of the first epitaxial structure and the second epitaxial structure using TMAH solution is as follows:

[0031] The etched structure was placed in a TMAH solution, and the temperature of the TMAH solution was maintained at 80℃~90℃ for 100min~150min.

[0032] In one embodiment, a first photoresist layer with a first pattern is prepared on a P-type GaN layer using a photolithography process. Each side of the first pattern is parallel to the A-plane of the GaN crystal. The first photoresist layer is used as a mask to etch the P-type GaN layer and the electron blocking layer.

[0033] In one embodiment, a second photoresist layer with a second pattern is prepared on the active layer using a photolithography process. Each edge of the second pattern is parallel to the M-plane of the GaN crystal. The active layer is etched using the second photoresist layer as a mask.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] This invention fabricates a light-emitting diode with a first epitaxial structure having GaN crystal M-plane sidewalls and a second epitaxial structure having GaN crystal A-plane sidewalls. While improving light extraction efficiency, it reduces the impact of etching on the active region, thereby enhancing the luminous efficiency of the light-emitting diode. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of the structure of the light-emitting diode in Embodiment 1 of the present invention;

[0038] Figure 2 This is a top view of the first and second extensional structures in Embodiment 1 of the present invention;

[0039] Figure 3 This is a three-dimensional structural diagram of the second epitaxial structure of the first epitaxial structure in Embodiment 1 of the present invention.

[0040] Figures 4a-4d This is a process flow diagram of the light-emitting diode fabrication method in Embodiment 1 of the present invention;

[0041] Figure 5 This is a SEM image of the sidewall of the first epitaxial structure in Embodiment 1 of the present invention;

[0042] Figure 6 This is a SEM characterization image of the sidewall of the second extensional structure in Embodiment 1 of the present invention.

[0043] Explanation of key figure labels:

[0044] 10-Substrate, 20-N-type GaN layer, 30-First epitaxial structure, 301-Active layer, 302-First etch barrier layer, 40-Second epitaxial structure, 401-Electron barrier layer, 402-P-type GaN layer, 403-Second etch barrier layer, 501-First electrode, 502-Second electrode, 60-Buffer layer, 70-Passivation layer, 80-Current spreading layer, 90-Etch barrier layer. Detailed Implementation

[0045] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0046] This invention discloses a light-emitting diode, comprising:

[0047] Substrate;

[0048] An N-type GaN layer, located on a substrate;

[0049] A first epitaxial structure, located on the N-type GaN layer, the first epitaxial structure includes an active layer, and the sidewall of the first epitaxial structure is the M plane of the GaN crystal;

[0050] A second epitaxial structure, located on the first epitaxial structure, the second epitaxial structure includes an electron blocking layer and a P-type GaN layer stacked in sequence, and the sidewall of the second epitaxial structure is the A plane of the GaN crystal;

[0051] A first electrode and a second electrode, the first electrode is electrically connected to the P-type GaN layer, and the second electrode is electrically connected to the N-type GaN layer;

[0052] Wherein, the projection of the second epitaxial structure on the N-type GaN layer is located within the projection of the first epitaxial structure on the N-type GaN layer.

[0053] The present invention also discloses a method for manufacturing a light-emitting diode, including the following steps:

[0054] Provide a substrate;

[0055] Successively prepare an N-type GaN layer, an active layer, an electron blocking layer and a P-type GaN layer on the substrate;

[0056] Etch the P-type GaN layer, the electron blocking layer and the active layer to form a first epitaxial structure and a second epitaxial structure on the N-type GaN layer, and the projection of the second epitaxial structure on the N-type GaN layer is located within the projection of the first epitaxial structure on the N-type GaN layer;

[0057] Prepare a first electrode electrically connected to the P-type GaN layer and a second electrode electrically connected to the N-type GaN layer.

[0058] The following further illustrates the present invention with specific examples.

[0059] Example 1:

[0060] As shown in Figure 1 The light-emitting diode in this embodiment includes:

[0061] A substrate 10;

[0062] An N-type GaN layer 20, located on the substrate 10;

[0063] A first epitaxial structure 30, located on the N-type GaN layer 20, the first epitaxial structure 30 includes an active layer 3, and the sidewall of the first epitaxial structure 30 is the M plane of the GaN crystal;

[0064] The second epitaxial structure 40 is located on the first epitaxial structure 30. The second epitaxial structure 40 includes an electron blocking layer 401 and a P-type GaN layer 402 which are stacked in sequence. The sidewall of the second epitaxial structure 40 is the A plane of the GaN crystal.

[0065] A first electrode 501 and a second electrode 502. The first electrode 501 is electrically connected to the P-type GaN layer 402, and the second electrode 502 is electrically connected to the N-type GaN layer 20.

[0066] Among them, the projection of the second epitaxial structure 40 on the N-type GaN layer 20 is located within the projection of the first epitaxial structure 30 on the N-type GaN layer 20.

[0067] Among them, the substrate 10 is a sapphire substrate, a silicon substrate or a gallium nitride substrate, preferably a gallium nitride substrate. The substrate 10 in this embodiment is a sapphire substrate.

[0068] The light-emitting diode in this embodiment further includes a buffer layer 60 located on the substrate 10. The N-type GaN layer 20 is formed on the buffer layer 60.

[0069] Specifically, the buffer layer 60 is a U-shaped GaN layer with a thickness of 500 nm to 3 μm, preferably 1 μm. The N-type GaN layer 20 is a Si-doped GaN layer with a thickness of 200 nm to 500 nm, preferably 450 nm.

[0070] Further, the active layer 301 includes a plurality of In x Ga (1-x) N quantum well layers and a plurality of GaN barrier layers stacked alternately, or a plurality of In x Ga (1-x) N quantum dot layers and a plurality of GaN barrier layers stacked alternately. That is, the active layer 301 is a quantum well structure or a quantum dot structure.

[0071] Specifically, the active layer 301 in this embodiment is a multi-quantum dot structure, including 5 pairs of In x Ga (1-x) N quantum dot layers and GaN barrier layers stacked alternately. The total thickness of each pair of In x Ga (1-x) N quantum dot layers and GaN barrier layers is 20 nm.

[0072] It should be noted that the In x Ga (1-x) component in the N quantum dot layer can be adjusted as needed, that is, 0 < x < 1, to cover the ultraviolet and visible light ranges.

[0073] Preferably, the first epitaxial structure 30 in this embodiment further includes a first etching stop layer 302 located on the active layer 301, the second epitaxial structure 40 further includes a second etching stop layer 403, the electron blocking layer 401 is located on the second etching stop layer 403, the first etching stop layer 302 is an InGaN layer or an AlGaN layer with a low Al component, the second etching stop layer 403 is an InGaN layer or an AlGaN layer with a low Al component, and the sum of the thicknesses of the first etching stop layer 302 and the second etching stop layer 403 is 10 nm to 20 nm.

[0074] Specifically, the first etching stop layer 302 in this embodiment is an InGaN layer, the second etching stop layer 403 is an InGaN layer, and the sum of the thicknesses of the first etching stop layer 302 and the second etching stop layer 403 is 10 nm.

[0075] It should be understood that the etching stop layer is mainly used to avoid over-etching during the preparation of the second epitaxial structure, thereby causing damage to the active layer. Of course, in many other embodiments, only the first epitaxial structure may include the first etching stop layer, or only the second epitaxial structure may include the second etching stop layer.

[0076] Further, the electron blocking layer 401 in this embodiment is an AlGaN layer with a thickness of 10 nm to 20 nm, preferably 20 nm.

[0077] Specifically, the P-type GaN layer 402 in this embodiment is a Mg-doped GaN layer with a thickness of 100 nm to 400 nm, preferably 250 nm.

[0078] Refer Figure 2 and combine Figure 3 As shown, the light-emitting diode in this embodiment is a GaN-based light-emitting diode. The first epitaxial structure 30 can be a hexagonal cylinder or a triangular cylinder, and the second epitaxial structure 40 can also be a hexagonal cylinder or a triangular cylinder. It only needs to ensure that the side wall of the first epitaxial structure 30 is the M plane of the GaN crystal and the side wall of the second epitaxial structure 40 is the A plane of the GaN crystal.

[0079] More specifically, the side wall of the second epitaxial structure 40 has a triangular prism-shaped nano-prism structure, which can increase the light emission and thus improve the light extraction efficiency of the device.

[0080] Further, the surface of the N-type GaN layer 20 on the side背离 the substrate 10 includes a first region and a second region. The first epitaxial structure 30 is located on the first region, and the first region is higher than the second region.

[0081] In addition, the light-emitting diode in this embodiment also includes a passivation layer 70 and a current spreading layer 80. The passivation layer 70 covers the sidewalls of the first epitaxial structure 30 and the second epitaxial structure 40, the exposed portion of the top of the first epitaxial structure 30, and a portion of the top surface of the second epitaxial structure 40 and the N-type GaN layer 20. The current spreading layer 80 is in contact with the P-type GaN layer 402.

[0082] Specifically, the passivation layer 70 includes an aluminum oxide layer and a silicon oxide layer stacked together. The thickness of the aluminum oxide layer is 10nm~30nm, preferably 20nm, and the thickness of the silicon oxide layer is 100nm~300nm, preferably 200nm. The current spreading layer is an ITO thin film with a thickness of 100nm~300nm, preferably 200nm.

[0083] More specifically, in this embodiment, the first electrode 501 is located on the current spreading layer 80 to achieve electrical connection with the P-type GaN layer 402, and the second electrode 502 is located on the N-type GaN layer 20.

[0084] In this embodiment, the method for fabricating a light-emitting diode includes the following steps:

[0085] S1, Reference Figure 4a As shown, a substrate 10 is provided.

[0086] Specifically, in this embodiment, the substrate 10 is a sapphire substrate.

[0087] S2, Reference Figure 4b As shown, an N-type GaN layer 20, an active layer 301, an electron blocking layer 401, and a P-type GaN layer 402 are sequentially fabricated on a substrate 10.

[0088] Specifically, this step also includes first preparing a buffer layer 60 on the substrate 10, and then sequentially preparing an N-type GaN layer 20, an active layer 301, an electron blocking layer 401 and a P-type GaN layer 402 on the buffer layer 60.

[0089] More specifically, the buffer layer is a U-type GaN layer with a thickness of 1 μm; the N-type GaN layer is a Si-doped GaN layer with a thickness of 450 nm; and the active layer is an In layer consisting of 5 pairs of alternating layers. x Ga (1-x) N quantum dot layer and GaN barrier layer, each pair of In x Ga (1-x) The total thickness of the N quantum dot layer and GaN barrier layer is 20 nm; the electron blocking layer is an AlGaN layer with a thickness of 20 nm; and the P-type GaN layer is a Mg-doped GaN layer with a thickness of 250 nm.

[0090] Furthermore, in this embodiment, an etch barrier layer 90 is prepared between the active layer 301 and the electron blocking layer 401 to avoid damage to the active region caused by over-etching during the subsequent fabrication of the second epitaxial structure.

[0091] Specifically, in this embodiment, the etch barrier layer 90 is an InGaN layer with a thickness of 10nm.

[0092] In addition, before proceeding to step S3 in this embodiment, the epitaxial wafer with the above-mentioned structure needs to be pre-cleaned. First, the epitaxial wafer is organically cleaned using acetone and isopropanol in sequence, and ultrasonically cleaned for five minutes in each solution. Then, inorganic cleaning is performed using a mixed solution of HCl, H2O2, and H2O, wherein HCl:H2O2:H2O = 2:1:5, and the cleaning time is 5 minutes.

[0093] S3, Reference Figure 4c As shown, the P-type GaN layer 402, the electron blocking layer 401, and the active layer 301 are etched to form a first epitaxial structure 30 and a second epitaxial structure 40 on the N-type GaN layer 20. The projection of the second epitaxial structure 40 on the N-type GaN layer 20 is located within the projection of the first epitaxial structure 30 on the N-type GaN layer 20.

[0094] Specifically, this step includes:

[0095] 1. Spin-coat photoresist onto a P-type GaN layer 402, and use photolithography to prepare a first photoresist layer with a first pattern on the P-type GaN layer 402, wherein each edge of the first pattern is parallel to the A-plane of the GaN crystal.

[0096] Specifically, in this embodiment, the first pattern is hexagonal, and the substrate is a two-inch or four-inch wafer with a positioning edge. The positioning edge is parallel to the M-plane of the GaN crystal, and the substrate surface is parallel to the A-plane of the GaN crystal in a direction perpendicular to the positioning edge. Therefore, by setting one edge of the first pattern perpendicular to the positioning edge during photolithography in this step, it can be ensured that all edges of the first pattern are parallel to the A-plane of the GaN crystal.

[0097] 2. Using the first photoresist layer as a mask, the P-type GaN layer 402 and the electron blocking layer 401 are etched to prepare a hexagonal prism-shaped second epitaxial structure 40.

[0098] Specifically, etching is performed using inductively coupled plasma (ICP) etching. To ensure complete etching of the electron blocking layer 401, this step requires over-etching to the etchable portion of the etch blocking layer 90, dividing the etch blocking layer 90 into two parts with different shapes. That is, the second epitaxial structure 40 includes the second etch blocking layer 403, and the total thickness of the second epitaxial structure 40 is 275 nm.

[0099] 3. Spin-coat a photoresist on the surface of the structure after the second epitaxial structure 40 is prepared, and use a photolithography process to prepare a second photoresist layer with a second pattern. Each side of the second pattern is parallel to the M plane of the GaN crystal.

[0100] Specifically, the second pattern is also a hexagon, and the second pattern covers the top surface of the second epitaxial structure (i.e., the upper surface of the P-type GaN layer), avoiding etching the second epitaxial structure during the secondary etching process. In this step, one side of the second pattern is set parallel to the positioning edge during photolithography.

[0101] 4. Use the second photoresist layer as a mask to etch the active layer 301 to prepare a first epitaxial structure 30 in the shape of a hexagonal cylinder.

[0102] Specifically, use an ICP process for etching. In this embodiment, etching is performed from the remaining etching stop layer until the active layer 301 is completely etched to expose the N-type GaN layer 20. That is, the first epitaxial structure 30 in this embodiment includes a first etching stop layer 302.

[0103] In addition, to ensure complete etching of the active layer 301, appropriate over-etching can be performed to etch a part of the N-type GaN layer 20. That is, the surface of the N-type GaN layer 20 on the side away from the substrate 10 includes a first region and a second region. The first epitaxial structure 30 is located on the first region, and the first region is higher than the second region. In this embodiment, the distance from the top of the first etching stop layer 302 to the second region is 275 nm, that is, over-etching a 250-nm-thick N-type GaN layer.

[0104] Further, after step S3, it further includes using a tetramethylammonium hydroxide (TMAH) solution to repair the sidewalls of the first epitaxial structure and the second epitaxial structure.

[0105] Specifically, place the structure after two etching processes in the TMAH solution, keep the temperature of the TMAH solution at 80°C to 90°C, preferably 85°C, and process for 100 min to 150 min, preferably 120 min.

[0106] See Figure 5 and Figure 6 The figures show the scanning electron microscope (SEM) characterization diagrams of the sidewalls of the first epitaxial structure and the second epitaxial structure after repair. The sidewall of the second epitaxial structure after repair has a triangular nanoscale prism structure, and the sidewall of the first structure becomes steep and smooth.

[0107] Traditional GaN-based light-emitting diodes (LEDs) typically fabricate their mesa structures as rectangular or cylindrical prisms. The sidewalls of these rectangular mesa structures usually include two M-planes and two A-planes. On one hand, the etching damage introduced by the A-planes and M-planes of GaN is not consistent; on the other hand, the surface states of GaN on different crystal planes differ after wet processing, making it difficult to achieve high luminous efficiency. The LED in this embodiment divides the mesa structure into two parts. The sidewalls of the first epitaxial structure are all A-planes of GaN crystals. After being repaired with TMAH solution, they exhibit a nano-prism structure, effectively increasing light emission, reducing total internal reflection, and maximizing light extraction efficiency. The sidewalls of the second epitaxial structure are all M-planes of GaN crystals, minimizing the impact of dry etching on the active region, thereby reducing non-defect recombination on the active region sidewalls and improving internal quantum efficiency. Ultimately, the light output efficiency of the LED is greatly improved, especially for small-sized, high-performance LEDs (such as Micro-LEDs with a size of approximately 1 μm). This provides a new approach for manufacturing more efficient and smaller micro LEDs, and has industrial application value.

[0108] S4, Reference Figure 4d As shown, a first electrode 501 electrically connected to a P-type GaN layer 402 and a second electrode 502 electrically connected to an N-type GaN layer 20 are prepared.

[0109] In this embodiment, passivation treatment and preparation of a current spreading layer are included before step S4, specifically including the following steps:

[0110] 1. A 20 nm thick Al2O3 layer was deposited on the surface and sidewalls of the structure after wet corrosion repair using atomic layer deposition (ALD) technology;

[0111] 2. A 200 nm thick SiO2 layer is deposited on the Al2O3 layer using plasma-enhanced chemical vapor deposition (PECVD) to prepare a passivation layer 70 composed of the Al2O3 layer and the SiO2 layer, which further repairs the sidewall damage of the first epitaxial structure 30 and the second epitaxial structure 40.

[0112] 3. Spin-coat photoresist on the surface of the SiO2 layer, and use photolithography to define the opening pattern (i.e., the current spread layer deposition window) above the P-type GaN layer 402. Then use the Neutral Loop Discharge (NLD) etching process and ICP process to etch the SiO2 layer and Al2O3 layer in sequence until the P-type GaN layer 402 is exposed.

[0113] 4. A 200 nm thick ITO film is deposited on the exposed P-type GaN layer 402 using an optical coating machine as a current spreading layer 80;

[0114] 5. Spin-coat photoresist onto the surface of the SiO2 layer, and use photolithography to define the opening pattern (second electrode deposition window) above the N-type GaN layer 20. Then, use NLD etching and ICP etching processes to etch the SiO2 layer and Al2O3 layer in sequence until the N-type GaN layer is exposed.

[0115] Specifically, Ti thin films, Al thin films, Ni thin films, and Au thin films are sequentially deposited on the current spreading layer 80 and the exposed N-type GaN layer 20 using an electron beam evaporation (EBE) process to prepare the first electrode 501 and the second electrode 502. The thicknesses of the Ti thin film, Al thin film, Ni thin film, and Au thin film are 20 nm, 120 nm, 60 nm, and 200 nm, respectively.

[0116] More specifically, in this embodiment, after the fabrication of the first and second electrodes is completed, the back side of the overall structure is thinned to a thickness of 30 μm.

[0117] As can be seen from the above solution, the present invention has the following beneficial effects:

[0118] This invention fabricates a light-emitting diode with a first epitaxial structure having GaN crystal M-plane sidewalls and a second epitaxial structure having GaN crystal A-plane sidewalls. While improving light extraction efficiency, it reduces the impact of etching on the active region, thereby enhancing the luminous efficiency of the light-emitting diode.

[0119] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0120] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A light-emitting diode, characterized in that, The light-emitting diode includes: Substrate; An N-type GaN layer is located on the substrate; The first epitaxial structure is located on an N-type GaN layer. The first epitaxial structure includes an active layer, and the sidewalls of the first epitaxial structure are the M-planes of the GaN crystal. The second epitaxial structure is located on the first epitaxial structure. The second epitaxial structure includes an electron blocking layer and a P-type GaN layer stacked sequentially. The sidewall of the second epitaxial structure is the A-plane of the GaN crystal. A first electrode and a second electrode, wherein the first electrode is electrically connected to a P-type GaN layer and the second electrode is electrically connected to an N-type GaN layer; The projection of the second epitaxial structure onto the N-type GaN layer is located within the projection of the first epitaxial structure onto the N-type GaN layer.

2. The light-emitting diode according to claim 1, characterized in that, The sidewalls of the second epitaxial structure have a triangular nanoprism structure.

3. The light-emitting diode according to claim 1, characterized in that, The first epitaxial structure further includes a first etch barrier layer located on the active layer; and / or, The second epitaxial structure further includes a second etch barrier layer, wherein the electron blocking layer is located on the second etch barrier layer; and / or, The N-type GaN layer has a first region and a second region on the side surface away from the substrate, with the first epitaxial structure located on the first region and the first region being higher than the second region.

4. The light-emitting diode according to claim 1, characterized in that, The electron blocking layer is an AlGaN layer, and the active layer comprises several alternating layers of In. x Ga (1-x) N quantum well layers and several GaN barrier layers or several In layers stacked alternately. x Ga (1-x) N quantum dot layer and several GaN barrier layers.

5. The light-emitting diode according to claim 1, characterized in that, The first extensional structure is a hexagonal prism or a triangular prism; and / or, The second extensional structure is a hexagonal prism or a triangular prism.

6. A method for fabricating a light-emitting diode, characterized in that, The preparation method includes the following steps: Provide substrate; An N-type GaN layer, an active layer, an electron blocking layer, and a P-type GaN layer are sequentially fabricated on a substrate. Etching is performed on the P-type GaN layer, the electron blocking layer, and the active layer to form a first epitaxial structure and a second epitaxial structure on the N-type GaN layer. The projection of the second epitaxial structure on the N-type GaN layer is located within the projection of the first epitaxial structure on the N-type GaN layer. A first electrode electrically connected to a P-type GaN layer and a second electrode electrically connected to an N-type GaN layer are prepared.

7. The method for fabricating a light-emitting diode according to claim 6, characterized in that, After etching the P-type GaN layer, the electron blocking layer, and the active layer to form the first epitaxial structure and the second epitaxial structure on the N-type GaN layer, the method further includes: The sidewalls of the first and second epitaxial structures were repaired using TMAH solution.

8. The method for fabricating a light-emitting diode according to claim 7, characterized in that, The steps for repairing the sidewalls of the first and second epitaxial structures using TMAH solution are as follows: The etched structure was placed in a TMAH solution, and the temperature of the TMAH solution was maintained at 80℃~90℃ for 100min~150min.

9. The method for fabricating a light-emitting diode according to claim 6, characterized in that, A first photoresist layer with a first pattern is prepared on a P-type GaN layer using photolithography. Each side of the first pattern is parallel to the A-plane of the GaN crystal. The P-type GaN layer and the electron blocking layer are etched using the first photoresist layer as a mask.

10. The method for fabricating a light-emitting diode according to claim 6, characterized in that, A second photoresist layer with a second pattern is prepared on the active layer using photolithography. Each edge of the second pattern is parallel to the M-plane of the GaN crystal. The active layer is then etched using the second photoresist layer as a mask.

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