Columnar SOT-MRAM memory and preparation and writing method thereof

Abstract

The invention discloses a columnar SOT-MRAM memory and a preparation and write-in method thereof, in a memory unit of the memory, a central nano-column is a nano-column made of a material with a spin-orbit coupling effect; the magnetic free layer wraps the outer side of the central nano-column, the magnetization direction extends in the axial direction of the nano-column structure, the spacer layer wraps the outer side of the magnetic free layer, the magnetic reference layer wraps the outer side of the spacer layer, and the magnetization direction of the magnetic reference layer extends in the axial direction of the nano-column structure; wherein the magnetization flipping of the magnetic free layer depends on spin-polarized electrons which are generated by the central nanorod and have the polarization direction perpendicular to the direction of the central axis, and the generated damping-like moment and field-like moment synergistically act to realize the magnetization precession flipping of the magnetic free layer.

Description

Technical Field

[0001] This invention relates to the field of memory technology, specifically to a cylindrical SOT-MRAM memory and a writing method thereon. Background Technology

[0002] Magnetic Random Access Memory (MRAM), as a novel non-volatile memory technology, can meet the demands for high storage density and fast read / write speeds, making it one of the most promising memory technologies. The core unit of MRAM is the Magnetic Tunnel Junction (MTJ). An MTJ mainly consists of three parts: a reference layer (RL), a free layer (FL), and a spacer layer (SL). The magnetization direction of RL is relatively fixed, while the magnetization direction of FL can be easily changed. MTJ stores data by altering the relative magnetization directions between these two magnetic layers, RL and FL, which are separated by the spacer layer SL. The spacer layer can include oxides such as MgO or Al₂O₃. According to the Tunnel Magnetoresistance (TMR) effect, when FL has a magnetization direction parallel to RL, MTJ has a low resistance state (LRS), which is called the parallel (P) state, corresponding to the binary signal "0". Conversely, if the magnetization direction of FL is opposite to that of RL, MTJ exhibits a high resistance state (HRS), also known as the anti-parallel (AP) state, corresponding to the binary signal "1".

[0003] In the field of spintronics, with the continuous development of related theoretical research and fabrication processes, spintronic devices have become one of the key research directions in the microelectronics field due to their potential to perpetuate Moore's Law. Among them, spin-transfer torque magnetic random access memory (STT-MRAM) has rapidly become a research hotspot in this field due to its core characteristics such as non-volatility, unlimited read / write cycles, and extremely fast operation speed. However, STT-MRAM requires a high current density to achieve high-speed read / write operations, which not only leads to a significant increase in Joule heating during device operation but also greatly increases the risk of insulation layer breakdown, severely limiting its large-scale application in high-reliability, low-power scenarios.

[0004] To address the technical bottlenecks of STT-MRAM, a new generation of Spin-Orbit Torque MRAM (SOT-MRAM) has emerged. In SOT-MRAM, the write current is not applied directly to the magnetic storage core layer, but rather to a heavy metal layer or topological insulator layer beneath the magnetic free layer. This current is converted into a spin current within this layer structure through spin-orbit coupling. This spin current, injected into the magnetic free layer, directly drives the magnetic moment of the free layer to flip, effectively reducing the current density requirement. Simultaneously, SOT-MRAM overcomes the incubation delay problem commonly found in STT-MRAM, achieving ultrafast sub-nanosecond magnetic moment flips, demonstrating a significant advantage in operating speed. However, it should be noted that SOT-MRAM still faces many technical shortcomings that urgently need to be overcome in practical applications: First, compared with STT-MRAM, each memory cell of SOT-MRAM requires three terminals, which directly leads to an increase in the chip area occupied by a single memory cell, severely restricting further improvement in storage density and making it difficult to meet the needs of high-density storage scenarios; Second, the torque direction of existing SOT is limited, usually only able to drive the magnetic moment to flip in the XY plane, unable to achieve magnetic moment flipping in the vertical direction outside the plane, and the in-plane magnetic moment structure will significantly reduce the thermal stability of SOT-MRAM, affecting the long-term reliability of the data stored by the device; Third, to achieve magnetization flipping in the vertical direction, an auxiliary magnetic field generating structure needs to be added to SOT-MRAM, which not only increases the overall structural complexity of the device, but also leads to a significant increase in energy consumption, which is contrary to the design trend of low-power devices.

[0005] Based on the shortcomings of the existing technologies, there is an urgent need in this field for a novel SOT-MRAM structure to overcome the aforementioned bottlenecks. Currently, a cylindrical SOT-MRAM memory has been designed in related technical solutions. This memory not only has a simple fabrication process but also effectively improves the stackability of the device, possesses a superior layout design, and is expected to significantly increase storage density. Simultaneously, it can meet the functional requirements of out-of-plane vertical magnetization reversal and is adaptable to the process requirements of industrial production, providing a feasible technical path for the practical application of SOT-MRAM in high-density, high-stability, and low-power scenarios. Currently, various three-dimensional magnetic storage elements and their writing technologies have been researched on the market. These elements can be stacked in the Z-axis direction, thereby promoting the three-dimensional stacking of storage chips and greatly increasing storage capacity. In the field of micromagnetism, the magnetic ground state refers to the magnetization distribution that enables a magnetic system to reach its lowest energy state. Existing designs can only write three-dimensional magnetic devices where both the magnetic free layer and the magnetic reference layer are in a vortex state using SOT current. Although this utilizes the high energy efficiency and fast reversal speed of SOT, it still suffers from the disadvantage of a large area occupied in the XY plane. Therefore, designing a method for flipping a three-dimensional magnetic device with a Z-state ground state using SOT current is of great significance for further increasing the storage density of three-dimensional magnetic storage devices, reducing write power consumption, and improving write and read speeds.

[0006] The information disclosed in the background section is only intended to enhance the understanding of the background of the present invention, and therefore may contain information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0007] To address the shortcomings or defects of the existing technology, a cylindrical SOT-MRAM memory and a writing method are provided. The memory cell has a cylindrical or prismatic structure, which has high etching efficiency, improves stackability, has a better layout design, and is expected to increase storage density. Moreover, the memory cell has a smaller XY plane area. Data writing is achieved through SOT current pulses, and the writing operation is performed by using magnetization precession flip, which further reduces the writing power consumption of the three-dimensional magnetic memory cell and improves the writing speed of the three-dimensional magnetic memory cell.

[0008] The objective of this invention is achieved through the following technical solutions.

[0009] A columnar SOT-MRAM memory includes columnar SOT-MRAM memory cells and their operating circuitry;

[0010] The columnar SOT-MRAM memory cell includes,

[0011] Central nanopillars are nanopillars made of materials with spin-orbit coupling effects;

[0012] A magnetic tunnel junction, comprising two magnetic storage layers and a non-magnetic spacer layer, is wrapped around the central nanopillar. The magnetic tunnel junction includes...

[0013] A magnetic free layer surrounds and contacts the central nanopillar, with the same cross-section as the central nanopillar. The magnetization direction of the magnetic free layer extends along the axial direction of the nanopillar structure. The magnetization reversal of the magnetic free layer is achieved by spin-polarized electrons generated by the central nanopillar; wherein, the polarization direction of the spin-polarized electrons is perpendicular to the axial direction of the central nanopillar, and the damping-like moment and field-like moment generated by them work together to achieve the magnetization precession and reversal of the magnetic free layer.

[0014] A spacer layer, which wraps around the magnetic free layer, has the same cross-section as the central nanopillar.

[0015] A magnetic reference layer is wrapped around the outside of the spacer layer. Its cross-section is the same as that of the central nanopillar. The magnetization direction of the magnetic reference layer extends along the axial direction of the nanopillar structure.

[0016] The outer electrode, which is wrapped around the outside of the magnetic reference layer, has the same cross-section as the central nanopillar and is connected to the external circuit.

[0017] The cross-sectional shape of the columnar SOT-MRAM memory cell includes, but is not limited to, a circle, a square, a rhombus, an equilateral triangle, and a regular hexagon.

[0018] In the aforementioned columnar SOT-MRAM memory cell, when the magnetization direction of the magnetic free layer is parallel to the magnetization direction of the magnetic reference layer, the magnetic tunnel junction of the memory cell is in a low-resistance state; when the magnetization direction of the magnetic free layer is parallel to the magnetization direction of the magnetic reference layer, the magnetic tunnel junction of the memory cell is in a high-resistance state.

[0019] In the columnar SOT-MRAM memory cell, the magnetization direction of the magnetic reference layer is fixed to either upward or downward along the axial direction of the nanopillar structure, while the magnetization direction of the magnetic free layer switches between upward and downward along the axial direction of the nanopillar structure.

[0020] In the aforementioned columnar SOT-MRAM memory cell, the central nanopillar is made of a material that converts current into spin current. This material includes Nb, Ta, Cr, Mo, W, Re, Ru, Os, Ir, Pd, Pt, Au, Cd, Hg, B, Tl, Sn, Pb, Sb, Bi, Se, Te, Cl, Sm, TaN, WN, Sb₂Te₃, BiSb, Bi₂Se₃, Bi₂Te₃, (BiSb)₂Te₃, HgTe, BiSe, (Bi 0.57 Sb 0.43 )2Te3, TlBiSe2, Bi 1.5 Sb0.5 Te 1.8 Se 1.2 SnTe, Bi 2-x Cr x Se3, SmB6, BiTeCl, HgTe / CdTe, or one or more of HgTe, BiSb alloy, Bi2Se3, Sb2Te3, and Bi2Te3.

[0021] In the aforementioned columnar SOT-MRAM memory cell, the magnetic free layer and the magnetic reference layer are magnetic layers made of ferromagnetic or ferrimagnetic metals and their alloys, including one or more of Fe, Co, Ni, Mn, FeCo, FeNi, FePd, FePt, CoPd, CoPt, YCo, LaCo, PrCo, NdCo, SmCo, MnBi, CoFeB, or MnNiSb, and combinations thereof with one or more of B, Al, Zr, Hf, Nb, Ta, Cr, Mo, Pd, or Pt; or the magnetic free layer and the magnetic reference layer are made of synthetic ferromagnetic or ferrimagnetic materials, including multilayer stacked structures of 3d / 4d / 4f / 5d / 5f / rare earth metals such as Co / Ir, Co / Pd, Co / Pt, Co / Au, Co / Ni, or CrCo / Pt.

[0022] Alternatively, the magnetic free layer and the magnetic reference layer may be made of a half-metallic ferromagnetic material, comprising a Heusler alloy in the form of XYZ or X2YZ, wherein X comprises one or more of Mn, Fe, Co, Ni, Pd or Cu, Y comprises one or more of Ti, V, Cr, Mn, Fe, Co or Ni, and Z comprises one or more of Al, Ga, In, Si, Ge, Sn or Sb;

[0023] Alternatively, the magnetic free layer and the magnetic reference layer may be made of a synthetic antiferromagnetic material. The magnetic free layer and the magnetic reference layer made of the synthetic antiferromagnetic material are composed of a ferromagnetic layer and a spacer layer. The ferromagnetic layer constituting the magnetic free layer and the magnetic reference layer includes one or more of Fe, Co, Ni, FeCo, CrCoPt or CoFeB, or multiple stacked ferromagnetic layers of material (Co / Ni)p, (Co / Pd)m or (Co / Pt)n, where m, n, and p refer to the number of repetitions of the multiple stacks. The spacer layer is composed of one or more of Nb, Ta, Cr, Mo, W, Re, Ru, Os, Rh, Ir, Pt, Cu, Ag or Au.

[0024] In the columnar SOT-MRAM memory cell, the spacer layer is an oxide, nitride, or oxynitride, and the constituent elements of the oxide, nitride, or oxynitride include one or more of Mg, B, Al, Ca, Sr, La, Ti, Hf, V, Ta, Cr, W, Ru, Cu, In, Si, or Eu; or the spacer layer is a metal or alloy, and the constituent elements of the metal or alloy include one or more of Mg, Al, Cu, Ag, Au, Y, Ti, V, Nb, Ta, Cr, Mo, W, Ru, Os, Rh, Pd, or Pt; or the spacer layer is SiC or a ceramic material.

[0025] A method for fabricating a columnar SOT-MRAM memory cell includes,

[0026] A bottom electrode and a central nanopillar are formed on the substrate;

[0027] A magnetic tunnel junction is formed on the central nanopillar, including a magnetic free layer, a spacer layer, and a magnetic reference layer;

[0028] An external electrode as described in claim 1 is grown on the outer side of the magnetic reference layer;

[0029] The magnetic tunnel junction and the external electrode are removed;

[0030] A dielectric layer is formed on the substrate;

[0031] The magnetic free layer, spacer layer, and magnetic reference layer can be prepared using conformal deposition techniques such as atomic layer deposition or chemical vapor deposition.

[0032] The formation process includes processes such as growth, photolithography, and etching, with photolithography stopping at the surface of the substrate or central nanopillar.

[0033] A columnar SOT-MRAM memory, characterized in that it includes the columnar SOT-MRAM memory cell and its operating circuit, the operating circuit including,

[0034] The first electrical terminal is connected to the top of the magnetic central nanopillar;

[0035] The second electrical terminal is connected to the bottom of the magnetic central nanopillar;

[0036] The third electrical terminal is connected to the outside of the external electrode;

[0037] The operation module, which is connected to three electrical terminals, is used to control write and read operations.

[0038] The columnar SOT-MRAM memory is characterized in that the data writing operation module includes,

[0039] The first acquisition module is used to acquire the read voltage of the columnar SOT-MRAM memory;

[0040] The first judgment module is connected to the first acquisition module to compare the relationship between the read voltage and the reference voltage to determine the resistance state.

[0041] The second judgment module is connected to the first judgment module to determine whether to apply writing current and generate instructions based on the data to be written and the current resistance state.

[0042] The first control module is connected to the second judgment module to perform the operation of whether to apply an SOT current pulse according to the instruction.

[0043] The writing method for columnar SOT-MRAM memory includes the following steps:

[0044] A reading current is applied between the second and third electrical terminals, and the reading voltage between the second and third electrical terminals is detected.

[0045] When the read voltage is less than the reference voltage, the resistance of the memory cell is in a low-resistance state; when the read voltage is greater than the reference voltage, the resistance of the cylindrical magnetic storage cell is in a high-resistance state. When the resistance is in a low-resistance state, no write current is applied if the first data is to be written; and a write current is applied if the second data is to be written. When the resistance is in a high-resistance state, no write current is applied if the first data is to be written; and no write current is applied if the second data is to be written.

[0046] The writing mechanism of the magnetic storage unit is based on spin-orbit moment-induced precession magnetization reversal. In the writing method, during writing, a current pulse of 5-1000 ps is applied between the first and second electrical terminals of the nanopillar, with a current density of 0.3-30 mA / cm². 2 .

[0047] In the writing method described above, the writing process is a unipolar writing mode; the same current polarity enables the magnetization state of the storage cell to switch from a low resistance state to a high resistance state, and from a high resistance state to a low resistance state.

[0048] Compared with the prior art, the beneficial effects of this invention are as follows:

[0049] This invention utilizes a columnar SOT-MRAM design with a circular or polygonal cross-section, simplifying fabrication, providing excellent etching efficiency, high stackability, and superior layout design. Based on SOT-induced precession magnetization reversal, no additional symmetry breaking methods (such as external magnetic fields) are required during operation, simplifying the process. Simultaneously, the current pulse length is on the picosecond level, significantly improving write speed and reducing write power consumption. The data write operation module of this invention has a simple structure. Whether a write current is applied depends on the read magnetization state; when the read resistance state is already at the target resistance state to be written, the write current can be avoided, resulting in greater energy efficiency. The magnetic storage cells are along the axial direction of magnetization, increasing the density of magnetic storage cells in the XY direction.

[0050] The description provided is merely an overview of the technical solution of this invention. In order to make the technical means of this invention clearer and more understandable, so that those skilled in the art can implement it according to the contents of the specification, and to make the described and other objects, features and advantages of this invention more obvious and understandable, specific embodiments of this invention are described below. Attached Figure Description

[0051] Various other advantages and benefits of the present invention will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiments below. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. It is obvious that the drawings described below are merely some embodiments of the invention, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. Furthermore, the same reference numerals denote the same parts throughout the drawings.

[0052] In the attached diagram:

[0053] Figure 1 The diagram shows the magnetic ground state of single-domain magnetic nanorings for five different cross-sectional shapes of columnar SOT-MRAM memory cells. The magnetic ground state in the diagram is an out-of-plane state.

[0054] Figures 2A to 2E The columnar SOT-MRAM memory cell, wherein Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E These are schematic diagrams of columnar SOT-MRAM memory cells with cross-sections of circular, square, rhomboid, equilateral triangle, and regular hexagon, respectively.

[0055] Figures 3A to 3S As one embodiment, the fabrication process of the columnar SOT-MRAM memory cell;

[0056] Figures 4A to 4F This is a schematic diagram of the columnar SOT-MRAM memory structure described in this disclosure; wherein Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E This is a three-dimensional view of a cylindrical SOT-MRAM memory with cross-sections of circular, square, rhomboid, equilateral triangle, and regular hexagonal storage cells. Figure 4F This is a side sectional view of the columnar SOT-MRAM memory described in this disclosure;

[0057] Figures 5A to 5B This is a schematic diagram illustrating the current flow during the writing process of the cylindrical SOT-MRAM memory described in this disclosure; wherein Figure 5A This is a top view. Figure 5B This is a side sectional view;

[0058] Figures 6A to 6E This is a time evolution trajectory diagram of magnetization at a point in the magnetic free layer during the writing process of the columnar SOT-MRAM memory described in this disclosure, wherein... Figure 6A , Figure 6B , Figure 6C , Figure 6D , Figure 6E The magnetization-time evolution trajectories of cylindrical magnetic storage devices with circular, square, rhomboid, equilateral triangular, and regular hexagonal cross-sections are shown respectively.

[0059] Figures 7A to 7E A schematic diagram illustrating the evolution of the magnetization component along the Z-axis at a point in the magnetic free layer over time during the writing process of the columnar SOT-MRAM memory. Figure 7A , Figure 7B , Figure 7C , Figure 7D , Figure 7E The magnetization components-time evolution trajectories of cylindrical magnetic storage devices with central nanopillar cross-sections of circular, square, rhomboid, equilateral triangle, and regular hexagonal shapes are shown respectively.

[0060] Figure 8 In one embodiment, a comparison of the flip-flop current density of SOT-MRAM memory cells with different cross-sectional shapes is shown.

[0061] Figures 9A to 9B This is a schematic diagram illustrating the relationship between the direction of the applied current and the transition between the high-resistance and low-resistance states of the columnar SOT-MRAM memory described in this disclosure during the writing process; wherein... Figure 9A The figure shows the transition relationship between the high-resistance state and the low-resistance state corresponding to the application of a series of positive current pulses. Figure 9BA schematic diagram illustrating the transition relationship between high-resistance and low-resistance states corresponding to the application of a series of negative current pulses;

[0062] Figure 10 This is a flowchart of the write operation of the data write operation module in the columnar SOT-MRAM memory described in this disclosure;

[0063] Figure 11 for Figure 10 The flowchart shown illustrates the relationship between the write current and the data represented by the current resistance value, and the target write data.

[0064] The present invention will be further explained below with reference to the accompanying drawings and embodiments. Detailed Implementation

[0065] Specific embodiments of the invention will now be described in more detail with reference to the accompanying drawings. While specific embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the invention and to fully convey the scope of the invention to those skilled in the art.

[0066] It should be noted that certain terms are used in the specification and claims to refer to specific components. Those skilled in the art will understand that different terms may be used to refer to the same component. This specification and claims do not distinguish components based on differences in terminology, but rather on differences in function. The terms "comprising" or "including" used throughout the specification and claims are open-ended and should be interpreted as "comprising but not limited to." The following descriptions are preferred embodiments for carrying out the invention; however, these descriptions are for the purpose of understanding the general principles of the specification and are not intended to limit the scope of the invention. The scope of protection of this invention is determined by the appended claims.

[0067] To facilitate understanding of the embodiments of the present invention, the following will provide further explanation and description with reference to the accompanying drawings and several specific embodiments, and the accompanying drawings do not constitute a limitation on the embodiments of the present invention.

[0068] To better understand, such as Figures 1 to 11 As shown, a columnar SOT-MRAM memory includes,

[0069] Central nanopillar 101 is a nanopillar structure made of a material with spin-orbit coupling effect;

[0070] A magnetic tunnel junction, comprising two magnetic storage layers and a non-magnetic spacer layer, is wrapped around the central nanopillar 101. The magnetic storage layers include...

[0071] A magnetic free layer 102 surrounds and contacts the central nanopillar 101. The magnetization direction of the magnetic free layer 102 extends along the axial direction of the nanopillar structure. The magnetization reversal of the magnetic free layer 102 depends on the spin-polarized electrons generated by the central nanopillar 101. The polarization direction of the spin-polarized electrons is perpendicular to the axial direction of the central nanopillar. The damping-like moment and field-like moment generated by these electrons work together to achieve the magnetization precession reversal of the magnetic free layer 102.

[0072] Spacer layer 103, which wraps around the outside of magnetic free layer 102,

[0073] A magnetic reference layer 104 is wrapped around the outside of the spacer layer 103, and the magnetization direction of the magnetic reference layer 104 extends along the axial direction of the nanopillar structure.

[0074] The external electrode 105 is wrapped around the outside of the magnetic reference layer 104 and connected to an external circuit.

[0075] The first electrical terminal 201 is connected to the top of the central nanopillar 101;

[0076] The second electrical terminal 202 is connected to the bottom of the central nanopillar 101;

[0077] The third electrical terminal 203 is connected to the outside of the external electrode 105;

[0078] The operation module, which is connected to three electrical terminals, is used to control write and read operations.

[0079] In a preferred embodiment of the cylindrical magnetic memory, when the magnetization direction of the magnetic free layer 102 is parallel to the magnetization direction of the magnetic reference layer 104, the magnetic memory is in a low-resistance state; when the magnetization direction of the magnetic free layer 102 is parallel to the magnetization direction of the magnetic reference layer 104, the magnetic memory is in a high-resistance state.

[0080] In a preferred embodiment of the columnar magnetic memory, the magnetization direction of the magnetic reference layer 104 is fixed to be upward or downward along the axial direction of the nanopillar structure, and the magnetization direction of the magnetic free layer 102 switches between upward or downward along the axial direction of the nanopillar structure.

[0081] The data writing operation module is connected to the first electrical terminal 201, the second electrical terminal 202 and the third electrical terminal 203 to realize data writing via SOT current pulse.

[0082] In a preferred embodiment of the cylindrical magnetic storage device, the data writing operation module includes,

[0083] The first acquisition module is used to acquire the read voltage of the SOT-MRAM memory.

[0084] The first judgment module, connected to the first acquisition module, is used to compare the relationship between the read voltage and the reference voltage to determine the resistance state.

[0085] The second judgment module is connected to the first judgment module to determine whether to apply a write current based on the data to be written and the current resistance state, and to generate an instruction.

[0086] The first control module is connected to the second judgment module to perform the operation of whether to apply a write current according to the instruction.

[0087] The writing method for columnar SOT-MRAM memory includes the following steps:

[0088] A reading current is applied between the second and third electrical terminals, and the reading voltage between the second and third electrical terminals is detected.

[0089] When the read voltage is less than the reference voltage, the resistance of the cylindrical SOT-MRAM memory is in a low-resistance state; when the read voltage is greater than the reference voltage, the resistance of the memory cell is in a high-resistance state. When the resistance is in a low-resistance state, no write current is applied when writing the first data, and a write current is applied when writing the second data. When the resistance is in a high-resistance state, no write current is applied when writing the first data, and no write current is applied when writing the second data.

[0090] In one embodiment, when the write current is applied to the Z-state cylindrical SOT-MRAM memory, it is a unipolar write operation, meaning that regardless of the current resistance state of the memory cell, the resistance state will change once a write current is applied. This write mechanism is based on spin-orbit moment-induced precession magnetization reversal, resulting in faster write speeds and higher energy efficiency. The Z-state cylindrical SOT-MRAM memory also has a lower XY plane area footprint.

[0091] A single magnetic domain may possess three magnetic ground states: in-plane state, vortex state, and out-of-plane state (or Z state). The out-of-plane state refers to a magnetic nanoring whose magnetization direction is along an out-of-plane direction (perpendicular to the XY plane), and the magnetization direction is consistent at every point, which can be along the +Z or -Z direction. For the aforementioned cylindrical magnetic storage cell, a structure was designed with its magnetic ground state as the out-of-plane state.

[0092] Figure 1 The magnetic ground state, i.e. out-of-plane state, of the single-domain magnetic nanoring of the columnar SOT-MRAM memory cell was plotted.

[0093] Figures 2A to 2E This refers to the storage cell portion of the cylindrical SOT-MRAM memory, for clarity. Figures 2A to 2E And any other illustrations of the invention are not drawn to scale, wherein Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E The storage cells are circular, square, rhomboid, equilateral triangle, and regular hexagonal columnar structures, respectively. Each columnar structure includes a central nanopillar 101, a magnetic free layer 102, a spacer layer 103, a magnetic reference layer 104, and an external electrode 105.

[0094] Figures 3A to 3S One embodiment provides a fabrication process for the SOT-MRAM memory cell.

[0095] First, substrate 301 is provided ( Figure 3A Then, a bottom electrode 302 is deposited on the substrate 301. Figure 3B Then, an insulating dielectric 303 is deposited to obtain a substrate 301 with a bottom electrode 302. Figure 3C The deposition can be accomplished through atomic layer deposition (ALD); a layer of photoresist 311 is coated on the insulating dielectric 303. Figure 3D Then, patterning is performed to define the subsequent etching areas. Figure 3E Selective removal is performed to form a trench in the insulating medium 303. Figure 3F This is used for the subsequent fabrication and electrical connection of the central nanopillars, and removal is accomplished using appropriate etching steps.

[0096] Then, the central nanopillars were prepared, first by depositing a layer of SOT metal 304 ( Figure 3G Then, a layer of photoresist is coated on the SOT metal layer 304. Figure 3H ), using patterning to define subsequent etching areas ( Figure 3I Then, the central nanopillar 101 was obtained by selective etching. Figure 3J Then, the growth of the magnetic tunnel junction and the external electrode is carried out. First, a free layer 102 is grown along the central nanopillar 101 and on the surface of the insulating medium 303. Figure 3K This is best accomplished via atomic layer deposition (ALD); then the spacer layer 103 is grown using the same process steps. Figure 3L ), magnetic reference layer 104 ( Figure 3M An external electrode 105 is deposited on the surface of the magnetic reference layer 104. Figure 3N Then, selective etching is performed to remove multiple layered materials located on the surface of the insulating dielectric. First, a layer of photoresist is coated on the external electrode 105. Figure 3OThen, patterning is performed to define the subsequent etching areas. Figure 3P Then, selective removal is performed to remove multiple layered materials located on the insulating medium 303, while retaining the magnetic free layer 102, spacer layer 103, magnetic reference layer 104, and external electrode 105 located on the top and sides of the central nanopillar 101. Figure 3Q The removal is accomplished using appropriate etching steps. Depending on the material used in different layers, the removal may be completed in one or more etching steps.

[0097] Finally, electrical isolation is performed by first depositing a dielectric layer to cover the central nanopillar 101 and multiple layered materials on its top and sides. Figure 3R This is best accomplished using atomic layer deposition (ALD). Finally, CMP is used to smooth the surface, removing the dielectric layer, outer electrode 105, magnetic reference layer 104, spacer layer 103, and magnetic free layer 102 from the top of the central nanopillar, leaving the central nanopillar 101 intact, resulting in a SOT-MRAM memory. Figure 3S ).

[0098] Figures 4A to 4F This is a three-dimensional schematic diagram of the columnar SOT-MRAM memory disclosed in this invention. For clarity, Figures 4A to 4F The structures shown are not presented to standard scale. Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E Figure 4F shows a three-dimensional schematic diagram of circular, square, rhomboid, equilateral triangular, and regular hexagonal SOT-MRAM memories, respectively. A first electrical terminal 201 and a second electrical terminal 202 are connected to a central nanopillar 101. A magnetic free layer 102 is wrapped around the central nanopillar 101, a spacer layer 103 is wrapped around the magnetic free layer 102, a magnetic reference layer 104 is wrapped around the spacer layer 103, and an external electrode 105 is wrapped around the magnetic reference layer 104. A third electrical terminal is connected to the external electrode 105. Figure 4F shows a side sectional view of the cylindrical magnetic memory. The magnetization directions of the magnetic free layer 102 and the magnetic reference layer 104 are in the z-direction. In practical applications, the magnetization direction of the magnetic reference layer 104 needs to be kept fixed; for example, the magnetization direction of the magnetic reference layer 104 can always point to the +Z direction or always point to the -Z direction. The magnetization direction of the magnetic free layer 102 is not fixed and can be changed by the SOT current. When the magnetization direction of the magnetic free layer 102 is antiparallel to the magnetization direction of the magnetic reference layer 104, the magnetic storage cell is in a high-resistance state, corresponding to the storage of data "1"; when the magnetization direction of the magnetic free layer 102 is parallel to the magnetization direction of the magnetic reference layer 104, the magnetic storage cell is in a low-resistance state, corresponding to the storage of data "0".

[0099] Figures 5A to 5B This is a schematic diagram illustrating the current flow during the writing process of the cylindrical SOT-MRAM memory described in this disclosure; wherein Figure 5A This is a top view. Figure 5B This is a side sectional view. When a current J is applied... SOT At that time, due to the spin Hall effect, electrons are polarized within the central nanopillar 101, and electrons with different polarization directions diffuse in different directions. For example... Figure 5A As shown, according to the spin Hall effect, electrons polarized along the +y direction diffuse towards the -x direction; while electrons polarized along the -y direction diffuse towards the +x direction. Figure 5B As shown, when spin-polarized electrons diffuse into the magnetic free layer, the resulting spins will rotate around the nanopillars. The spin-polarized electrons acting on the magnetic free layer 102 will generate a damping-like torque and a field-like torque. The direction of the damping-like torque is... The direction of the field-like moments is ,in Let be the magnetization direction vector at a certain point in free layer 102. This represents the spin polarization direction of the electron acting at that point. Two torques act on the magnetization in two different ways. The damping torque consistently applies a torque that causes the magnetization vector to... The polarization direction towards spin electrons The field-like torque is always applied, causing the magnetization vector to... Polarization direction around spin electrons Precession. It should be noted that, due to the radial symmetry of the magnetic free layer, positions at the same height but different angles should exhibit radially symmetrical dynamic characteristics. When current is applied, the magnetization vector... around Precession occurs; and under the action of the damping torque, the precession cone angle gradually decreases. As the precession cone angle decreases, both the field-effect torque and the damping torque decrease, leading to a gradual decrease in the precession frequency. When the magnetization vector... When the precession reaches a Z-axis component less than 0, the SOT current is turned off, at which point the magnetization vector... The magnetization will relax to the -Z direction under the influence of the effective field, thus achieving magnetization reversal. It should be further noted that even without shutting off the SOT current, the SOT and the effective field will eventually reach an equilibrium state under the influence of the effective field. If this equilibrium point is located where mz < 0 of the magnetization vector, then after shutting off the SOT current, the magnetization will relax to the -Z direction under the influence of the effective field. Conversely, if the equilibrium point is located where mz > 0 of the magnetization vector, then after shutting off the SOT current, the magnetization will relax to the +Z direction under the influence of the effective field.

[0100] Figures 6A to 6E This is a time-varying trajectory of magnetization at a certain point during the writing process of the columnar SOT-MRAM memory described in this disclosure, wherein... Figure 6A , Figure 6B , Figure 6C , Figure 6D , Figure 6E The magnetization time evolution trajectories of circular, square, rhomboid, equilateral triangular, and regular hexagonal columnar SOT-MRAM memories are shown respectively.

[0101] Figures 7A to 7E This is a graph showing the evolution of the magnetization component along the z-axis at a certain point during the writing process of the cylindrical SOT-MRAM memory, where... Figure 7A , Figure 7B , Figure 7C , Figure 7D , Figure 7E The graphs show the time evolution of magnetization components for cylindrical SOT-MRAM memories with central nanopillar cross-sections of circles, squares, rhombuses, equilateral triangles, and regular hexagons, respectively. Initially, the magnetization direction at this point is along the +z direction; after current is applied, the magnetization direction at this point precesses towards the -z direction. When the magnetization component along the z-axis... z When <0, the current is disconnected. Due to the effect of magnetic anisotropy, the magnetization will automatically stabilize in the -z direction, achieving a deterministic reversal of magnetization.

[0102] In one embodiment, the switching current density of SOT-MRAMs with different shapes was simulated and calculated. Figure 8 A comparison of the flip-flop current densities of SOT-MRAM memory cells with central nanopillars of different cross-sectional shapes shows that the current density required for square-centered nanopillars is similar to that for cylindrical nanopillars, at 2.9 MA / cm². 2 The hexagonal structure is slightly higher than the square structure, and the flip current density of the SOT-MRAM with equilateral triangle and rhombus structures is much higher than that of the cylindrical central nanopillar.

[0103] Figures 9A to 9BThis relates the direction of the applied current and the transition between the high-resistivity and low-resistivity states of the columnar SOT-MRAM memory during the writing process described in this disclosure.

[0104] in Figure 9A The diagram illustrates the transition between high-resistance and low-resistance states corresponding to a series of positive current pulses. Initially, the columnar SOT-MRAM memory cell is in a low-resistance state; after one positive current pulse is applied, the memory cell transitions from a low-resistance state to a high-resistance state. After a second positive current pulse is applied, the memory cell transitions from a high-resistance state to a low-resistance state. For each of the subsequent two applied positive current pulses, the resistance state of the memory cell undergoes a transition.

[0105] Figure 9B This describes the transition relationship between high-resistance and low-resistance states corresponding to a series of negative current pulses. Similar to positive current pulses, each negative current pulse also causes a resistance state transition. Therefore, regardless of the direction of the current pulse, as long as the current pulse length and current density meet the flipping requirements, the resistance state of the cylindrical magnetic storage cell will flip once. This strategy is a unipolar write strategy.

[0106] Figure 10 This is a flowchart illustrating the write operation of the data write operation module of the columnar SOT-MRAM memory described in this disclosure. As shown, since the SOT-MRAM memory cell adopts a unipolar write strategy, its current resistance state must be determined before applying the write pulse to avoid erroneous flipping. Therefore, a resistance state detection process is first executed, applying a constant read current Iread between the second and third electrical terminals to obtain the read voltage Vread between the two terminals. The read voltage Vread is then compared with a preset reference voltage Vref. If the read voltage Vread is greater than the reference voltage Vref, the magnetic memory cell is currently in a high-resistance state, corresponding to the stored data '1'; if the read voltage Vread is less than the reference voltage Vref, the magnetic memory cell is currently in a low-resistance state, corresponding to the stored data '0'. When the data currently stored in the magnetic memory cell is "1", if the data to be written is also "1", no write current is needed, and the data ultimately stored in the magnetic memory cell remains "1"; if the data to be written is "0", a write current is needed, and the data ultimately stored in the magnetic memory cell becomes "0". When the data currently stored in the magnetic storage unit is "0", if the data to be written is "1", then a write current needs to be applied, and the data ultimately stored in the magnetic storage unit becomes "1"; if the data to be written is still "0", then no write current needs to be applied, and the data ultimately stored in the magnetic storage unit remains "0".

[0107] For the operation to be performed, the relationship between whether or not the write current is specified and the data represented by the current resistance value and the target write data is an XOR relationship, such as... Figure 11 As shown. Write current is applied if and only if either the data represented by the current resistance value or the target write data is '1'.

[0108] The circuit principle of the data write operation module of the Z-state SOT-MRAM memory described in this disclosure is as follows: First, a read current is passed between the second electrical terminal and the third electrical terminal through a current source; since the second electrical terminal is grounded, the voltage formed at the third electrical terminal is the read voltage Vread. Then, the read voltage Vread is input to a comparator and compared with a reference voltage Vref: if the read voltage Vread is greater than the reference voltage Vref, the comparator outputs a high level; otherwise, the comparator outputs a low level. Next, the output signal of the comparator and the write signal are input to an XOR gate for logical operation: if the XOR gate outputs a high level, a write voltage is applied to the first electrical terminal to cause the magnetic free layer to undergo a magnetization reversal; if the XOR gate outputs a low level, no write voltage is applied to the first electrical terminal, and the magnetization state of the magnetic free layer remains unchanged.

[0109] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0110] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

Claims

1. A columnar SOT-MRAM memory cell, comprising, Central nanopillars are nanopillar structures made of materials with spin-orbit coupling effects; A magnetic tunnel junction, comprising two magnetic storage layers and a non-magnetic spacer layer, is wrapped around a central nanopillar. The magnetic tunnel junction includes... A magnetic free layer surrounds and contacts the central nanopillar, having the same cross-sectional shape as the central nanopillar. The magnetization direction of the magnetic free layer extends along the axial direction of the nanopillar structure. The magnetization reversal of the magnetic free layer is facilitated by spin-polarized electrons generated by the central nanopillar. The polarization direction of the spin-polarized electrons is perpendicular to the axis of the central nanopillar. The damping moment and field moment they generate work together to achieve the magnetization precession and reversal of the magnetic free layer. A spacer layer, which wraps around the magnetic free layer, has the same cross-sectional shape as the central nanopillar. A magnetic reference layer is wrapped around the outside of the spacer layer. Its cross-sectional shape is the same as that of the central nanopillar. The magnetization direction of the magnetic reference layer extends along the axial direction of the nanopillar structure. The outer electrode is wrapped around the outside of the magnetic reference layer and connected to an external circuit. The cross-sectional shapes of the columnar SOT-MRAM memory cells include circles, squares, rhombuses, equilateral triangles, and regular hexagons.

2. The columnar SOT-MRAM memory cell as described in claim 1, characterized in that, Preferably, when the magnetization direction of the magnetic free layer is parallel to the magnetization direction of the magnetic reference layer, the magnetic tunnel junction of the memory cell is in a low-resistance state; when the magnetization direction of the magnetic free layer is parallel to the magnetization direction of the magnetic reference layer, the magnetic tunnel junction of the memory cell is in a high-resistance state. The magnetization direction of the magnetic reference layer is fixed to either upward or downward along the axial direction of the nanopillar structure, while the magnetization direction of the magnetic free layer switches between upward and downward along the axial direction of the nanopillar structure.

3. The columnar SOT-MRAM memory cell as described in claim 1, characterized in that, The central nanopillar is made of a material that converts electric current into spin current, including Nb, Ta, Cr, Mo, W, Re, Ru, Os, Ir, Pd, Pt, Au, Cd, Hg, B, Tl, Sn, Pb, Sb, Bi, Se, Te, Cl, Sm, TaN, WN, Sb₂Te₃, BiSb, Bi₂Se₃, Bi₂Te₃, (BiSb)₂Te₃, HgTe, BiSe, (Bi 0.57 Sb 0.43 )2Te3, TlBiSe2, Bi 1.5 Sb 0.5 Te 1.8 Se 1.2 SnTe, Bi 2-x Cr x Se3, SmB6, BiTeCl, HgTe / CdTe, or one or more of HgTe, BiSb alloy, Bi2Se3, Sb2Te3, and Bi2Te3.

4. The columnar SOT-MRAM memory cell as described in claim 1, characterized in that, The magnetic free layer and the magnetic reference layer are magnetic layers made of ferromagnetic or ferrimagnetic metals and their alloys. The ferromagnetic or ferrimagnetic metals and their alloys include one or more of Fe, Co, Ni, Mn, FeCo, FeNi, FePd, FePt, CoPd, CoPt, YCo, LaCo, PrCo, NdCo, SmCo, MnBi, CoFeB, or MnNiSb, and combinations thereof with one or more of B, Al, Zr, Hf, Nb, Ta, Cr, Mo, Pd, or Pt; or the magnetic free layer and the magnetic reference layer are made of synthetic ferromagnetic or ferrimagnetic materials, including multilayer stacked structures of 3d / 4d / 4f / 5d / 5f / rare earth metals such as Co / Ir, Co / Pd, Co / Pt, Co / Au, Co / Ni, or CrCo / Pt. Alternatively, the magnetic free layer and the magnetic reference layer may be made of a half-metallic ferromagnetic material, comprising a Heusler alloy in the form of XYZ or X2YZ, wherein X comprises one or more of Mn, Fe, Co, Ni, Pd or Cu, Y comprises one or more of Ti, V, Cr, Mn, Fe, Co or Ni, and Z comprises one or more of Al, Ga, In, Si, Ge, Sn or Sb; Alternatively, the magnetic free layer and the magnetic reference layer may be made of a synthetic antiferromagnetic material. The magnetic free layer and the magnetic reference layer made of the synthetic antiferromagnetic material are composed of a ferromagnetic layer and a spacer layer. The ferromagnetic layer constituting the magnetic free layer and the magnetic reference layer includes one or more of Fe, Co, Ni, FeCo, CrCoPt or CoFeB, or multiple stacked ferromagnetic layers of material (Co / Ni)p, (Co / Pd)m or (Co / Pt)n, where m, n, and p refer to the number of repetitions of the multiple stacks. The spacer layer is composed of one or more of Nb, Ta, Cr, Mo, W, Re, Ru, Os, Rh, Ir, Pt, Cu, Ag or Au.

5. The columnar SOT-MRAM memory cell as described in claim 1, characterized in that, The spacer layer is an oxide, nitride, or oxynitride, wherein the constituent elements of the oxide, nitride, or oxynitride include one or more of Mg, B, Al, Ca, Sr, La, Ti, Hf, V, Ta, Cr, W, Ru, Cu, In, Si, or Eu; or the spacer layer is a metal or alloy, wherein the constituent elements of the metal or alloy include one or more of Mg, Al, Cu, Ag, Au, Y, Ti, V, Nb, Ta, Cr, Mo, W, Ru, Os, Rh, Pd, or Pt; or the spacer layer is SiC or a ceramic material.

6. A method for fabricating a columnar SOT-MRAM memory cell according to any one of claims 1 to 5, comprising: A bottom electrode and a central nanopillar are formed on the substrate; A magnetic tunnel junction is formed on the central nanopillar, including a magnetic free layer, a spacer layer, and a magnetic reference layer; An external electrode as described in claim 1 is grown on the outer side of the magnetic reference layer; The magnetic tunnel junction and the external electrode are removed; A dielectric layer is formed on the substrate; The magnetic free layer, spacer layer, and magnetic reference layer can be prepared using conformal deposition techniques such as atomic layer deposition or chemical vapor deposition. The formation process includes growth, photolithography, and etching processes, with photolithography stopping at the surface of the substrate or central nanopillar.

7. A columnar SOT-MRAM memory, characterized in that, Includes the columnar SOT-MRAM memory cell according to any one of claims 1 to 5, and the operation circuit of the memory cell, the operation circuit including, The first electrical terminal is connected to the top of the central nanopillar; The second electrical terminal is connected to the bottom of the central nanopillar; The third electrical terminal is connected to the outside of the external electrode; The operation module, which is connected to three electrical terminals, is used to control write and read operations.

8. The columnar SOT-MRAM memory as described in claim 7, characterized in that, The data writing operation module includes... The first acquisition module is used to acquire the read voltage of the columnar SOT-MRAM memory; The first judgment module is connected to the first acquisition module to compare the relationship between the read voltage and the reference voltage to determine the resistance state. The second judgment module is connected to the first judgment module to determine whether to apply writing current and generate instructions based on the data to be written and the current resistance state. The first control module is connected to the second judgment module to perform the operation of whether to apply an SOT current pulse according to the instruction.

9. The writing method of the columnar SOT-MRAM memory as described in any one of claims 7-8, characterized in that, It includes the following steps, A reading current is applied between the second and third electrical terminals, and the reading voltage between the second and third electrical terminals is detected. When the read voltage is less than the reference voltage, the resistance of the columnar SOT-MRAM memory is in a low-resistance state; when the read voltage is greater than the reference voltage, the resistance of the memory cell is in a high-resistance state; when the resistance is in a low-resistance state, no write current is applied if the first data is to be written. To write the second data, a write current is applied; When the resistance is in a high-resistance state, a write current is applied to write the first data; no write current is applied to write the second data.

10. The writing method according to claim 9, characterized in that, The memory's writing mechanism is based on spin-orbit moment-induced precession magnetization reversal. During writing, a current pulse of 5–1000 ps is applied between the first and second electrical terminals of the nanocentral pillar, with a current density of 0.3–30 mA / cm². 2 ; The writing process is a unipolar writing method; the same current polarity enables the magnetization state of the memory cell to switch from a low resistance state to a high resistance state, and from a high resistance state to a low resistance state.

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