Temperature sensor and method for operating same

By switching capacitor combinations in the temperature sensor and combining calibration and measurement modes, the number of conducting capacitors in the capacitor bank is dynamically adjusted, which solves the measurement error problem caused by wafer process and measurement temperature variations and improves measurement accuracy.

CN121140974APending Publication Date: 2025-12-16PIXART IMAGING INC
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Patent Information

Application Number
CN202510355814.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-06-14
Filing Date
2025-03-25
Publication Date
2025-12-16

AI Technical Summary

Technical Problem

The measured values ​​of traditional temperature sensors vary with the wafer fabrication process and measurement temperature, leading to measurement errors.

Method used

By switching capacitor combinations to extend the pulse length and count value of the measurement signal, a combination of first and second comparators, capacitor banks, current sources and preset voltages is used, combined with calibration mode and measurement mode, to dynamically adjust the number of conducting capacitors in the capacitor bank to reduce measurement error.

Benefits of technology

Without increasing comparator complexity or chip footprint, the measurement accuracy of the temperature sensor is improved, especially under low-temperature conditions.

✦ Generated by Eureka AI based on patent content.

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Abstract

A temperature sensor includes a first capacitor bank, a second capacitor bank, a first comparator, and a second comparator. In the correction step, the first comparator compares a first charging voltage of the first capacitor group with a first group of voltage thresholds to determine a conduction capacitance of the first capacitor group, and the second comparator compares a second charging voltage of the second capacitor group with a second group of voltage thresholds to determine a conduction capacitance of the second capacitor group. Through the correction step, the first charging voltage and the second charging voltage in the wafer manufacturing process can be more consistent and predictable.
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Description

TECHNICAL FIELD

[0001] The present invention relates to a temperature sensor, and more particularly, to a temperature sensor capable of reducing measurement errors caused by wafer processing and measurement temperature variations and a method for operating the same. BACKGROUND

[0002] The measurement values of conventional temperature sensors vary with wafer processing and measurement temperature variations, resulting in measurement errors. Therefore, a temperature sensor capable of excluding the effects of wafer processing and measurement temperature variations is needed.

[0003] The information disclosed in the Background section is only for the purpose of increasing the understanding of the background of the present invention and should not be taken as an acknowledgement or any form of suggestion that this information forms prior art that is already commonly known to those of ordinary skill in the art. SUMMARY

[0004] Therefore, the present invention provides a temperature sensor capable of extending the pulse length and count value of a measurement signal by switching capacitor combinations and a method for operating the same.

[0005] The present invention provides a temperature sensor capable of reducing measurement errors without increasing the design complexity of a comparator and the area occupied in a chip and a method for operating the same.

[0006] The present invention provides a temperature sensor suitable for measuring a wide temperature range and a method for operating the same.

[0007] The present invention provides a temperature sensor including a first comparator, a second comparator, a first capacitor group, a second capacitor group, a first current source, a second current source, a first set of preset voltages, and a second set of preset voltages. The first capacitor group is coupled to first input terminals of the first comparator and the second comparator. The second capacitor group is coupled to the first input terminals of the first comparator and the second comparator. The first current source is configured to charge the first capacitor group with a first current. The second current source is configured to charge the second capacitor group with a second current. The first set of preset voltages is configured to be coupled to second input terminals of the first comparator and the second comparator. The second set of preset voltages is configured to be coupled to the second input terminals of the first comparator and the second comparator.

[0008] The present application also provides a temperature sensor comprising a first comparator, a second comparator, a first capacitor group, a second capacitor group, a first current source, a second current source, a first set of preset voltages, and a second set of preset voltages. The first capacitor group is coupled to a first input terminal of the first comparator. The second capacitor group is coupled to a first input terminal of the second comparator. The first current source is configured to charge the first capacitor group with a first current. The second current source is configured to charge the second capacitor group with a second current. The first set of preset voltages is configured to be coupled to a second input terminal of the first comparator. The second set of preset voltages is configured to be coupled to a second input terminal of the second comparator.

[0009] The present application also provides a method for operating a temperature sensor. The temperature sensor comprises a first capacitor group, a second capacitor group, a first current source, and a second current source. The method comprises the following steps: detecting a first current of the first current source and a second current of the second current source by a detector; turning on a first portion of capacitors in the first capacitor group and the second capacitor group during temperature measurement when the first current is greater than a first maximum current and the second current is greater than a second maximum current; and turning on a second portion of capacitors in the first capacitor group and the second capacitor group during the temperature measurement when the first current is less than a first minimum current and the second current is less than a second minimum current, the second portion being different from the first portion.

[0010] In order to make the above and other purposes, features and advantages of the present application more apparent, the following will be described in detail with reference to the accompanying drawings. In addition, the same components are denoted by the same reference numerals in the description of the present application. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 is a schematic diagram of a temperature sensor of a first embodiment of the present application;

[0012] Figure 2A is a schematic diagram of charging voltages of the temperature sensor of the first embodiment of the present application;

[0013] Figure 2B is a schematic diagram of temperature signals output by the temperature sensor of the first embodiment of the present application;

[0014] Figure 3 is a measurement result of different corners of the temperature sensor of the first embodiment of the present application;

[0015] Figure 4A and Figure 4B is a schematic diagram of a temperature sensor of a second embodiment of the present application;

[0016] Figure 5is a schematic diagram of connection selection of a capacitor group of a temperature sensor of a second embodiment of the present application;

[0017] Figure 6 is a measurement result of different corners of a temperature sensor of the second embodiment of the present application;

[0018] Figure 7 is a schematic diagram of a temperature sensor of a third embodiment of the present application; and

[0019] Figure 8 is a flow chart of a method of operating the temperature sensor of the third embodiment of the present application.

[0020] BRIEF DESCRIPTION OF DRAWINGS

[0021] 400, 700 temperature sensor

[0022] 411, 711 first capacitor group

[0023] 413, 713 first current source

[0024] 421, 721 second capacitor group

[0025] 423, 723 second current source

[0026] 433, 733 third current source

[0027] CompA first comparator

[0028] CompB second comparator

[0029] T_OUT1 first comparison output

[0030] T_OUT2 second comparison output

[0031] T_OUTf temperature signal DETAILED DESCRIPTION

[0032] It is an object of the present application to provide a temperature sensor and a method of operating the same, by first measuring a steady state voltage of a capacitor group in a calibration mode, and then determining the number of capacitors to be turned on for the capacitor group in a measurement mode according to a comparison result between the steady state voltage and a preset voltage group. In the present application, the steady state voltage can be measured inside a chip of the temperature sensor or outside the chip.

[0033] Reference will now be made to Figure 1The diagram shown is a schematic representation of a temperature sensor 100 according to a first embodiment of the present invention. The temperature sensor 100 includes a temperature detection circuit and a digital processing circuit 15 connected to each other. In one embodiment, the temperature detection circuit is located inside the chip of the temperature sensor 100, while the digital processing circuit 15 is located outside the chip of the temperature sensor 100. The digital processing circuit 15 is electrically connected to a pin or pad of the chip to communicate with the chip of the temperature sensor 100 and is electrically connected to the temperature detection circuit. The digital processing circuit 15 may include, for example, a digital signal processor (DSP), a microcontroller (MCU), a microprocessor (MPU), or a central processing unit (CPU), but is not limited thereto. In another embodiment, the digital processing circuit 15 is located inside the chip of the temperature sensor 100.

[0034] The temperature detection circuit includes a first capacitor Cptat, a first current source 113, a second capacitor Cctat, a second current source 123, a third capacitor Cnom, a third current source 133, a first comparator CompA, a second comparator CompB, and an XOR gate 14. In one embodiment, the temperature detection circuit further includes multiple switches S0 to S5. The chip of the temperature sensor 100 includes, for example, an application-specific integrated circuit (ASIC) or a programmable logic array (FPGA) for controlling the opening and closing of the multiple switches S0 to S5.

[0035] Please refer to Figure 2A The diagram shows the charging voltage of the temperature sensor 100 according to the first embodiment of the present invention. At the first temperature, when switch S0 is on, the first current source 113 charges the first capacitor Cptat to the first steady-state voltage Vptat with the first current Iptat; when switch S1 is on, the second current source 123 charges the second capacitor Cctat to the second steady-state voltage Vctat with the second current Ictat; when switch S4 is on, the third current source 133 charges the third capacitor Cnom to the third steady-state voltage Vnom with the third current Inom. Simultaneously, switches S2, S3, and S5 are not on while charging the first capacitor Cptat, the second capacitor Cctat, and the third capacitor Cnom. At a second temperature higher than the first temperature, when switch S0 is turned on, the first current source 113 charges the first capacitor Cptat to the first steady-state voltage Vptat1 with the first current Iptat; when switch S1 is turned on, the second current source 123 charges the second capacitor Cctat to the second steady-state voltage Vctat1 with the second current Ictat. Since the values ​​of Iptat and Ictat change greatly with the wafer process and temperature, there are differences between Vptat and Vptat1 and between Vctat and Vctat1.

[0036] The non-inverting input of the first comparator CompA receives a first steady state voltage Vptat or Vptatl, and its inverting input receives a third steady state voltage Vnom. The non-inverting input of the second comparator CompB receives a second steady state voltage Vctat or Vctatl, and its inverting input receives the third steady state voltage Vnom. Preferably, the third steady state voltage Vnom is higher than the first steady state voltage Vptat and Vptatl and the second steady state voltage Vctat and Vctatl.

[0037] When the voltage of the third capacitor Cnom exceeds the first steady state voltage Vptat or Vptatl during the charging process, the first comparison output T_OUTl of the first comparator CompA is activated to a low level, and when the voltage of the third capacitor Cnom exceeds the second steady state voltage Vctat or Vctatl during the charging process, the second comparison output T_OUT2 of the second comparator CompB is activated to a low level. The XOR gate 14 receives the comparison output signals T_OUTl and T_OUT2 and generates a temperature signal T_OUTf, as shown in Figure 2B .

[0038] The digital processing circuit 15 counts the width W (relative to the first temperature) or Wl (relative to the second temperature) of the temperature signal T_OUTf using a clock signal of a predetermined frequency to generate a count value, which is used to reflect the measured temperature. For example, the higher the count value, the higher the measured temperature.

[0039] However, both the wafer process and the measured temperature affect the count value, especially when the measured temperature is very low, the count value generated by the digital processing circuit 15 is very low, which affects the calculation accuracy of the digital processing circuit 15. For example, referring to Figure 3 which shows the count values of different corners (including the fast corner FF, the typical corner TT and the slow corner SS, which are defined and thus not described here) relative to different measured temperatures. Although the width of the temperature signal T_OUTf can be increased by designing a more complex comparator, this will occupy more area in the chip.

[0040] Referring to Figure 4A which is a schematic diagram of a temperature sensor 400 according to a second embodiment of the present application, which also includes a temperature detection circuit and a digital processing circuit 45 connected to each other. The temperature sensor 400 differs from the temperature sensor 100 in that the temperature sensor 400 further includes a correction circuit for selecting an appropriate capacitance value in a correction mode, so that the count value of the temperature signal T_OUTf in a measurement mode tends to be consistent during the wafer process. Similarly, the digital processing circuit 45 is used to convert the width of the temperature signal T_OUTf (referring to Figure 2B) to determine a measured temperature, and for controlling (e.g., including an application specific integrated circuit or a programmable logic array) the operation (e.g., switching on and off) of the temperature detection circuit in a calibration mode and a measurement mode. Similarly, the digital processing circuit 45 is located outside or inside the chip of the temperature sensor 400.

[0041] The temperature detection circuit includes a first comparator CompA, a second comparator CompB, a first capacitor bank 411, a first current source 413, a second capacitor bank 421, a second current source 423, a third capacitor Cnom, a third current source 433, switches S0-S5 (identical to Figure 1 ), switches S0a-S0d, switches S1a-S1d, switches S4a and S4b, switches S6-S8, and an exclusive OR gate (XOR) 44. The XOR gate 44 and the switch S8 are connected between the outputs of the first comparator CompA and the second comparator CompB and the digital processing circuit 45. The switches S6 and S7 are used to control the first comparator CompA and the second comparator CompB to output a first comparison output T_OUT1 and a second comparison output T_OUT2, respectively.

[0042] The first capacitor bank 411 includes a plurality of (e.g., shown as 3, but not limited to 3) capacitors A, B, C connected in parallel to each other and coupled to the first inputs, e.g., non-inverting inputs, of the first comparator CompA and the second comparator CompB. In one embodiment, the capacitor A is pre-connected to the first input of the first comparator CompA without passing through any switch, but not limited thereto. The second capacitor bank 421 includes a plurality of (e.g., shown as 3, but not limited to 3) capacitors D, E, F connected in parallel to each other and coupled to the first inputs of the first comparator CompA and the second comparator CompB. In one embodiment, the capacitor D is pre-connected to the first input of the second comparator CompB without passing through any switch, but not limited thereto.

[0043] The first current source 413 is used to charge the first capacitor bank 411 with a first current Iptat (when the switches S0 and S0d are turned on) to charge the first capacitor bank 411 to a first steady state voltage Vptat, with reference to Figure 2A The second current source 423 is used to charge the second capacitor bank 421 with a second current Ictat (when the switches S1 and S1d are turned on) to charge the second capacitor bank 421 to a second steady state voltage Vctat, with reference to Figure 2A , where the second steady state voltage Vctat is lower than the first steady state voltage Vptat. The third current source 433 is used to charge the third capacitor Cnom with a third current Inom (when the switch S4 is turned on and the switch S5 is turned off) to charge the third capacitor Cnom to a third steady state voltage Vnom, with reference to Figure 2ASwitch S4a is connected between the third capacitor Cnom and the second input terminal of the first comparator CompA, and switch S4b is connected between the third capacitor Cnom and the second input terminal of the second comparator CompB.

[0044] The first set of preset voltage sources is configured to provide a first set of preset voltages (e.g., including 1.45 volts and 1 volt, but not limited thereto) for coupling to the second input terminals (e.g., the inverting input terminals) of the first comparator CompA and the second comparator CompB, respectively, through switches S0a and S0b, respectively. The second set of preset voltage sources is configured to provide a second set of preset voltages (e.g., including 0.75 volts and 0.5 volt, but not limited thereto) for coupling to the second input terminals of the first comparator CompA and the second comparator CompB, respectively, through switches S1a and S1b, respectively. For example, the values of the second set of preset voltages are lower than the values of the first set of preset voltages.

[0045] In the present embodiment, the values of the first set of preset voltages and the second set of preset voltages can be determined first before the charging current (e.g., Iptat, Ictat) is determined at a predetermined temperature (e.g., 25 degrees Celsius), and then the capacitance values of the plurality of capacitors of the first capacitor group 411 and the second capacitor group 421 are determined accordingly; or, the capacitance values of the plurality of capacitors of the first capacitor group 411 and the second capacitor group 421 are determined first, and then the values of the first set of preset voltages and the second set of preset voltages are determined accordingly.

[0046] The capacitances of the capacitors A, B and C can be equal or unequal; the capacitances of the capacitors D, E and F can be equal or unequal, and are not subject to specific limitations.

[0047] The temperature sensor 400 of the present embodiment can operate in a calibration mode and a measurement mode. In the calibration mode, switches S4a and S4b are not conductive, and the first set of preset voltages and the second set of preset voltages are coupled to the second input terminals of the first comparator CompA and the second comparator CompB. The digital processing circuit 45 is configured to select the conductive capacitors in the first capacitor group 411 and the second capacitor group 421 according to the first comparison output T_OUT1 and the second comparison output T_OUT2 of the first comparator CompA and the second comparator CompB. When the first capacitor group 411 and the second capacitor group 421 are charging, switches S2 and S3 are not conductive to maintain the voltages.

[0048] For example, in the calibration mode, the first capacitor group 411 is preset to have switch Sb conductive and switch Sc non-conductive, and the second capacitor group 421 is preset to have switch Se conductive and switch Sf non-conductive, but not limited thereto. Switches S4, S4a, S4b and S8 are not conductive, and switches S6 and S7 are conductive to output the first comparison output T_OUT1 and the second comparison output T_OUT2 to the digital processing circuit 45, respectively.

[0049] Please refer to Figure 4A and Figure 5 When switches SO, SOa, SOb, SOc, SOd are on, and when it is determined from first comparison output T_OUT1 and second comparison output T_OUT2 that the first steady state voltage Vptat input to first comparator CompA is higher than a first voltage (e.g., 1.45 volts) and the first steady state voltage Vptat input to second comparator CompB is higher than a second voltage (e.g., 1 volt), digital processing circuit 45 increases the number of on capacitors in first capacitor bank 411, e.g., by controlling switches Sb and Sc to be on to increase the capacitance value of first capacitor bank 411. When switches SO, SOa, SOb, SOc, SOd are on, and when it is determined from first comparison output T_OUT1 and second comparison output T_OUT2 that the first steady state voltage Vptat input to first comparator CompA is lower than the first voltage and the first steady state voltage Vptat input to second comparator CompB is lower than the second voltage, digital processing circuit 45 decreases the number of on capacitors in first capacitor bank 411, e.g., by controlling switch Sb to be off to decrease the capacitance value of first capacitor bank 411. When switches SO, SOa, SOb, SOc, SOd are on, and when it is determined from first comparison output T_OUT1 and second comparison output T_OUT2 that the first steady state voltage Vptat input to first comparator CompA and second comparator CompB is between the first voltage input to first comparator CompA and the second voltage input to second comparator CompB, digital processing circuit 45 maintains the number of on capacitors in first capacitor bank 411, e.g., by maintaining switch Sb on and switch Sc off to maintain the capacitance value of first capacitor bank 411. Switch S2 is off during the determination of the number of on capacitors in first capacitor bank 411.

[0050] Please refer to Figure 4A and Figure 5As shown, when switches S1, S1a, S1b, S1c, S1d are on, and when it is determined from the first comparison output T_OUT1 and the second comparison output T_OUT2 that the second steady state voltage Vctat input to the first comparator CompA is higher than a third voltage (e.g. 0.75 volt) and the second steady state voltage Vctat input to the second comparator CompB is higher than a fourth voltage (e.g. 0.5 volt), the digital processing circuit 45 increases the number of on-capacitors in the second capacitor bank 421, e.g. by controlling switches Se and Sf to be on to increase the capacitance value of the second capacitor bank 421. When switches S1, S1a, S1b, S1c, S1d are on, and when it is determined from the first comparison output T_OUT1 and the second comparison output T_OUT2 that the second steady state voltage Vctat input to the first comparator CompA is lower than the third voltage and the second steady state voltage Vctat input to the second comparator CompB is lower than the fourth voltage, the digital processing circuit 45 decreases the number of on-capacitors in the second capacitor bank 421, e.g. by controlling switch Se to be off to decrease the capacitance value of the second capacitor bank 421. When switches S1, S1a, S1b, S1c, S1d are on, and when it is determined from the first comparison output T_OUT1 and the second comparison output T_OUT2 that the second steady state voltage Vctat input to the first comparator CompA and the second comparator CompB is between the third voltage input to the first comparator CompA and the fourth voltage input to the second comparator CompB, the digital processing circuit 45 maintains the number of on-capacitors in the second capacitor bank 421, e.g. by maintaining switch Se to be on and switch Sf to be off to maintain the capacitance value of the second capacitor bank 421. During the process of determining the on-capacitors of the second capacitor bank 421, switch S3 is off.

[0051] At the end of the calibration mode, the capacitance values of the first capacitor bank 411 and the second capacitor bank 421 (determined by the on / off states of switches Sb, Sc, Se, Sf) are the values suitable for wafer process variations.

[0052] In the measurement mode, switches S0a, S0b, S1a, S1b, S6 and S7 are off while switches S0c, S0d, S1c, S1d, S4a and S4b are on, forming a connection similar to Figure 1 . Meanwhile, in the measurement mode, the connections of the capacitors in the first capacitor bank 411 and the second capacitor bank 421 have been determined and are no longer changed, so the operation is similar to that of Figures 1-3 , i.e. the digital processing circuit 45 determines the measurement temperature according to the width of the temperature signal T_OUTf output by the temperature detection circuit, which is the same as Figure 1 , but with variable capacitances, so it is not described again here.

[0053] Please refer to Figure 4BAs shown, this is another schematic diagram of a temperature sensor 400' according to a second embodiment of the present invention, which also includes a temperature detection circuit and a digital processing circuit 45 connected to each other. Identical components in temperature sensor 400 and temperature sensor 400' are shown with the same reference numerals. Temperature sensor 400' also includes a calibration circuit for selecting an appropriate capacitance value in a calibration mode, thereby making the count value of the temperature signal T_OUTf in the measurement mode tend to be consistent in the wafer fabrication process. Similarly, the digital processing circuit 45 is used to convert the width of the temperature signal T_OUTf (refer to...) Figure 2B The digital processing circuit 45 is converted into a count value to determine the measured temperature and is used to control the operation of the temperature detection circuit in calibration mode and measurement mode (e.g., switching on and off). The digital processing circuit 45 is located outside or inside the chip of the temperature sensor 400'.

[0054] The temperature detection circuit includes a first comparator CompA, a second comparator CompB, a first capacitor bank 411, a first current source 413, a second capacitor bank 421, a second current source 423, a third capacitor Cnom, a third current source 433, and switches S0 to S5 (equivalent to...). Figure 1 The circuit includes switches S0a and S1a, switches S0b and S1b, switches S4a and S4b, switches S6 to S8, and an XOR gate 44. XOR gate 44 and switch S8 are connected between the outputs of the first comparator CompA and the second comparator CompB and the digital processing circuit 45. Switches S6 to S7 are used to control the first comparator CompA and the second comparator CompB to output the first comparator output T_OUT1 and the second comparator output T_OUT2, respectively.

[0055] The first capacitor group 411 and the second capacitor group 421 are the same as... Figure 4A Therefore, I will not elaborate further here.

[0056] The first current source 413 charges the first capacitor bank 411 with a first current Iptat (when switch S0 is on), so as to charge the first capacitor bank Iptat to a first steady-state voltage Vptat, as shown in the figure. Figure 2A The second current source 423 charges the second capacitor bank 421 with a second current Ictat (when switch S1 is on), so as to charge the second capacitor bank 421 to the second steady-state voltage Vctat, as shown in the figure. Figure 2A The second steady-state voltage Vctat is lower than the first steady-state voltage Vptat. The third current source 433 charges the third capacitor Cnom with the third current Innom (when switch S4 is on and switch S5 is off), charging the third capacitor Cnom to the third steady-state voltage Vnom, as shown in the reference. Figure 2A Switches S4a and S4b are respectively connected between the third capacitor Cnom and the second input terminals of the first comparator CompA and the second comparator CompB.

[0057] A first set of preset voltages (e.g., including 1.45 volts and 1 volt, but not limited thereto) is used to sequentially couple to the second input terminal of the first comparator CompA via switches S0a and S1a, respectively. A second set of preset voltages (e.g., including 0.75 volts and 0.5 volts, but not limited thereto) is used to sequentially couple to the second input terminal of the second comparator CompB via switches S0b and S1b, respectively. For example, the value of the second set of preset voltages is lower than the value of the first set of preset voltages.

[0058] The temperature sensor 400' in this embodiment can also operate in calibration mode and measurement mode. In calibration mode, switches S4a and S4b are not turned on, and the first set of preset voltages and the second set of preset voltages are respectively coupled to the second input terminals of the first comparator CompA and the second comparator CompB. The digital processing circuit 45 is used to select the conducting capacitors in the first capacitor group 411 and the second capacitor group 421 according to the first comparison output T_OUT1 and the second comparison output T_OUT2 of the first comparator CompA and the second comparator CompB. When the first capacitor group 411 and the second capacitor group 421 are charging, switches S2 and S3 are not turned on to maintain the voltage.

[0059] For example, in the calibration mode, the first capacitor bank 411 is preset to have switch Sb turned on and Sc turned off, and the second capacitor bank 421 is preset to have switch Se turned on and Sf turned off, but is not limited to this. Switches S4, S4a, S4b, and S8 are turned off, while switches S6 and S7 are turned on to output the first comparator output T_OUT1 and the second comparator output T_OUT2 to the digital processing circuit 45, respectively.

[0060] Please refer to Figure 4B and Figure 5As shown, when switches S0, S1, S0a, and S0b are turned on, and when the first steady-state voltage Vptat of the input first comparator CompA is higher than the first voltage (e.g., 1.45 volts) and the second steady-state voltage Vctat of the input second comparator CompB is higher than the third voltage (e.g., 0.75 volts) based on the first comparison output T_OUT1 and the second comparison output T_OUT2, the digital processing circuit 45 increases the number of conducting capacitors in the first capacitor group 411 and the second capacitor group 421. For example, it controls switches Sb and Sc to turn on to increase the capacitance value of the first capacitor group 411 and controls switches Se and Sf to turn on to increase the capacitance value of the second capacitor group 421. When switches S0, S1, S0a, and S0b are turned on, and when the first steady-state voltage Vptat of the input first comparator CompA is lower than the first voltage and the second steady-state voltage Vctat of the input second comparator CompB is lower than the third voltage, based on the first comparison output T_OUT1 and the second comparison output T_OUT2, then switches S0, S1, S1a, and S1b are turned on and switches S0a and S0b are turned off.

[0061] When switches S0, S1, S1a, and S1b are turned on, and when the first steady-state voltage Vptat of the input first comparator CompA is lower than the second voltage (e.g., 1 volt) and the second steady-state voltage Vctat of the input second comparator CompB is lower than the fourth voltage (e.g., 0.5 volt) based on the first comparison output T_OUT1 and the second comparison output T_OUT2, the digital processing circuit 45 reduces the number of conducting capacitors in the first capacitor group 411 and the second capacitor group 421, for example, by turning off switch Sb to reduce the capacitance value of the first capacitor group 411 and turning off switch Se to reduce the capacitance value of the second capacitor group 421.

[0062] When switches S0, S1, S1a, and S1b are turned on, and when the first steady-state voltage Vptat of the input first comparator CompA is determined to be between the first voltage and the second voltage of the input first comparator CompA according to the first comparison output T_OUT1 and the second comparison output T_OUT2, and the second steady-state voltage Vctat of the input second comparator CompB is between the third voltage and the fourth voltage of the input second comparator CompB, the digital processing circuit 45 maintains the number of conducting capacitors in the first capacitor group 411 and the second capacitor group 421. For example, it maintains switch Sb on and switch Sc off to maintain the capacitance value of the first capacitor group 411, and maintains switch Se on and switch Sf off to maintain the capacitance value of the second capacitor group 421.

[0063] When the calibration mode ends, the capacitance values ​​of the first capacitor bank 411 and the second capacitor bank 421 (determined by the conduction states of switches Sb, Sc, Se, and Sf) are values ​​applicable to changes in the wafer fabrication process.

[0064] In the measurement mode, switches S0a, S0b, S1a, S1b, S6, and S7 are not conducting, while switches S4a and S4b are conducting, thus forming a similar situation. Figure 1 The connection method is as follows. Meanwhile, in the measurement mode, the capacitor connections within the first capacitor group 411 and the second capacitor group 421 are already determined and will not change; therefore, their operation is similar to... Figures 1-3 The operation, that is, the digital processing circuit 45 determines the measured temperature based on the width of the temperature signal T_OUTf output by the temperature detection circuit, and... Figure 1 It is the same, except that it has variable capacitance, so it will not be described in detail here.

[0065] For example, refer to Figure 6 As shown, by pre-selecting the capacitance values ​​of the first capacitor bank 411 and the second capacitor bank 421 using a calibration mode, the width of the temperature signal T_OUTf at low temperatures is increased (e.g., compared to...). Figure 3 Furthermore, the results tend to be consistent, which can effectively improve the measurement accuracy at low temperatures.

[0066] Please refer to Figure 7 The diagram shown is a schematic of a temperature sensor 700 according to a third embodiment of the present invention, which also includes a temperature detection circuit and a digital processing circuit 75 connected to each other. The difference between temperature sensor 700 and temperature sensor 100 is that temperature sensor 700 includes a first capacitor bank 711 and a second capacitor bank 721 to determine an appropriate capacitance value in calibration mode. The difference between temperature sensor 700 and temperature sensors 400 and 400' is that, in calibration mode, temperature sensor 700 directly uses an external tester 90 to read the first current Iptat and the second current Ictat used to charge the first capacitor bank 711 and the second capacitor bank 721 respectively, wherein the configurations of the first capacitor bank 711 and the second capacitor bank 721 are respectively the same as... Figure 4A The first capacitor group 411 and the second capacitor group 421 are not described in detail here.

[0067] Digital processing circuit 75 is also used to process the width of the temperature signal T_OUTf (see reference). Figure 2B The digital processing circuitry 75 is converted into a count value to determine the measured temperature and is used to control the operation (e.g., switching on and off) of the temperature detection circuitry (e.g., including an application-specific integrated circuit or a programmable logic array). The digital processing circuitry 75 may be located externally or internally to the temperature sensor 700 chip.

[0068] The temperature detection circuit includes a first comparator CompA, a second comparator CompB, a first capacitor bank 711, a first current source 713, a second capacitor bank 721, a second current source 723, a third capacitor Cnom, a third current source 733, and switches S0 to S5 (equivalent to...). Figure 1And an XOR gate 74. The XOR gate 74 is connected between the outputs of the first comparator CompA and the second comparator CompB and the digital processing circuit 75.

[0069] The first capacitor bank 711 is coupled to the first input terminal of the first comparator CompA, for example, the non-inverting input terminal. The second capacitor bank 721 is coupled to the first input terminal of the second comparator CompB, for example, the non-inverting input terminal. The third capacitor Cnom is connected to the second input terminal of both the first comparator CompA and the second comparator CompB, for example, the inverting input terminal.

[0070] The first current source 713 is used to charge the first capacitor bank 711 to the first steady-state voltage Vptat with a first current Iptat (when switch S0 is on and switch S2 is off), refer to Figure 2A The second current source 723 is used to charge the second capacitor bank 721 to the second steady-state voltage Vctat with the second current Ictat (when switch S1 is on and switch S3 is off), as shown in the reference. Figure 2A The second steady-state voltage Vctat is lower than the first steady-state voltage Vptat. The third current source 733 is used to charge the third capacitor Cnom to the third steady-state voltage Vnom using the third current Innom (when switch S4 is on and switch S5 is off), as shown in the reference. Figure 2A .

[0071] In this embodiment, before leaving the factory, for example, after determining the charging current (e.g., Iptat, Ictat) at a predetermined temperature (e.g., 25 degrees Celsius), the values ​​of the first set of preset voltages and the second set of preset voltages (e.g., recorded in the buffer of the digital processing circuit 75) can be determined first, and then the capacitance values ​​of the multiple capacitors in the first capacitor group 711 and the second capacitor group 721 can be determined accordingly; or, the capacitance values ​​of the multiple capacitors in the first capacitor group 711 and the second capacitor group 721 can be determined first, and then the values ​​of the first set of preset voltages and the second set of preset voltages can be determined accordingly. The first set of preset voltages and the second set of preset voltages are respectively used to compare with the first steady-state voltage Vptat and the second steady-state voltage Vctat.

[0072] Please refer to Figure 8 The diagram shows a flowchart of the operation method of the temperature sensor 700 according to a third embodiment of the present invention. In this embodiment, calibration is performed externally to the chip. For example, before temperature measurement begins, an external detector 90 measures currents Iptat and Ictat using switches SWTa and SWTb. By comparing the measured Iptat and Ictat with predetermined specifications, for example... Figure 8The values ​​Iptatmax, Iptatmin, Ictatmax, and Ictatmin shown indicate which direction the wafer is oriented to determine the shift. The digital processing circuit 75 is programmed to control switches Sb, Sc, Se, and Sf to control the on / off states of capacitors A, B, C, D, E, and F.

[0073] Detector 90 detects the first current Iptat of the first current source 713 and the second current Ictat of the second current source 723, respectively, in step S81. Detector 90 has pre-recorded the first maximum current Iptatmax and the first minimum current Iptatmin related to the first current Iptat, and the second maximum current Ictatmax and the second minimum current Ictatmin related to the second current Ictat.

[0074] Next, detector 90 compares the first current Iptat with the first maximum current Iptatmax and compares the second current Ictat with the second maximum current Ictatmax, step S82.

[0075] Reference Figure 8 When it is determined that the measured first current Iptat is higher than the first maximum current Iptatmax and the measured second current Ictat is higher than the second maximum current Ictatmax, the digital processing circuit 75 turns on capacitors Sb, Sc, Se and Sf to connect capacitors A, B, C, D, E and F when measuring temperature, step S83; when it is determined that the measured first current Iptat is higher than the first minimum current Iptatmin (but not higher than Iptatmax) and the measured second current Ictat is higher than the second minimum current Ictatmin (but not higher than Ictatmax), the digital processing circuit 75 turns on capacitors Sb and Se to connect capacitors A, B, D and E when measuring temperature, step S85; when it is determined that the measured first current Iptat is lower than the first minimum current Iptatmin and the measured second current Ictat is lower than the second minimum current Ictatmin, the digital processing circuit 75 does not turn on any switches Sb, Sc, Se and Sf to connect only capacitors A and D when measuring temperature, step S86.

[0076] In other embodiments, the first capacitor group 711 can be preset so that capacitors Sb and Sc are both on or not on, and the second capacitor group 721 can be preset so that capacitors Se and Sf are both on or not on, as long as the current thresholds corresponding to the first current Iptat and the second current Ictat are predetermined and recorded in the detector 90.

[0077] It must be noted that although the present invention is described using the example of voltage Vnom being coupled to the inverting input of the comparator and voltages Vptat and Vctat being coupled to the non-inverting input of the comparator, the present invention is not limited thereto. In another embodiment, voltage Vnom can be coupled to the non-inverting input of the comparator and voltages Vptat and Vctat can be coupled to the inverting input of the comparator. Simultaneously, T_OUT1 and T_OUT2 are respectively passed through an inverting gate (NOT) before being input to an XOR gate, achieving the same effect. In another embodiment, the XOR gate is configured within digital processing circuits 15, 45, and 75; that is, the temperature detection circuit does not contain an XOR gate, and the temperature sensor chip directly outputs T_OUT1 and T_OUT2 to digital processing circuits 15, 45, and 75.

[0078] It should be noted that although the embodiments of the present invention are illustrated using an example of each capacitor bank containing three capacitors, the present invention is not limited thereto. The capacitor bank of the present invention can be configured with more than three capacitors (paired with corresponding switches and thresholds) to improve the accuracy of temperature measurement.

[0079] It must be noted that the values ​​in the above embodiments, including clock frequency, voltage value, temperature value, and count value, are used for illustration only and are not intended to limit the present invention.

[0080] In summary, traditional temperature sensors suffer from accuracy issues due to variations in wafer fabrication processes and measurement temperatures. Therefore, this invention proposes a temperature sensor (e.g., Figure 4A , Figure 4B and Figure 7 ) and its operating methods (e.g. Figure 8 Before measuring temperature, the capacitor bank first measures its steady-state voltage or charging current, and then determines the capacitance value of the capacitor bank in the measurement mode (e.g., by recording a programmed value in a register). This makes the steady-state voltage more consistent and predictable during the wafer manufacturing process. At the same time, it eliminates the need to increase the design complexity and footprint of the comparator.

[0081] While the present invention has been disclosed through the foregoing examples, it is not intended to limit the invention. Anyone skilled in the art to which this invention pertains can make various modifications and alterations without departing from the spirit and scope of the invention. Therefore, the scope of protection of this invention shall be determined by the appended claims.

Claims

1. A temperature sensor comprising: First comparator; Second comparator; A first capacitor bank, which is coupled to the first input terminal of the first comparator and the second comparator; A second capacitor bank is coupled to the first input terminal of the first comparator and the second comparator; A first current source is used to charge the first capacitor bank with a first current. A second current source is used to charge the second capacitor bank with a second current. A first set of preset voltages is used to couple to the second input terminals of the first comparator and the second comparator; as well as The second set of preset voltages is used to couple to the second input terminals of the first comparator and the second comparator.

2. The temperature sensor according to claim 1, wherein, The first input terminals of the first comparator and the second comparator are non-inverting input terminals, and The second input of the first comparator and the second comparator is the inverting input.

3. The temperature sensor according to claim 1 further includes a digital processing circuit, wherein, The digital processing circuit is used to select the conducting capacitors in the first capacitor group and the second capacitor group based on the comparison results of the first comparator and the second comparator.

4. The temperature sensor according to claim 3 further comprises: an XOR gate connected between the output terminals of the first comparator and the second comparator and the digital processing circuit.

5. The temperature sensor according to claim 3, wherein, The first current is used to charge the first capacitor bank to the first steady-state voltage. The first set of preset voltages includes a first voltage and a second voltage lower than the first voltage, and The digital processing circuit is used for When it is determined that the first steady-state voltage input to the first comparator is higher than the first voltage and the first steady-state voltage input to the second comparator is higher than the second voltage, the number of conducting capacitors in the first capacitor bank is increased. When it is determined that the first steady-state voltage input to the first comparator is lower than the first voltage and the first steady-state voltage input to the second comparator is lower than the second voltage, the number of conducting capacitors in the first capacitor bank is reduced, and When it is determined that the first steady-state voltage input to the first comparator and the second comparator is between the first voltage input to the first comparator and the second voltage input to the second comparator, the number of conducting capacitors in the first capacitor bank is maintained.

6. The temperature sensor according to claim 5, wherein, The second current is used to charge the second capacitor bank to the second steady-state voltage. The second set of preset voltages includes a third voltage and a fourth voltage lower than the third voltage, and The digital processing circuit is also used for When it is determined that the second steady-state voltage input to the first comparator is higher than the third voltage and the second steady-state voltage input to the second comparator is higher than the fourth voltage, the number of conducting capacitors in the second capacitor bank is increased. When it is determined that the second steady-state voltage input to the first comparator is lower than the third voltage and the second steady-state voltage input to the second comparator is lower than the fourth voltage, the number of conducting capacitors in the second capacitor bank is reduced, and When it is determined that the second steady-state voltage input to the first comparator and the second comparator is between the third voltage input to the first comparator and the fourth voltage input to the second comparator, the number of conducting capacitors in the second capacitor bank is maintained.

7. The temperature sensor according to claim 6, wherein, The second steady-state voltage is lower than the first steady-state voltage, and The second set of preset voltages is lower than the first set of preset voltages.

8. The temperature sensor according to claim 1, further comprising: Third capacitor; A third current source, the third current source being used to charge the third capacitor with a third current; and A switch group is connected between the third capacitor and the second input terminal of the first comparator and the second comparator.

9. The temperature sensor according to claim 8, wherein, When the first set of preset voltages and the second set of preset voltages are coupled to the second input terminals of the first comparator and the second comparator, the switch group is not turned on.

10. A temperature sensor comprising: First comparator; Second comparator; A first capacitor bank, which is coupled to a first input terminal of the first comparator; A second capacitor bank is coupled to the first input terminal of the second comparator; A first current source is used to charge the first capacitor bank with a first current. A second current source is used to charge the second capacitor bank with a second current. A first set of preset voltages is used to couple to the second input terminal of the first comparator; as well as The second set of preset voltages is used to couple to the second input terminal of the second comparator.

11. The temperature sensor according to claim 10, wherein, The first input terminals of the first comparator and the second comparator are non-inverting input terminals, and The second input of the first comparator and the second comparator is the inverting input.

12. The temperature sensor according to claim 10, further comprising a digital processing circuit, wherein, The digital processing circuit is used to select the conducting capacitors in the first capacitor group and the second capacitor group based on the comparison results of the first comparator and the second comparator.

13. The temperature sensor according to claim 12 further comprises: an XOR gate connected between the output terminals of the first comparator and the second comparator and the digital processing circuit.

14. The temperature sensor according to claim 12, wherein, The first current is used to charge the first capacitor bank to the first steady-state voltage. The first set of preset voltages includes a first voltage and a second voltage lower than the first voltage, and The digital processing circuit is used for When it is determined that the first steady-state voltage input to the first comparator is higher than the first voltage, the number of conducting capacitors in the first capacitor bank is increased. When it is determined that the first steady-state voltage input to the first comparator is lower than the second voltage, the number of conducting capacitors in the first capacitor bank is reduced, and When it is determined that the first steady-state voltage input to the first comparator is between the first voltage and the second voltage, the number of conducting capacitors in the first capacitor bank is maintained.

15. The temperature sensor according to claim 14, wherein, The second current is used to charge the second capacitor bank to the second steady-state voltage. The second set of preset voltages includes a third voltage and a fourth voltage lower than the third voltage, and The digital processing circuit is also used for When it is determined that the second steady-state voltage input to the second comparator is higher than the third voltage, the number of conducting capacitors in the second capacitor bank is increased. When it is determined that the second steady-state voltage input to the second comparator is lower than the fourth voltage, the number of conducting capacitors in the second capacitor bank is reduced, and When it is determined that the second steady-state voltage input to the second comparator is between the third voltage and the fourth voltage, the number of conducting capacitors in the second capacitor bank is maintained.

16. The temperature sensor according to claim 15, wherein, The second steady-state voltage is lower than the first steady-state voltage, and The second set of preset voltages is lower than the first set of preset voltages.

17. The temperature sensor of claim 10, further comprising: Third capacitor; A third current source, the third current source being used to charge the third capacitor with a third current; and A switch group is connected between the third capacitor and the second input terminal of the first comparator and the second comparator.

18. The temperature sensor according to claim 17, wherein, When the first set of preset voltages and the second set of preset voltages are coupled to the second input terminals of the first comparator and the second comparator, the switch group is not turned on.

19. A method for operating a temperature sensor, the temperature sensor comprising a first capacitor bank, a second capacitor bank, a first current source, and a second current source, the method comprising: The detectors detect the first current of the first current source and the second current of the second current source, respectively. When the first current is greater than the first maximum current and the second current is greater than the second maximum current, the capacitors in the first capacitor bank and the first portion of the second capacitor bank are turned on during temperature measurement; and When the first current is less than the first minimum current and the second current is less than the second minimum current, the capacitors of the first capacitor bank and the second part of the second capacitor bank are turned on during the temperature measurement. The second part is different from the first part.

20. The operating method according to claim 19, wherein, The detector is located outside the chip of the temperature sensor.