Display control device, driver chip and display control method
By dispersing low grayscale display subfields and adjusting data reference values in LED displays, the problems of uneven conduction time and insufficient refresh rate caused by parasitic capacitance in LED displays are solved, achieving uniform display and high refresh rate.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANGHAI XINTAO MICROELECTRONICS TECH CO LTD
- Filing Date
- 2025-11-11
- Publication Date
- 2026-04-14
AI Technical Summary
In the prior art, when LED displays are used for low grayscale display, the charging and discharging of parasitic capacitors causes uneven actual conduction time of LEDs in each row, resulting in problems such as a darker starting row for scanning and insufficient low grayscale refresh rate.
By setting up control circuits and comparison output circuits, the display subfields with low grayscale values are dispersed to multiple target subfields, and the adjustable data reference value is adjusted to ensure that each row is evenly distributed in all target subfields, thus avoiding uneven display caused by long-term charging of parasitic capacitors.
This ensures that the actual conduction time of each row of LEDs is uniform and consistent, eliminates the phenomenon of the scan starting row being too dark, and improves the display refresh rate.
Smart Images

Figure CN121148301B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a display control device, a driver chip, and a display control method. Background Technology
[0002] Currently, among the various driving methods for displays using constant current driver chips, the most commonly used method is PWM for display control. By controlling the on / off time of the LEDs in the display, different grayscale brightness display effects can be achieved.
[0003] Figure 1 A schematic diagram of a specific example of an LED driver circuit is shown. (Reference) Figure 1 The display screen includes multiple LEDs 101 arranged in an array (e.g., N rows, M columns). Each LED 101 is controlled to be on / off via row scanning and column driving. LEDs 101 in the same column are coupled to the same column connection line 102, which is connected to an output terminal of a driver chip (e.g., a constant current driver chip) that drives the display. The column connection line 102 has a parasitic capacitance CL to ground. When the output terminal of the driver chip outputs a low level, opening the output channel, the LED 101 is controlled to light up; when the output channel is closed, the LED 101 is controlled to turn off.
[0004] However, when the output channel is off, the parasitic capacitance CL will slowly charge through the voltage of the row connection line 103 and LED 101, thereby raising the voltage of the column connection line 102. Therefore, with the LED off for a relatively long time, the parasitic capacitance CL will charge for a relatively long time. Consequently, to lower the voltage of the column connection line 102, it is necessary to wait for the parasitic capacitance CL to discharge for a relatively long period.
[0005] However, currently, low grayscale levels are typically controlled using a non-dispersive approach. This means that if a frame on the screen is divided into multiple subfields, the grayscale values will be concentrated in the same subfield (e.g., the first subfield) during low grayscale conditions. Furthermore, the display will only proceed to the next subfield after all rows have been displayed. For example, Figure 2 A schematic diagram illustrating a specific example of the low-grayscale display state of each row is shown below. (Refer to...) Figure 2Taking an eight-row layout as an example, if a grayscale value of 1 needs to be displayed within one frame, then the grayscale value displayed in each row of the first subfield (subfield 1) will be 1 (i.e., the LEDs are lit). However, the grayscale value displayed in each row of all other subfields after the first subfield (such as subfield 2, ..., subfield K) will be 0 (i.e., the LEDs are off). In other words, no grayscale value will be displayed for a considerable period in several consecutive subfields. Therefore, during the display of the first subfield, starting from row 1, when the LEDs in row 1 are switched from dark to light, the parasitic capacitor CL has already been charged for a considerable time. At this point, lowering the voltage of the column connection line to light up the LEDs requires first releasing the parasitic charge on the parasitic capacitor CL, which takes a relatively long time. Therefore, the actual conduction time of the LEDs in row 1 will be less than the theoretical conduction time. When displaying rows 2 to 8, the parasitic capacitor CL has already discharged during the display of row 1, significantly reducing the parasitic charge. The parasitic capacitor CL has little impact on its conduction time. Therefore, the actual conduction time of row ① is shorter than that of other rows, and the actual conduction time of LEDs in each row is uneven. As a result, row ① appears darker to the human eye. At the same time, because the low grayscale is concentrated in one subfield, the low grayscale refresh rate is insufficient, resulting in "scan lines". Summary of the Invention
[0006] In view of this, embodiments of this application provide a display control device, a driver chip, and a display control method to solve at least one problem existing in the background art.
[0007] In a first aspect, embodiments of this application provide a display control device, the display control device including a control circuit and one or more comparison output circuits; the comparison output circuits are connected to the control circuit; each of the comparison output circuits is connected to a row of display elements;
[0008] The comparison output circuit is configured as follows:
[0009] The adjustable data reference is compared with a first reference value to drive a row display element connected to the comparison output circuit to display based on the comparison result;
[0010] The control circuit is configured as follows:
[0011] In response to obtaining non-zero low-order data when dividing the display grayscale data of a frame into high-order data and low-order data according to the number of binary bits, one or more additional subfields to be displayed are determined based on the non-zero low-order data.
[0012] For each additional subfield to be displayed, the adjustable data reference of the comparison output circuit corresponding to each row is preset as the first reference value, and each subfield corresponding to the subfield number and row number is determined as each target subfield; and during the display of the grayscale data, when the additional subfield to be displayed is driven to be displayed, the adjustable data reference of the comparison output circuit of the row display element corresponding to the target subfield is adjusted from the first reference value to the second reference value, so as to drive the display of a row display element corresponding to the subfield number of the target subfield in each target subfield even when all subfields have been shuffled.
[0013] In conjunction with the first aspect, in an alternative implementation,
[0014] The first reference value is determined based on the subfield number of the target subfield.
[0015] In conjunction with the first aspect, in an alternative implementation,
[0016] The subfield number of the target subfield is selected based on the row number.
[0017] In conjunction with the first aspect, in an alternative implementation,
[0018] The control circuit includes a first processing unit, used to determine one or more additional subfields to be displayed based on the non-zero low-order data;
[0019] The first processing unit is configured as follows:
[0020] Convert the non-zero low-order data into a decimal number;
[0021] Each subfield whose subfield number is less than or equal to the decimal number is identified as an additional subfield to be displayed.
[0022] In conjunction with the first aspect, in an alternative implementation,
[0023] The control circuit further includes a second processing unit, configured as follows:
[0024] Divide a frame into multiple subfields and number all subfields sequentially;
[0025] The grayscale data of a frame is divided into high-order data and low-order data according to the number of binary bits to obtain the display cycle of the first number; the first number is the decimal number converted from the high-order data.
[0026] When non-zero low-order data is obtained, the first number is displayed in each row sequentially according to the disordered subfield order after all subfields are shuffled, and the second number is displayed in each row sequentially through the target subfield corresponding to the additional subfield to be displayed; the second number is the number of the additional subfields to be displayed.
[0027] Secondly, embodiments of this application provide a driver chip, the driver chip including at least one of a control circuit and a comparison output circuit in the display control device as described in the first aspect.
[0028] Thirdly, embodiments of this application provide a display control method, the display control method comprising:
[0029] Divide a frame into multiple subfields and number all subfields sequentially;
[0030] The grayscale data of a frame is divided into high-order data and low-order data according to the number of binary bits, and an additional subfield to be displayed is determined based on the non-zero low-order data to obtain the total number of display cycles; the total number is determined based on the first number and the second number; the first number is the decimal number converted from the high-order data;
[0031] When non-zero low-order data is obtained, the order of all subfields is shuffled to obtain a disordered subfield order.
[0032] The total display cycle is driven sequentially for each row according to the disordered subfield order; wherein, when driving each row sequentially to display the display cycle corresponding to the additional subfield to be displayed, the additional subfield to be displayed is distributed to multiple target subfields, and the adjustable data reference of the row corresponding to the target subfield is adjusted from a preset first reference value to a second reference value, so that after comparing the adjustable data reference with the first reference value, the display of the row corresponding to the target subfield is driven according to the comparison result.
[0033] In conjunction with the third aspect, in an alternative implementation,
[0034] The step of distributing the additional subfields to be displayed into multiple target subfields, and adjusting the adjustable data reference of the corresponding row of the target subfield from a preset first reference value to a second reference value, so as to drive the display of the corresponding row of the target subfield according to the comparison result after comparing the adjustable data reference with the first reference value, includes:
[0035] The adjustable data reference corresponding to each row is preset as the first reference value, and each subfield corresponding to the subfield number and row number is determined as each target subfield;
[0036] The adjustable data reference of a row of display elements corresponding to the target subfield is adjusted from the first reference value to the second reference value; the second reference value is less than the first reference value.
[0037] The adjustable data reference is compared with a first reference value, so that if the adjustable data reference is less than the first reference value, a row of display elements corresponding to the subfield number of the target subfield is driven to be displayed in the target subfield.
[0038] In conjunction with the third aspect, in an alternative implementation,
[0039] The additional subfield to be displayed, determined based on non-zero low-order data, includes:
[0040] Convert the non-zero low-order data into a decimal number;
[0041] Each subfield whose subfield number is less than or equal to the decimal number is identified as an additional subfield to be displayed.
[0042] In conjunction with the third aspect, in an alternative implementation,
[0043] The first reference value is determined based on the subfield number of the target subfield;
[0044] And / or, the subfield number of the target subfield is obtained based on the row number selection.
[0045] The beneficial effects of the technical solution provided in this application embodiment include: by setting a control circuit and a comparison output circuit, when displaying low grayscale values, the additional subfield to be displayed can be distributed to multiple target subfields, and the adjustable data reference of the comparison output circuit of the corresponding row of the target subfield can be adjusted from a preset first reference value to a second reference value. For example, the second reference value is less than the first reference value, thereby driving the display of the corresponding row of the target subfield, while the adjustable data reference of other rows remains unchanged at the preset first reference value, and other rows are not driven to display. Thus, when the order of all subfields has been shuffled, the grayscale values that were originally displayed line by line in the additional subfield to be displayed are evenly or almost evenly distributed to each target subfield to display one row, that is, the display of each row is distributed in all target subfields. Therefore, regardless of whether the grayscale data displayed in a frame is a low grayscale value, for example, in the two cases where the grayscale data is low grayscale or high grayscale and non-zero low-level data is obtained by dividing it into binary bits, the display control device of this application embodiment can avoid the situation where the grayscale values of each row are concentrated in one subfield after the parasitic capacitor CL is charged for a long time. It can disperse the display of each row in all target subfields for each additional subfield to be displayed, so that the display of each row is scattered in time and has a predetermined (e.g., equal) time interval. This makes the influence of the parasitic capacitor CL during the display of each row not much different or consistent. For example, the actual conduction time of each row display element is uniform and consistent, so that the human eye cannot observe the difference between the display of each row, and eliminates the phenomenon that the scanning start row, such as the first row, is darker.
[0046] Furthermore, the display control device in this application embodiment disperses the display of each row in all target subfields for each additional subfield to be displayed, which not only solves the problem of the first row being too dark, but also solves the problem of low gray refresh rate, thereby improving the display refresh rate in both of the above situations.
[0047] Additional aspects and advantages of the embodiments of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the embodiments of this application. Attached Figure Description
[0048] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, are provided. The drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show details of those features. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:
[0049] Figure 1 A schematic diagram of a specific example of an LED driver circuit;
[0050] Figure 2This is a schematic diagram illustrating a specific example of the low-grayscale display status of each row;
[0051] Figure 3 This is a schematic block diagram illustrating a specific example of a display control device in an embodiment of this application.
[0052] Figure 4 This is a schematic diagram illustrating a specific example of the display state of each row after the additional subfields to be displayed are dispersed in an embodiment of this application.
[0053] Figure 5 This is a schematic block diagram illustrating a specific example of a driver chip in an embodiment of this application.
[0054] Figure 6 This is a flowchart illustrating a specific example of the display control method in the embodiments of this application. Detailed Implementation
[0055] To make the technical solution and beneficial effects of this application more apparent and understandable, a detailed description is provided below by listing specific embodiments. The accompanying drawings are not necessarily drawn to scale, and local features may be enlarged or reduced to more clearly show the details of the local features; unless otherwise defined, the technical and scientific terms used herein have the same meanings as those in the technical field to which this application pertains.
[0056] The embodiments described in this application are not exhaustive, but merely illustrative of some embodiments, and are not intended to limit the scope of protection of this application. Unless otherwise specified, each step in a particular embodiment can be implemented as an independent embodiment, and the steps can be arbitrarily combined. For example, a solution after removing some steps in a particular embodiment can also be implemented as an independent embodiment, and the order of the steps in a particular embodiment can be arbitrarily interchanged. Furthermore, the optional implementation methods in a particular embodiment can be arbitrarily combined; moreover, the embodiments can be arbitrarily combined with each other. For example, some or all steps of different embodiments can be arbitrarily combined, and a particular embodiment can be arbitrarily combined with the optional implementation methods of other embodiments.
[0057] In each embodiment of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of the embodiments are consistent and can be referenced by each other. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.
[0058] The terminology used in the embodiments of this application is for the purpose of describing specific embodiments only and is not intended to limit the scope of this application.
[0059] In the embodiments of this application, unless otherwise stated, elements expressed in the singular, such as "a", "an", "the", "the", "the", "the", "the", "this", etc., can mean "one and only one", or "one or more", "at least one", etc.
[0060] In some embodiments, the terms “at least one (or at least one, at least one item, at least one),” “one or more,” “multiple”, etc., may be used interchangeably.
[0061] The prefixes "first," "second," etc., used in the embodiments of this application are merely for distinguishing different descriptive objects and do not impose restrictions on the position, order, priority, value, or content of the descriptive objects. The description of the descriptive objects is based on the context of the embodiments, and the use of prefixes should not constitute unnecessary restrictions. For example, the numerical value of the descriptive object is not limited by ordinal numbers and can be one or more. Taking "first device" as an example, the numerical value of "device" can be one or more. Furthermore, the objects modified by different prefixes can be the same or different. For example, if the descriptive object is "device," then "first device" and "second device" can be the same device or different devices, and their types can be the same or different.
[0062] In some embodiments, the term "and / or" may indicate at least one of the items defined by the term, for example, "A and / or B" may indicate implementation as "A", or implementation as "A", or implementation as "A and B".
[0063] In some embodiments, the term "connection" or "coupled" can refer to the transmission of electrical signals or data between one end being connected and the other end being connected to, and can be understood as "electrical connection" or "electrical coupling," "communication connection" or "communication coupling," etc. "Connection" or "coupled" can be a direct connection between two components, an indirect connection established through other components, a connection within two components, or any other possible form of connection.
[0064] This specification provides method operation steps as shown in the embodiments or flowcharts, but based on conventional or non-inventive labor, more or fewer operation steps may be included. The order of steps listed in the embodiments is merely one possible execution order among many and does not represent the only execution order. In actual devices, systems, or server products, the methods shown in the embodiments or drawings can be executed sequentially or in parallel (e.g., in a parallel processor or multi-threaded processing environment).
[0065] refer to Figure 2When using PWM to control the display screen, if the parasitic capacitor CL is charged for a long time and the grayscale values of each row are concentrated in one subfield, and the display of the next subfield is started only after all rows have been displayed, it may cause uneven actual conduction time of each row of LEDs and the display of the first row of the scan to be too dark.
[0066] Therefore, this application provides a display control device. Figure 3 This illustration shows a schematic block diagram of a specific example of a display control device according to an embodiment of this application. (Refer to...) Figure 3 The display control device 10 includes a control circuit 11 and one or more comparison output circuits 12; the comparison output circuits 12 are connected to the control circuit 11; each comparison output circuit 12 is connected to a row of display elements.
[0067] The comparison output circuit 12 is configured as follows:
[0068] The adjustable data reference is compared with the first reference value to drive a row display element connected to the comparison output circuit 12 to display based on the comparison result;
[0069] The control circuit 13 is configured as follows:
[0070] In response to obtaining non-zero low-order data when dividing the display grayscale data of a frame into high-order data and low-order data according to the number of binary bits, one or more additional subfields to be displayed are determined based on the non-zero low-order data.
[0071] For each additional subfield to be displayed, the adjustable data reference of the comparison output circuit 12 corresponding to each row is preset as the first reference value, and each subfield corresponding to the subfield number and the row number is determined as each target subfield; and during the display of the grayscale data, when the additional subfield to be displayed is driven to be displayed, the adjustable data reference of the comparison output circuit 12 of the row display element corresponding to the target subfield is adjusted from the first reference value to the second reference value, so as to drive the display of a row display element corresponding to the subfield number of the target subfield in each target subfield even when all subfields have been shuffled.
[0072] Thus, the display control device of this application embodiment, by setting a control circuit and a comparison output circuit, can distribute the additional subfield to be displayed to multiple target subfields when displaying low grayscale values. It also adjusts the adjustable data reference of the comparison output circuit for the corresponding row of the target subfield from a preset first reference value to a second reference value (e.g., the second reference value is less than the first reference value), thereby driving the display of the corresponding row of the target subfield. The adjustable data reference for other rows remains unchanged at the preset first reference value, and other rows are not driven for display. Therefore, even when the order of all subfields has been shuffled, the grayscale values that were originally displayed line by line in the additional subfield to be displayed are evenly or almost evenly distributed to each of the target subfields to display one row. In other words, the display of each row is dispersed across all target subfields. Therefore, regardless of whether the grayscale data displayed in a frame is a low grayscale value, for example, in the two cases where the grayscale data is low grayscale or high grayscale and non-zero low-level data is obtained by dividing it into binary bits, the display control device of this application embodiment can avoid the situation where the grayscale values of each row are concentrated in one subfield after the parasitic capacitor CL is charged for a long time. It can disperse the display of each row in all target subfields for each additional subfield to be displayed, so that the display of each row is scattered in time and has a predetermined (e.g., equal) time interval. This makes the influence of the parasitic capacitor CL during the display of each row not much different or consistent. For example, the actual conduction time of each row display element is uniform and consistent, so that the human eye cannot observe the difference between the display of each row, and eliminates the phenomenon that the scanning start row, such as the first row, is darker.
[0073] Furthermore, the display control device in this application embodiment disperses the display of each row in all target subfields for each additional subfield to be displayed, which not only solves the problem of the first row being too dark, but also solves the problem of low gray refresh rate, thereby improving the display refresh rate in both of the above situations.
[0074] As a specific example, comparing an adjustable data reference with a first reference value to drive a row display element connected to the comparison output circuit to display based on the comparison result can be: comparing the adjustable data reference with the first reference value, and driving a row display element connected to the comparison output circuit 12 to display when the adjustable data reference is less than the first reference value. The second reference value is less than the first reference value. It should be understood that the display is not limited to being driven when the adjustable data reference is "less than" the first reference value; it can also be "greater than," and the setting can be selected according to the actual situation.
[0075] In this embodiment, the order of all subfields can be shuffled uniformly or almost uniformly, depending on the actual situation. The goal is to ensure that the display of each row after shuffling is dispersed in all target subfields so that the human eye cannot observe the difference between the displays of each row.
[0076] The subfield numbers of all subfields can be obtained by sequentially numbering all subfields obtained from dividing a frame. For example, starting from 1, the subfields are numbered sequentially to get subfield 1, subfield 2, ..., subfield K.
[0077] The adjustable data reference of the comparison output circuit has adjustable characteristics. For example, the control circuit can configure the adjustable data parameters of the comparison output circuit, and the adjustable data parameters can be adjusted under the configuration of the control circuit.
[0078] Display elements can be LEDs. Here, "LED" can refer to any system capable of receiving a signal and generating light color in response to that signal. Therefore, the term "LED" can be understood to include all types of light-emitting diodes, light-emitting polymers, semiconductor dies that generate light in response to current, organic LEDs, electroluminescent strips, light-emitting silicon-based structures, and other such systems. In some examples, "LED" can refer to a single light-emitting diode package having multiple individually controlled semiconductor dies. It should be understood that the term "LED" does not limit the type of LED package. The term "LED" can include packaged LEDs, unpackaged LEDs, surface-mount LEDs, chip-on-a-board LEDs, and all other configurations of LEDs. The term "LED" can also include LEDs packaged with or associated with a phosphor, where the phosphor converts energy from the LED into different wavelengths. In some examples, LEDs can be implemented as RGB LEDs, and RGB LEDs can include red LEDs, green LEDs, and blue LEDs. Furthermore, in addition to RGB LEDs, LEDs can also include white LEDs. In some examples, LEDs can be implemented as MiniLEDs; for example, a MiniLED can be an LED using a size of 100 to 200 micrometers. In some examples, LEDs can be implemented as MicroLEDs; for example, a MicroLED can be an LED with a size of less than or equal to 100 micrometers.
[0079] In one alternative implementation, the first reference value is determined based on the subfield number of the target subfield.
[0080] In this way, the adjustable data references of the comparison output circuits corresponding to each row of different target subfields can be set to have different first reference values, which can improve the significance when the target subfield is changed, avoid different target subfields from producing the same comparison results, and thus improve the accuracy of distributed row driving.
[0081] In some examples, for the target subfield k, the first reference value is preset to A1×k; where A1 represents the first predetermined coefficient, which can be set according to actual needs, and can be a fixed value or an adjustable value, for example, A1=1; k represents the subfield number of the target subfield, k=1,2,…,K; K is less than or equal to the number of all subfields obtained by dividing a frame. For example, the target subfield can be subfield 1, subfield 2,…, subfield x, a total of x, and the number of subfields is equal to the number of rows in all rows.
[0082] Taking display screen 20 as an example with eight rows, if the additional subfield to be displayed is subfield 1, then the changes in the adjustable data references corresponding to each row for the additional subfield to be displayed are shown in Table 1 below.
[0083] Table 1
[0084] Sub-field 1 Sub-field 2 Sub-field 3 Sub-field 4 Sub-field 5 Sub-field 6 Sub-field 7 Sub-field 8 Line 1 1→0 2 3 4 5 6 7 8 Line 2 1 2→0 3 4 5 6 7 8 Line 3 1 2 3→0 4 5 6 7 8 Line 4 1 2 3 4→0 5 6 7 8 Line 5 1 2 3 4 5→0 6 7 8 Line 6 1 2 3 4 5 6→0 7 8 Line 7 1 2 3 4 5 6 7→0 8 Line 8 1 2 3 4 5 6 7 8→0 .
[0085] In the comparison, no data reference is set for each row; or the data reference for each row is common, that is, the data references are all the same, for example, all are 0, as shown in Table 2 below. Therefore, when the data reference is 0, the display elements of each row will be driven and displayed directly in sequence, and the display of the next subfield will begin after all rows have been displayed.
[0086] Table 2
[0087] Sub-field 1 Sub-field 2 Sub-field 3 Sub-field 4 Sub-field 5 Sub-field 6 Sub-field 7 Sub-field 8 Line 1 0 0 0 0 0 0 0 0 Line 2 0 0 0 0 0 0 0 0 Line 3 0 0 0 0 0 0 0 0 Line 4 0 0 0 0 0 0 0 0 Line 5 0 0 0 0 0 0 0 0 Line 6 0 0 0 0 0 0 0 0 Line 7 0 0 0 0 0 0 0 0 Line 8 0 0 0 0 0 0 0 0 .
[0088] As shown in Tables 1 and 2 above, the data reference for each row in the comparative example is consistent, all being 0; each row will output data as long as it is provided. However, in this embodiment, each row can be set with the same or different adjustable data references, and the adjustable data references need to be compared with a first reference value. When output is needed for a certain row, the adjustable data reference is first changed to 0, and then the output is controlled according to the comparison result, making the output controllable.
[0089] Figure 4 This diagram illustrates a specific example of the display state of each row after the additional subfields to be displayed are distributed in an embodiment of this application. (Refer to...) Figure 4 The display of rows ① through ⑧ is distributed across eight target subfields, from subfield 1 to subfield 8. It should be understood that... Figure 4 The arrangement of subfields 1 to 8 is shown only for the purpose of observing and displaying the dispersed state; in reality, the arrangement of subfields 1 to 8 is not limited to this. Figure 4 The sequence shown can also be evenly or almost evenly distributed among all subfields after all subfields have been shuffled, and can also be that any two adjacent subfields from subfield 1 to subfield 8 are separated by an equal number of other subfields.
[0090] For example, the dispersion process is as follows: when driving the display of an additional subfield to be displayed, the adjustable data references corresponding to each target subfield are adjusted sequentially according to the shuffled subfield order. Assuming that these eight subfields are evenly distributed and interspersed among all subfields in the order of subfield 1 to subfield 8, then the adjustable data reference corresponding to subfield 1 is preset to 1, and the adjustable data reference corresponding to row ① is adjusted to 0, thereby driving row ① to display, while other rows are not displayed; the adjustable data reference corresponding to subfield 2 is preset to 2, and the adjustable data reference corresponding to row ② is adjusted to 0, thereby driving row ② to display, while other rows are not displayed; the adjustable data reference corresponding to subfield 3 is preset to 3, and the adjustable data reference corresponding to row ③ is adjusted to 0, thereby driving row ③ to display, while other rows are not displayed; ... the adjustable data reference corresponding to subfield 8 is preset to 8, and the adjustable data reference corresponding to row ⑧ is adjusted to 0, thereby driving row ⑧ to display, while other rows are not displayed.
[0091] In one optional implementation, the subfield number of the target subfield is selected based on the row number.
[0092] In this way, the subfield number of the target subfield corresponds to the row number, thereby enabling the display of each row to be distributed across all target subfields.
[0093] In some examples, the subfield number of the target subfield is consistent with the row number; for example, the subfield number of the target subfield corresponding to row ① is also 1.
[0094] In other examples, to further improve the uniformity of the distribution of rows across all target subfields, the subfield number of the target subfield is obtained by calculating the row number according to a predetermined calculation rule. It should be understood that the predetermined calculation rule can be set according to actual needs; for example, the subfield number may be calculated by multiplying the row number by a second predetermined coefficient A2. The second predetermined coefficient A2 can be set to a fixed value or an adjustable value as needed, but is not limited to this.
[0095] In an optional embodiment, the control circuit 13 includes a first processing unit for determining one or more additional subfields to be displayed based on the non-zero low-order data;
[0096] The first processing unit is configured as follows:
[0097] Convert the non-zero low-order data into a decimal number;
[0098] Each subfield whose subfield number is less than or equal to the decimal number is identified as an additional subfield to be displayed.
[0099] In an optional embodiment, the control circuit 13 further includes a second processing unit configured as follows:
[0100] Divide a frame into multiple subfields and number all subfields sequentially;
[0101] The grayscale data of a frame is divided into high-order data and low-order data according to the number of binary bits to obtain the display cycle of the first number; the first number is the decimal number converted from the high-order data.
[0102] When non-zero low-order data is obtained, the first number is displayed in each row sequentially according to the disordered subfield order after all subfields are shuffled, and the second number is displayed in each row sequentially through the target subfield corresponding to the additional subfield to be displayed; the second number is the number of the additional subfields to be displayed.
[0103] One display cycle can represent the sequential display control of all subfields once.
[0104] Thus, the second processing unit described above achieves the process of displaying the required grayscale data based on high-order and low-order data. By dividing the grayscale data into high-order and low-order data, and calculating the display cycle accordingly, and driving the display based on the disordered sub-field order, the display refresh rate is improved. At the same time, the phenomenon of the first row being too dark can be eliminated by the dispersed processing of the additional sub-fields to be displayed.
[0105] In this embodiment of the application, the specific method of driving each row to display the second number display cycle through the target subfield corresponding to the additional subfield to be displayed according to the disordered subfield order after all subfields are shuffled can be the configuration performed for each additional subfield to be displayed in the control circuit configuration described above. For example, in each display cycle of the second number display cycle, the above-mentioned distributed process can be implemented, and the details can be referred to the above, which will not be repeated here.
[0106] When the low-order data is 0, the display cycle of the first number in each row can be driven sequentially according to the disordered order of all subfields after the order of all subfields is shuffled, but it is not limited to this.
[0107] In some examples, the number of bits in the low-order data and / or the binary representation of the low-order data can be determined based on the number of subfields. For example, when the remainder of the grayscale data divided by the number of subfields is not zero, the remainder represents the non-zero low-order data.
[0108] As a concrete example, taking a frame of image display with 16-bit grayscale data divided into 64 subfields as an example, the principle driving the display is as follows:
[0109] First, number the 64 subfields as 1-2-3-4-…-64. Then, shuffle the order of the subfields; for example, the shuffled order of the 64 subfields would be 1-33-17-49-9-41-…-64. If the 16 bits of the displayed grayscale data's binary number are denoted as D15, D14,…, D0, then the lower-order data from D5 to D0 and the higher-order data from D15 to D6 are obtained.
[0110] Each subfield counts sequentially from 1 to 1024 using a counter, resulting in 1024 display cycles. When the counter value is less than or equal to the decimal number converted from D15 to D6, the output channel is activated, driving the display of each row. Simultaneously, when the decimal number converted from the lower-order data is greater than or equal to the subfield number, the display cycle is incremented by 1.
[0111] For example, the decimal number of the displayed grayscale data is 515, which is represented in binary as D15~D0=0000001000000011. That is, the decimal number of the high-order data (D15~D6) is 8. Therefore, the output channels of each row in the 64 subfields are open for 8 display cycles, all in a driving display state. Meanwhile, the decimal number of the low-order data (D5~D0) is 3, so the display cycle is increased by 3. In these 3 display cycles, the subfields numbered 1, 2, and 3 (i.e., the additional subfields to be displayed) are driven for display using the display control method of this application embodiment, while other subfields are not displayed. In summary, the total grayscale display and low-grayscale display values are 8×64+3=515, which matches the original displayed grayscale data. Furthermore, an additional display cycle is added to each of the subfields numbered 1, 2, and 3 (i.e., the additional subfields to be displayed). During display, the additional subfields to be displayed are distributed to multiple target subfields so that the display of each row is spread out in all target subfields.
[0112] In this embodiment of the application, the specific method of shuffling the order of the subfields can be set according to actual needs. For example, the specific method can be through randomization algorithm, bit reversal algorithm, etc., but it is not limited to this.
[0113] In some examples, the control circuit 11 and the comparison output circuit 12 can be implemented as hardware circuits. Exemplarily, they can be logic gates implemented on integrated circuits, and / or modules or units implemented within one or more processors. In one implementation, the processor can be a circuit with instruction reading, interpretation, execution, and processing capabilities, such as a Central Processing Unit (CPU), a microprocessor, a graphics processing unit (GPU) (which can be understood as a type of microprocessor), or a digital signal processor (DSP). In another implementation, the processor can implement certain functions through the logical relationships of the hardware circuits. These logical relationships are fixed or reconfigurable. For example, the processor may be a hardware circuit implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD), such as an FPGA. In reconfigurable hardware circuits, the process of the processor loading a configuration document and configuring the hardware circuit can be understood as the process of the processor loading instructions to achieve the above functions. In addition, a processor can also be a hardware circuit designed for artificial intelligence, which can be understood as an ASIC, such as a Neural Network Processing Unit (NPU), a Tensor Processing Unit (TPU), a Deep Learning Processing Unit (DPU), etc.
[0114] In other examples, the control circuit 11 and the comparison output circuit 12 can be implemented in various combinations of hardware, firmware, and software. For instance, this can be accomplished by a computer program instructing the relevant hardware. This computer program can be stored in a non-volatile computer-readable storage medium. The computer program includes computer instructions, which the processor executes when it reads the computer program from the computer-readable storage medium to implement the aforementioned circuit functions.
[0115] This application also provides a driver chip, which includes at least one of the control circuit and the comparison output circuit in the display control device as described in the above embodiments.
[0116] As a specific example, Figure 5This paper shows a schematic block diagram of a specific example of a driver chip in an embodiment of this application. (Refer to...) Figure 5 The control circuit and the comparison output circuit can be set in a single driver chip.
[0117] As another specific example, the control circuit and the comparison output circuit are located in different chips. For example, the control circuit is located in a control chip, and one or more comparison output circuits are located in one or more display driver chips.
[0118] This application also provides a display control method that can be applied to the display control device in the above embodiments. Figure 6 A flowchart illustrating a specific example of the display control method in an embodiment of this application is shown below. Figure 6 The display control method includes:
[0119] Step S100: Divide a frame into multiple subfields and number all subfields sequentially;
[0120] Step S200: Divide the display grayscale data of a frame into high-order data and low-order data according to the number of binary bits, and determine the additional subfield to be displayed based on the non-zero low-order data to obtain the total number of display cycles; the total number is determined based on the first number and the second number; the first number is the decimal number converted from the high-order data;
[0121] Step S300: When non-zero low-order data is obtained, the order of all subfields is shuffled to obtain a disordered subfield order.
[0122] Step S400: Drive each row to display the total number of display cycles in the order of the disordered subfields; wherein, when driving each row to display the display cycle corresponding to the additional subfield to be displayed in the order of the disordered subfields, the additional subfield to be displayed is distributed to multiple target subfields, and the adjustable data reference of the row corresponding to the target subfield is adjusted from a preset first reference value to a second reference value, so that after comparing the adjustable data reference with the first reference value, the display of the row corresponding to the target subfield is driven according to the comparison result; the second reference value is less than the first reference value.
[0123] Thus, through steps S100 to S400, by distributing the additional subfields to be displayed to multiple target subfields and driving the corresponding rows of the target subfields to display while not driving the display of other rows, it is possible to evenly or almost evenly distribute the display of each row in all target subfields based on the disordered subfield order when displaying low grayscale values, thereby breaking up the display of each row in time. Therefore, in the two cases where the displayed grayscale data is low grayscale or high grayscale data obtained by dividing it into non-zero low-level bits according to binary bits, the influence of parasitic capacitance CL when displaying each row is not significantly different or consistent, and the human eye cannot observe the difference in the display of each row, thereby eliminating the phenomenon that the starting row of the scan, such as row ①, is displayed too darkly, and also improving the refresh rate.
[0124] In an optional implementation, step S400, which involves distributing the additional subfields to be displayed into multiple target subfields and adjusting the adjustable data reference of the corresponding row of the target subfield from a preset first reference value to a second reference value, so as to drive the display of the corresponding row of the target subfield based on the comparison result after comparing the adjustable data reference with the first reference value, includes:
[0125] Step S401: Preset the adjustable data reference corresponding to each row as the first reference value, and determine each subfield corresponding to the subfield number and row number as each target subfield;
[0126] Step S402: Adjust the adjustable data reference of a row of display elements corresponding to the target subfield from the first reference value to the second reference value; the second reference value is less than the first reference value;
[0127] Step S403: Compare the adjustable data reference with the first reference value, so that if the adjustable data reference is less than the first reference value, drive the display element of a row corresponding to the subfield number of the target subfield to be displayed in the target subfield.
[0128] Thus, through steps S401 to S403, the display of each row can be distributed in all target sub-fields even when the order of all sub-fields has been shuffled, thereby eliminating the phenomenon of the first row being too dark and improving the display refresh rate.
[0129] In an optional implementation, the step S200 of determining the additional subfield to be displayed based on the non-zero low-order data includes:
[0130] Step S201: Convert the non-zero low-order data into a decimal number;
[0131] Step S202: Determine each subfield whose subfield number is less than or equal to the decimal number as an additional subfield to be displayed.
[0132] In an optional implementation, step S400, which sequentially drives each row to display the first number of the display cycle according to the disordered subfield order, can involve displaying all rows of all subfields in each display cycle. For example, if the required grayscale data for the above display is 515, then high grayscale displays all 64 subfields of all rows for 8 display cycles, i.e., all rows display 8×64.
[0133] As a concrete example, the number of bits in the binary representation of low-order data can be determined based on the number of subfields. For instance, the number of decimal numbers that low-order data (binary numbers) can represent can be equal to the number of subfields, 2. 6 =64.
[0134] It should be understood that the above embodiments are exemplary and are not intended to encompass all possible implementations included in this application. Various modifications and changes can be made to the above embodiments without departing from the scope of this disclosure. Similarly, the various technical features of the above embodiments can be arbitrarily combined to form other embodiments of this application that may not be explicitly described. Therefore, the above embodiments only illustrate several implementations of this application and do not limit the scope of protection of this patent application.
Claims
1. A display control device, characterized in that, The display control device includes a control circuit and one or more comparison output circuits; the comparison output circuits are connected to the control circuit; each comparison output circuit is connected to a row of display elements. The comparison output circuit is configured as follows: The adjustable data reference is compared with a first reference value to drive a row display element connected to the comparison output circuit to display based on the comparison result; The control circuit is configured as follows: In response to obtaining non-zero low-order data when dividing the display grayscale data of a frame into high-order data and low-order data according to the number of binary bits, one or more additional subfields to be displayed are determined based on the non-zero low-order data. For each of the additional subfields to be displayed, the adjustable data reference of the comparison output circuit corresponding to each row is preset as the first reference value, and each subfield corresponding to the subfield number and the row number is determined as each target subfield; During the process of displaying the grayscale data, when driving the display of the additional subfield to be displayed, the adjustable data reference of the comparison output circuit of the row of display elements corresponding to the target subfield is adjusted from the first reference value to the second reference value, so as to drive the display of a row of display elements corresponding to the subfield number of the target subfield in each target subfield even when all subfields have been shuffled.
2. The display control device according to claim 1, characterized in that, The first reference value is determined based on the subfield number of the target subfield.
3. The display control device according to claim 1, characterized in that, The subfield number of the target subfield is selected based on the row number.
4. The display control device according to claim 1, characterized in that, The control circuit includes a first processing unit, used to determine one or more additional subfields to be displayed based on the non-zero low-order data; The first processing unit is configured as follows: Convert the non-zero low-order data into a decimal number; Each subfield whose subfield number is less than or equal to the decimal number is identified as an additional subfield to be displayed.
5. The display control device according to any one of claims 1-4, characterized in that, The control circuit further includes a second processing unit, configured as follows: Divide a frame into multiple subfields and number all subfields sequentially; The grayscale data of a frame is divided into high-order data and low-order data according to the number of binary bits to obtain the display cycle of the first number; the first number is the decimal number converted from the high-order data. When non-zero low-order data is obtained, the display cycle of the first number is driven sequentially according to the disordered subfield order after all subfields are shuffled, and the display cycle of the second number is driven sequentially through the target subfield corresponding to the additional subfield to be displayed.
6. A driver chip, characterized in that, The driver chip includes at least one of the control circuit and the comparison output circuit in the display control device as described in any one of claims 1-5.
7. A display control method, characterized in that, The display control method is applied to the display control device as described in any one of claims 1-5, and the display control method includes: Divide a frame into multiple subfields and number all subfields sequentially; The grayscale data of a frame is divided into high-order data and low-order data according to the number of binary bits, and an additional subfield to be displayed is determined based on the non-zero low-order data to obtain the total number of display cycles; the total number is determined based on the first number and the second number; the first number is the decimal number converted from the high-order data; When non-zero low-order data is obtained, the order of all subfields is shuffled to obtain a disordered subfield order. The total display cycle is driven sequentially for each row according to the disordered subfield order; wherein, when driving each row sequentially to display the display cycle corresponding to the additional subfield to be displayed, the additional subfield to be displayed is distributed to multiple target subfields, and the adjustable data reference of the row corresponding to the target subfield is adjusted from a preset first reference value to a second reference value, so that after comparing the adjustable data reference with the first reference value, the display of the row corresponding to the target subfield is driven according to the comparison result.
8. The display control method according to claim 7, characterized in that, The step of distributing the additional subfields to be displayed into multiple target subfields, and adjusting the adjustable data reference of the corresponding row of the target subfield from a preset first reference value to a second reference value, so as to drive the display of the corresponding row of the target subfield according to the comparison result after comparing the adjustable data reference with the first reference value, includes: The adjustable data reference corresponding to each row is preset as the first reference value, and each subfield corresponding to the subfield number and row number is determined as each target subfield; The adjustable data reference of a row of display elements corresponding to the target subfield is adjusted from the first reference value to the second reference value; the second reference value is less than the first reference value. The adjustable data reference is compared with a first reference value, so that if the adjustable data reference is less than the first reference value, a row of display elements corresponding to the subfield number of the target subfield is driven to be displayed in the target subfield.
9. The display control method according to claim 7, characterized in that, The additional subfield to be displayed, determined based on non-zero low-order data, includes: Convert the non-zero low-order data into a decimal number; Each subfield whose subfield number is less than or equal to the decimal number is identified as an additional subfield to be displayed.
10. The display control method according to claim 7, characterized in that, The first reference value is determined based on the subfield number of the target subfield; And / or, the subfield number of the target subfield is obtained based on the row number selection.
Citation Information
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