Semiconductor structure and manufacturing method

Abstract

This application provides a semiconductor structure and its manufacturing method. The semiconductor structure includes: a substrate; a patterned photoresist layer formed on the substrate; wherein the patterned photoresist layer exposes a portion of the substrate, and the patterned photoresist layer includes a first sub-patterned photoresist layer and a second sub-patterned photoresist layer; the first sub-patterned photoresist layer includes a first photoresist pattern structure and a doped photoresist strip protruding from the first photoresist pattern structure; the second sub-patterned photoresist layer includes a second photoresist pattern structure; the second photoresist pattern structure covers the first photoresist pattern structure and the doped photoresist strip; the doped photoresist strip is used to limit the relative displacement between the first photoresist pattern structure and the second photoresist pattern structure. Through this application embodiment, defects such as delamination, tilting, or collapse that occur in high aspect ratio photoresist pattern structures after development and rinsing are reduced, improving the stability of the photoresist pattern structure.

Description

Technical Field

[0001] The embodiments in this application relate to the field of semiconductor manufacturing technology, specifically to a semiconductor structure and its manufacturing method. Background Technology

[0002] The increasing integration of semiconductor devices places higher demands on semiconductor manufacturing processes. Among these, photolithography, capable of fabricating nanoscale microstructures, plays a crucial role in the miniaturization of highly integrated semiconductor devices. Photoresist patterning is used to precisely transfer pre-defined circuit patterns onto the semiconductor substrate surface, and is key to achieving high precision in photolithography. The stability of the photoresist pattern directly impacts the performance, production yield, and product reliability of semiconductor devices. To improve the stability of the photoresist pattern during subsequent processes such as ion implantation and etching, the photoresist pattern needs to have a high aspect ratio.

[0003] In existing technologies, a thick photoresist layer is mainly formed by multiple spin coatings, and then a high aspect ratio photoresist pattern structure is fabricated based on this photoresist layer. However, the high aspect ratio photoresist pattern structure fabricated in this way is prone to defects such as delamination or even collapse during subsequent development and washing processes, resulting in weak stability of the photoresist pattern structure. Summary of the Invention

[0004] In view of this, several embodiments of this application provide a semiconductor structure and a method for manufacturing the same, to improve the stability of photoresist patterned structures.

[0005] In one aspect, an embodiment of this application provides a semiconductor structure comprising: a substrate; a patterned photoresist layer formed on the substrate; the patterned photoresist layer exposing a portion of the substrate and including a first sub-patterned photoresist layer and a second sub-patterned photoresist layer; wherein the first sub-patterned photoresist layer includes a first photoresist pattern structure and a doped photoresist strip protruding from the first photoresist pattern structure; the second sub-patterned photoresist layer includes a second photoresist pattern structure; the second photoresist pattern structure covers the first photoresist pattern structure and the doped photoresist strip; wherein the doped photoresist strip is used to limit the relative displacement between the first photoresist pattern structure and the second photoresist pattern structure.

[0006] Optionally, the doped photoresist strip is made of a doped photoresist material doped with transparent conductive particles.

[0007] Optionally, the transparent conductive particles are zinc oxide particles.

[0008] In another aspect, one embodiment of this application provides a method for manufacturing a semiconductor structure, the method comprising: providing a substrate; forming a first photoresist material layer on the substrate based on a composite photoresist material; wherein the composite photoresist material contains doped photoresist strips; patterning the first photoresist material layer to obtain a first sub-patterned photoresist layer exposing a portion of the substrate; wherein the first sub-patterned photoresist layer includes a first photoresist pattern structure and doped photoresist strips protruding from the first photoresist pattern structure; and forming a second photoresist material covering the first sub-patterned photoresist layer and the substrate. A photoresist material layer; wherein the photoresist material does not contain doped photoresist strips; the second photoresist material layer is patterned to obtain a second sub-patterned photoresist layer exposing a portion of the substrate; wherein the second sub-patterned photoresist layer includes a second photoresist pattern structure; the second photoresist pattern structure covers the first photoresist pattern structure and the doped photoresist strips; the doped photoresist strips are used to limit the relative displacement between the first photoresist pattern structure and the second photoresist pattern structure; the second sub-patterned photoresist layer is surface modified to obtain a patterned photoresist layer exposing a portion of the substrate.

[0009] Optionally, the step of forming a first photoresist material layer on the substrate based on the composite photoresist material includes: providing the doped photoresist strip; mixing the doped photoresist strip into the photoresist material to obtain a composite photoresist material; and spin-coating the composite photoresist material on the substrate to form the first photoresist material layer.

[0010] Optionally, the step of providing the doped photoresist strip includes: incorporating transparent conductive particles into the photoresist material to obtain a doped photoresist material; wherein the transparent conductive particles are zinc oxide particles; injecting the doped photoresist material into a photoresist strip mold; and demolding the photoresist strip mold containing the doped photoresist material to obtain the doped photoresist strip.

[0011] Optionally, the photoresist strip mold is a hydrophilic mold and has a mold hole with a diameter ranging from 1 nm to 20 nm.

[0012] Optionally, the step of patterning the first photoresist material layer to obtain a first sub-patterned photoresist layer exposing a portion of the substrate includes: exposing the first photoresist material layer according to a specified mask pattern based on a first exposure ratio; and developing the exposed first photoresist material layer to obtain a first photoresist pattern structure exposing a portion of the substrate and a doped photoresist strip protruding from the first photoresist pattern structure.

[0013] Optionally, the step of patterning the second photoresist material layer to obtain a second sub-patterned photoresist layer exposing a portion of the substrate includes: exposing the second photoresist material layer according to the specified mask pattern according to a second exposure ratio; wherein the second exposure ratio is greater than the first exposure ratio; developing the exposed second photoresist material layer to obtain a second photoresist pattern structure exposing a portion of the substrate and development byproducts; and removing the development byproducts to obtain a second sub-patterned photoresist layer exposing a portion of the substrate.

[0014] Optionally, the first exposure ratio and the second exposure ratio can be controlled by the exposure energy parameter.

[0015] Optionally, the step of performing surface modification treatment on the second sub-patterned photoresist layer to obtain a patterned photoresist layer exposing part of the substrate includes: using a coupling agent to change the hydrophilicity of the surface of the second sub-patterned photoresist layer to obtain the patterned photoresist layer.

[0016] The semiconductor structure provided by several embodiments of this application includes a substrate and a patterned photoresist layer formed on the substrate. The patterned photoresist layer includes a first sub-patterned photoresist layer and a second sub-patterned photoresist layer. The first sub-patterned photoresist layer includes a first photoresist pattern structure and a doped photoresist strip protruding from the first photoresist pattern structure. The second sub-patterned photoresist layer includes a second photoresist pattern structure, which covers the first photoresist pattern structure and the doped photoresist strip. Unexpected effects achieved include: using the doped photoresist strip to limit the relative displacement between the first and second photoresist pattern structures, achieving fiber toughening of the large aspect ratio photoresist pattern structure, reducing defects such as delamination, tilting, or collapse that occur in the large aspect ratio photoresist pattern structure after development and rinsing, and improving the stability of the photoresist pattern structure. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in describing the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 Images of the interfaces between different photoresist layers in a high aspect ratio photoresist pattern structure are provided for related technologies.

[0019] Figure 2 This is a schematic flowchart of a method for manufacturing a semiconductor structure according to an embodiment of this application.

[0020] Figure 3 This is a schematic diagram of the process for forming a first photoresist material layer on a substrate, provided as an embodiment of this application.

[0021] Figure 4 This is a schematic diagram of a process for providing a doped photoresist strip according to an embodiment of this application.

[0022] Figure 5 This is a schematic diagram of rinsing a semiconductor transition structure with a large aspect ratio photoresist pattern in related technologies.

[0023] Figure 6 This is a schematic diagram of negative charge accumulation in a high aspect ratio photoresist pattern structure in related technologies.

[0024] Figure 7 This is a schematic diagram illustrating the principle of obtaining blurred images by measuring large aspect ratio photoresist patterns with accumulated negative charges in related technologies.

[0025] Figure 8 This is a blurred image obtained by measuring a large aspect ratio photoresist pattern structure with accumulated negative charge in related technologies.

[0026] Figure 9 This is a schematic diagram of obtaining a doped photoresist material according to an embodiment of this application.

[0027] Figure 10 This is a schematic diagram illustrating the injection of doped photoresist material into a photoresist strip mold, provided as an embodiment of this application.

[0028] Figure 11 This is a schematic diagram of demolding a photoresist strip mold into which doped photoresist material has been injected, as provided in one embodiment of this application, to obtain a doped photoresist strip.

[0029] Figure 12 This is a schematic diagram of obtaining a composite photoresist material according to an embodiment of this application.

[0030] Figure 13 This is a schematic diagram of forming a first photoresist material layer on a substrate, provided as an embodiment of this application.

[0031] Figure 14 This is a schematic diagram of exposing a first photoresist material layer according to a specified mask pattern based on a first exposure ratio, as provided in one embodiment of this application.

[0032] Figure 15 This is a schematic diagram of the formation of a first sub-patterned photoresist layer provided for one embodiment of this application.

[0033] Figure 16 This is a schematic diagram of the formation of a second photoresist material layer provided for one embodiment of this application.

[0034] Figure 17 This is a schematic diagram of exposing a second photoresist material layer according to a specified mask pattern based on a second exposure ratio, as provided in one embodiment of this application.

[0035] Figure 18 This is a schematic diagram of developing a second photoresist material layer after exposure, provided as an embodiment of this application.

[0036] Figure 19 A schematic diagram of a semiconductor structure provided for one embodiment of this application.

[0037] Structural designation explanation

[0038] 100. Substrate; 210. Semiconductor structure support stage; 220. Rinsing nozzle; 230. Deionized water; 240. Semiconductor transition structure; 241. High aspect ratio photoresist pattern structure; 250. Negative charge; 260. Measurement electron beam; 300. Photoresist material container; 310. Doped photoresist material; 320. Photoresist strip mold; 330. Doped photoresist material injection nozzle; 340. Composite photoresist material; 400. Doped photoresist strip; 500. Patterned photoresist layer; 510. First photoresist material layer; 520. First sub-patterned photoresist layer; 521. First photoresist pattern structure; 530. Second photoresist material layer; 531. Second photoresist pattern structure; 532. Developing byproduct; 540. Second sub-patterned photoresist layer; 600. Designated mask pattern. Detailed Implementation

[0039] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0040] The accompanying drawings provided in this application are only schematic illustrations of the basic concept of this application. The drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the shape, quantity and proportion of each component may be changed, and the layout of the components may also be more complex.

[0041] In the description of the embodiments of this application, it should be understood that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," "outer," "center," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" and "second" may explicitly or implicitly include one or more of the stated features.

[0042] With the continuous improvement of semiconductor chip performance, increasingly higher requirements are being placed on the design and fabrication of photoresist patterned structures. In conventional photoresist patterned structure fabrication processes, typically only one photoresist spin coating is performed, followed by patterning of the resulting photoresist layer to obtain the photoresist patterned structure. In some cases, to improve the photoresist's resistance to ion implantation and etching, it is necessary to fabricate photoresist patterned structures with a high aspect ratio. However, the single-layer photoresist formed by a single spin coating has a certain thickness range, which is difficult to meet the thickness requirements for fabricating high aspect ratio photoresist patterned structures. Therefore, in related technologies, multiple photoresist spin coatings are typically used to obtain the photoresist layer used for fabricating high aspect ratio photoresist patterned structures.

[0043] Taking two spin coatings as an example, the process of forming a photoresist layer using multiple spin coatings in related technologies is briefly explained below.

[0044] First, the substrate is placed on a stage and its surface is rinsed to remove impurities. Then, a first spin coating is performed on the substrate surface. Specifically, with both the substrate and the stage stationary, photoresist is applied to the substrate surface. The stage is then rotated at an increased speed to spin off the photoresist and evaporate the solvent. This process is repeated until a first sub-photoresist layer is formed on the substrate surface. Next, a second spin coating is performed on the surface of the first sub-photoresist layer to form a second sub-photoresist layer. The second spin coating process is similar to the first and will not be described in detail here. The first and second sub-photoresist layers together form a photoresist layer, the thickness of which is sufficient to meet the thickness requirements for fabricating high aspect ratio photoresist patterns. Finally, the edges of the photoresist layer are rinsed, and simultaneously, the surface of the substrate furthest from the photoresist layer is rinsed to remove uneven photoresist buildup and impurities at the substrate edges.

[0045] Please see Figure 1In the process of forming a photoresist layer through multi-layer spin coating, the different sub-layers of the photoresist layer are only stacked, with low bonding strength at the interfaces, resulting in weak overall stability of the photoresist layer. Therefore, the stability of high aspect ratio photoresist patterns fabricated based on this photoresist layer is also weak. During subsequent processes such as development and deionized water (DIW) rinsing, relative displacement easily occurs between the different sub-layers, leading to defects such as delamination, tilting, misalignment, and even collapse of the high aspect ratio photoresist pattern. Researchers have attempted to improve these defects by adjusting lithography parameters; however, in actual production, it has been found that even after changing the lithography parameters, the high aspect ratio photoresist pattern is still prone to these defects, indicating limited improvement.

[0046] Therefore, it is necessary to provide a semiconductor structure and its manufacturing method, which uses doped photoresist strips to limit the relative displacement between photoresist pattern structures formed by different spin coating processes, so as to achieve fiber toughening of large aspect ratio photoresist pattern structures, improve the bonding strength between different photoresist pattern structures, reduce defects such as delamination, tilting or collapse of large aspect ratio photoresist pattern structures after development and rinsing processes, and improve the stability of photoresist pattern structures.

[0047] One embodiment of this application provides a method for manufacturing a semiconductor structure.

[0048] Please see Figure 2 The method for manufacturing this semiconductor structure may include the following steps.

[0049] S110: Provides a substrate.

[0050] In this embodiment, the substrate can serve as a support for the photoresist pattern structure. Specifically, the substrate may consist only of a substrate. The substrate can be composed of semiconductor materials, insulating materials, conductive materials, or any combination thereof. For example, the substrate can be made of materials such as silicon (Si), silicon-germanium (SiGe), silicon-germanium-carbon (SiGeC), or silicon carbide (SiC). The substrate can be a single-layer structure or a multi-layer structure. In this embodiment, considering factors such as dielectric loss requirements, manufacturing process, and manufacturing cost, a silicon wafer is used as the substrate.

[0051] In some embodiments, to improve the accuracy of photolithographic pattern transfer and reduce photolithographic pattern distortion, the substrate may include a substrate, a bottom anti-reflective coating (BARC), and a hard mask (HM). Specifically, the bottom anti-reflective coating may be made of organic or inorganic materials, and the hard mask may be made of titanium nitride (TiN), spin-on carbon (SOC), or amorphous carbon film, etc. The embodiments in this specification do not impose specific limitations on the materials of the bottom anti-reflective coating and the hard mask.

[0052] S120: A first photoresist material layer is formed on the substrate based on a composite photoresist material.

[0053] To reduce the difficulty and cost of the process, in this embodiment, the composite photoresist material may contain doped photoresist strips.

[0054] Please see Figure 3 In this embodiment, forming a first photoresist material layer on a substrate based on a composite photoresist material may include the following steps.

[0055] S121: Provides doped photoresist strips.

[0056] In related technologies, conventional photoresist materials are mainly homogeneous materials. In order to obtain composite photoresist materials containing doped photoresist strips, it is necessary to first provide doped photoresist strips.

[0057] Please see Figure 4 In this embodiment, providing a doped photoresist strip may include the following steps.

[0058] S1211: Transparent conductive particles are incorporated into photoresist material to obtain doped photoresist material.

[0059] During the development and rinsing processes of photoresist patterns with large aspect ratios, in addition to defects such as delamination and tilting, negative charges tend to accumulate on the surface of the photoresist pattern, which reduces the measurement accuracy of automated defect inspection (ADI).

[0060] Please see Figures 5 to 7 Taking the washing process of a large aspect ratio photoresist pattern structure as an example, this paper briefly explains the mechanism by which negative charges easily accumulate on the surface of a large aspect ratio photoresist pattern structure and the resulting image blurring.

[0061] In related technologies, the semiconductor transition structure 240 may include a substrate 100 and a high aspect ratio photoresist pattern structure 241 formed on the substrate 100. After obtaining the semiconductor transition structure 240, it can be placed on a semiconductor structure support stage 210 and rinsed by spraying deionized water 230 onto the semiconductor transition structure 240 using a rinsing nozzle 220.

[0062] During the rinsing process of the high aspect ratio photoresist pattern 241, the deionized water 230 generates negative charges 250 through friction with the photoresist surface. Because the high aspect ratio photoresist pattern 241 has a large depth, its contact area with the deionized water 230 is large, resulting in a large number of negative charges 250 generated. Since the photoresist is an insulating material, it cannot transfer the negative charges 250 to other structures. Furthermore, the high aspect ratio photoresist pattern 241 provides ample space for the negative charges 250. Therefore, a significant number of negative charges 250 accumulate on the surface of the high aspect ratio photoresist pattern 241, forming an electrostatic field.

[0063] During the dimensional measurement of the high aspect ratio photoresist pattern structure 241 using a scanning electron microscope (SEM), the measurement electron beam 260 emitted by the scanning electron microscope is interfered with by the electrostatic field, causing the direction to deviate and resulting in blurred images.

[0064] Please see Figure 8 .exist Figure 8 In the image, from left to right, are blurred images showing the lithographic patterns decreasing in density. In the clear image, the circular aperture's boundary is distinct, and the outer diameter of the light-colored circle outside the dark aperture represents the aperture's size. However... Figure 8 In the blurred imaging state shown, the boundary of the circular aperture is blurred, and the inner diameter of the light-colored circle outside the dark circular aperture is the size of the circular aperture.

[0065] In related technologies, researchers have attempted to improve the above-mentioned defects by adjusting the measurement parameters of scanning electron microscopes. However, in actual production, it has been found that the blurring of images has not been effectively improved after the measurement parameters are changed.

[0066] Furthermore, the negative charges accumulated on the surface of the high aspect ratio photoresist pattern structure can easily attract tiny particles in the environment, such as dust, impurity metal particles, or other contaminant particles. In subsequent processes, these tiny particles may hinder the processing operations, leading to a decrease in the performance of semiconductor devices or even failure.

[0067] Therefore, to address the issue of negative charge accumulation on the surface of high aspect ratio photoresist patterns, conductive particles can be doped into the photoresist material to obtain a conductive doped photoresist material. This prevents the negative charges generated by friction from accumulating on the surface of the photoresist pattern and allows them to be transferred to other structures in a timely manner. Simultaneously, to reduce the negative impact of conductive particles on the photoresist's light transmittance, transparent conductive particles can be doped.

[0068] In this embodiment, the photoresist material can be a mixed liquid insulating material mainly composed of resin, photosensitive compound and solvent.

[0069] Please see Figure 9 In this embodiment, photoresist material and transparent conductive particles can be added sequentially to the photoresist material container 300, and the transparent conductive particles can be dispersed by ultrasonic vibration, so that the transparent conductive particles are evenly distributed in the photoresist material to obtain doped photoresist material 310.

[0070] In this embodiment, the transparent conductive particles can be zinc oxide (ZnO) particles. In some embodiments, the transparent conductive particles can also be aluminum oxide (Al2O3) particles.

[0071] S1212: Inject the doped photoresist material into the photoresist strip mold.

[0072] Since the doped photoresist material is a liquid material, in order to form the doped photoresist strip, the doped photoresist material can be injected into the photoresist strip mold.

[0073] Please see Figure 10 In this embodiment, the photoresist strip mold 320 has a mold hole, and the doped photoresist material 310 can be injected into the mold hole of the photoresist strip mold 320 using the doped photoresist material injection nozzle 330.

[0074] Since the doped photoresist material is hydrophobic, in order to increase the repulsive force between the doped photoresist strip 400 and the photoresist strip mold 320 and reduce the difficulty of demolding, in this embodiment, the photoresist strip mold 320 can be a hydrophilic mold.

[0075] Since the aperture and thickness of the photoresist strip mold 320 determine the size of the doped photoresist strip 400, for process nodes of 40nm and below, considering the overall size and linewidth of semiconductor devices, in this embodiment, the aperture range of the photoresist strip mold 320 can be 1nm~20nm.

[0076] S1213: Demolding the photoresist strip mold containing doped photoresist material to obtain a doped photoresist strip.

[0077] Please see Figure 11In this embodiment, the photoresist strip mold 320, into which the doped photoresist material 310 is injected, can be dried to shape the doped photoresist strip 400. Then, the photoresist strip mold 320 is wetted and rinsed with water, and the doped photoresist strip 400 is removed from the photoresist strip mold 320 by water pressure.

[0078] S122: Incorporate doped photoresist strips into the photoresist material to obtain a composite photoresist material.

[0079] Please see Figure 12 In this embodiment, after obtaining the doped photoresist strip, photoresist material and the doped photoresist strip can be added sequentially to the photoresist material container 300, and the doped photoresist strip and the photoresist material can be mixed by stirring or other means to obtain a composite photoresist material 340.

[0080] S123: Spin-coat the composite photoresist material onto the substrate to form a first photoresist material layer.

[0081] Please see Figure 13 In this embodiment, the composite photoresist material can be spin-coated onto the surface of the substrate 100 to form a first photoresist material layer 510. The specific spin-coating method is similar to that in related technologies and will not be described in detail here.

[0082] S130: Patterning the first photoresist material layer to obtain a first sub-patterned photoresist layer that exposes a portion of the substrate.

[0083] To leverage the fiber toughening effect of the doped photoresist strip on the photoresist pattern structure, the first photoresist material layer can be patterned, causing the doped photoresist strip to protrude from the first photoresist pattern structure obtained after the patterning process.

[0084] Please see Figure 14 and Figure 15 In this embodiment, the first sub-patterned photoresist layer 520 may include a first photoresist pattern structure 521 and a doped photoresist strip 400 protruding from the first photoresist pattern structure 521.

[0085] In this embodiment, the step of patterning the first photoresist material layer to obtain a first sub-patterned photoresist layer exposing a portion of the substrate may include: exposing the first photoresist material layer according to a specified mask pattern based on a first exposure ratio; and developing the exposed first photoresist material layer to obtain a first photoresist pattern structure exposing a portion of the substrate and doped photoresist strips protruding from the first photoresist pattern structure.

[0086] In this embodiment, the first exposure ratio can be the exposure ratio corresponding to the "small exposure, large exposure" method.

[0087] In this embodiment, the doped photoresist material has altered properties due to the presence of transparent conductive particles, making it difficult to remove by the developing solution during the development process. Therefore, after developing the first photoresist material layer 510 after exposure, the doped photoresist strip 400 retains its position and shape within the first photoresist material layer 510.

[0088] S140: Forming a second photoresist material layer covering the first sub-patterned photoresist layer and the substrate based on photoresist material.

[0089] Please see Figure 16 To leverage the fiber toughening effect of the doped photoresist strip 400 on the photoresist pattern structure, after obtaining the first photoresist pattern structure 521 and the doped photoresist strip 400 protruding from the first photoresist pattern structure 521, a second photoresist material layer 530 covering the first photoresist pattern structure 521 and the doped photoresist strip 400 can be formed using conventional photoresist materials.

[0090] In this embodiment, the photoresist material can be a mixed liquid insulating material mainly composed of resin, photosensitive compound and solvent, wherein it does not contain doped photoresist strip 400.

[0091] In this embodiment, the method for forming the second photoresist material layer 530 is similar to the method for forming the first photoresist material layer 510, and will not be described again here.

[0092] S150: Patterning the second photoresist material layer to obtain a second sub-patterned photoresist layer that exposes part of the substrate.

[0093] Please see Figure 17 and Figure 18 After forming the second photoresist material layer 530, the second photoresist material layer 530 can be patterned to obtain a second sub-patterned photoresist layer including the second photoresist pattern structure 531.

[0094] In this embodiment, the step of patterning the second photoresist material layer to obtain a second sub-patterned photoresist layer exposing a portion of the substrate may include: exposing the second photoresist material layer according to a specified mask pattern based on a second exposure ratio; developing the exposed second photoresist material layer to obtain a second photoresist pattern structure exposing a portion of the substrate and development byproducts; and removing the development byproducts to obtain a second sub-patterned photoresist layer exposing a portion of the substrate.

[0095] In this embodiment, the second exposure ratio can be the exposure ratio corresponding to the "large exposure, small exposure" method. Specifically, the second exposure ratio is greater than the first exposure ratio, so that the second photoresist pattern structure 531 obtained according to the second exposure ratio can cover the first photoresist pattern structure 521 and the doped photoresist strip 400. The second photoresist material layer 530 and the first photoresist material layer can be exposed using the same specified mask pattern 600 and different exposure ratios, wherein the exposure ratio can be controlled by the exposure energy parameter.

[0096] In this embodiment, the second sub-patterned photoresist layer may include a second photoresist pattern structure 531 covering the first photoresist pattern structure 521 and the doped photoresist strip 400, thereby reducing the influence of the doped photoresist strip 400 on the photolithography pattern and allowing the doped photoresist strip 400 to be supported between the first photoresist pattern structure 521 and the second photoresist pattern structure 531. The doped photoresist strip 400 restricts the relative displacement between the first photoresist pattern structure 521 and the second photoresist pattern structure 531, thereby improving the bonding strength between the first photoresist pattern structure 521 and the second photoresist pattern structure 531.

[0097] In this embodiment, the first photoresist pattern structure 521, the doped photoresist strip 400, and the second photoresist pattern structure 531 can form an integral photoresist pattern structure.

[0098] Since the developer is an acidic or alkaline liquid with a certain degree of conductivity, in this embodiment, an excess of developer can be used to rinse the second photoresist pattern structure 531 and the development byproducts 532 to remove the development byproducts 532 and the negative charge 250 accumulated on the surface of the second photoresist pattern structure 531.

[0099] S160: Perform surface modification treatment on the second sub-patterned photoresist layer to obtain a patterned photoresist layer that exposes part of the substrate.

[0100] Please see Figure 19In this embodiment, after removing the development byproducts, a coupling agent can be used to modify the hydrophilicity of the surface of the second sub-patterned photoresist layer 540. The first sub-patterned photoresist layer 520 and the hydrophilicized second sub-patterned photoresist layer 540 are then baked to improve the stability of the overall photoresist pattern structure. Subsequently, the overall photoresist pattern structure is rinsed with deionized water and baked again to finally obtain the patterned photoresist layer 500. Specifically, please refer to Formulas 1 to 3. Modifying the hydrophilicity of the surface of the second sub-patterned photoresist layer 540 using a coupling agent can include three reaction processes: coupling agent hydrolysis, photoresist surface bonding, and intermolecular polymerization. Constructing the surface of the second sub-patterned photoresist layer 540 as a hydrophilic structure can reduce the amount of negative charge generated by friction during deionized water rinsing. Simultaneously, utilizing the conductivity of deionized water and the hydrophilic bonds on the surface of the second sub-patterned photoresist layer 540, the negative charge accumulated on the surface of the overall photoresist pattern structure can be removed.

[0101] R-Si(OR')3+3H2O→R-Si(OH)3+3R'OH Formula 1

[0102] R-Si(OH)3+Surface-OH→R-Si(O-Surface)+2H2O Formula 2

[0103] R-Si(OH)3+HO-SiR→R-Si-O-SiR+H2O Formula 3

[0104] Where R represents a hydrophilic group, R' represents methyl or ethyl, and Surface represents the surface of the second photoresist pattern structure.

[0105] Please see Figure 19 One embodiment of this application provides a semiconductor structure that may include a substrate 100 and a patterned photoresist layer 500 formed on the substrate 100.

[0106] In this embodiment, the patterned photoresist layer 500 exposes a portion of the substrate 100. The patterned photoresist layer 500 may include a first sub-patterned photoresist layer 520 and a second sub-patterned photoresist layer 540. The first sub-patterned photoresist layer 520 may include a first photoresist pattern structure 521 and a doped photoresist strip 400 protruding from the first photoresist pattern structure 521. The second sub-patterned photoresist layer 540 may include a second photoresist pattern structure that covers the first photoresist pattern structure 521 and the doped photoresist strip 400. The doped photoresist strip 400 can be used to limit the relative displacement between the first photoresist pattern structure 521 and the second photoresist pattern structure.

[0107] In this embodiment, by forming a patterned photoresist layer including a first sub-patterned photoresist layer and a second sub-patterned photoresist layer on a substrate, wherein the first sub-patterned photoresist layer includes a first photoresist pattern structure and a doped photoresist strip protruding from the first photoresist pattern structure, and the second sub-patterned photoresist layer includes a second photoresist pattern structure, the second photoresist pattern structure covering the first photoresist pattern structure and the doped photoresist strip, the unexpected effects achieved include: on the one hand, using the doped photoresist strip to restrict the relative positions between the first photoresist pattern structure and the second photoresist pattern structure. The method of fiber toughening of high aspect ratio photoresist patterned structures reduces defects such as delamination, tilting, or collapse that occur after development and rinsing, thus improving the stability of the photoresist patterned structures. On the other hand, the use of doped photoresist strips improves the conductivity of high aspect ratio photoresist patterned structures, reduces the negative charge accumulated on the surface of high aspect ratio photoresist patterned structures during development and rinsing, improves the measurement accuracy and imaging clarity during the measurement of high aspect ratio photoresist patterned structures, and reduces defects caused by adsorbed impurities on the surface of high aspect ratio photoresist patterned structures.

[0108] It is understood that the specific examples in this application are only intended to help those skilled in the art better understand the embodiments of this application, and are not intended to limit the scope of this application.

[0109] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0110] It is understood that the various embodiments described in this application can be implemented individually or in combination, and the embodiments of this application are not limited in this respect.

[0111] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0112] As should be understood from the several embodiments provided in this application, the disclosed semiconductor structure can be implemented in other ways. For example, the embodiments of the semiconductor structure described above are merely illustrative.

[0113] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A semiconductor structure, characterized by, The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

2. The semiconductor structure of claim 1, wherein, The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

3. The semiconductor structure of claim 2, wherein, The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

4. A method of manufacturing a semiconductor structure, characterized by, The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

5. The method of claim 4, wherein, The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

6. The method of claim 5, wherein, The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

7. The method of claim 6, wherein, The application relates to a method for manufacturing a patterned photoresist layer on a substrate.

8. The method of claim 4, wherein, The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer on a substrate. The application relates to a method for manufacturing a patterned photoresist layer Developing the first photoresist material layer after exposure to obtain the first photoresist pattern structure exposing part of the substrate and the doped photoresist strip protruding from the first photoresist pattern structure.

9. The method of claim 8, wherein, The patterning process of the second photoresist material layer to obtain the second sub-patterning photoresist layer exposing part of the substrate includes: According to the second exposure ratio, the second photoresist material layer is exposed according to the specified mask pattern; wherein the second exposure ratio is greater than the first exposure ratio; Developing the second photoresist material layer after exposure to obtain the second photoresist pattern structure exposing part of the substrate and the development by-product; Removing the development by-product to obtain the second sub-patterning photoresist layer exposing part of the substrate.

10. The method of claim 9, wherein, The first exposure ratio and the second exposure ratio are controlled by exposure energy parameters.

11. The method of claim 4, wherein, The surface modification process of the second sub-patterning photoresist layer to obtain the patterned photoresist layer exposing part of the substrate includes: Using a coupling agent to change the hydrophilicity of the surface of the second sub-patterning photoresist layer to obtain the patterned photoresist layer.

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