Wafer bump preparation process for improving uniformity of chemical plating layer
By retaining a photoresist protective film on the aluminum pads and combining it with refined electroplating and etching steps, the problems of uneven bump surface and short plating solution life in traditional processes are solved, thereby improving the electrical performance and production efficiency of the bumps.
Patent Information
- Application Number
- CN202511281850.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-09
- Publication Date
- 2025-12-16
AI Technical Summary
Traditional processes suffer from problems such as surface discoloration of bumps, shortened plating solution life, insufficient coating adhesion, and low wafer yield due to exposed aluminum pads.
By retaining a photoresist protective film on the aluminum pads to prevent aluminum from contacting the plating solution, and by combining refined electroplating, etching, and cleaning steps to form an independent bump structure, the uniformity and adhesion of the coating are ensured.
It significantly improves the thickness consistency and surface smoothness of the electroplating layer, extends the life of the plating solution, enhances the electrical connection reliability and production stability of the bumps, and reduces production costs and rework rate.
Abstract
Description
TECHNICAL FIELD
[0001] The present application belongs to the field of semiconductor manufacturing, and particularly relates to a wafer bump preparation process for improving the uniformity of a plated layer. BACKGROUND
[0002] In the field of semiconductor packaging, wafer bump technology plays a very key role. As a core component of flip-chip or board-level semiconductor packaging, wafer bump has become an industry standard for interconnection technology in current consumer electronics products. By building tiny metal bumps on the wafer surface, wafer bump builds a bridge for electrical connection between the chip and the substrate, greatly improving the packaging density, effectively reducing the signal transmission delay, significantly enhancing the electrical performance, and laying a solid foundation for the miniaturization and high performance development of electronic products. It is widely used in image processors, memory chips, ASICs (Application Specific Integrated Circuits), FPGAs (Field Programmable Gate Arrays) and other products.
[0003] Under normal circumstances, the surface of the wafer will have aluminum pads for testing purposes when it is shipped. These aluminum pads are key structures specially designed during wafer manufacturing to achieve effective testing. After the wafer completes the front-end process (such as photolithography, etching, ion implantation, etc.), it needs to be screened through comprehensive electrical testing to select qualified chips and eliminate products with functional defects or substandard performance. This process is called wafer-level testing.
[0004] These aluminum pads cause a series of problems in the subsequent processing flow of the wafer, especially in the gold plating process of the bump wafer. On the wafer cutting path, the aluminum pads are in an exposed state. When entering the plating process, due to the large potential difference between aluminum and other metals, this difference will cause the plating layer to be of different thicknesses and the bump surface to appear discolored during the plating process, seriously affecting the appearance quality and performance stability of the product. At the same time, the exposed aluminum pads on the cutting path will chemically react with the plating solution, accelerating the consumption and deterioration of the plating solution, greatly shortening the service life of the plating solution and significantly increasing the production cost. Moreover, the material properties of the aluminum pads make the bonding force between the gold layer and the aluminum pads poor when plating gold on their surface, and the gold layer is prone to peeling off during subsequent processing or use. This gold layer peeling problem will cause the electrical connection of the wafer to fail, thereby causing low yield of the wafer and causing huge economic losses to the production enterprise. SUMMARY
[0005] The present application aims to provide a wafer bump preparation process for improving the uniformity of a plated layer to solve the technical problems of discoloration of the bump surface, shortening of the plating solution life, insufficient plating layer bonding force, and low wafer yield caused by the exposure of aluminum pads in the traditional process.
[0006] To achieve the above object, the specific technical scheme of the wafer bump preparation process for improving the uniformity of chemical plating layer is as follows:
[0007] A wafer bump preparation process for improving the uniformity of chemical plating layer comprises the following steps:
[0008] S1, wafer substrate pretreatment: clean the wafer surface and deposit a conductive layer;
[0009] S2, first-time glue coating and patterning: coat photoresist on the surface of the conductive layer, and open the photoresist by photoetching to obtain an area to be electroplated;
[0010] S3, electroplating deposition: immerse the wafer in an electroplating solution to electroplating deposit a bump in the area to be electroplated;
[0011] S4, first-time cleaning and glue removal: remove the residual plating solution on the wafer surface, peel off the photoresist, and bake and dry;
[0012] S5, conductive layer etching: etch and remove the excess conductive layer to form an independent bump;
[0013] S6, second-time glue coating, exposure and development: coat photoresist on the surface of the conductive layer, expose it using a special mask for cutting tracks, and remove the photoresist after development to leave the photoresist covering the aluminum pads of the cutting tracks;
[0014] S7, surface cleaning after glue removal: clean the wafer surface and activate the bump surface;
[0015] S8, bump gold plating: chemically deposit a layer of gold anticorrosion layer on the bump surface;
[0016] S9, second-time cleaning and glue removal: remove the residual plating solution on the wafer surface, peel off the photoresist, and bake and dry.
[0017] As a further improvement of the present application, S6, second-time glue coating, exposure and development comprises the following steps:
[0018] S6.1, coat 20-30 μm of photoresist on the surface of the conductive layer at a spin-coating speed of 1000-3000 rpm, and bake at a temperature of 90-110°C for 30-60 seconds;
[0019] S6.2, selectively irradiate the photoresist on the wafer surface using a special mask for cutting tracks, cover the aluminum pads in the cutting tracks in the light-shielded area, and expose the photoresist at an energy of 150-300 mJ / cm²;
[0020] S6.3, immerse the exposed wafer in a developing solution for 40-80 seconds to remove the photoresist in the non-light-shielded area.
[0021] As a further improvement of the present application, Au-TiW conductive layer is deposited on the wafer surface in S1, the TiW layer is combined with the wafer substrate as an adhesion layer, and the Au layer is used as a conductive path for subsequent electroplating.
[0022] As a further improvement of the present application, the photoresist with a thickness of 20-50 μm is coated in S2, the spin coating speed is 1000-3000 rpm, and the baking temperature is 90-110 °C; the bump pattern opening is formed by the photoetching process, the exposure energy is 100-300 mJ / cm2, and the developing time is 60-180 seconds.
[0023] As a further improvement of the present application, the wafer is immersed in the gold-silver mixed electroplating solution in S3, the mass ratio of gold to silver in the electroplating solution is (1-3):(7-9), and the temperature is controlled at 30-50 °C; the electrochemical deposition is carried out at a current density of 0.2-0.8 ASD, the plating solution is circulated at a flow rate of 10-15 L / min, and ultrasonic vibration is applied at 10-30 Hz, and the gold-silver alloy bump with a height of 5-12 μm is formed after 1000-2400 S.
[0024] As a further improvement of the present application, the first cleaning and photoresist removal after S4 includes the following steps:
[0025] S4.1, the wafer is ultrasonically cleaned with pure water for 5-10 minutes at a frequency of 40-50 kHz to remove the surface plating solution residue;
[0026] S4.2, the wafer is immersed in an organic photoresist stripping solution at 60-80 °C for 10-20 minutes, assisted by ultrasonic oscillation at 20-30 kHz, to completely strip the photoresist in the non-electroplated area;
[0027] S4.3, the wafer after stripping the photoresist is rinsed with pure water for 5-10 minutes;
[0028] S4.4, the wafer after water washing is placed in a hot air oven, baked at 60-80 °C for 10-20 minutes to remove the surface moisture.
[0029] As a further improvement of the present application, the conductive layer etching in S5 includes the following steps:
[0030] S5.1, the wafer is immersed in a non-cyanide etching solution, etched at 25-35 °C for 10-30 seconds to dissolve the Au layer;
[0031] S5.2, the wafer is transferred to a hydrogen peroxide etching solution, etched at 25-35 °C for 20-60 seconds to dissolve the TiW layer;
[0032] S5.3, pure water rinsing for 5-10 minutes to remove the etching solution residue.
[0033] As a further improvement of the present application, the surface treatment after S7 stripping includes the following steps:
[0034] S7.1, plasma cleaning: place the wafer in a plasma cleaning chamber, and introduce a mixture of O2 and Ar to impact the wafer surface, with the pressure in the chamber maintained at 50-200 Pa to remove etching liquid residues and surface particles;
[0035] S7.2, pickling: immerse the wafer in an acidic solution to remove the oxide layer on the surface of the alloy bump by chemical reaction, and activate the surface of the bump;
[0036] S7.3, water washing: transfer the wafer to a cleaning tank, and use the QDR process to immerse it in pure water for 10-20 seconds, then quickly drain, repeat 3-5 times, and remove the acid liquid residues.
[0037] As a further improvement of the present application, in S8, the wafer is immersed in a gold plating solution, the temperature is controlled at 40-70℃, a thin gold layer is deposited on the surface of the bump, the plating time is 5-60 minutes, and the thickness of the gold layer is controlled at 0.05-0.5μm.
[0038] As a further improvement of the present application, the second cleaning after S9 stripping includes the following steps:
[0039] S9.1, use the QDR process to immerse the wafer in pure water for 10-20 seconds, then quickly drain, repeat 3-5 times, and remove the plating liquid residues;
[0040] S9.2, immerse the wafer in an organic stripping solution at 60-80℃ for 10-20 minutes, and assist with ultrasonic oscillation at 20-30 kHz to completely strip the photoresist in the non-electroplating area;
[0041] S9.3, rinse the wafer after stripping the photoresist with pure water for 5-10 minutes;
[0042] S9.4, use vacuum drying, the temperature is 40-80℃, the vacuum degree is ≤10 Pa, and the drying time is 20-60 minutes.
[0043] Advantages:
[0044] The "second photoresist coating and exposure" controls the accurate exposure and development of the special mask for the cutting path, retains a complete photoresist protective film on the surface of the aluminum pad in the cutting path, and completely isolates the aluminum pad from the plating solution. This design avoids the electrochemical reaction between aluminum and gold due to the potential difference in the traditional process, eliminates the problems of local discoloration on the surface of the bump and uneven thickness of the plating layer, and combines the chemical deposition process in the bump gold plating step to make the gold corrosion-resistant layer uniformly cover the surface of the bump in an undisturbed environment, significantly improving the thickness consistency and surface flatness of the plating layer, and laying a foundation for the electrical connection reliability of subsequent packaging.
[0045] S1 "wafer substrate pretreatment" provides a clean and stable substrate for subsequent processes through cleaning and conductive layer deposition; S2 "first glue coating and patterning" precisely defines the area to be electroplated to ensure the accuracy of the bump forming position; S3 "electroplating deposition" cooperates with S5 "conductive layer etching" to form an independent bump structure, avoiding electrical interference between adjacent bumps; S7 "surface cleaning after glue removal" provides a good adhesive substrate for gold plating layer through cleaning and activation treatment. This fine control of the whole process reduces the impact of process fluctuations on the final quality, greatly improving the stability and repeatability of the production process.
[0046] The photoresist protection design of S6 step avoids direct reaction of aluminum pads with plating solution, reduces the risk of plating solution pollution, and reduces the quality fluctuation of plated layer caused by changes in plating solution composition.
[0047] The protection of S6 step to the cutting path aluminum pad avoids the deterioration of the plating solution composition caused by the entry of aluminum elements into the plating solution, significantly prolongs the service life of the plating solution, and reduces the replacement frequency of the plating solution and the consumption of raw materials. At the same time, S5 "conductive layer etching" removes excess conductive layer to form independent bumps, reducing the deposition of invalid plated layer in the subsequent gold plating process, and improving the utilization rate of precious metal materials. The cleaning and glue removal process of each step effectively reduces the rework rate caused by quality problems, reduces the energy consumption and time cost in the production process, and improves the production economy. DETAILED DESCRIPTION
[0048] In order to better understand the purpose, structure and function of the present application, a further detailed description of the wafer bump preparation process for improving the uniformity of the plated layer is given.
[0049] Implementation example:
[0050] A wafer bump preparation process for improving the uniformity of the plated layer solves the problem of uneven gold plating layer on the bump surface by shielding the cutting path wafer self-provided aluminum pad in the process of plating gold layer on the bump surface. In the traditional process, the cutting path aluminum pad is directly exposed to the plating solution during the gold plating process, and the difference in standard electrode potential between aluminum and gold will cause spontaneous electrochemical reaction. Local galvanic corrosion will cause uneven deposition of gold layer on the bump surface, resulting in defects such as black spots and color difference. The process includes the following specific steps:
[0051] The standard size of 300 mm silicon wafer is selected as the substrate, deionized water and special semiconductor cleaning agent are mixed at a ratio of 1:10, and the wafer surface is cleaned for 20 minutes by combining spraying and ultrasonic oscillation to remove oil, dust and other impurity particles on the surface, providing a clean substrate for subsequent processes and reducing the influence of impurities on the quality of the plated layer. The physical vapor deposition (PVD) technology is used to deposit TiW layer and Au layer on the wafer surface in sequence to build Au-TiW conductive layer. The thickness of TiW layer is controlled at 50 nm, which acts as an adhesion layer and is tightly combined with the wafer substrate due to its good chemical activity, thereby enhancing the adhesion of the subsequent plated layer. The thickness of Au layer is 200 nm, which provides a low-resistance conductive path for subsequent electroplating to ensure the stability of current transmission. The deposited Au-TiW conductive layer optimizes the electrical performance of the wafer, ensuring uniform distribution of current during subsequent electroplating and improving the consistency of bump preparation.
[0052] A negative photoresist is selected to coat the conductive layer surface with a target thickness of 20 μm. By rotating coating method, the spin coating speed is set to 2000 rpm to make the photoresist evenly cover the conductive layer surface. After coating, the wafer is placed on a hot plate and pre-baked at 100°C for 10 minutes to promote the initial curing of the photoresist and enhance the adhesion to the substrate. Then, a photolithography equipment is used to expose the wafer to ultraviolet light with a wavelength of 365 nm, and the exposure energy is set to 200 mJ / cm² to transfer the designed bump pattern from the mask to the photoresist. After exposure, the wafer is immersed in a developer solution prepared by mixing tetramethylammonium hydroxide (TMAH) and deionized water at a ratio of 1:5, and the developing time is controlled at 80 seconds to remove the unexposed part of the photoresist, thereby opening the precise electroplating area on the photoresist. This ensures the precision and clarity of the lithography pattern, lays a foundation for subsequent electroplating to form size-accurate and regular-shaped bumps, and improves the precision and yield of bump preparation.
[0053] The prepared gold-silver mixed electroplating solution includes the following components and proportions: potassium gold cyanide (providing gold ions, concentration of 60 g / L), silver nitrate (providing silver ions, concentration of 240 g / L), potassium cyanide (complexing agent, concentration of 180 g / L), potassium carbonate (buffer, concentration of 30 g / L), potassium sodium tartrate (auxiliary complexing agent, concentration of 20 g / L), so that the mass ratio of gold salt to silver salt is 2:8, to ensure that the bump has good conductivity and oxidation resistance. The wafer is immersed in the electroplating solution, the temperature of the electroplating tank is maintained at 30°C, and electrochemical deposition is carried out at a current density of 0.2 ASD. A combination of magnetic stirring and a circulating pump is used to circulate the plating solution at a flow rate of 10 L / min to ensure uniform distribution of the plating solution components. At the same time, 20 Hz ultrasonic vibration is applied to promote the deposition of metal ions in the area to be electroplated and accelerate the reaction process. After 1000S of electroplating time, a gold-silver alloy bump with a height of 5 μm is successfully formed in the area to be electroplated.
[0054] The wafer after electroplating is placed in an ultrasonic cleaning tank containing deionized water, the ultrasonic frequency is set to 40 kHz, and the cleaning time is 5 minutes. The ultrasonic cavitation effect is used to completely remove the residual plating solution on the wafer surface. The cleaned wafer is immersed in an organic stripping solution at 80°C, the main component of the stripping solution is N-methyl pyrrolidone (NMP), the immersion time is 10 minutes, and 20 kHz ultrasonic oscillation is used to separate the photoresist from the wafer surface and completely strip the photoresist from the non-electroplated area. The wafer after stripping the photoresist is transferred to another deionized water tank and washed with flowing deionized water for 5 minutes to remove residual stripping solution. The wafer after water washing is placed in a hot air oven, the oven temperature is set to 60°C, and baking is performed for 10 minutes to remove water from the wafer surface and ensure that the wafer is dry.
[0055] The dried wafer is immersed in AURIFAB ET-9200 gold etching solution at a temperature of 25°C for 20 seconds to dissolve and remove excess Au layer. Then the wafer is quickly transferred to 30% hydrogen peroxide etching solution and continues to etch at 25°C for 30 seconds to dissolve the excess TiW layer. After etching is completed, the wafer is placed in a deionized water tank and washed with flowing deionized water for 5 minutes to completely remove the residual etching solution. Stepwise etching of the Au layer and TiW layer can accurately remove excess conductive layer material, form independent and regular bump structures, optimize the electrical performance and appearance of the bump, and improve the quality and yield of the product.
[0056] The previous photoresist coating process is repeated, and a special mask for the cutting track is used to shield the cutting track aluminum pad during exposure. The photoresist in the transparent area is not exposed to light; the photoresist in the transparent area undergoes a photochemical reaction after absorbing ultraviolet light energy, and the molecular structure changes from an insoluble state to a soluble state. The wafer is immersed in tetramethylammonium hydroxide (TMAH) developer, and under the action of the developer, the photoresist in the transparent area that has undergone a chemical change after exposure gradually dissolves and separates from the wafer surface.
[0057] After etching, the wafer is placed in the chamber of the plasma cleaning equipment, and a mixture of O2 and Ar with a volume ratio of 1:1 is introduced. The pressure in the chamber is maintained at 100 Pa, and the wafer surface is impacted by plasma for 10 minutes. The active oxygen radicals in the plasma react with the etched AlO (OH) and organic impurities to generate CO2 and H2O, and Ar⁺ ions physically bombard to remove surface particles. Subsequently, the wafer is immersed in an acidic solution prepared by mixing hydrochloric acid (HCl) and deionized water at a ratio of 1:20 for 5 minutes. The oxide layer on the surface of the alloy bump is removed by pickling to activate the bump surface and enhance the adhesion of the subsequent gold plating layer. After pickling, the wafer is transferred to a cleaning tank using the quick drain (QDR) process. The wafer is immersed in pure water for 10 seconds and then quickly drained. This process is repeated 5 times to completely remove the residual acid. The wafer surface is thoroughly cleaned and the bump surface is activated, providing a good substrate for subsequent bump gold plating and effectively improving the adhesion strength of the gold layer and the bump, reducing the risk of gold layer peeling.
[0058] The gold plating solution is prepared by mixing the following components: chloroauric acid (HAuCl4) 5g / L, potassium citrate 25g / L, potassium dihydrogen phosphate 15g / L, and the rest is deionized water. The cleaned wafer is immersed in the solution, and the temperature of the gold plating solution is controlled at 50°C. A thin gold layer is deposited on the bump surface through a self-catalytic reaction. The plating time is set to 30 minutes, and the gold layer thickness is accurately controlled at 0.2μm. The gold layer plated on the bump surface can significantly improve the oxidation resistance and conductivity of the bump, enhance the electrical performance and service life of the bump, and improve the overall performance and reliability of the product.
[0059] The QDR process is used again. After gold plating, the wafer is immersed in pure water for 10 seconds and then quickly drained. This process is repeated 5 times to completely remove the plating solution residue. The previous stripping process is repeated. The photoresist covering the cutting groove is separated from the wafer surface by using N-methyl pyrrolidone (NMP) stripping solution. After stripping, the residual stripping solution is removed by water washing. Subsequently, the wafer is placed in a vacuum oven. The oven temperature is set to 50°C, the vacuum degree is controlled to be ≤10 Pa, and the drying time is 30 minutes to ensure that the wafer is completely dry. The complete cleaning and vacuum drying process removes the residual plating solution, avoids the potential impact of residual substances on the performance of the bump, and reduces the risk of wafer surface oxidation in a vacuum environment, ensuring the stability of product quality, improving the yield and storage life of the product.
[0060] The bump preparation process of the present application shields the cutting groove aluminum pad by the photoresist protective film during the chemical plating process, eliminates the electrochemical reaction between aluminum and gold due to the potential difference, avoids discoloration defects such as color difference, spots or blackening on the surface of the bump, makes the color of the gold layer uniform and consistent, and improves the appearance quality and optical detection accuracy. At the same time, the interference of aluminum pad dissolution on the local environment of the plating solution is eliminated, combined with precise plating parameter control, the thickness deviation of the gold layer can be controlled within ±0.02 μm, the surface roughness (Ra) is reduced to below 0.02 μm, and the uniformity and consistency of the plating layer are significantly improved. The aluminum ions are effectively prevented from entering the plating solution, the composition of the plating solution is prevented from being contaminated and consumed, and the replacement frequency of the plating solution, the cost of raw materials and the amount of waste liquid treatment are greatly reduced. The production process reduces the rework rate and resource waste caused by aluminum pad interference, significantly improves the process stability and production efficiency. The problem of poor adhesion between the aluminum pad surface oxidation film and the gold layer is avoided from the root cause, and the risk of aluminum-gold interdiffusion to form brittle intermetallic compounds, which greatly improves the peel strength of the bump gold layer and enhances the mechanical reliability. The uniform and consistent gold layer provides stable contact resistance for the packaging process such as flip-chip soldering, reducing the risk of packaging failure caused by fluctuations in the quality of the plating layer. The completely protected aluminum pad ensures the accuracy of the subsequent testing process, avoids the impact of pad damage on chip performance testing, and further improves the reliability of the product throughout its life cycle.
[0061] It can be understood that the present application is described by some embodiments, and those skilled in the art know that various changes or equivalent replacements can be made to these features and embodiments without departing from the spirit and scope of the present application. In addition, these features and embodiments can be modified to adapt to specific conditions and materials under the guidance of the present application without departing from the spirit and scope of the present application. Therefore, the present application is not limited by the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of the present application are within the scope of the present application.
Claims
1. A wafer bump fabrication process for improving the uniformity of the electroplating layer, characterized in that, The method comprises the following steps: S1, wafer substrate pretreatment: clean the wafer surface and deposit a conductive layer; S2, first-time glue coating and patterning: coat photoresist on the surface of the conductive layer, and form an opening of the bump pattern on the photoresist by photoetching to obtain a region to be plated; S3, electroplating deposition: immerse the wafer in an electroplating solution to electroplating deposit a bump in the region to be plated; S4, first-time cleaning and photoresist removal: remove the residual plating solution on the wafer surface, peel off the photoresist, and bake and dry; S5, conductive layer etching: etch and remove the excess conductive layer to form an independent bump; S6, second-time glue coating, exposure and development: coat photoresist on the surface of the conductive layer, expose it by using a special mask for cutting tracks, and remove the photoresist after development to leave the photoresist covering the aluminum pads of the cutting tracks; S7, surface cleaning after photoresist removal: clean the wafer surface and activate the bump surface; S8, bump gold plating: chemically deposit a layer of gold anticorrosion layer on the bump surface; S9, second-time cleaning and photoresist removal: remove the residual plating solution on the wafer surface, peel off the photoresist, and bake and dry.
2. The wafer bumping process for improving the uniformity of an electroplated layer according to claim 1, wherein S6, second-time glue coating, exposure and development, comprises the following steps: S6.1, coat 20-30 μm photoresist on the surface of the conductive layer at a spin coating speed of 1000-3000 rpm, and bake at a temperature of 90-110 ℃ for 30-60 seconds; S6.2, selectively irradiate the photoresist on the wafer surface by using a special mask for cutting tracks, cover the aluminum pads in the cutting tracks in the light-shielded area, and the exposure energy is 150-300 mJ / cm2; S6.3, immerse the wafer after exposure in a developing solution for 40-80 seconds to remove the photoresist in the non-light-shielded area.
3. The process for preparing wafer bump for improving uniformity of electroplated layer according to claim 1, wherein In S1, the Au-TiW conductive layer is deposited on the wafer surface, the TiW layer serves as an adhesion layer to combine with the wafer substrate, and the Au layer serves as a conductive path for subsequent electroplating.
4. The wafer bump fabrication process for improving the uniformity of the electroplated coating according to claim 1, characterized in that, In S2, the photoresist with a thickness of 20-50 μm is coated at a spin coating speed of 1000-3000 rpm and a baking temperature of 90-110 ℃; the bump pattern opening is formed by a photoetching process, the exposure energy is 100-300 mJ / cm2, and the development time is 60-180 seconds.
5. The process for preparing wafer bump for improving uniformity of electroplated layer according to claim 1, wherein In S3, the wafer is immersed in a gold-silver mixed electroplating solution, the mass ratio of gold to silver in the electroplating solution is (1-3):(7-9), the temperature is controlled at 30-50 ℃; the electrochemical deposition is carried out at a current density of 0.2-0.8 ASD, the plating solution is circulated at a flow rate of 10-15 L / min, ultrasonic vibration is applied at 10-30 Hz, and a gold-silver alloy bump with a height of 5-12 μm is formed after 1000-2400 S.
6. The wafer bump fabrication process for improving the uniformity of the electroplated coating according to claim 1, characterized in that, S4, first-time cleaning and photoresist removal, comprises the following steps: S4.1, ultrasonically clean the wafer in pure water for 5-10 minutes at a frequency of 40-50 kHz to remove the residual plating solution on the surface; S4.2, immerse the wafer in an organic photoresist removal solution at 60-80 ℃ for 10-20 minutes, and assist with ultrasonic oscillation at 20-30 kHz to completely peel off the photoresist in the non-plating area; S4.3, rinse the wafer after peeling off the photoresist in pure water for 5-10 minutes; S4.4, place the wafer after water rinsing in a hot air oven, bake at 60-80 ℃ for 10-20 minutes, and remove the surface moisture.
7. The wafer bump fabrication process for improving the uniformity of the electroplated coating according to claim 3, characterized in that, S5, conductive layer etching, comprises the following steps: S5.1, immerse the wafer in non-cyan etching solution, etch for 10-30 seconds at 25-35°C, dissolve the Au layer; S5.2, transfer the wafer to the hydrogen peroxide etching solution, etch for 20-60 seconds at 25-35°C, dissolve the TiW layer; S5.3, rinse with pure water for 5-10 minutes to remove etching solution residue.
8. The wafer bump fabrication process for improving the uniformity of the electroplated coating according to claim 1, characterized in that, S7 post-debinding surface treatment includes the following steps: S7.1, plasma cleaning: place the wafer in a plasma cleaning chamber, introduce a mixture of O2 and Ar gas to impact the wafer surface, maintain the pressure in the chamber at 50-200 Pa to remove etching solution residue and surface particles; S7.2, pickling: immerse the wafer in an acidic solution to remove the oxide layer on the surface of the alloy bump by chemical reaction, and activate the bump surface; S7.3, water washing: transfer the wafer to a cleaning tank, use QDR process, immerse in pure water for 10-20 seconds and then drain quickly, repeat 3-5 times to remove acid residue.
9. The wafer bump fabrication process for improving the uniformity of the electroplated coating according to claim 1, characterized in that, S8, immerse the wafer in gold plating solution, control the temperature at 40-70°C, deposit a thin gold layer on the surface of the bump, plating time 5-60 minutes, control the gold layer thickness 0.05-0.5 μm.
10. The wafer bump fabrication process for improving the uniformity of the electroplated coating according to claim 1, characterized in that, S9 post-second cleaning debinding includes the following steps: S9.1, use QDR process, immerse in pure water for 10-20 seconds and then drain quickly, repeat 3-5 times to remove plating solution residue; S9.2, immerse the wafer in 60-80°C organic debinding solution for 10-20 minutes, assisted by 20-30 kHz ultrasonic oscillation, completely strip the photoresist in the non-electroplated area; S9.3, rinse the wafer after stripping the photoresist with pure water for 5-10 minutes; S9.4, use vacuum drying, temperature 40-80°C, vacuum degree ≤10 Pa, drying time 20-60 minutes.