Semiconductor device, terminal structure thereof and manufacturing method of semiconductor device

Abstract

The invention relates to a semiconductor device, a terminal structure thereof and a manufacturing method of the semiconductor device, and the terminal structure comprises first JTE rings which are arranged close to a main junction of the semiconductor device, the number of the first JTE rings is more than two, and the distances between the first JTE rings and the main junction are different; the doping concentration of the floating ring is larger than that of the first JTE rings, and the floating ring is located between the main junction and the second first JTE ring; the number of the second JTE rings is more than three, the distance between each second JTE ring and the main junction is different, the distance between any second JTE ring and the main junction is larger than the distance between any first JTE ring and the main junction, and the doping concentration of the second JTE rings is smaller than that of the first JTE rings. Compared with a traditional Multi-ring, the multi-ring type JTE terminal has a smaller size, and compared with a traditional multi-ring type JTE terminal, the multi-ring type JTE terminal has a lower terminal surface electric field and better reliability.

Description

Technical Field

[0001] This invention relates to semiconductor devices, particularly to a semiconductor device, a terminal structure of a semiconductor device, and a method for manufacturing the terminal structure of a semiconductor device. Background Technology

[0002] SiC (silicon carbide)-based MOSFETs (metal-oxide-semiconductor field-effect transistors) have a wider bandgap, resulting in higher breakdown voltages for the same epitaxial thickness. Compared to traditional silicon (Si)-based MOSFETs, they also have lower on-resistance at the same breakdown voltage (BV). With market expansion, there is a growing demand for products with even higher voltage ratings, such as 1700V and 3300V.

[0003] Because the dopant atoms in SiC have a small thermal diffusion coefficient, the curvature of the PN junction edge in SiC-based devices is extremely small, making the devices prone to breakdown at the edge due to strong electric fields. Termination techniques are widely used to effectively improve the breakdown voltage of the devices.

[0004] One exemplary termination structure features multiple P+ rings outside the main junction, i.e., a multi-ring structure. However, this requires a larger chip area. Another exemplary JTE (Junction Termination Extension) structure, while smaller in size and saving terminal area, has lower reliability. Summary of the Invention

[0005] Therefore, it is necessary to provide a terminal structure for semiconductor devices that are small in size and have high reliability.

[0006] A termination structure for a semiconductor device includes: a first JTE ring disposed close to the main junction of the semiconductor device, wherein there are two or more first JTE rings, and the spacing between each first JTE ring and the main junction is different; a floating ring, wherein the doping concentration of the floating ring is greater than the doping concentration of each first JTE ring, the floating ring being located between the main junction and a second first JTE ring, the second first JTE ring being the second closest to the main junction among all the first JTE rings; and a second JTE ring, wherein there are three or more second JTE rings, and the spacing between each second JTE ring and the main junction is different, and the spacing between any second JTE ring and the main junction is greater than the spacing between any first JTE ring and the main junction, and the doping concentration of each second JTE ring is less than the doping concentration of each first JTE ring; wherein the conductivity type of each first JTE ring, the floating ring, and each second JTE ring is the same.

[0007] The termination structure of the aforementioned semiconductor device employs a JTE multi-ring structure, which effectively increases the electric field strength near the main junction while reducing the electric field strength at the periphery of the termination. The use of two or more first JTE rings mitigates the increase in edge electric field strength, preventing premature breakdown at the periphery of the first JTE ring when its doping concentration is too high. The second JTE ring in the multi-ring structure alleviates the rapid increase in surface electric field at the periphery of the termination. The floating ring between the main junction and the second first JTE ring regulates the widening of the depletion region, increasing the peak value (BV). Therefore, the termination structure of the aforementioned semiconductor device has a smaller size compared to traditional multi-ring terminations, and a lower surface electric field and better reliability compared to traditional JTE terminations.

[0008] In one embodiment, the doping concentration of the first JTE ring ranges from 1E16 to 9E17 / cm³. 3 .

[0009] In one embodiment, the doping concentration of the second JTE ring is in the range of 6E15~7E17 / cm². 3 .

[0010] In one embodiment, the distance between the floating ring and the main knot is 0.5 micrometers to 1.5 micrometers.

[0011] In one embodiment, the width of the floating ring is 1 micrometer to 5 micrometers.

[0012] In one embodiment, the knot depth of the floating ring is greater than the knot depth of each of the first JTE rings.

[0013] In one embodiment, the number of the first JTE rings is 2 to 4.

[0014] In one embodiment, the spacing between adjacent first JTE rings is 0.5 micrometers to 1.4 micrometers.

[0015] In one embodiment, the number of the second JTE rings is 3 to 8.

[0016] In one embodiment, the spacing between adjacent second JTE rings is 0.5 micrometers to 6 micrometers.

[0017] In one embodiment, the junction depth of each of the first JTE rings is 0.5 micrometers to 1.1 micrometers.

[0018] In one embodiment, each of the second JTE rings has the same junction depth as each of the first JTE rings.

[0019] In one embodiment, the terminal structure of the semiconductor device further includes a first conductivity type region, wherein each of the first JTE rings, the floating ring, and each of the second JTE rings is located in the first conductivity type region and has a second conductivity type, wherein the first conductivity type and the second conductivity type are opposite conductivity types.

[0020] It is also necessary to provide a semiconductor device, including the terminal structure of the semiconductor device described in any of the foregoing embodiments, wherein the semiconductor device is a silicon carbide-based metal oxide semiconductor field-effect transistor.

[0021] The aforementioned semiconductor device employs a JTE multi-ring structure, which effectively increases the electric field strength near the main junction while reducing the electric field strength around the terminal. The use of two or more first JTE rings mitigates the increase in edge electric field strength, preventing premature breakdown around the first JTE ring when its doping concentration is too high. The second JTE ring in the multi-ring structure alleviates the rapid rise in surface electric field around the terminal. The floating ring between the main junction and the second first JTE ring regulates the widening of the depletion region, increasing the peak value (BV). Therefore, the termination structure of this semiconductor device has a smaller size compared to traditional multi-ring terminations, a lower terminal surface electric field compared to traditional JTE terminations, and better reliability.

[0022] It is also necessary to provide a method for manufacturing the terminal structure of a semiconductor device.

[0023] A method for manufacturing a terminal structure of a semiconductor device includes: patterning a first photomask and performing ion implantation to form a main junction and a floating ring; patterning a second photomask and performing ion implantation to form a first JTE ring near the main junction; and patterning a third photomask and performing ion implantation to form a second JTE ring; wherein the number of first JTE rings is two or more, and the spacing between each first JTE ring and the main junction is different; the doping concentration of the floating ring is greater than the doping concentration of each first JTE ring, and the floating ring is located at the... Between the main junction and the second first JTE ring, the second first JTE ring is the second closest to the main junction among all the first JTE rings; there are three or more second JTE rings, and the distance between each second JTE ring and the main junction is different, and the distance between any second JTE ring and the main junction is greater than the distance between any first JTE ring and the main junction, and the doping concentration of each second JTE ring is less than the doping concentration of each first JTE ring; the conductivity type of each first JTE ring, the floating ring, and each second JTE ring is the same.

[0024] The manufacturing method of the aforementioned semiconductor device termination structure, forming a JTE multi-ring structure, can effectively increase the electric field strength near the main junction while reducing the electric field strength at the periphery of the termination. Having two or more first JTE rings mitigates the increase in edge electric field strength, preventing premature breakdown at the periphery of the first JTE ring when its doping concentration is too high. The second JTE ring in the multi-ring structure can alleviate the rapid increase in the surface electric field at the periphery of the termination. The floating ring between the main junction and the second first JTE ring can regulate the widening of the depletion region and increase the peak value (BV). Therefore, the termination structure of the aforementioned semiconductor device has a smaller size compared to traditional multi-ring terminations, a lower surface electric field compared to traditional JTE terminations, and better reliability. Attached Figure Description

[0025] To better describe and illustrate embodiments and / or examples of the inventions disclosed herein, reference may be made to one or more accompanying drawings. Additional details or examples used to describe the drawings should not be considered as limiting the scope of any of the disclosed inventions, the currently described embodiments and / or examples, or the best mode of these inventions as currently understood.

[0026] Figure 1 It is a top view of the active region and terminal structure of a semiconductor device;

[0027] Figure 2 This is a cross-sectional schematic diagram of the terminal structure of a semiconductor device in one embodiment of this application;

[0028] Figure 3 This is a plan view of the ring structure;

[0029] Figure 4a This application compares the BV window of its embodiments with those of traditional JTE structure termination and traditional JTE ring termination at different doping concentrations in the JTE ring. Figure 4b This is a comparison of the surface electric field intensity of the embodiments of this application with that of a traditional JTE structure terminal and a traditional JTE ring terminal;

[0030] Figure 5 This is a flowchart of a method for manufacturing a terminal structure of a semiconductor device according to an embodiment of this application. Detailed Implementation

[0031] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0033] It should be understood that when a component or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other components or layers, it may be directly on, adjacent to, connected to, or coupled to other components or layers, or there may be intervening components or layers. Conversely, when a component is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other components or layers, there are no intervening components or layers. The term "connection" in this specification, if referring to the transmission of electrical signals or data between connected circuits, modules, units, etc., should be understood as "electrical connection," "communication connection," etc. It should be understood that although the terms first, second, third, etc., may be used to describe various components, parts, areas, layers, and / or portions, these components, parts, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one component, part, area, layer, or portion from another component, part, area, layer, or portion. Therefore, without departing from the teachings of this invention, the first element, component, region, layer or portion discussed below may be represented as a second element, component, region, layer or portion.

[0034] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “under” the other element or feature will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0035] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It will be understood that “at least one” means one or more, and “a plurality” means two or more. “At least a portion of an element” means part or all of an element. It should also be understood that the terms “compose” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0036] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of ideal embodiments (and intermediate structures). Thus, variations in the shape shown can be anticipated due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the invention should not be limited to the specific shapes of the regions shown herein, but include shape deviations due to, for example, manufacturing processes. For example, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, the buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to show the actual shapes of the regions of the device and are not intended to limit the scope of the invention.

[0037] The semiconductor terminology used in this article is the technical terminology commonly used by those skilled in the art. For example, for P-type and N-type impurities, in order to distinguish the doping concentration, P+ type represents heavily doped P-type, P type represents moderately doped P-type, P- type represents lightly doped P-type, N+ type represents heavily doped N-type, N type represents moderately doped N-type, and N- type represents lightly doped N-type.

[0038] Figure 1 This is a top view of the active region 200 and the termination structure 300 of the semiconductor device. The termination structure 300 surrounds the active region 200 of the semiconductor device in a ring shape on a plane. The function of the termination structure 300 is to ensure the reverse breakdown voltage of the device and improve the reverse breakdown reliability.

[0039] As described in the background section, multi-ring structures have relatively low reliability, requiring increased terminal length to optimize reliability, thus sacrificing chip area. While JTE structures can effectively reduce terminal size and chip area, they suffer from lower reliability, a smaller process window, and cannot be optimized by appropriately increasing terminal size. Therefore, traditional, reliable terminal structures tend to have larger chip sizes, while smaller chip structures suffer from lower reliability and a smaller process window.

[0040] This application proposes an innovative termination structure, employing a floating ring combined with a unique Double JTE structure. Its termination size is smaller than that of the Multi-ring structure, while maintaining similar reliability. Compared to the JTE structure, it offers better reliability and a lower surface electric field while maintaining the same breakdown voltage.

[0041] Figure 2 This is a cross-sectional schematic diagram of the terminal structure of a semiconductor device according to an embodiment of this application. The left side of the figure shows the active region closer to the semiconductor device, and the right side shows the active region farther from the semiconductor device. This application specification will... Figure 1 The side closer to the active region is called the inner side, and the side farther from the active region is called the outer side. The termination structure of the semiconductor device includes a floating ring 132, a first JTE ring 140, and a second JTE ring 150. The first JTE ring 140 is located close to the main junction 210 of the semiconductor device, and there are two or more first JTE rings 140, with each first JTE ring 140 having a different distance from the main junction 210. Figure 2 In the embodiment shown, the first JTE ring 140 has two rings, including a JTE ring 142 close to the main knot 210 and a JTE ring 144 located outside the JTE ring 142. The JTE ring 144 is the second closest to the main knot 210 among the first JTE rings 140.

[0042] The doping concentration of the floating ring 132 is greater than that of the first JTE ring 140. The floating ring 132 is located between the main junction 210 and the second first JTE ring (i.e., JTE ring 144).

[0043] There are three or more second JTE rings 150, and the distance between each second JTE ring 150 and the main junction 210 is different. Furthermore, the distance between any second JTE ring 150 and the main junction 210 is greater than the distance between any first JTE ring 140 and the main junction 210; that is, the second JTE ring 150 is located outside the first JTE ring 140. The doping concentration of the second JTE ring 150 is lower than the doping concentration of each first JTE ring 140. The first JTE ring 140, the floating ring 132, and the second JTE ring 150 have a second conductivity type. Figure 2 In the embodiment shown, the second conductivity type is P-type and the first conductivity type is N-type.

[0044] The termination structure of the aforementioned semiconductor device employs a JTE multi-ring structure, which effectively increases the electric field strength near the main junction 210 while reducing the electric field strength around the termination. Having two or more first JTE rings 140 mitigates the increase in edge electric field strength, preventing premature breakdown around the first JTE ring 140 when its doping concentration is too high. The second JTE ring 150 of the multi-ring structure alleviates the rapid increase in surface electric field around the termination. The floating ring 132 between the main junction 210 and the second first JTE ring (i.e., JTE ring 144) regulates the widening of the depletion region, increasing the peak BV. Therefore, the termination structure of the aforementioned semiconductor device has a smaller size compared to traditional multi-ring terminations, a lower termination surface electric field compared to traditional JTE terminations, better reliability, and can accommodate process windows.

[0045] exist Figure 2 In the illustrated embodiment, the termination structure of the semiconductor device further includes a first conductivity type region 120. A first JTE ring 140, a floating ring 132, and a second JTE ring 150 are located within the first conductivity type region 120. In one embodiment of this application, the first conductivity type region 120 is an N-type epitaxial layer.

[0046] exist Figure 2 In the illustrated embodiment, the termination structure of the semiconductor device further includes a substrate 110. A first conductivity type region 120 is located on the substrate 110.

[0047] In one embodiment of this application, the first JTE ring (i.e., JTE ring 142) is in direct contact with the main junction 210.

[0048] In one embodiment of this application, the distance between the floating ring 132 and the main junction 210 is 0.5 micrometers to 1.5 micrometers. In one embodiment of this application, the width of the floating ring 132 is 1 micrometer to 5 micrometers. In one embodiment of this application, the junction depth of the floating ring 132 is greater than the junction depth of the first JTE ring 140 and the second JTE ring 150. In one embodiment of this application, the floating ring 132 and the main junction 210 are formed using the same photomask in the same photolithography and ion implantation step. In one embodiment of this application, the floating ring 132 is located between the inner and outer sides of the JTE ring 142.

[0049] In one embodiment of this application, the number of first JTE rings 140 is 2 to 4. In another embodiment of this application, the doping concentration of the first JTE rings 140 ranges from 1E16 to 9E17 / cm³. 3 In one embodiment of this application, the ring spacing of the first JTE ring 140 is 0.5 micrometers to 1.4 micrometers.

[0050] In one embodiment of this application, the number of second JTE rings 150 is 3 to 8. In another embodiment of this application, the doping concentration of the second JTE rings 150 ranges from 6E15 to 7E17 / cm³. 3 The doping concentration is less than that of the first JTE ring 140. In one embodiment of this application, the ring spacing of the second JTE ring 150 is 0.5 micrometers to 6 micrometers.

[0051] In one embodiment of this application, the junction depth of the first JTE ring 140 is 0.5 micrometers to 1.1 micrometers. In another embodiment of this application, the junction depth of the second JTE ring 150 is the same as that of the first JTE ring 140.

[0052] In one embodiment of this application, the first JTE ring 140 is a nested ring structure, that is, the first JTE ring 140 farther from the main junction (e.g., JTE ring 144) is located outside the first JTE ring 140 closer to the main junction (e.g., JTE ring 142), as shown below. Figure 3 As shown. In one embodiment of this application, the second JTE ring 150 is also a collar structure.

[0053] This application proposes a semiconductor device having the terminal structure described in any of the foregoing embodiments. In one embodiment of this application, the semiconductor device is a silicon carbide-based metal oxide semiconductor field-effect transistor.

[0054] Figure 4a This is a comparison of the BV window of the embodiments of this application with that of traditional JTE structure terminals and traditional JTE ring terminals at different doping concentrations of the JTE ring, where the horizontal axis is the doping concentration of the JTE ring and the vertical axis is BV. Figure 4b This is a comparison of the surface electric field intensity of the embodiments of this application with that of a traditional JTE structure terminal and a traditional JTE ring terminal, where the horizontal axis represents the distance from the active region and the vertical axis represents the electric field intensity. Figure 4a The increments of each scale division on the central coordinate axis are the same. Figure 4b The increments of each scale on the coordinate axis are the same. In traditional JTE structures, the electric field increases rapidly at the periphery of the terminal, but the electric field strength is lower in the middle section of the terminal; the peak BV essentially depends on the rapid increase in the electric field at the terminal edge. However, the terminal structure of this application adopts a JTE multi-ring structure, which can effectively improve the electric field strength near the main junction (i.e.,...) Figure 2 The electric field strength on the left side is reduced, while the area surrounding the terminal (i.e., Figure 2 The electric field strength on the right side.

[0055] according to Figure 4aAs can be seen, the traditional JTE structure is a single-ring JTE, which is prone to premature breakdown at the periphery of the JTE ring after the JTE ring concentration reaches a certain level. To address this, this application embodiment adds at least one first JTE ring to mitigate the increase in edge electric field strength.

[0056] The width of the floating ring can effectively adjust the rate of depletion region expansion. Appropriately increasing the width of the floating ring can effectively widen the depletion region, appropriately compensating for the decrease in peak voltage (BV) caused by the excessively large drop in the electric field around the terminal, which fails to provide effective withstand voltage. Therefore, in this embodiment, a floating ring 132 is provided between the main junction 210 and the JTE ring 144 to adjust the widening of the depletion region and increase the peak voltage (BV). By providing two or more first JTE rings 140, premature breakdown caused by excessive concentration of the first JTE ring 140 is mitigated. The multi-ring structure of the second JTE ring 150 mitigates the rapid increase in the electric field on the surface around the terminal.

[0057] This application provides a method for manufacturing a terminal structure of a semiconductor device, which can be used to manufacture the terminal structure of the semiconductor device described in any of the foregoing embodiments. Figure 5 This is a flowchart of a method for manufacturing a terminal structure of a semiconductor device according to an embodiment of this application, including the following steps:

[0058] S510 is patterned using a first photomask and then ion implanted to form the main junction and floating ring.

[0059] In one embodiment of this application, an implantation window is formed by photolithography using a first photomask, and then ions of a second conductivity type are implanted to form a main junction 210 and a floating ring 132.

[0060] S520 is patterned using a second photomask and then ion implanted to form the first JTE ring.

[0061] In one embodiment of this application, an implantation window is formed by photolithography using a second photomask, and then ions of a second conductivity type are implanted to form a first JTE ring 140 near the main junction 210. There are two or more first JTE rings 140, and the distance between each first JTE ring 140 and the main junction 210 is different. The doping concentration of the floating ring 132 is greater than the doping concentration of the first JTE ring 140. The floating ring 132 is located between the main junction 210 and the JTE ring 144.

[0062] S530 is patterned using a third photomask and then ion implanted to form a second JTE ring.

[0063] In one embodiment of this application, an implantation window is formed by photolithography using a second photomask, and then ions of a second conductivity type are implanted to form a second JTE ring 150. There are three or more second JTE rings 150, and the distance between each second JTE ring 150 and the main junction 210 is different. Furthermore, the distance between any second JTE ring 150 and the main junction 210 is greater than the distance between any first JTE ring 140 and the main junction 210. The doping concentration of the second JTE rings 150 is less than the doping concentration of each first JTE ring 140.

[0064] The manufacturing method of the aforementioned semiconductor device termination structure, forming a JTE multi-ring structure, can effectively increase the electric field strength near the main junction while reducing the electric field strength at the periphery of the termination. Having two or more first JTE rings mitigates the increase in edge electric field strength, preventing premature breakdown at the periphery of the first JTE ring when its doping concentration is too high. The second JTE ring in the multi-ring structure can alleviate the rapid increase in the surface electric field at the periphery of the termination. The floating ring between the main junction and the second first JTE ring can regulate the widening of the depletion region and increase the peak value (BV). Therefore, the termination structure of the aforementioned semiconductor device has a smaller size compared to traditional multi-ring terminations, a lower surface electric field compared to traditional JTE terminations, and better reliability.

[0065] In one embodiment of this application, after step S530, a thermal annealing step is further included. After annealing, the remaining conventional MOS process flow can be performed.

[0066] In one embodiment of this application, the following steps may be sequentially included before step S510: performing photolithography and implantation of the P-well; performing channel oxidation or sidewall (spacer) processing; and performing NSD implantation. In one embodiment of this application, step S510 may be performed in the same step as the photolithography and implantation of the PSD after NSD implantation.

[0067] The manufacturing method of the semiconductor device terminal structure in this application is based on the same inventive concept as the semiconductor device terminal structure. For details not specifically described in the manufacturing method of the semiconductor device terminal structure, please refer to the above introduction of the semiconductor device terminal structure.

[0068] It should be understood that although the steps in the flowchart of this application are shown sequentially as indicated by the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowchart of this application may include multiple steps or multiple stages, which are not necessarily completed at the same time, but may be executed at different times, and the execution order of these steps or stages is not necessarily sequential, but may be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0069] In the description of this specification, references to terms such as "some embodiments," "other embodiments," and "ideal embodiments" indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0070] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0071] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A termination structure for a semiconductor device, characterized in that, include: The first JTE ring is located close to the main junction of the semiconductor device. There are two or more first JTE rings, and the distance between each first JTE ring and the main junction is different. A floating ring, wherein the doping concentration of the floating ring is greater than that of each of the first JTE rings, the floating ring is located between the main junction and the second first JTE ring, and the second first JTE ring is the second closest to the main junction among the first JTE rings; There are three or more second JTE rings. The distance between each second JTE ring and the main junction is different. The distance between any second JTE ring and the main junction is greater than the distance between any first JTE ring and the main junction. The doping concentration of each second JTE ring is less than the doping concentration of each first JTE ring. The first JTE ring, the floating ring, and the second JTE ring all have the same conductivity type.

2. The termination structure of the semiconductor device according to claim 1, characterized in that, The doping concentration of the first JTE ring ranges from 1E16 to 9E17 / cm³. 3 ; and / or The doping concentration of the second JTE ring ranges from 6E15 to 7E17 / cm². 3 .

3. The termination structure of the semiconductor device according to claim 1, characterized in that, The distance between the floating ring and the main knot is 0.5 micrometers to 1.5 micrometers; and / or The width of the floating ring is 1 micrometer to 5 micrometers; and / or The knot depth of the floating ring is greater than the knot depth of each of the first JTE rings.

4. The termination structure of the semiconductor device according to claim 1, characterized in that, The number of the first JTE rings is 2 to 4; and / or The spacing between adjacent first JTE rings is 0.5 micrometers to 1.4 micrometers.

5. The termination structure of the semiconductor device according to claim 1, characterized in that, The number of the second JTE rings is 3 to 8; and / or The spacing between adjacent second JTE rings is 0.5 micrometers to 6 micrometers.

6. The termination structure of the semiconductor device according to claim 1, characterized in that, The junction depth of each of the first JTE rings is 0.5 micrometers to 1.1 micrometers; and / or Each second JTE ring has the same junction depth as each first JTE ring.

7. The termination structure of the semiconductor device according to claim 1, characterized in that, It also includes a first conductivity type region, in which each of the first JTE rings, the floating ring, and each of the second JTE rings is located in the first conductivity type region and has a second conductivity type, wherein the first conductivity type and the second conductivity type are opposite conductivity types.

8. The termination structure of the semiconductor device according to claim 1, characterized in that, One of the first JTE rings is in direct contact with the main junction.

9. A semiconductor device, characterized in that, The terminal structure includes any one of the semiconductor devices according to claims 1-8, wherein the semiconductor device is a silicon carbide-based metal oxide semiconductor field-effect transistor.

10. A method for manufacturing a terminal structure of a semiconductor device, comprising: Patterning is performed using a first photomask, followed by ion implantation to form the main junction and floating ring; Patterning is performed using a second photomask, followed by ion implantation to form a first JTE ring near the main junction; Patterning is performed using a third photomask, followed by ion implantation to form a second JTE ring; In this configuration, there are two or more first JTE rings, each with a different distance between it and the main junction; the doping concentration of the floating ring is greater than that of each first JTE ring, and the floating ring is located between the main junction and a second first JTE ring, which is the second closest to the main junction among all the first JTE rings; there are three or more second JTE rings, each with a different distance between it and the main junction, and the distance between any second JTE ring and the main junction is greater than the distance between any first JTE ring and the main junction; the doping concentration of each second JTE ring is less than that of each first JTE ring; and all the first JTE rings, the floating rings, and the second JTE rings have the same conductivity type.

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