Solar cell slice, preparation method of solar cell slice and photovoltaic module

Abstract

The embodiment of the invention provides a solar cell slice, a preparation method of the solar cell slice and a photovoltaic module, and the preparation method comprises the steps: providing a solar cell initial structure, and carrying out the thinning of a preset region of the solar cell initial structure through a first laser according to a first cutting width; the PN junction in the preset area is removed through a wet etching process, an isolation groove with a tower footing structure is obtained in the front face of the solar cell initial structure, the isolation groove penetrates through the crystalline silicon substrate in the first direction, and meanwhile the tower footing structure is formed on the back face of the solar cell initial structure; respectively forming a functional film layer and an electrode on the back surface and the front surface of the solar cell initial structure; according to the invention, the second laser is used for cutting the isolation groove according to the second cutting width to obtain the solar cell slice with the step-shaped edge, and the solar cell slice does not need to be subjected to independent section passivation treatment, so that the technological process is simplified, and the production yield is also improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of solar cells, and particularly relates to a solar cell slice, a preparation method of the solar cell slice and a photovoltaic module. BACKGROUND

[0002] The passivated contact solar cell is a kind of solar cell based on selective carrier transport, and has wide application prospects.

[0003] At present, the passivated contact solar cell is mostly designed as a solar cell slice, that is, a whole cell is formed into a patterned cell with cutting mark lines after screen printing, and then at least two solar cell slices are obtained by cutting along the cutting seam after testing and sorting. However, laser thermal ablation and mechanical damage generated in the laser cutting process will generate a large number of defects on the cutting surface of the cell slice, and how to efficiently passivate the cutting surface becomes a technical problem to be solved. SUMMARY

[0004] In order to solve the above technical problems, the present application discloses a solar cell slice, a preparation method of the solar cell slice and a photovoltaic module, so as to efficiently passivate the cutting surface of the solar cell slice.

[0005] In a first aspect, the present application provides a preparation method of a solar cell slice, comprising the following steps:

[0006] providing a solar cell initial structure, the solar cell initial structure comprising a crystalline silicon substrate, the front surface of the crystalline silicon substrate having a boron emitter layer, the side of the boron emitter layer away from the crystalline silicon substrate having a borosilicate glass layer, the boron emitter layer and the crystalline silicon substrate forming a PN junction;

[0007] thinning a predetermined region of the solar cell initial structure by using a first laser with a first cutting width, the predetermined region corresponding to a to-be-cut position of the solar cell;

[0008] removing the PN junction in the predetermined region by using a wet etching process, obtaining an isolation groove with a tower base structure on the front surface of the solar cell initial structure, and the isolation groove penetrating through the crystalline silicon substrate along a first direction, and forming the tower base structure on the back surface of the solar cell initial structure;

[0009] forming a functional film layer and an electrode on the back surface and the front surface of the solar cell initial structure, respectively;

[0010] cutting at the isolation groove by using a second laser with a second cutting width, obtaining the solar cell slice with a stepped edge;

[0011] wherein the second cutting width is smaller than the first cutting width.

[0012] In some embodiments of the present application, the energy density of the laser is 300 μJ / cm 2 ~ 500 μJ / cm 2 , and the overlap rate is 10% ~ 50%.

[0013] In some embodiments of the present application, the thinning thickness in the thinning process is 5 nm ~ 25 nm.

[0014] In some embodiments of the present application, the width of the first cut is 200 μm ~ 800 μm;

[0015] And / or, the width of the second cut is 40 μm ~ 120 μm.

[0016] In some embodiments of the present application, the step of forming functional film layers and electrodes on the back surface and the front surface of the solar cell initial structure respectively comprises:

[0017] forming a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, a back surface passivation layer and a back electrode on the back surface of the solar cell initial structure;

[0018] forming a front surface passivation layer and a front electrode on the front surface of the solar cell initial structure.

[0019] In a second aspect, the embodiments of the present application provide a solar cell wafer, comprising:

[0020] a rectangular crystalline silicon substrate, wherein the front surface of the rectangular crystalline silicon substrate comprises an effective power generation area and a stepped edge area;

[0021] the front surface of the rectangular crystalline silicon substrate of the effective power generation area has a pyramid structure, and is sequentially provided with a boron emitter layer, a front surface passivation layer, a front surface passivation layer and a front electrode along a direction away from the rectangular crystalline silicon substrate;

[0022] the front surface of the rectangular crystalline silicon substrate of the stepped edge area is sequentially provided with a front surface passivation layer and a front surface passivation layer;

[0023] the stepped edge has a height difference ΔH, 0.5 μm ≤ ΔH ≤ 10 μm;

[0024] the thickness of the boron emitter layer is H1, 0.3 μm ≤ H1 ≤ 2.0 μm.

[0025] In some embodiments of the present application, 0.3 μm ≤ ΔH-H1 ≤ 8 μm.

[0026] In some embodiments of the present application, the P-type doping concentration of the step-shaped edge region is less than the N-type doping concentration of the rectangular crystalline silicon substrate.

[0027] In some embodiments of the present application, the surface of the rectangular crystalline silicon substrate within the step-shaped edge region has a diamond-shaped base structure, and the size of the diamond-shaped base structure is 3 μm to 45 μm.

[0028] In some embodiments of the present application, the side surface of the rectangular crystalline silicon substrate has a laser cutting region, and the laser cutting region has a random distribution of crystal structures.

[0029] In some embodiments of the present application, the back surface of the rectangular crystalline silicon substrate comprises a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, a back surface passivation layer, and a back electrode.

[0030] In some embodiments of the present application, the length of the rectangular crystalline silicon substrate is L, the width is W, and L = n*W, wherein n is a positive integer greater than 1.

[0031] In some embodiments of the present application, when n = 2, a single solar cell piece has one step-shaped edge.

[0032] When 3 ≤ n ≤ 5, a single solar cell piece has two step-shaped edges or one step-shaped edge.

[0033] In some embodiments of the present application, the boron emitter layer satisfies at least one of the following characteristics:

[0034] a) the sheet resistance of the boron emitter layer is 200 Ω / sq to 700 Ω / sq;

[0035] b) the maximum surface doping concentration of the boron emitter layer is 3 × 10 17 atoms / cm 3 to 9 × 10 18 atoms / cm 3 ;

[0036] c) the junction depth of the boron emitter layer is 0.3 μm to 2.0 μm.

[0037] In a third aspect, the embodiments of the present application provide a photovoltaic module, which comprises the solar cell piece prepared by the preparation method of the first aspect, or the photovoltaic module comprises the solar cell piece of the second aspect.

[0038] Compared with the prior art, the embodiments of the present application have at least the following beneficial effects:

[0039] This application provides a solar cell slab and a method for preparing solar cell slabs, as well as a photovoltaic module. In the preparation method, a first laser is used to thin a predetermined area of ​​the initial structure of the solar cell, removing at least part of the borosilicate glass layer. Simultaneously, a wet etching process is used to form an isolation groove in the predetermined area, removing the PN junction at the location of the isolation groove. Then, in the subsequent passivation process, the corresponding location of the isolation groove can be passivated by the passivation process. A second laser is then used to cut the solar cell to prepare a solar cell slab with stepped edges, eliminating the need for separate passivation treatment of the solar cell slab. This simplifies the process, improves production yield, and achieves the goal of cost reduction and industrialization. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic diagram of the initial structure of a solar cell in one embodiment of this application;

[0042] Figure 2 This is a schematic diagram of the thinned borosilicate glass layer in one embodiment of this application;

[0043] Figure 3 This is a schematic diagram of the initial structure of the solar cell in another embodiment of this application;

[0044] Figure 4 for Figure 3 A schematic diagram of the initial structure of the solar cell as viewed from a plane.

[0045] Figure 5 This is a schematic diagram of the solar cell slab structure in one embodiment of this application;

[0046] Figure 6 This is a schematic diagram of the solar cell slab structure in another embodiment of this application;

[0047] Figure 7 This is a schematic diagram showing the number of solar cell slices after laser cutting in one embodiment of this application;

[0048] Figure 8 This is a schematic diagram showing the number of solar cell slices after laser cutting in another embodiment of this application;

[0049] Figure 9A diagram showing the number of solar cell pieces after laser cutting in another embodiment of the present application;

[0050] Figure 10 A scanning electron microscope (SEM) image of a crystalline silicon substrate in a step-shaped edge region in one embodiment of the present application.

[0051] Explanation of reference numerals:

[0052] 1 - crystalline silicon substrate, 2 - boron emitter layer, 3 - borosilicate glass layer, 4 - front surface interface passivation layer, 5 - front surface passivation layer, 6 - front electrode, 7 - tunneling silicon oxide layer, 8 - phosphorus-doped polysilicon layer, 9 - back surface passivation layer, 10 - back electrode, 11 - effective power generation region, 12 - step-shaped edge region, 13 - solar cell piece, 14 - pyramid-shaped structure, 31 - predetermined region, 32 - isolation groove. DETAILED DESCRIPTION

[0053] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present application.

[0054] In the present application, the terms "upper", "lower", "left", "right", "front", "back", "top", "bottom", "inner", "outer", "vertical", "horizontal", "lateral", "longitudinal", and the like indicate the orientation or positional relationship shown in the drawings. These terms are mainly used for better description of the present application and its embodiments, and are not used to limit the indicated devices, elements or components to have a specific orientation, or to be constructed and operated in a specific orientation.

[0055] In addition, the above-mentioned partial terms can be used to represent other meanings in addition to the orientation or positional relationship, for example, the term "upper" can also be used to represent a certain dependent relationship or connection relationship in some cases. Those of ordinary skill in the art can understand the specific meaning of these terms in the present application according to the specific situation.

[0056] Furthermore, the terms "mount", "set", "provided with", "connect", "connected" should be interpreted broadly. For example, it can be fixedly connected, detachably connected, or integrally constructed; it can be mechanically connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium, or internal communication between two devices, elements or components. Those of ordinary skill in the art can understand the specific meaning of the above-mentioned terms in the present application according to the specific situation.

[0057] In addition, the terms "first", "second" and the like are mainly used to distinguish different devices, elements or components (the specific types and configurations can be the same or different), and are not intended to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise stated, the meaning of "a plurality" is two or more.

[0058] The technical solutions of the present application will be further described below in conjunction with the embodiments and drawings.

[0059] In a first aspect, the embodiments of the present application provide a preparation method of a solar cell fragment, comprising the following steps:

[0060] Step A, providing a solar cell initial structure;

[0061] Step B, using a first laser to perform thinning processing on a predetermined area of the solar cell initial structure with a first cutting width, the predetermined area corresponding to a to-be-cut position of the solar cell;

[0062] Step C, using a wet etching process to remove the PN junction in the predetermined area, obtaining an isolation groove with a tower base structure on the front surface of the solar cell initial structure, and the isolation groove penetrates through the crystalline silicon substrate along a first direction, and forming a tower base structure on the back surface of the solar cell initial structure;

[0063] Step D, forming a functional film layer and an electrode on the back surface and the front surface of the solar cell initial structure, respectively;

[0064] Step E, using a second laser to perform cutting at the isolation groove with a second cutting width, obtaining a solar cell fragment with a stepped edge; wherein the second cutting width is smaller than the first cutting width.

[0065] In step A, the solar cell initial structure can be a solar cell wafer obtained after a boron diffusion process. Referring to Figure 1 , the solar cell initial structure includes a crystalline silicon substrate 1, the front surface of the crystalline silicon substrate 1 has a boron emitter layer 2, the side of the boron emitter layer 2 away from the crystalline silicon substrate 1 has a boron-silicon glass layer (BSG) 3, and the boron emitter layer 2 and the crystalline silicon substrate 1 form a PN junction.

[0066] In step B, referring to Figure 1 , the predetermined area 31 can be a to-be-thinned area in the boron-silicon glass layer 3, and the predetermined area 31 corresponds to the to-be-cut position of the solar cell, that is, the solar cell initial structure will be cut and fragmented at the predetermined area in the subsequent process. The embodiments of the present application use a first laser to thin the boron-silicon glass layer in the predetermined area, thereby realizing laser etching of the boron-silicon glass layer in the predetermined area. Referring to Figure 2After the thinning process, the upper borosilicate glass layer 3 in the predetermined region is removed, and the lower borosilicate glass layer 3 is reserved.

[0067] In step C, the wet etching process can include: using an alkali solution to perform a wet polishing process on the thinned solar cell initial structure, removing the PN junction in the predetermined region, and forming a polished surface with a tower base structure on the back surface of the solar cell initial structure. The alkali solution can be a NaOH solution or a KOH solution, and the concentration of the alkali solution is 0.5wt%-5wt%. After the PN junction in the predetermined region is removed by the wet etching process, the front surface of the solar cell initial structure has an isolation groove 32 with a tower base structure, and the back surface of the solar cell initial structure has a polished surface with a tower base structure. Figure 3 , the front surface of the solar cell initial structure has an isolation groove 32 with a tower base structure, and the back surface of the solar cell initial structure has a polished surface with a tower base structure. Figure 4 From the planar view of the solar cell initial structure, the isolation groove 32 penetrates the crystalline silicon substrate 1 along the first direction; and the tower base structure is formed on the back surface of the solar cell initial structure, thereby facilitating the formation of functional film layers with uniform thickness on the back surface in subsequent processes, such as a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, or a back surface passivation layer, etc.

[0068] In the embodiments of the present application, the first direction refers to the extension direction of the grid line electrode in the solar cell split, which can be parallel to the fine grid electrode or intersect with the fine grid electrode.

[0069] In step D, the prepared functional film layer on the front surface includes a front surface interface passivation layer, a front surface passivation layer, etc.; the prepared functional film layer on the back surface includes a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, a back surface passivation layer, etc.; the prepared front surface electrode includes a front surface fine grid; the prepared back surface electrode includes a back surface fine grid; in addition, a main grid can also be prepared.

[0070] In step E, since the second laser is used to cut at the isolation groove with a relatively narrow second cutting width, the obtained solar cell split has a stepped edge, which is shown at the stepped edge region 12 in Figure 5 or Figure 6 In the embodiments of the present application, the number of isolation grooves in the solar cell initial structure is not particularly limited and can be 1, 2, 3, 4, or 5. In one example, when the number of isolation grooves is 1, refer to Figure 7 When the second laser performs the second cutting along the dashed line, the number of obtained solar cell splits 13 is 2; in another example, when the number of isolation grooves is 2, refer to Figure 8 When the second laser performs the second cutting along the dashed line, the number of obtained solar cell splits 13 is 3; in another example, when the number of isolation grooves is 3, refer to Figure 9When the second laser cuts along the dotted line, the number of the obtained solar cell fragments 13 is 4.

[0071] By step E, the square crystal silicon substrate can be divided into several rectangular solar cells, the length of the rectangular solar cell is L, the width is W, and L = n*W, wherein n is a positive integer greater than 1. Referring to Figure 7 When n = 2, the square crystal silicon substrate is divided into 2 rectangular solar cell fragments 13, and the length L of the single rectangular solar cell is 2 times the corresponding width W, and the single rectangular solar cell fragment has a stepped edge; referring to Figure 8 When n = 3, the square crystal silicon substrate is divided into 3 rectangular solar cell fragments 13, and the length L of the single rectangular solar cell is 3 times the corresponding width W, and 2 of the rectangular solar cell fragments have a stepped edge, and the other rectangular solar cell fragment has two stepped edges; referring to Figure 9 When n = 4, the square crystal silicon substrate is divided into 4 rectangular solar cell fragments 13, and the length L of the single rectangular solar cell is 4 times the corresponding width W, and 2 of the rectangular solar cell fragments have a stepped edge, and the other 2 of the rectangular solar cell fragments have two stepped edges; the square crystal silicon substrate can be divided into n rectangular solar cell fragments in turn.

[0072] The preparation method of the solar cell fragment provided by the embodiment of the application can thin the predetermined area of the solar cell initial structure by the first laser, remove at least part of the borosilicate glass layer, match the subsequent wet etching process to form an isolation groove in the predetermined area, remove the PN junction at the position of the isolation groove, and then in the subsequent passivation process, the passivation of the position corresponding to the isolation groove can be realized by means of the passivation process. Then, the second laser is used to cut the solar cell to prepare the solar cell fragment with a stepped edge, without the need for separate facet passivation treatment of the solar cell fragment, thereby simplifying the process, improving the production yield, and achieving the industrialization purpose of reducing costs.

[0073] In some embodiments, the wavelength of the laser can be any wavelength, for example, a green laser with a wavelength of 532 nm.

[0074] In some embodiments, the energy density of the laser is 300 μJ / cm 2 ~ 500 μJ / cm 2 , and the overlap rate is 10% ~ 50%. For example, the energy density of the laser is 300 μJ / cm 2 , 400 μJ / cm 2 , or 500 μJ / cm 2The overlap rate is 10%, 20%, 30%, or 50%. By controlling the energy density of the laser and the overlap rate within the above range, the damage to the crystalline silicon substrate can be reduced, and the thinning process of the predetermined region can be effectively implemented.

[0075] In some embodiments, the thinning thickness in the thinning process is 5 nm to 25 nm. For example, the thinning thickness is 5 nm, 10 nm, 20 nm, or 25 nm. In this way, the borosilicate glass layer in the predetermined region can be effectively thinned without causing the silicon substrate below the predetermined region to be damaged by the laser.

[0076] In some embodiments, the width of the first cut is 200 μm to 800 μm; and / or, the width of the second cut is 40 μm to 120 μm. For example, the width of the first cut is 200 μm, 400 μm, 600 μm, or 800 μm; and the width of the second cut is 40 μm, 80 μm, 100 μm, or 120 μm. By controlling the width of the first cut within the above range, the isolation groove in the embodiments of the present application can be formed; by controlling the width of the second cut within the above range, the position of the second laser is located at the isolation groove, so that the solar cell chip formed by the second cutting process has a stepped edge, and the PN junction that has been passivated still has a passivation structure, thereby ensuring that the photo-generated carriers are not recombined by the unpassivated PN junction at the cutting surface, i.e., the degree of carrier recombination at the cutting surface is reduced.

[0077] In some embodiments, the step of forming the functional film layer and the electrode on the back surface and the front surface of the solar cell initial structure respectively comprises:

[0078] forming a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, a back surface passivation layer, and a back electrode on the back surface of the solar cell initial structure;

[0079] forming a front surface passivation layer and a front electrode on the front surface of the solar cell initial structure.

[0080] In some embodiments of the present application, in the preparation of the back surface film layer, the tunneling silicon oxide layer and the phosphorus-doped polysilicon layer can be deposited on the back surface of the crystalline silicon substrate by PECVD or LPCVD; the aluminum oxide layer with a thickness of 2 nm to 6 nm is deposited on the phosphorus-doped polysilicon layer as the back surface passivation layer by an ALD device.

[0081] The specific preparation process of the phosphorus-doped polysilicon layer comprises:

[0082] The phosphorus-doped amorphous silicon layer is deposited on the tunneling silicon oxide layer by using a tube PECVD device, and then the phosphorus-doped amorphous silicon layer is annealed in a nitrogen atmosphere at an annealing temperature of about 900 ℃, so that the amorphous silicon in the phosphorus-doped amorphous silicon layer is crystallized to form a phosphorus-doped polysilicon layer, thereby forming a passivation contact structure with the tunneling silicon oxide layer, and then RCA cleaning is performed.

[0083] The material of the tunneling silicon oxide layer in the embodiment of the present application can include various dielectric materials, such as at least one of silicon oxide, magnesium fluoride, amorphous silicon, polysilicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide or titanium oxide. Specifically, the tunneling silicon oxide layer can be composed of a silicon oxide layer containing silicon oxide. This is because the silicon oxide layer has excellent passivation performance, can minimize the recombination loss of the minority carriers on the surface of the semiconductor substrate, and is a thin film with excellent durability to subsequent high-temperature processes. In order to better provide interface passivation for the substrate, the thickness of the tunneling silicon oxide layer can be 0.1 nm to 5 nm. For example, the thickness of the tunneling silicon oxide layer can be 0.1 nm, 0.5 nm, 1 nm, 1.5 nm, 2 nm, 3 nm, 4 nm, 5 nm, etc., however, the present application is not limited thereto, and the thickness of the tunneling silicon oxide layer can have various values. The tunneling silicon oxide layer acts as a potential barrier for electrons and holes, and can be combined with the polysilicon layer to prevent the passage of minority carriers. The tunneling silicon oxide layer can also have a pinhole channel effect, allowing the free movement of carriers within the solar cell, and selectively passing the majority carriers through the heavily doped polysilicon, which helps to reduce the recombination loss of the minority carriers. In addition, the tunneling silicon oxide layer can be used as a diffusion barrier to prevent the dopant of the doped polysilicon layer from diffusing into the semiconductor substrate.

[0084] In the preparation of the front surface film layer, the front surface wrap-around boron silicon glass layer can be removed first, and then a front surface interface passivation layer can be deposited on the boron emitter layer by an ALD device, the material of the front surface interface passivation layer including aluminum oxide, and the thickness being 2 nm to 6 nm; a single-layer or multi-layer front surface passivation layer can be deposited on the front surface interface passivation layer by a PECVD device, the thickness being 40 nm to 120 nm, and the material of the front surface passivation layer including at least one of silicon nitride, silicon oxynitride and silicon oxide.

[0085] In the preparation of the front electrode and the back electrode, electrode paste can be printed on the front surface and the back surface of the initial structure of the solar cell by screen printing, and the front electrode and the back electrode can be obtained after sintering. The material of the front electrode and the back electrode in the embodiment of the present application is not particularly limited, including but not limited to silver.

[0086] In a second aspect, the embodiment of the present application provides a solar cell wafer, which refers to Figure 5 or Figure 6The solar cell piece includes: a rectangular crystalline silicon substrate 1, a front surface of the rectangular crystalline silicon substrate 1 including an effective power generation area 11 and a stepped edge area 12, the stepped edge area 12 being a stepped edge area obtained after the solar cell piece is subjected to a first laser cutting process; the front surface of the rectangular crystalline silicon substrate 1 of the effective power generation area 11 having a pyramid structure 14, and being sequentially provided with a boron emitter layer 2, a front surface interface passivation layer 4, a front surface surface passivation layer 5 and a front surface electrode 6 away from the direction of the rectangular crystalline silicon substrate 1; the front surface of the crystalline silicon substrate 1 of the stepped edge area 12 being sequentially provided with the front surface interface passivation layer 4 and the front surface surface passivation layer 5; a height difference between the boron emitter layer 2 and the crystalline silicon substrate 1 in the stepped edge area 12 being ΔH, 0.5 μm≤ΔH≤10 μm; for example, ΔH is 0.5 μm, 2 μm, 5 μm or 10 μm; a junction depth of the boron emitter layer 2 being H1, 0.3 μm≤H1≤2.0 μm. For example, H1 is 0.3 μm, 0.5 μm, 1 μm, 1.5 or 2.0 μm. Controlling ΔH within the above range is beneficial to completely removing the PN junction at the stepped edge area, thereby being beneficial to making the stepped edge area have a good passivation effect in a subsequent passivation process, avoiding the PN junction and the vicinity thereof which does not form a good passivation effect from becoming a recombination center of photo-generated carriers, and further improving the photoelectric conversion performance of the solar cell piece.

[0087] In the embodiments of the present application, ΔH refers to a distance between a top of the boron emitter layer and a top of the crystalline silicon substrate in the stepped edge area.

[0088] In some embodiments, 0.3 μm≤ΔH-H1≤8 μm. For example, ΔH-H1 is 0.3 μm, 1 μm, 5 μm or 8 μm. ΔH-H1 within the above range indicates that the PN junction at the stepped edge area has been completely removed, thereby avoiding the PN junction and the vicinity thereof which does not form a good passivation effect from becoming a recombination center of photo-generated carriers, and further improving the photoelectric conversion performance of the solar cell piece.

[0089] In some embodiments, a P-type doping concentration of the stepped edge area 12 is less than an N-type doping concentration of the crystalline silicon substrate 1, so that the PN junction at the stepped edge area has been completely removed, thereby eliminating the influence of the PN junction of the stepped edge area on the passivation performance, avoiding the PN junction and the vicinity thereof which does not form a good passivation effect from becoming a recombination center of photo-generated carriers, and further improving the photoelectric conversion performance of the solar cell piece.

[0090] In some embodiments, with reference to Figure 10 The surface of the rectangular crystalline silicon substrate in the stepped edge area has a diamond-shaped tower base structure, and a size of the diamond-shaped tower base structure is 3 μm-45 μm.

[0091] The size of the rhombic tower base structure refers to the length of any side of the rhombic tower base structure.

[0092] In some embodiments, the back surface of the rectangular crystalline silicon substrate 1 comprises a tunneling silicon oxide layer 7, a phosphorus-doped polysilicon layer 8, a back surface passivation layer 9, and a back electrode 10. Figure 5 Figure 6 In some embodiments, the back surface of the rectangular crystalline silicon substrate 1 comprises a tunneling silicon oxide layer 7, a phosphorus-doped polysilicon layer 8, a back surface passivation layer 9, and a back electrode 10.

[0093] In a third aspect, the embodiments of the present application provide a photovoltaic module, which comprises the solar cell prepared by the preparation method of the first aspect, or the photovoltaic module comprises the solar cell of the second aspect.

[0094] The embodiments of the present application also provide a photovoltaic module, which is used for converting received light energy into electrical energy and transmitting the electrical energy to an external load. The photovoltaic module comprises at least one cell string, which is connected by a plurality of the above-mentioned solar cells; an encapsulating adhesive film, which is used for covering the surface of the cell string; and a cover plate, which is used for covering the surface of the encapsulating adhesive film away from the cell string.

[0095] In some embodiments, the sheet resistance of the boron emitter layer is 200Ω / sq-700Ω / sq. The sheet resistance of the boron emitter layer in this range has a relatively low doping concentration, which does not introduce too many doping atoms and defects caused by doping in the emitter layer, so that the boron emitter layer can have a relatively low defect state density to the greatest extent. In addition, too high or too low sheet resistance of the boron emitter layer is not conducive to the balance between the defect state density and the transmission resistance of the emitter layer.

[0096] In some embodiments, the maximum surface doping concentration of the boron emitter layer is 3×10 17 atoms / cm 3 -9×10 18 atoms / cm 3 . Too high or too low maximum surface doping concentration of the boron emitter layer is not conducive to the balance between the defect state density and the photogenerated electromotive force and the transmission resistance of the emitter layer. Therefore, the maximum surface doping concentration of the boron emitter layer is controlled in the above range.

[0097] In some embodiments, the junction depth of the boron emitter layer is 0.3μm-2.0μm. The junction depth also represents the depth corresponding to the formation of a heavily doped dead layer. Too large junction depth forms a too thick dead layer, which is not conducive to reducing the recombination loss of the boron emitter layer. Too shallow junction depth means that the boron atom-doped emitter layer is too shallow, which cannot form an effective photogenerated electromotive force, that is, cannot obtain a high open-circuit voltage, which is not conducive to improving the photoelectric conversion efficiency of the solar cell. Therefore, the junction depth of the boron emitter layer is controlled in the above range.

[0098] ​The above has carried on the detailed introduction to the solar cell piece, the preparation method of the solar cell piece and the photovoltaic module disclosed by the embodiment of the application, the principle and implementation mode of the specific examples are applied in this paper, the above embodiment is only used for helping understanding the technical scheme and core invention point of the embodiment of the application; at the same time, for the general technical personnel in the art, according to the idea of the application, the specific implementation mode and application range will have the change, and the above, the content of the specification should not be understood as the limitation of the embodiment of the application.

Claims

1. A method for preparing a solar cell chip, characterized by, The method comprises the following steps: providing a solar cell initial structure, the solar cell initial structure comprising a crystalline silicon substrate, a front surface of the crystalline silicon substrate having a boron emitter layer, the boron emitter layer having a borosilicate glass layer on a side facing away from the crystalline silicon substrate, the boron emitter layer and the crystalline silicon substrate forming a PN junction; performing thinning processing on a predetermined region of the solar cell initial structure by using a first laser with a first cutting width, the predetermined region corresponding to a position to be cut of the solar cell; removing the PN junction in the predetermined region by using a wet etching process, obtaining an isolation groove with a tower base structure on the front surface of the solar cell initial structure, the isolation groove penetrating through the crystalline silicon substrate along a first direction, and forming the tower base structure on the back surface of the solar cell initial structure; forming a functional film layer and an electrode on the back surface and the front surface of the solar cell initial structure, respectively; performing cutting at the isolation groove by using a second laser with a second cutting width, obtaining the solar cell fragments with a stepped edge; wherein the second cutting width is smaller than the first cutting width.

2. The production method according to claim 1, characterized by, The energy density of the laser is 300 μJ / cm 2 ~ 500 μJ / cm 2 with an overlap ratio of 10% ~ 50%.

3. The preparation method according to claim 1, characterized in that, The thinning thickness in the thinning processing is 5 nm to 25 nm.

4. The method of claim 1, wherein, The first cutting width is 200 μm to 800 μm. And / or, the second cutting width is 40 μm to 120 μm.

5. The preparation method according to claim 1, characterized in that, The step of forming the functional film layer and the electrode on the back surface and the front surface of the solar cell initial structure, respectively, comprises: forming a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, a back surface passivation layer and a back electrode on the back surface of the solar cell initial structure; forming a front surface passivation layer and a front electrode on the front surface of the solar cell initial structure.

6. A solar cell chip, characterized by Comprise: a rectangular crystalline silicon substrate, a front surface of the rectangular crystalline silicon substrate comprising an effective power generation region and a stepped edge region; the front surface of the rectangular crystalline silicon substrate of the effective power generation region has a pyramid structure, and is sequentially provided with a boron emitter layer, a front surface passivation layer, a front surface passivation layer and a front electrode in a direction away from the rectangular crystalline silicon substrate; the front surface of the rectangular crystalline silicon substrate of the stepped edge region is sequentially provided with a front surface passivation layer and a front surface passivation layer; the stepped edge has a height difference ΔH, 0.5 μm ≤ ΔH ≤ 10 μm; the thickness of the boron emitter layer is H1, 0.3 μm ≤ H1 ≤ 2.0 μm.

7. The solar cell dicing according to claim 6, wherein, 0.3 μm ≤ ΔH-H1 ≤ 8 μm.

8. The solar cell dicing according to claim 6, wherein, The P-type doping concentration of the stepped edge region is smaller than the N-type doping concentration of the rectangular crystalline silicon substrate.

9. The solar cell dicing according to claim 6, wherein, The surface of the rectangular crystalline silicon substrate in the stepped edge region has a diamond tower base structure, and the size of the diamond tower base structure is 3 μm to 45 μm.

10. The solar cell dicing according to claim 6, wherein, The side surface of the rectangular crystalline silicon substrate has a laser cutting region, and the laser cutting region has a random distribution of crystal structures.

11. The solar cell dicing according to claim 6, wherein, The back surface of the rectangular crystalline silicon substrate comprises a tunneling silicon oxide layer, a phosphorus-doped polysilicon layer, a back surface passivation layer and a back electrode.

12. The solar cell dicing according to claim 7, wherein, The length of the rectangular crystalline silicon substrate is L, the width is W, and L = n*W, wherein n is a positive integer greater than 1.

13. The solar cell chip according to claim 12, wherein, when n = 2, a single solar cell chip has one step-shaped edge; and when 3 ≤ n ≤ 5, a single solar cell chip has two step-shaped edges or one step-shaped edge. The boron emitter layer satisfies at least one of the following characteristics: a) the sheet resistance of the boron emitter layer is 200 Ω / sq to 700 Ω / sq; 14. The solar cell dicing according to claim 6, wherein, c) the junction depth of the boron emitter layer is 0.3 μm to 2.0 μm. The photovoltaic module comprises the solar cell chip prepared by the preparation method according to any one of claims 1 to 5, or the photovoltaic module comprises the solar cell chip according to any one of claims 6 to 14. b) the boron emitter layer has a maximum surface doping concentration of 3 x 1019 atoms / cm3 17 atoms / cm3 3 ~ 9 x 1019 atoms / cm3 18 atoms / cm3 3 ; ​ 15. A photovoltaic module, characterized by ​

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