Display panel and display device

Abstract

The invention provides a display panel and a display device.The display panel comprises an array substrate, an opposite substrate opposite to the array substrate and a liquid crystal layer located between the array substrate and the opposite substrate; at least one shielding structure is arranged in the array substrate and the opposite substrate, each shielding structure comprises a stacked film layer, and each stacked film layer comprises a first metal layer, a first dielectric layer, a second metal layer and a second dielectric layer which are arranged in a stacked mode. The optical refractive index of the first dielectric layer and the second dielectric layer is a first refractive index, the optical refractive index of the first metal layer and the second metal layer is a second refractive index greater than the first refractive index, and the thickness difference between the first metal layer and the second metal layer is greater than a preset value.

Description

Display panel and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In the high pixel density (PPI) design of virtual reality (VR) products, the critical dimension (CD) of the black matrix (BM) on the color film (CF) substrate can be reduced to ensure transmittance after box assembly. Contrast can also be improved and color crosstalk can be reduced by thinning the BM thickness. Display contrast can also be improved by reducing module reflectivity.

[0003] As a result, how to more effectively ensure high PPI design has become a technical problem that needs to be solved urgently.

[0004] Summary of the Invention

[0005] The present disclosure provides a display panel and a display device, the specific solutions of which are as follows:

[0006] An embodiment of the present disclosure provides a display panel, comprising:

[0007] an array substrate, an opposing substrate disposed opposite to the array substrate, and a liquid crystal layer located between the array substrate and the opposing substrate;

[0008] At least one group of shielding structures is provided in the array substrate and the opposing substrate, each group of the shielding structures includes a stacked film layer, the stacked film layer includes a first metal layer, a first dielectric layer, a second metal layer, and a second dielectric layer that are stacked, the optical refractive index of the first dielectric layer and the second dielectric layer is a first refractive index, the optical refractive index of the first metal layer and the second metal layer is a second refractive index greater than the first refractive index, and the thickness difference between the first metal layer and the second metal layer is greater than a preset value.

[0009] Optionally, a first group of blocking structures is provided in the array substrate; the array substrate also includes a first substrate, a color filter layer located on the first substrate, the color filter layer having a plurality of color block rows extending along a first direction and arranged along a second direction intersecting the first direction, each of the color block rows including a plurality of filter portions, and a first gap between two adjacent filter portions in the color filter layer; the first group of blocking structures has a first blocking portion including the stacked film layer, and the orthographic projection of the first blocking portion on the first substrate covers the orthographic projection of the first gap on the first substrate.

[0010] Optionally, in an embodiment of the present disclosure, a second group of blocking structures is provided in the opposing substrate, and the first group of blocking structures is located on the side of the color filter layer away from the first substrate; the opposing substrate also includes a second substrate, the second group of blocking structures is provided on the second substrate, and has a second blocking portion extending along the first direction, and the first blocking portion is extended along the second direction; the second blocking portion includes the stacked film layer, and the orthographic projection of the second blocking portion on the second substrate covers the orthographic projection of the second gap between two adjacent filter portions on the second substrate, and the second gap intersects with the extension direction of the first gap; the orthographic projections of the second blocking portion and the first blocking portion on the same substrate enclose a plurality of opening areas of the array substrate, and each of the opening areas is provided corresponding to the corresponding filter portion.

[0011] Optionally, in an embodiment of the present disclosure, a third group of blocking structures is provided on the opposing substrate, and the opposing substrate also includes a second substrate, the third group of blocking structures is provided on the second substrate, and has a third blocking portion extending along the second direction, and the first blocking portion is provided to extend along the first direction; the orthographic projection of the third blocking portion on the second substrate covers the orthographic projection of the second gap between two adjacent filtering portions on the second substrate, and the second gap intersects with the extension direction of the first gap; the orthographic projections of the third blocking portion and the first blocking portion on the same substrate enclose a plurality of opening areas of the array substrate, and each of the opening areas is provided corresponding to the corresponding filtering portion.

[0012] Optionally, in an embodiment of the present disclosure, a fourth group of blocking structures is provided in the opposing substrate; the opposing substrate also includes a second substrate, the fourth group of blocking structures is provided on the second substrate, and the fourth group of blocking structures has a fourth blocking portion extending along a first direction, and a fifth blocking portion extending along a second direction intersecting with the first direction, at least one of the fourth blocking portion and the fifth blocking portion includes the stacked film layer, and the orthographic projections of the fourth blocking portion and the fifth blocking portion on the same substrate enclose a plurality of opening areas of the array substrate.

[0013] Optionally, in the embodiment of the present disclosure, the fifth shielding portion includes the stacked film layer, and the fourth shielding portion includes a black matrix unit made of an organic material.

[0014] Optionally, in an embodiment of the present disclosure, the at least one group of shielding structures is two groups of shielding structures including the first group of shielding structures, wherein the shielding portion of one group of shielding structures has multiple columns of main body portions extending along the second direction, and an extension portion located between the boundary extension lines of the main body portions in two adjacent columns; in the main body portions in two adjacent columns, the width of the same extension portion tends to decrease in the direction from one column of the main body portions to the other column of the main body portions.

[0015] Optionally, in an embodiment of the present disclosure, the first blocking portions corresponding to two adjacent rows of the color block rows are staggered, the corresponding extension portions of the staggered first blocking portions are connected together, and the orthographic projections of the first blocking portions on the array substrate form a plurality of closed opening areas, and each of the opening areas is arranged corresponding to the corresponding filter portion.

[0016] Optionally, in an embodiment of the present disclosure, the first blocking portions corresponding to two adjacent rows of the color block rows are staggered, the corresponding extension portions of the staggered first blocking portions are disconnected, and the opening areas corresponding to two adjacent rows of the color block rows are connected at the disconnected positions of the corresponding extension portions.

[0017] Optionally, in an embodiment of the present disclosure, the array substrate further includes a first substrate, a color filter layer located on the first substrate, and a light-shielding layer located between the color filter layer and the first substrate, and the light-shielding layer includes the stacked film layer.

[0018] Optionally, in an embodiment of the present disclosure, the array substrate further comprises a plurality of first transistors located in the display area and a plurality of second transistors located in the peripheral area, each of the first transistors being located between the light-shielding layer and the color filter layer, the active layer of each of the first transistors being a metal oxide semiconductor material, and the active layer of each of the second transistors being a low-temperature polysilicon material; the orthographic projection of the gate of each of the first transistors on the first substrate completely falls within the area of ​​the orthographic projection of the light-shielding layer on the first substrate. Optionally, in an embodiment of the present disclosure, the first metal layer, the first dielectric layer, the second metal layer, and the second dielectric layer are sequentially arranged away from their respective substrates, and the thickness of the first metal layer is greater than the thickness of the second metal layer.

[0019] Optionally, in the embodiment of the present disclosure, the first metal layer and the gate of each second transistor are provided in the same layer and with the same material, and no pattern of the second metal layer is provided at the gate of each second transistor.

[0020] Optionally, in an embodiment of the present disclosure, the stacked film layer further includes a third dielectric layer, a third metal layer, and a fourth dielectric layer arranged in sequence away from the corresponding substrate, the first metal layer is located between the fourth dielectric layer and the first dielectric layer, the optical refractive index of the third dielectric layer and the fourth dielectric layer is the first refractive index, the optical refractive index of the third metal layer is the second refractive index, and the thickness of the third metal layer is less than the thickness of the first metal layer.

[0021] Optionally, in an embodiment of the present disclosure, the stacked film layer further includes a first functional layer located between the first dielectric layer and the second metal layer, and the optical refractive index of the first functional layer is smaller than the optical refractive index of the second metal layer and larger than the optical refractive index of the first dielectric layer.

[0022] Optionally, in an embodiment of the present disclosure, the stacked film layer further includes a fifth dielectric layer, a fourth metal layer, a second functional layer and a sixth dielectric layer, which are sequentially arranged away from the corresponding substrate, the optical refractive indexes of the fifth dielectric layer and the sixth dielectric layer are both the first refractive index, the optical refractive index of the fourth metal layer is the second refractive index, and the optical refractive index of the second functional layer is less than the optical refractive index of the second metal layer and greater than the first refractive index.

[0023] Optionally, in the embodiment of the present disclosure, the first metal layer, the first dielectric layer, the second metal layer and the second dielectric layer are sequentially arranged close to the corresponding substrate, and the thickness of the first metal layer is greater than the thickness of the second metal layer.

[0024] Accordingly, an embodiment of the present disclosure provides a display device, including:

[0025] A display panel as described in any one of the above. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] FIG1 is a schematic structural diagram of a display panel provided in an embodiment of the present disclosure;

[0027] FIG2 is a schematic diagram of a top view of a color filter layer in a display panel provided by an embodiment of the present disclosure;

[0028] FIG3 is a schematic diagram of a top view of a color filter layer in a display panel provided by an embodiment of the present disclosure;

[0029] FIG4 is a schematic diagram of a top view of a first shielding portion in an array substrate in a display panel provided by an embodiment of the present disclosure;

[0030] FIG5 is a schematic top view of a second shielding portion in an opposing substrate of a display panel provided by an embodiment of the present disclosure;

[0031] FIG6 is a schematic top view of one type of shielding structure after the array substrate shown in FIG4 and the counter substrate shown in FIG5 are assembled;

[0032] FIG7 is a schematic structural diagram of a display panel provided in an embodiment of the present disclosure;

[0033] FIG8 is a schematic top view of one type of the first group of shielding structures in the array substrate in FIG7 ;

[0034] FIG9 is a schematic top view of one type of the third group of shielding structures in the opposing substrate in FIG7 ;

[0035] FIG10 is a schematic top view of one type of shielding structure after the array substrate shown in FIG8 and the counter substrate shown in FIG9 are assembled;

[0036] FIG11 is a schematic top view of one type of the second shielding portion corresponding to the second group of shielding structures in the opposing substrate in FIG1 ;

[0037] FIG12 is a schematic diagram of a top view of one of the structures corresponding to the first group of shielding structures and the light shielding layer in the array substrate in FIG1 ;

[0038] FIG13 is a schematic top view of a structure of stacked film layers after the array substrate shown in FIG11 and the counter substrate shown in FIG12 are assembled;

[0039] FIG14 is a schematic top view of one type of structure of related stacked film layers and gates of each first transistor in an array substrate of a display panel provided by an embodiment of the present disclosure;

[0040] FIG15 is a schematic top view of one of the fourth group of shielding structures in the opposing substrate of the display panel provided by an embodiment of the present disclosure;

[0041] FIG16 is a schematic top view of one type of structure of an array substrate in a display panel provided by an embodiment of the present disclosure;

[0042] FIG17 is a schematic top view of one type of structure after the array substrate shown in FIG15 and the counter substrate shown in FIG16 are assembled;

[0043] FIG18 is a schematic top view of a fourth blocking portion and a fifth blocking portion of an opposing substrate in a display panel provided by an embodiment of the present disclosure;

[0044] FIG19 is a schematic top view of one type of the first shielding portion in the array substrate of the display panel provided by an embodiment of the present disclosure;

[0045] FIG20 is a schematic top view of one of the first group of shielding structures in the display panel provided by an embodiment of the present disclosure;

[0046] FIG21 is a schematic diagram of a top view of one of the first group of shielding structures in a display panel provided by an embodiment of the present disclosure;

[0047] FIG22 is a schematic diagram of one structure of stacked film layers in a display panel provided by an embodiment of the present disclosure;

[0048] FIG23 is a schematic diagram of one structure of stacked film layers in a display panel provided by an embodiment of the present disclosure;

[0049] FIG24 is a schematic diagram of one structure of stacked film layers in a display panel provided by an embodiment of the present disclosure;

[0050] FIG25 is a schematic diagram of one structure of stacked film layers in a display panel provided by an embodiment of the present disclosure;

[0051] FIG26 is a schematic diagram of one structure of stacked film layers in a display panel provided by an embodiment of the present disclosure;

[0052] FIG27 is a schematic diagram of one structure of stacked film layers in a display panel provided by an embodiment of the present disclosure;

[0053] FIG28 is a process flow chart of one method for manufacturing the array substrate in FIG1 ;

[0054] FIG. 29 is a flow chart showing one process for manufacturing the opposing substrate in FIG. 1 . DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solutions and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. And in the absence of conflict, the embodiments in the present disclosure and the features in the embodiments can be combined with each other. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0056] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Inside", "outside", "upper", "lower" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0057] It should be noted that the sizes and shapes of the figures in the accompanying drawings do not reflect the actual scale and are only for the purpose of illustrating the present disclosure. The same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions.

[0058] In related technologies, the COA (Color Filter on Array) technology can be used to integrate a color filter layer on an array substrate. Accordingly, a black matrix and a color filter layer are arranged on the array substrate, thereby effectively eliminating the deviation generated when the opposing substrate and the array substrate are aligned, thereby improving the aperture ratio of the display device and reducing light leakage.

[0059] However, conventional organic material-based BM processes often produce BM patterns with a CD greater than 2.5μm, failing to meet the requirements of VR display technology for display resolutions ≥1500PPI. Furthermore, the thickness of BMs made with organic materials approaches 1μm, making it difficult to reduce them to a thinner thickness. Furthermore, the module reflectivity is generally greater than 3%, resulting in poor display quality.

[0060] In view of this, embodiments of the present disclosure provide a display panel and a display device for realizing a high PPI design of a display product.

[0061] As shown in FIG1 , an embodiment of the present disclosure provides a display panel, including:

[0062] An array substrate 10, an opposing substrate 20 disposed opposite to the array substrate 10, and a liquid crystal layer 30 located between the array substrate 10 and the opposing substrate 20;

[0063] At least one group of shielding structures 40 is provided in the array substrate 10 and the opposing substrate 20, each group of the shielding structures includes a stacked film layer 50, and the stacked film layer 50 includes a first metal layer 51, a first dielectric layer 52, a second metal layer 53 and a second dielectric layer 54 arranged in a stacked manner. The optical refractive index of the first dielectric layer 52 and the second dielectric layer 54 is a first refractive index, the optical refractive index of the first metal layer 51 and the second metal layer 53 is a second refractive index greater than the first refractive index, and the thickness difference between the first metal layer 51 and the second metal layer 53 is greater than a preset value.

[0064] In a specific implementation, the display panel provided by the embodiment of the present disclosure includes an array substrate 10, an opposing substrate 20, and a liquid crystal layer 30; wherein the array substrate 10 and the opposing substrate 20 are arranged opposite each other, and the liquid crystal layer 30 is located between the array substrate 10 and the opposing substrate 20. Moreover, at least one group of shielding structures 40 is provided in the array substrate 10 and the opposing substrate 20, and each group of shielding structures can effectively prevent light mixing and color cross-talk. In one exemplary embodiment, a group of shielding structures can be provided in each of the array substrate 10 and the opposing substrate 20; in one exemplary embodiment, a group of shielding structures can be provided only on the array substrate 10; in one exemplary embodiment, a group of shielding structures can be provided only on the opposing substrate 20. Of course, the required shielding structures can also be provided in the array substrate 10 and the opposing substrate 20 according to actual application needs, which will not be described in detail here.

[0065] In addition, each group of shielding structures includes a stacked film layer 50, which includes a first metal layer 51, a first dielectric layer 52, a second metal layer 53, and a second dielectric layer 54 arranged in a stacked manner; wherein, for the specific arrangement of the first metal layer 51, the first dielectric layer 52, the second metal layer 53, and the second dielectric layer 54 in the stacked film layer 50, please refer to the description of the relevant part below. The optical refractive index of the first dielectric layer 52 and the second dielectric layer 54 is a first refractive index, and the optical refractive index of the first metal layer 51 and the second metal layer 53 is a second refractive index greater than the first refractive index. In this way, not only can the stacked film layer 50 block the reflection of the relevant metal traces in the display panel, but when the stacked film layer 50 is used for the black matrix, the problem of cross-color can be effectively prevented, thereby ensuring the display effect of the display panel. For example, the optical refractive index of the first dielectric layer 52 and the second dielectric layer 54 is 1.8, and the optical refractive index of the first metal layer 51 and the second metal layer 53 is 3.5. Of course, the specific materials of each film layer in the stacked film layer 50 can also be set according to the actual application needs, and the optical refractive index of the corresponding film layer can be set. In this way, when the stacked film layer 50 is placed above the relevant metal traces, the corresponding reflections can be effectively blocked, thereby effectively reducing the reflection of light through the stacked film layer 50. Moreover, the thickness difference between the first metal layer 51 and the second metal layer 53 is greater than the preset value. Exemplarily, the thickness of the first metal layer 51 is greater than the thickness of the second metal layer 53, and the thickness difference between the thickness of the first metal layer 51 and the thickness of the second metal layer 53 is greater than the preset value. Exemplarily, the thickness of the first metal layer 51 is 100nm, the thickness of the second metal layer 53 is 6nm, and the preset value is 30nm. Of course, the specific value of the preset value can be set according to the actual application needs and is not limited here.

[0066] It should be noted that, since the stacked film layer 50 included in each group of shielding structures in the embodiment of the present disclosure includes a first metal layer 51, a first dielectric layer 52, a second metal layer 53, and a second dielectric layer 54 arranged in a stacked manner, during the actual preparation of the stacked film layer 50 of the desired pattern through processes such as exposure and etching, the graphic CD of the stacked film layer 50 can be set to less than 2μm, and the total thickness of the stacked film layer 50 can be set to less than 0.25μm, and the module reflectivity can be reduced to less than 2%. In other words, the use of the stacked film layer 50 in the embodiment of the present disclosure can not only effectively reduce the size of the corresponding graphic CD, but also effectively reduce the total thickness of the stacked film layer 50. In this way, while improving the transmittance of the display panel and reducing cross-color through the stacked film layer 50, the display contrast can also be improved by reducing the light reflectivity of the display panel, thereby providing a possibility for high PPI design of display products.

[0067] In the embodiments of the present disclosure, the following implementations may be used to set each group of shielding structures in the corresponding substrate, but are not limited to the following implementations.

[0068] In one exemplary embodiment, a first group of blocking structures 41 is provided in the array substrate 10; the array substrate 10 also includes a first substrate 11, and a color filter layer 12 located on the first substrate 11, the color filter layer 12 has a plurality of color block rows 121 extending along a first direction and arranged along a second direction intersecting the first direction, each of the color block rows 121 includes a plurality of filter portions 122, and a first gap is provided between two adjacent filter portions 122 in the color filter layer 12; the first group of blocking structures 41 has a first blocking portion 411 including the stacked film layer 50, and the orthographic projection of the first blocking portion 411 on the first substrate 11 covers the orthographic projection of the first gap on the first substrate 11.

[0069] In one exemplary embodiment, a first set of shielding structures 41 is provided in the array substrate 10. This first set of shielding structures 41 can effectively prevent reflection issues from related metal traces in the array substrate 10. When used in a black matrix, this first set of shielding structures 41 can effectively prevent color crosstalk, thereby ensuring the display quality of the display panel. Specifically, the array substrate 10 also includes a first substrate 11 and a color filter layer 12 located on the first substrate 11. The color filter layer 12 has a plurality of color resist rows 121 extending along a first direction and arranged along a second direction intersecting the first direction. Each color resist row 121 includes a plurality of filter portions 122, and a first gap is defined between adjacent filter portions 122 in the color filter layer 12. The specific number of color resist rows 121 and the specific number of filter portions 122 on each color resist row 121 can be set according to actual application requirements. The plurality of filter portions 122 include color resist blocks of multiple colors, thereby ensuring color display of the display panel. Illustratively, the multiple filter sections 122 include red, green, and blue color blocks. FIG. 2 illustrates a top view of one embodiment of the color filter layer 12. FIG. 3 illustrates another top view of the color filter layer 12. It should be noted that FIG. 2 and FIG. 3 illustrate only a portion of the filter sections 122, and do not imply that the color filter layer 12 is comprised solely of these filter sections 122.

[0070] It should be noted that, in the embodiments of the present disclosure, unless otherwise specified, the first direction may be the direction indicated by the arrow X in the figure, and the second direction may be the direction indicated by the arrow Y in the figure. In one exemplary embodiment, the display panel includes a plurality of data lines and a plurality of gate lines intersecting the plurality of data lines. The first direction may be a direction extending along the gate lines, and the second direction may be a direction extending along the data lines. In addition, still in combination with the exemplary embodiment shown in FIG1 , the first group of shielding structures 41 is located on the side of the color filter layer 12 facing away from the first substrate 11. Moreover, the first group of shielding structures 41 has a first shielding portion 411 extending along the second direction. The first shielding portion 411 includes a stacked film layer 50, and the orthographic projection of the first shielding portion 411 on the first substrate 11 covers the orthographic projection of the first gap on the first substrate 11. In this way, when the first shielding portion 411 in the first group of shielding structures 41 is used as a black matrix, the problem of cross-color can be effectively avoided, thereby ensuring the display effect of the display panel. In one exemplary embodiment, FIG4 is a schematic diagram of a top view of the first shielding portion 411 in the array substrate 10.

[0071] In one exemplary embodiment, a second group of blocking structures 42 is provided in the opposing substrate 20, and the first group of blocking structures 41 is located on the side of the color filter layer 12 away from the first substrate 11; the opposing substrate 20 also includes a second substrate 21, the second group of blocking structures 42 is arranged on the second substrate 21, and has a second blocking portion 421 extending along the first direction, and the first blocking portion 411 is extended along the second direction; the second blocking portion 421 includes the stacked film layer 50, and the orthographic projection of the second blocking portion 421 on the second substrate 21 covers the orthographic projection of the second gap between two adjacent filter portions 122 on the second substrate 21, and the second gap intersects with the extension direction of the first gap; the orthographic projections of the second blocking portion 412 and the first blocking portion 411 on the same substrate enclose a plurality of opening areas H of the array substrate 10, and each of the opening areas H is arranged corresponding to the corresponding filter portion 122.

[0072] Still referring to the exemplary embodiment shown in FIG1 , not only is a first set of shielding structures 41 provided in the array substrate 10, but a second set of shielding structures 42 is also provided in the opposing substrate 20. Specifically, the first set of shielding structures 41 is located on the side of the color filter layer 12 facing away from the first substrate 11, and the first set of shielding structures 41 has a first shielding portion 411 extending along the second direction, the first shielding portion 411 comprising a stacked film layer 50. The opposing substrate 20 also includes a second substrate 21, and the second set of shielding structures 42 is provided on the second substrate 21 and has a second shielding portion 421 extending along the first direction, the second shielding portion 421 comprising a stacked film layer 50. The orthographic projection of the second shielding portion 421 on the second substrate 21 covers the orthographic projection of the second gap between two adjacent filter portions 122 on the second substrate 21, and the second gap intersects the extension direction of the first gap. In this exemplary embodiment, the first gap extends along the second direction, and the second gap extends along the first direction. In this exemplary embodiment, FIG5 is a schematic diagram of a top view of one of the second group of shielding structures 42 in the opposing substrate 20, and FIG6 is a schematic diagram of a top view of one of the shielding structures after the array substrate 10 shown in FIG4 is aligned with the opposing substrate 20 shown in FIG5. In this way, when the first group of shielding structures 41 and the second group of shielding structures 42 are subsequently used in the black matrix, the color cross-talk problem is avoided and the light reflectivity of the display panel is reduced. Moreover, in this exemplary embodiment, the orthographic projections of the second shielding portion 421 and the first shielding portion 411 on the same substrate enclose multiple opening areas H of the array substrate 10, and each opening area H is correspondingly provided with a corresponding filter portion 122. That is, in actual application, the pixel opening area of ​​the display panel can be formed by designing the second shielding portion 421 and the first shielding portion 411 accordingly. In this way, the transmittance of the subsequent display panel is guaranteed.

[0073] In one exemplary embodiment, a third group of blocking structures 43 is provided on the opposing substrate 20, and the first group of blocking structures 41 is located between the color filter layer 12 and the first substrate 11; the opposing substrate 20 also includes a second substrate 21, the third group of blocking structures 43 is provided on the second substrate 21, and has a third blocking portion 431 extending along the second direction, and the first blocking portion 411 is extended along the first direction; the orthographic projection of the third blocking portion 431 on the second substrate 21 covers the orthographic projection of the second gap between two adjacent filter portions 122 on the second substrate 21, and the second gap intersects with the extension direction of the first gap; the orthographic projections of the third blocking portion 431 and the first blocking portion 411 on the same substrate enclose a plurality of opening areas H of the array substrate 10, and each of the opening areas H is provided corresponding to the corresponding filter portion 122.

[0074] In the exemplary embodiment shown in FIG7 , not only is a first set of shielding structures 41 provided in the array substrate 10, but a third set of shielding structures 43 is also provided in the opposing substrate 20. Specifically, the first set of shielding structures 41 is located between the color filter layer 12 and the first substrate 10, and includes a first shielding portion 411 extending along a first direction. This first shielding portion 411 includes a stacked film layer 50. The opposing substrate 20 also includes a second substrate 21. The third set of shielding structures 43 is provided on the second substrate 21 and includes a third shielding portion 431 extending along a second direction. This third shielding portion 431 includes a stacked film layer 50. The orthographic projection of the third shielding portion 431 on the second substrate 21 covers the orthographic projection of the second gap between two adjacent filter portions 122 on the second substrate 21. The second gap intersects the extension direction of the first gap. In this exemplary embodiment, the first gap extends along the first direction, and the second gap extends along the second direction. In this exemplary embodiment, FIG8 is a schematic diagram of a top view of one of the first group of shielding structures 41 in the array substrate 10, FIG9 is a schematic diagram of a top view of one of the third group of shielding structures 43 in the opposing substrate 20, and FIG10 is a schematic diagram of a top view of one of the shielding structures after the array substrate 10 and the opposing substrate 20 are aligned. In this way, when the first group of shielding structures 41 and the third group of shielding structures 43 are subsequently used in the black matrix, the color cross-talk problem is avoided and the light reflectivity of the display panel is reduced. In actual applications, the third group of shielding structures 43 in the opposing substrate 20 can be reused as the light shielding layer 60. The specific settings can be referred to the description of the relevant parts below and will not be described in detail here.

[0075] Furthermore, the orthographic projections of the third shielding portion 431 and the first shielding portion 411 on the same substrate enclose multiple opening areas H of the array substrate 10, each opening area H being provided in correspondence with a corresponding filter portion 122. In other words, in practical applications, the pixel opening area of ​​the display panel can be formed by designing the third shielding portion 431 and the first shielding portion 411 accordingly. This ensures the subsequent light transmittance of the display panel.

[0076] Still in combination with the exemplary embodiment shown in Figure 1, the array substrate 10 also includes a first substrate 11, a color filter layer 12 located on the first substrate 11, and a shading layer 60 located between the color filter layer 12 and the first substrate 11, and the shading layer 60 includes the stacked film layer 50.

[0077] In the exemplary embodiment shown in FIG1 , the array substrate 10 further includes a color filter layer 12 located on a first substrate 11, and a light shielding layer 60 located between the color filter layer 12 and the first substrate 11. The light shielding layer 60 includes a stacked film layer 50. In this exemplary embodiment, FIG11 is a schematic top view of a second shielding portion 421 corresponding to the second set of shielding structures 42 in the counter substrate 20, and FIG12 is a schematic top view of a stacked film layer 50 corresponding to the first set of shielding structures 41 and the light shielding layer 60 in the array substrate 10. Exemplarily, the arrangement of the light shielding layer 60 can be substantially the same as the arrangement of the second shielding portions 421 in the second set of shielding structures 42. Exemplarily, the pattern orientation of the light shielding layer 60 can be substantially the same as the pattern orientation of the second shielding portions 421. Based on the exemplary embodiments shown in FIG11 and FIG12 , FIG13 is a schematic top view of a stacked film layer 50 after the array substrate 10 and the counter substrate 20 are assembled.

[0078] In the embodiment of the present disclosure, the array substrate 10 also includes a plurality of first transistors 80 located in the display area and a plurality of second transistors 90 located in the peripheral area, each of the first transistors 80 is located between the light-shielding layer 60 and the color filter layer 12, the active layer of each of the first transistors 80 is a metal oxide semiconductor material, and the active layer of each of the second transistors 90 is a low-temperature polycrystalline silicon material; the orthographic projection of the gate of each of the first transistors 80 on the first substrate 11 completely falls within the area of ​​the orthographic projection of the light-shielding layer 60 on the first substrate 11.

[0079] Still referring to the exemplary embodiment shown in FIG1 , the array substrate 10 further includes a plurality of first transistors 80 located in the display area and a plurality of second transistors 90 located in the peripheral area. FIG1 illustrates a case where there are three first transistors 80 and one second transistor 90. Of course, the specific number of the plurality of first transistors 80 and the plurality of second transistors 90 can be set according to actual application needs and is not limited here.

[0080] In addition, the active layer of each first transistor 80 is a metal oxide semiconductor material, and the active layer of each second transistor 90 is a low-temperature polysilicon material; in this way, each first transistor 80 is essentially an oxide transistor with a small leakage current; each second transistor 90 is essentially a low-temperature polysilicon (LTPS) type transistor, which has a high mobility and can be made thinner and smaller, with lower power consumption. In this way, in the embodiment of the present disclosure, the two processes for preparing transistors, LTPS type transistors and oxide transistors, can be combined to prepare a low-temperature polysilicon + oxide (LTPO) circuit structure of low-temperature polysilicon oxide. In addition, the orthographic projection of the gate of each first transistor 80 on the first substrate 11 completely falls within the area of ​​the orthographic projection of the light shielding layer 60 on the first substrate 11. Exemplarily, the arrangement of the second shielding portion 421 in the second group of shielding structures 42 is roughly the same as the arrangement of the gate of each first transistor 80. Exemplarily, the graphic direction of the second blocking portion 421 is substantially the same as the graphic direction of the gate of each first transistor 80. In one exemplary embodiment, FIG14 shows a schematic diagram of a top view of the relevant stacked film layer 50 and the gate of each first transistor 80 in the array substrate 10. In one exemplary embodiment, a fourth group of blocking structures 100 is provided in the opposing substrate 20; the opposing substrate 20 further includes a second substrate 21, the fourth group of blocking structures 100 is provided on the second substrate 21, and the fourth group of blocking structures 100 has a fourth blocking portion 101 extending along a first direction and a fifth blocking portion 102 extending along a second direction intersecting the first direction. At least one of the fourth blocking portion 101 and the fifth blocking portion 102 includes the stacked film layer 50, and the orthographic projections of the fourth blocking portion 101 and the fifth blocking portion 102 on the same substrate enclose multiple opening areas H of the array substrate 10.

[0081] During the specific implementation, the fourth group of shielding structures 100 is only provided on the opposing substrate 20. Specifically, the opposing substrate 20 further includes a second substrate 21, and the fourth group of shielding structures 100 is provided on the second substrate 21. The fourth group of shielding structures 100 includes a fourth shielding portion 101 extending along a first direction and a fifth shielding portion 102 extending along a second direction intersecting the first direction. In one exemplary embodiment, the fourth shielding portion 101 and the fifth shielding portion 102 both include stacked film layers 50. FIG15 is a schematic top view of one embodiment of the fourth group of shielding structures 100 in the opposing substrate 20, and FIG16 is a schematic top view of one embodiment of the array substrate 10 in this exemplary embodiment, where reference numeral 01 represents a bonding electrode layer located on the side of the common electrode layer 236 facing away from the first substrate 11. Based on the exemplary embodiments shown in FIG15 and FIG16 , FIG17 is a schematic top view of one embodiment of the related film layer structure after the array substrate 10 and the opposing substrate 20 are assembled. In one exemplary embodiment, the fourth shielding portion 101 includes a stacked film layer 50, and the fifth shielding portion 102 is a black matrix unit made of an organic material. FIG18 is a schematic diagram of a top view of the fourth shielding portion 101 and the fifth shielding portion 102 of the counter substrate 20 in this exemplary embodiment. Moreover, the orthographic projections of the fourth shielding portion 101 and the fifth shielding portion 102 on the same substrate enclose multiple opening areas H of the array substrate 10. In other words, in actual applications, the pixel opening area of ​​the display panel can be formed by designing the fourth shielding portion 101 and the fifth shielding portion 102. In this way, the transmittance of the subsequent display panel is guaranteed.

[0082] In the actual setting process, the arrangement of the fourth shielding portion 101 can be roughly the same as the arrangement of the gate lines in the array substrate 10, or can be roughly the same as the arrangement of the light shielding layer 60, and at the same time roughly the same as the arrangement of the gates of each first transistor 80. The arrangement of the fifth shielding portion 102 can be roughly the same as the arrangement of the data lines, so as to effectively prevent the reflection of the data lines. In one exemplary embodiment, the graphic CD of the fourth shielding portion 101 is larger than the graphic CD of the gates of each first transistor 80, so as to effectively prevent the reflection of the metal corresponding to the gate, and at the same time, a black matrix unit can be formed to prevent cross-color. For the case where both the fourth shielding portion 101 and the fifth shielding portion 102 include a stacked film layer 50, in the actual preparation process, a mask plate (Mask) can be used to form the graphics of the fourth shielding portion 101 and the fifth shielding portion 102. Exemplarily, a first metal layer 51, a first dielectric layer 52, a second metal layer 53 and a second dielectric layer 54 are sputtered and deposited on the opposing substrate 20, and patterns of the fourth blocking portion 101 and the fifth blocking portion 102 are simultaneously formed through an exposure, development and etching process.

[0083] The fourth shielding portion 101 includes a stacked film layer 50, and the fifth shielding portion 102 is a black matrix unit made of organic material. In the actual preparation process, the first metal layer 51, the first dielectric layer 52, the second metal layer 53 and the second dielectric layer 54 can be first sputter-deposited on the opposing substrate 20, and then the pattern of the fourth shielding portion 101 is formed through an exposure, development and etching process; and then the pattern of the fifth shielding portion 102 is formed by coating an organic black matrix coating and exposing and developing.

[0084] In the embodiment of the present disclosure, if the filter portions 122 corresponding to two adjacent rows of color-block rows 121 are staggered, and the first group of shielding structures 41 in the array substrate 10 includes first shielding portions 411 extending along the second direction, and the first shielding portions 411 are intermittently arranged, FIG19 is an exemplary top view of one embodiment of the first shielding portions 411 in the array substrate 10.

[0085] In one exemplary embodiment, the at least one group of shielding structures 40 is two groups of shielding structures including the first group of shielding structures 41, wherein the shielding portion of one group of the shielding structures has multiple columns of main body portions 70 extending along the second direction, and an extension portion 71 located between the boundary extension lines of the two adjacent columns of the main body portions 70; in the two adjacent columns of the main body portions 70, the width of the same extension portion 71 tends to decrease in the direction from one column of the main body portions 70 to the other column of the main body portions 70.

[0086] Continuing with the exemplary embodiment shown in FIG. 1 , the display panel is provided with two groups of shielding structures, including a first group of shielding structures 41. With reference to the top views of the first group of shielding structures 41 shown in FIG. 20 and FIG. 21 , respectively, the first shielding portion 411 of the first group of shielding structures 41 includes multiple columns of main portions 70 extending along the second direction. The specific number of columns of main portions 70 can be set based on actual application needs and is not limited herein. Furthermore, the first shielding portion 411 further includes an extension portion 71 located between the extension lines of the boundaries of two adjacent columns of main portions 70. Within the adjacent columns of main portions 70, the width of the same extension portion 70 decreases in the direction from one column of main portions 70 to the other column of main portions 70. In practical applications, arc-shaped structures can be provided at opposite ends of each main portion 70 along the second direction to form the desired extension portion 71. In this way, the extension portion 71 can more effectively prevent light leakage from the edges of the corresponding shielding portion, thereby ensuring the display quality of the display panel.

[0087] In one of the exemplary embodiments, the first blocking portions 411 corresponding to two adjacent rows of the color block rows 121 are arranged alternately, and the corresponding extension portions 71 of the staggered first blocking portions 411 are connected together, and the orthographic projections of the first blocking portions 411 on the array substrate 10 enclose a plurality of closed opening areas H, and each of the opening areas H is arranged corresponding to the corresponding filter portion 122.

[0088] Still referring to the exemplary embodiment shown in FIG. 20 , the first blocking portions 411 corresponding to two adjacent color block rows 121 are arranged in a staggered arrangement. Correspondingly, the filter portions 122 corresponding to two adjacent color block rows 121 are arranged in a staggered arrangement. Furthermore, the corresponding extension portions 71 of the staggered first blocking portions 411 are connected together, and the orthographic projections of the first blocking portions 411 on the array substrate 10 enclose multiple closed opening areas H, each of which is arranged corresponding to a filter portion 122. This ensures both the light shielding effect and the light transmittance of the display panel.

[0089] In one exemplary embodiment, the first blocking portions 411 corresponding to two adjacent rows of the color resist rows 121 are staggered, the corresponding extension portions 71 of the staggered first blocking portions 411 are disconnected, and the opening areas H corresponding to two adjacent rows of the color resist rows 121 are connected at the disconnected positions of the corresponding extension portions 71.

[0090] Continuing with the exemplary embodiment shown in FIG. 21 , the first blocking portions 411 corresponding to two adjacent color-resistance rows 121 are arranged in an interlaced manner. Correspondingly, the filters 122 corresponding to two adjacent color-resistance rows 121 are arranged in an interlaced manner. Furthermore, the interlaced first blocking portions 411 are separated from the corresponding extensions 71, and the opening areas H corresponding to two adjacent color-resistance rows 121 are connected at the locations where the corresponding extensions 71 are disconnected. This allows for diverse designs of the first blocking portions 411. Of course, in addition to designing each blocking structure group in the manner described above, each blocking structure group can also be designed based on actual application needs, which will not be detailed here.

[0091] In the embodiment of the present disclosure, the stacked film layer 50 may be arranged in the following manners, but is not limited to the following manners.

[0092] In one exemplary embodiment, as shown in FIG22 , the first metal layer 51, the first dielectric layer 52, the second metal layer 53 and the second dielectric layer 54 are sequentially arranged away from the corresponding substrate, and the thickness of the first metal layer 51 is greater than the thickness of the second metal layer 53. In this exemplary embodiment, the stacked film layer 50 can achieve a single-sided anti-reflection effect. Accordingly, when the stacked film layer 50 is used for a black matrix, the stacked film layer 50 is essentially a blackened anti-reflection film for single-sided anti-reflection. Exemplarily, the material of the first metal layer 51 and the second metal layer 53 is Mo, and the material of the first dielectric layer 52 and the second dielectric layer 54 is SiN. Exemplarily, the stacked film layer 50 shown in FIG22 can achieve a single-sided reflectivity of 1.4% and a transmittance of 0.0035% for light with a wavelength of 550 nm.

[0093] In the embodiment of the present disclosure, the first metal layer 51 and the gates of each second transistor 90 are provided in the same layer and with the same material, and no pattern of the second metal layer 53 is provided at the gates of each second transistor 90 .

[0094] In the exemplary embodiment shown in FIG22 , the first metal layer 51, the first dielectric layer 52, the second metal layer 53, and the second dielectric layer 54 are sequentially arranged away from the first substrate 11, and the thickness of the first metal layer 51 is greater than that of the second metal layer 53. The first metal layer 51 and the gate electrodes of each second transistor 90 are arranged in the same layer and made of the same material, thereby simplifying the manufacturing process of the array substrate 10. Furthermore, no pattern of the second metal layer 53 is provided at the gate electrodes of each second transistor. In other words, in the actual manufacturing process, a portion of the metal in the first metal layer 51 can be used as the gate electrodes of each second transistor 90.

[0095] In one exemplary embodiment, as shown in Figure 23, the stacked film layer 50 also includes a third dielectric layer 110, a third metal layer 120 and a fourth dielectric layer 130 arranged in sequence away from the corresponding substrate, the first metal layer 51 is located between the fourth dielectric layer 130 and the first dielectric layer 52, the optical refractive index of the third dielectric layer 110 and the fourth dielectric layer 130 is the first refractive index, the optical refractive index of the third metal layer 120 is the second refractive index, and the thickness of the third metal layer 120 is less than the thickness of the first metal layer 51.

[0096] Exemplarily, the material of the first metal layer 51, the second metal layer 53, and the third metal layer 120 is at least one of Mo, W, and MoW; the material of the first dielectric layer 52, the second dielectric layer 54, and the third dielectric layer 110 is SiN; the thickness of the first metal layer 51 is not less than 40 nm; the thickness of the second metal layer 53 and the third metal layer 120 is in the range of 5 nm to 8 nm; the thickness of the first dielectric layer 52 is in the range of 40 nm to 70 nm, the thickness of the second dielectric layer 54 is in the range of 40 nm to 70 nm, the thickness of the third dielectric layer 110 is in the range of 40 nm to 70 nm, and the thickness of the fourth dielectric layer 130 is in the range of 40 nm to 70 nm. In this exemplary embodiment, the stacked film layer 50 can achieve a double-sided anti-reflection effect. Accordingly, when the stacked film layer 50 is used in a black matrix, the stacked film layer 50 is essentially a blackened anti-reflection film for double-sided anti-reflection.

[0097] In one exemplary embodiment, if the first metal layer 51 in FIG23 is Mo with a thickness of 100 nm, the first dielectric layer 52 is a SiN film with a thickness of 45 nm, the second metal layer 53 is Mo with a thickness of 6 nm, the second dielectric layer 54 is a SiN film with a thickness of 65 nm, the third dielectric layer 110 and the fourth dielectric layer 130 are both SiN films with a thickness of 50 nm, and the third metal layer 120 is Mo with a thickness of 50 nm, then the stacked film layer 50 shown in FIG23 can achieve a double-sided reflectivity of 1.4% and a transmittance of 0.0035% for light with a wavelength of 550 nm.

[0098] In one exemplary embodiment, as shown in FIG24 , the stacked film layer 50 further includes a first functional layer 140 located between the first dielectric layer 52 and the second metal layer 53. The optical refractive index of the first functional layer 140 is less than the optical refractive index of the second metal layer 53 and greater than the optical refractive index of the first dielectric layer 52. In this exemplary embodiment, the stacked film layer 50 can achieve a single-sided anti-reflection effect. Accordingly, when the stacked film layer 50 is used for a black matrix, the stacked film layer 50 is essentially a blackened anti-reflection film with single-sided anti-reflection. Exemplarily, the material of the first metal layer 51 and the second metal layer 53 is Mo, the material of the first functional layer 140 is TiN, and the material of the first dielectric layer 52 and the second dielectric layer 54 is SiN. Exemplarily, the stacked film layer 50 shown in FIG24 can achieve a single-sided reflectivity of 0.15% and a transmittance of 0.0026% for light with a wavelength of 550 nm. In a specific implementation process, the stacked film layer 50 shown in FIG. 21 can further reduce light reflectivity and light transmittance compared to the stacked film layer 50 shown in FIG. 19 .

[0099] In one exemplary embodiment, as shown in FIG25 , the stacked film layer 50 further includes a fifth dielectric layer 150, a fourth metal layer 160, a second functional layer 170, and a sixth dielectric layer 180, which are sequentially arranged away from the corresponding substrate. The optical refractive index of the fifth dielectric layer 150 and the sixth dielectric layer 180 is the first refractive index, the optical refractive index of the fourth metal layer 160 is the second refractive index, and the optical refractive index of the second functional layer 170 is less than the optical refractive index of the second metal layer 53 and greater than the first refractive index. In this exemplary embodiment, the stacked film layer 50 can achieve a double-sided anti-reflection effect. Accordingly, when the stacked film layer 50 is used in a black matrix, the stacked film layer 50 is essentially a blackened anti-reflection film with double-sided anti-reflection. Exemplarily, the materials of the first dielectric layer 52, the second dielectric layer 54, the fifth dielectric layer 150, and the sixth dielectric layer 180 are SiN, the materials of the first metal layer 51, the second metal layer 53, and the fourth metal layer 160 are Mo, and the materials of the first functional layer 140 and the second functional layer 170 are TiN. For example, the stacked film layer 50 shown in FIG22 can achieve a double-sided reflectivity of 0.15% and a transmittance of 0.0006% for light with a wavelength of 550 nm. Compared to the stacked film layer 50 shown in FIG23 , the stacked film layer 50 shown in FIG25 can further reduce the reflectivity of the corresponding substrate to light.

[0100] In one exemplary embodiment, as shown in FIG26 , the first metal layer 51, the first dielectric layer 52, the second metal layer 53 and the second dielectric layer 54 are sequentially arranged close to the corresponding substrate, and the thickness of the first metal layer 51 is greater than the thickness of the second metal layer 53. In this exemplary embodiment, the stacked film layer 50 can achieve a single-sided anti-reflection effect. Accordingly, when the stacked film layer 50 is used for a black matrix, the stacked film layer 50 is essentially a blackened anti-reflection film for single-sided anti-reflection. Exemplarily, the material of the first metal layer 51 and the second metal layer 53 is Mo, and the material of the first dielectric layer 52 and the second dielectric layer 54 is SiN. Exemplarily, the stacked film layer 50 shown in FIG26 can achieve a single-sided reflectivity of 1.4% and a transmittance of 0.0035% for light with a wavelength of 550 nm. It should be noted that the stacked film layer 50 shown in Figure 22 and the stacked film layer 50 shown in Figure 26 have a different preparation order in actual preparation; moreover, in the exemplary embodiment shown in Figure 22, the stacked film layer 50 can anti-reflect the light incident from the second dielectric layer 54; in the exemplary embodiment shown in Figure 26, the stacked film layer 50 can anti-reflect the light incident from the corresponding substrate.

[0101] In one exemplary embodiment, as shown in FIG27 , a first metal layer 51, a first dielectric layer 52, a second metal layer 53, and a second dielectric layer 54 are sequentially arranged adjacent to their respective substrates. A third functional layer 181 is also disposed between the first dielectric layer 52 and the second metal layer 53. The optical refractive index of the third functional layer 181 is lower than that of the second metal layer 53, but higher than that of the first and second dielectric layers 52 and 54. In this exemplary embodiment, the stacked film layer 50 can achieve a single-sided anti-reflection effect. Accordingly, when used in a black matrix, the stacked film layer 50 is essentially a blackened anti-reflection film that provides single-sided anti-reflection. Exemplarily, the first and second metal layers 51 and 53 are made of Mo; the third functional layer 181 is made of TiN; and the first and second dielectric layers 52 and 54 are made of SiN. Exemplarily, the stacked film layer 50 shown in FIG27 can achieve a single-sided reflectivity of 0.15% and a transmittance of 0.0026% for light with a wavelength of 550 nm. In a specific implementation process, the stacked film layer 50 shown in FIG. 27 can further reduce the reflectivity of the corresponding substrate to light compared to the stacked film layer 50 shown in FIG. 26 .

[0102] Of course, in addition to designing the stacked film layer 50 according to the above-mentioned solution, the specific structure of the stacked film layer 50 and the specific thickness of its inner film layer can also be set according to actual application needs, which will not be detailed here.

[0103] It should be noted that, in one exemplary embodiment, the stacked film layer 50 corresponding to the first shielding portion 411 of the first group of shielding structures 41 in the array substrate 10 may be a blackened anti-reflection film for single-sided anti-reflection; accordingly, the stacked film layer 50 corresponding to the second shielding portion 421 of the second group of shielding structures 42 in the opposing substrate 20 may be a blackened anti-reflection film for double-sided anti-reflection; accordingly, the stacked film layer 50 corresponding to the light-shielding layer 60 in the array substrate 10 may be a blackened anti-reflection film for single-sided anti-reflection. In one exemplary embodiment, the stacked film layer 50 corresponding to the first shielding portion 411 of the first group of shielding structures 41 in the array substrate 10 and the stacked film layer 50 corresponding to the light-shielding layer 60 may be a blackened anti-reflection film for double-sided anti-reflection; accordingly, the stacked film layer 50 corresponding to the second shielding portion 421 of the second group of shielding structures 42 in the opposing substrate 20 may be a blackened anti-reflection film for double-sided anti-reflection. Of course, the specific film layer structure of the shielding structure in the array substrate 10 and the opposing substrate 20 can also be set according to actual application needs, which will not be described in detail here.

[0104] In addition, it should be noted that, in the embodiment of the present disclosure, taking the display panel shown in FIG1 as an example, in addition to the film layers mentioned above, the display panel is also provided with other film layer structures. Exemplarily, for the array substrate 10, it also includes a first buffer layer 190 located between the first substrate 11 and the light shielding layer 60, a first active layer 220 located on the side of the first buffer layer 190 away from the first substrate 11, and a first gate insulating layer 221 located on the side of the first active layer 220 away from the first substrate 11; wherein, the light shielding layer 60 is located on the side of the first gate insulating layer 221 away from the first substrate 11; in addition, the array substrate 10 also includes a first gate layer 222 located on the side of the first gate insulating layer 221 away from the first substrate 11, a second buffer layer 223 located on the side of the light shielding layer 60 away from the first substrate 11, a second active layer 224 located on the side of the second buffer layer 223 away from the first substrate 11, a second gate insulating layer 225 covering the second active layer 224, and a second gate insulating layer 225 located on the side of the second gate insulating layer 225 away from the first substrate 11. The second gate layer 226 on the side of the first substrate 11 is sequentially provided on the first interlayer insulating layer 227 and the second interlayer insulating layer 228 on the side of the second gate layer 226 facing away from the first substrate 11, and the first source and drain layer 229 is provided on the side of the first interlayer insulating layer 227 facing away from the first substrate 11; wherein the first source and drain layer 229 is coupled to the corresponding second active layer 224 at the corresponding position of the first transistor 80 through a via hole that sequentially penetrates the second interlayer insulating layer 228, the first interlayer insulating layer 227, and the second gate insulating layer 225; and the first source and drain layer 229 is coupled to the corresponding first active layer 220 at the corresponding position of the second transistor 90 through a via hole that sequentially penetrates the second interlayer insulating layer 228, the first interlayer insulating layer 227, the second gate insulating layer 225, the light shielding layer 60, and the first gate insulating layer 221. Of course, other film layer structures can also be provided in the display panel according to actual application needs, which will not be described in detail here.

[0105] In addition, the array substrate 10 further includes a second source / drain electrode layer 230 located on the side of the second interlayer insulating layer 228 facing away from the first substrate 11. The second source / drain electrode layer 230 is coupled to the corresponding second active layer 224 at positions corresponding to the first transistor 80 via vias that sequentially penetrate the second interlayer insulating layer 228, the first interlayer insulating layer 227, and the second gate insulating layer 225. Furthermore, the array substrate 10 further includes a first passivation layer 231 located on the side of the second source / drain electrode layer 230 facing away from the first substrate 11. The color filter layer 12 is located on the side of the first passivation layer 231 facing away from the first substrate 11. Furthermore, the array substrate 10 further includes a first planarization layer 232 covering the color filter layer 12, and a pixel electrode layer 233 located on the side of the first planarization layer 232 facing away from the first substrate 11. The pixel electrode layer 233 is coupled to the second source / drain electrode layer 230 via vias that penetrate the first planarization layer 232 and the first passivation layer 231. In addition, the array substrate 10 further includes a second planar layer 234 filled in the via holes of the first planar layer 232, a second passivation layer 235 located on the side of the second planar layer 234 facing away from the first substrate 11, and a common electrode layer 236 located on the side of the second passivation layer 235 facing away from the first substrate 11. The first blocking portions 411 of the first set of blocking structures 41 are disposed on the side of the common electrode layer 236 facing away from the first substrate 11. Furthermore, the array substrate 10 further includes a spacer 240 disposed on the side of the first set of blocking structures 41 facing away from the first substrate 11.

[0106] It should be noted that in Figures 12, 14, and 16, the hexagonal structure can be the spacer 240. In actual preparation, the orthographic projection shape of the spacer 240 on the first substrate 11 can be a circle, which is not limited here. In Figures 11 and 15, the hexagonal structure can be the portion of the stacked film layer 50 corresponding to the main spacer 238 and the auxiliary spacer 239, respectively. The corresponding size of this portion is larger than the size of the corresponding stacked film layer 50, thereby avoiding light leakage and ensuring the display effect of the display panel.

[0107] In the disclosed embodiment, the first active layer 220 is made of low-temperature polysilicon, and the second active layer 224 is made of a metal oxide semiconductor. The pattern arrangement of the first source and drain electrode layer 229 is similar to the pattern arrangement of the data lines in the array substrate 10, and is substantially similar to the pattern arrangement of the first shielding portion 411. In one exemplary embodiment, the pattern CD of the first shielding portion 411 is larger than the pattern CD of the first source and drain electrode layer 229, thereby effectively preventing light reflection from the first source and drain electrode layer 229.

[0108] Exemplarily, taking the display panel shown in Figure 1 as an example, for the opposing substrate 20, it also includes a third flat layer 237 covering the second group of shielding structures 42, and a main spacer 238 and an auxiliary spacer 239 located on the side of the third flat layer 237 away from the second substrate 21; wherein, the thickness of the main spacer 238 is greater than the thickness of the auxiliary spacer 239, and the main spacer 238 is arranged in contact with the spacer 240, and the orthographic projections of the main spacer 238 and the auxiliary spacer 239 on the second substrate 21 completely fall within the area of ​​the orthographic projection of the spacer 240 on the second substrate 21; in this way, after the array substrate 10 and the opposing substrate 20 are aligned, the main spacer 238 can be used to support the liquid crystal box first; when the display panel is squeezed by external force or the liquid crystal box is compressed by factors such as temperature changes, the auxiliary spacer 239 can be used to provide auxiliary support to the liquid crystal box, thereby ensuring the uniformity of the box thickness of the display panel. Furthermore, the orthographic projection of the main spacer 238 on the second substrate 21 completely falls within the orthographic projection of the second set of shielding structures 42 on the second substrate 21. Exemplarily, the arrangement of the second shielding portions 421 in the second set of shielding structures 42 is substantially the same as the arrangement of the second gate layer 226. In one exemplary embodiment, the pattern CD of the second shielding portions 421 is larger than the pattern CD of the second gate layer 226, thereby effectively preventing light reflection from the second gate layer 226.

[0109] Below, taking the display panel shown in Figure 1, in which the shading layer 60 and the first shading portion in the array substrate 10 are the blackened anti-reflection film for single-sided anti-reflection as shown in Figure 22, and the second shading portion in the opposing substrate 20 is the blackened anti-reflection film for double-sided anti-reflection as shown in Figure 23 as an example, the manufacturing process of the array substrate 10 in Figure 1 is explained in detail in combination with the process flow chart shown in Figure 28, and the manufacturing process of the opposing substrate 20 in Figure 1 is explained in detail in combination with the process flow chart shown in Figure 29.

[0110] For the array substrate 10, first, a first buffer layer 190 is formed on the first substrate 11, and a pattern of a first active layer 220 is formed on the side of the first buffer layer 190 facing away from the first substrate 11; a first gate insulating layer 221 is formed on the side of the first active layer 220 facing away from the first substrate 11; then, a first gate layer 222 is formed on the side of the first gate insulating layer 221 facing away from the first substrate 11, and a pattern of a first metal layer 51 is formed; then, on the side of the first metal layer 51 facing away from the first substrate 11, a first dielectric layer 52, a pattern of a second metal layer 53, and a second dielectric layer 54 are sequentially formed; then, the second dielectric layer 54 is sequentially formed on the side of the first dielectric layer 54 facing away from the first substrate 11. A second buffer layer 223, a second active layer 224, a second gate insulating layer 225, a second gate layer 226, a first interlayer insulating layer 227, and a first source-drain electrode layer 229 are formed on one side of the substrate 11. Then, a second interlayer insulating layer 228, a second source-drain electrode layer 230, a first passivation layer 231, a color filter layer 12, and a first planarization layer 232 are formed. Then, a pixel electrode layer 233 is formed, coupled to the second source-drain electrode layer 230 via a via hole penetrating the first planarization layer 232 and the first passivation layer 231. Then, a second planarization layer 234 is formed, filling the corresponding via hole. Then, a second passivation layer 235 is formed. It should be noted that the pixel electrode layer 233 can be made of ITO, thereby improving the aperture ratio. Then, a common electrode layer 236 is formed on the side of the second passivation layer 235 facing away from the first substrate 11. Next, a first light shielding portion is formed above the first source / drain electrode layer 229, corresponding to the stacked film layer 50. This structure can be used as a black matrix. The arrangement of the stacked film layer 50 is substantially the same as that of the first source / drain electrode layer 229. For example, the pattern CD of the first light shielding portion is larger than the pattern CD of the first source / drain electrode layer 229, thereby effectively blocking the reflection of the first source / drain electrode layer 229. At the same time, the first light shielding portion can also be used as a black matrix, thereby effectively preventing color crosstalk. Next, a spacer 240 is formed on the side of the first light shielding portion facing away from the first substrate 11.

[0111] For the counter substrate 20, first, the third dielectric layer 110, the third metal layer 120, the fourth dielectric layer 130, the first metal layer 51, the first dielectric layer 52, the second metal layer 53, and the second dielectric layer 54 are sequentially sputter-deposited on the second substrate 21. Then, through exposure, development, and etching, a second shielding portion 421 of the desired pattern is formed. The arrangement of the second shielding portion 421 is substantially similar to that of the light shielding layer 60 and the second gate layer 226. For example, the pattern CD of the second shielding portion is larger than the pattern CD of the second gate layer 226, thereby effectively blocking light reflected by the second gate layer 226. At the same time, the second shielding portion can also be used as a black matrix to effectively prevent color cross-talk.

[0112] In addition, other preparation processes may be used to produce a display panel of a desired structure according to actual application requirements, which will not be described in detail here.

[0113] Based on the same disclosed concept, an embodiment of the present disclosure further provides a display device, which includes the display panel as described in any one of the above items.

[0114] Since the principle of solving the problem of the display device is similar to that of the aforementioned display panel, the implementation of the display device can refer to the implementation of the aforementioned display panel, and the repeated parts are not repeated here.

[0115] In specific implementations, the display device provided by the embodiments of the present invention can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigation system, an augmented reality device, a virtual reality device, or the like. Other essential components of the display device are well understood by those skilled in the art and are not detailed here, nor should they be construed as limitations of the present invention.

[0116] Although the preferred embodiments of the present disclosure have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present disclosure.

[0117] Obviously, those skilled in the art may make various changes and modifications to the present disclosure without departing from the spirit and scope of the present disclosure. Thus, if these modifications and variations of the present disclosure fall within the scope of the claims of the present disclosure and their equivalents, the present disclosure is intended to include these modifications and variations.

Claims

1. A display panel, wherein: include: an array substrate, an opposing substrate disposed opposite to the array substrate, and a liquid crystal layer located between the array substrate and the opposing substrate; At least one group of shielding structures is provided in the array substrate and the opposing substrate, each group of the shielding structures includes a stacked film layer, the stacked film layer includes a first metal layer, a first dielectric layer, a second metal layer, and a second dielectric layer that are stacked, the optical refractive index of the first dielectric layer and the second dielectric layer is a first refractive index, the optical refractive index of the first metal layer and the second metal layer is a second refractive index greater than the first refractive index, and the thickness difference between the first metal layer and the second metal layer is greater than a preset value.

2. The display panel according to claim 1, wherein: A first group of blocking structures is provided in the array substrate; the array substrate also includes a first substrate, and a color filter layer located on the first substrate, the color filter layer having a plurality of color block rows extending along a first direction and arranged along a second direction intersecting the first direction, each of the color block rows including a plurality of filter portions, and a first gap between two adjacent filter portions in the color filter layer; the first group of blocking structures has a first blocking portion including the stacked film layer, and the orthographic projection of the first blocking portion on the first substrate covers the orthographic projection of the first gap on the first substrate.

3. The display panel according to claim 2, wherein: A second group of shielding structures is provided in the opposing substrate, and the first group of shielding structures is located on a side of the color filter layer facing away from the first substrate; the opposing substrate further includes a second substrate, the second group of shielding structures is provided on the second substrate, and has a second shielding portion extending along the first direction, and the first shielding portion is extended along the second direction; the second shielding portion includes the stacked film layer, and an orthographic projection of the second shielding portion on the second substrate covers an orthographic projection of a second gap between two adjacent filter portions on the second substrate, and the second gap intersects with an extension direction of the first gap; The orthographic projections of the second shielding portion and the first shielding portion on the same substrate enclose a plurality of opening areas of the array substrate, and each of the opening areas is arranged corresponding to a corresponding filter portion.

4. The display panel according to claim 2, wherein: A third group of shielding structures is provided on the opposing substrate, and the first group of shielding structures is located between the color filter layer and the first substrate; the opposing substrate further includes a second substrate, the third group of shielding structures is provided on the second substrate and has a third shielding portion extending along the second direction, and the first shielding portion is extended along the first direction; The orthographic projection of the third shielding portion on the second substrate covers the orthographic projection of the second gap between two adjacent filtering portions on the second substrate, and the extension direction of the second gap intersects with the extension direction of the first gap; The orthographic projections of the third shielding portion and the first shielding portion on the same substrate enclose a plurality of opening areas of the array substrate, and each of the opening areas is arranged corresponding to a corresponding filter portion.

5. The display panel according to claim 1, wherein: A fourth group of blocking structures is provided in the opposing substrate; the opposing substrate also includes a second substrate, the fourth group of blocking structures is provided on the second substrate, and the fourth group of blocking structures has a fourth blocking portion extending along a first direction, and a fifth blocking portion extending along a second direction intersecting with the first direction, at least one of the fourth blocking portion and the fifth blocking portion includes the stacked film layer, and the orthographic projections of the fourth blocking portion and the fifth blocking portion on the same substrate enclose a plurality of opening areas of the array substrate.

6. The display panel according to claim 5, wherein: The fifth shielding portion includes the stacked film layers, and the fourth shielding portion includes a black matrix unit made of an organic material.

7. The display panel according to claim 2, wherein: The at least one group of shielding structures is two groups of shielding structures including the first group of shielding structures, wherein the shielding portion of one group of shielding structures has multiple columns of main body portions extending along the second direction, and extension portions located between the boundary extension lines of the main body portions in two adjacent columns; in the main body portions in two adjacent columns, the width of the same extension portion tends to decrease along the direction from one column of the main body portions to the other column of the main body portions.

8. The display panel according to claim 7, wherein: The first blocking portions corresponding to two adjacent rows of color block rows are arranged in an interlaced manner, and the corresponding extension portions of the interlaced first blocking portions are connected together, and the orthographic projections of the first blocking portions on the array substrate form a plurality of closed opening areas, and each of the opening areas is arranged corresponding to the corresponding filter portion.

9. The display panel according to claim 7, wherein: The first blocking portions corresponding to two adjacent rows of the color resist rows are staggered, the corresponding extension portions of the staggered first blocking portions are disconnected, and the opening areas corresponding to two adjacent rows of the color resist rows are connected at the disconnected positions of the corresponding extension portions.

10. The display panel according to any one of claims 1 to 9, wherein: The array substrate further includes a first substrate, a color filter layer located on the first substrate, and a light shielding layer located between the color filter layer and the first substrate, wherein the light shielding layer includes the stacked film layer.

11. The display panel according to claim 10, wherein: The array substrate also includes multiple first transistors located in the display area and multiple second transistors located in the peripheral area, each of the first transistors is located between the light-shielding layer and the color filter layer, the active layer of each of the first transistors is a metal oxide semiconductor material, and the active layer of each of the second transistors is a low-temperature polycrystalline silicon material; the orthographic projection of the gate of each of the first transistors on the first substrate completely falls within the area of ​​the orthographic projection of the light-shielding layer on the first substrate.

12. The display panel according to claim 11, wherein: The first metal layer, the first dielectric layer, the second metal layer and the second dielectric layer are sequentially arranged away from the corresponding substrates, and the thickness of the first metal layer is greater than that of the second metal layer.

13. The display panel according to claim 12, wherein: The first metal layer and the gates of each second transistor are provided in the same layer and made of the same material, and no pattern of the second metal layer is provided at the gates of each second transistor.

14. The display panel according to claim 12, wherein: The stacked film layers also include a third dielectric layer, a third metal layer, and a fourth dielectric layer, which are sequentially arranged away from the corresponding substrates. The first metal layer is located between the fourth dielectric layer and the first dielectric layer. The optical refractive index of the third dielectric layer and the fourth dielectric layer is the first refractive index, the optical refractive index of the third metal layer is the second refractive index, and the thickness of the third metal layer is less than the thickness of the first metal layer.

15. The display panel according to claim 12, wherein: The stacked film layer further includes a first functional layer located between the first dielectric layer and the second metal layer, wherein the optical refractive index of the first functional layer is smaller than the optical refractive index of the second metal layer and larger than the optical refractive index of the first dielectric layer.

16. The display panel according to claim 15, wherein: The stacked film layers also include a fifth dielectric layer, a fourth metal layer, a second functional layer, and a sixth dielectric layer, which are sequentially arranged away from the corresponding substrates. The optical refractive indexes of the fifth dielectric layer and the sixth dielectric layer are both the first refractive index, the optical refractive index of the fourth metal layer is the second refractive index, and the optical refractive index of the second functional layer is less than the optical refractive index of the second metal layer and greater than the first refractive index.

17. The display panel according to claim 11, wherein: The first metal layer, the first dielectric layer, the second metal layer and the second dielectric layer are sequentially arranged close to the corresponding substrate, and the thickness of the first metal layer is greater than that of the second metal layer.

18. A display device, wherein: include: The display panel according to any one of claims 1 to 17.

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