A circuit for improving the efficiency of a boost switching converter and a post-regulation LDO regulator

Abstract

The application relates to a circuit for improving the efficiency of a switching converter and a post-regulation LDO voltage stabilizer, wherein the LDO voltage stabilizer is used for post-regulation downstream of the switching converter, a feedback control circuit is integrated in the LDO voltage stabilizer circuit, the feedback control circuit detects the pressure difference between the input and output of the LDO voltage stabilizer, and outputs a feedback voltage signal proportional to the pressure difference to the switching converter, the feedback control switching converter output voltage, that is, the input voltage Vin of the LDO, realizes control of the pressure difference of the LDO being equal to the feedback reference voltage value of the switching converter, thereby realizing stable control of the pressure difference of the LDO at different output voltages of the switching converter, avoiding excessive pressure difference of the LDO, excessive output power and heat generation at large output current, and improving the overall efficiency of the switching converter power supply system of the LDO.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology and relates to power management in integrated circuits, especially the combination of switch-mode regulated power supplies and low-dropout linear regulators, which is a circuit to improve the efficiency of switching converters and post-regulating LDO regulators. Background Technology

[0002] As an electronic circuit for stabilizing voltage output, a low-dropout linear regulator (LDO) is a device that provides a low-noise power output, while a switching converter (DC-DC) is a device that converts a DC voltage or current level to another DC voltage or current level. Although LDO regulators provide low-noise output compared to switching converters, they have the disadvantage of lower efficiency. While DC-DC devices have an efficiency exceeding 90%, voltage spurious signals at the switching frequency can generate noise at the switching frequency and its harmonics.

[0003] Using an LDO regulator downstream of the switching converter for post-regulation achieves both the efficiency of the switching converter and the inherent power supply rejection ratio (PSRR) of the LDO regulator, thus purifying the high-noise output. However, this approach still suffers from inefficiency due to the voltage drop across the LDO regulator. Figure 1The diagram shows a traditional circuit that uses an LDO regulator for post-regulation of a switching converter. The first stage DC-DC converter is a traditional step-down converter, consisting of a DC-DC converter inductor L and feedback resistors R11 and R21. Its output powers the input Vin of the subsequent LDO. The second stage is an LDO, containing a power transistor, operational amplifier EA, a reference voltage VREF, a filter capacitor Cbypass, and feedback resistors R1 and R2. Vin is the input of the LDO, and Vout is its output. The DC-DC converter controls its output voltage, i.e., the LDO's input voltage Vin, based on the voltage detected at the feedback pin FB. When the independent DC-DC converter is operating normally and stably, its FB voltage is determined by the internal reference voltage of the DC-DC converter, for example, FB = Vref = 0.8V. When FB < 0.8V, the internal circuit adjusts the inductor to increase the output voltage, and then achieves FB = 0.8V again through the feedback resistor network R11 and R21. Similarly, when FB > 0.8V, the internal circuit adjusts the inductor to decrease the output voltage, and then achieves FB = 0.8V again through the feedback resistor network R11 and R21. Analyzing efficiency, with a DC-DC feedback voltage of 0.8V, a rated output voltage of 5V using a feedback resistor, an LDO output voltage of 1.2V, and an output current Iout = 0.5A, the LDO voltage difference Vin - Vout = 3.8V, corresponding to a power consumption of Pdis = (Vin - Vout) * Iout = 1.9W. The effective output power of the LDO is Pload = Vout * Iout = 0.6W. Therefore, the efficiency of the LDO is Pload / (Pload + Pdis) = 0.6 / 2.5 = 24%, which is very low. This is because most of the power output by the DC-DC converter is consumed by the heat generated by the LDO itself and is not effectively output to the LDO's power supply Vout port.

[0004] In response, Analog Devices (ADI) proposed an improvement scheme to reduce power consumption and increase efficiency, as detailed in "How to Automatically Optimize the Efficiency of LDO Regulators Using Voltage Input-to-Output Control" (ADI Analog Dialogue, Volume 57, Issue 4, October 2023). Figure 2 The diagram illustrates the connection between an LDO regulator LT3041 with VIOC functionality and an upstream DC / DC converter. The upstream DC / DC converter includes an input pin IN, a switching pin SW, and a feedback pin FB. R1-R3 are feedback resistors. The LT3041 regulator includes an input pin IN, an output pin OUT, an enable / undervoltage lockout pin EN / UV, a power good feedback pin PGFB, a voltage input / output control pin VIOC, a set pin SET, a ground pin GND, a current limit pin ILIM, a power good pin PG, and an output sensing pin OUTS. LDOIN V is the input voltage of the LT3041.LDOOUT This refers to the output voltage of the LT3041. The connection between the voltage input / output control pin VIOC and the DC / DC converter feedback pin FB ensures that the voltage difference across the LDO regulator is set as the regulated voltage of the DC / DC converter's FB pin. By selecting a DC / DC converter with a low FB voltage, the voltage difference across the LDO regulator can be significantly reduced, thereby improving overall efficiency. This design utilizes the voltage input / output control pin VIOC, which reduces power consumption and improves efficiency through a single connection. However, under varying load conditions, it requires programming the input-to-output voltage difference by adjusting external resistors R1, R2, and R3. This approach is not conducive to integration of such products. Furthermore, due to the offset of the external resistors, the rated values ​​of R1, R2, and R3 will fluctuate between different batches, thus the accuracy of the FB feedback voltage generated by the ratio of R1, R2, and R3 cannot be guaranteed. Finally, when the LDO outputs a large current, the low resistance voltage drop on the output line causes a decrease in output voltage, leading to a decrease in the detection voltage and affecting the output voltage control accuracy of the DC-DC converter. Summary of the Invention

[0005] The technical problem to be solved by this invention is that the use of LDO regulators downstream of switching converters has low efficiency. Existing solutions that use voltage input to output control to automatically optimize the efficiency of LDO regulators require external resistors to match different loads, which is not conducive to integration and affects circuit accuracy.

[0006] The technical solution of this invention is as follows: a circuit for improving the efficiency of a switching converter and a post-regulating LDO regulator. An LDO regulator is used downstream of the switching converter for post-regulation. The key feature is the integration of a feedback control circuit within the LDO regulator circuit. This circuit utilizes the voltage difference Vin-Vout between the LDO regulator's input Vin and output Vout to regulate the output voltage of the switching converter. The feedback control circuit includes: a first-stage operational amplifier circuit, a second-stage operational amplifier circuit, a bias circuit, and a self-biasing current source. The first input amplifier circuit detects the voltage difference between the LDO regulator's input voltage Vin and output voltage Vout. The second-stage operational amplifier circuit outputs a feedback signal to the switching converter's feedback pin FB based on the voltage difference. The self-biasing current source provides bias current to the bias circuit, which in turn provides a stable operating point for the first-stage operational amplifier circuit.

[0007] The second-stage operational amplifier circuit includes a PMOS transistor P5, adjustment resistors Rf1-Rfn, and a feedback resistor Rfb. The output of the first-stage operational amplifier circuit is the gate of P5. The input Vin of the LDO regulator is connected to the source and body of P5 through a resistor R5. The drain of P5 is grounded through the adjustment resistors Rf1-Rfn and the feedback resistor Rfb. R5 and (Rfb+Rf1...Rfn) form a proportional resistor. The drain of P5 simultaneously outputs a feedback voltage VR to the feedback pin FB of the switching converter.

[0008] Furthermore, the first-stage operational amplifier circuit includes resistors R4 and R5, PMOS transistors P1-P4, and a compensation capacitor Cc. P1 is connected in series with R4, and P2 is connected in series with R5, serving as detection terminals to detect the input Vin and output Vout voltages of the LDO regulator. Specifically, the output Vout of the LDO regulator is connected to the source of P1 via R4, and the input Vin is connected to the source and body of P2, the body of P1, the body of P3, and the body of P4 via R5. The drain of P1 is connected to the source of P3, the drain of P2 is connected to the source of P4, the gate of P3 is connected to the gate and drain of P4, and the drains of P3 and P4 are connected to the bias circuit. The compensation capacitor Cc is connected between the gates of P1 and P2 and the drain of P3. P2 and P4 form diodes to provide mirror current sources for P1 and P3. The drain of P3 outputs the voltage difference between Vin and Vout.

[0009] Furthermore, the self-biased current source includes a depletion-type NMOS transistor ND, a resistor R3, and NMOS transistors N1 and N3. The bias circuit includes NMOS transistors N2, N4, N5, and N6. The input Vin of the LDO regulator is connected to the drain of ND. ND provides the reference current. N1, N3, and R3 form a common-source cascode self-biased current source for biasing. N2 and N4, and N5 and N6 form a common-source cascode biased current source.

[0010] Furthermore, the self-biased current source and bias circuit are specifically connected as follows: the gate, drain, and body of ND are connected to the gates of N3, N4, and N6; the gate, drain, and body of ND are also connected to the drain of N3 and the gates of N1, N2, and N5 via R3; the source of N3 is connected to the drain of N1; and the source and body of N1, the body of N3, the body of N4, the source and body of N2, the body of N6, and the source and body of N5 are all grounded.

[0011] Furthermore, when the first-stage operational amplifier circuit detects the voltage difference between the input voltage Vin and the output voltage Vout of the LDO regulator, detection ports for Vin and Vout are brought out from the two ends of the power transistor using Kelvin contacts.

[0012] This invention provides a novel feedback control technology that can provide feedback from an LDO regulator to regulate the output voltage of a switching converter.

[0013] First, this invention employs two internally integrated proportional resistors: R5, and a combination of adjustment resistors Rf1-Rfn and feedback resistor Rfb. The feedback voltage VR at the feedback pin FB of the input switch converter is calculated as (Rfb + Rf1 + ... + Rfn) * (Vin - Vout) / R5. By adjusting Rf1-Rfn and regulating the series resistance of Rfb, the ratio of (Rfb + Rf1 + ... + Rfn) to R5 is changed, thereby altering the ratio of the feedback voltage VR to (Vin - Vout). For example, by setting the Rf1-Rfn ratio to 1:2:4:8, etc., different ratios of the feedback voltage VR to (Vin - Vout) such as 0.5, 1, 1.1, 1.2...2, 3, 4 can be achieved. For example, with a feedback voltage of 0.8V, the voltage difference (Vin-Vout) can be adjusted to achieve different ratios such as 0.4V, 0.8V, 0.88V...1.6V, 2.4V, 3.2V, etc., thus realizing the control of LDO voltage drop and DC-DC feedback voltage ratio, which is easy to integrate.

[0014] Secondly, as mentioned above, the resistor adjustment technology facilitates precise control over a wide Vin and Vout voltage range, unlike ADI's solution where voltage control accuracy is affected by fluctuations in resistor ratings.

[0015] Finally, due to internal integration, R4 and R5 of the first-stage operational amplifier circuit detect the voltage difference of the LDO power transistor, which can be directly connected to the two ends of the power transistor using Kelvin contacts. This avoids the output voltage loss caused by the voltage drop on the output lead when the current is high, and is conducive to the accurate detection of the LDO voltage difference.

[0016] The circuit employing this invention, when combined with a switching converter and a post-regulated LDO regulator, can handle high-noise inputs while optimizing system efficiency. The feedback control technology of this invention can automatically adjust to optimize the system when the load changes. It also improves efficiency and reduces power consumption. Through the feedback control designed in this invention, the LDO regulator can dynamically adjust the upstream DC-DC converter in real time, thereby achieving excellent efficiency. For example, if the rated feedback voltage of the DC-DC converter is 0.8V, the DC-DC output voltage is 6V, the rated output voltage of the LDO is 1.2V, and the output current Iout = 0.5A, then the voltage difference of the LDO Vin - Vout = 3.8V, corresponding to a power consumption of Pdis = (Vin - Vout) * Iout = 1.9W. The effective output power of the LDO is Pload = Vout * Iout = 0.6W, and the efficiency of the LDO is Pload / (Pload + Pdis) = 0.6 / 2.5 = 24%, which is very low. This is because most of the power output by the DC-DC converter is consumed by the heat generated by the LDO itself and is not effectively output to the LDO's power supply Vout port. In the same application system, the DC / DC converter no longer uses the feedback resistor network R11 and R21 for regulation. Instead, it uses the LDO differential voltage feedback control circuit of this invention. The combination of R5 and Rfb + (Rf1-Rfn) sets the feedback voltage VR and the ratio of (Vin-Vout) to 1:1. Then the LDO differential voltage is Vin-Vout = 0.8V, Iout = 0.5A, and the corresponding power consumption is Pdis = (Vin-Vout) * Iout = 0.4W. The effective output power of the LDO is Pload = Vout * Iout = 0.6W. Therefore, the efficiency of the LDO is Pload / (Pload+Pdis) = 0.6 / 1 = 60%, which is much greater than 24%, significantly improving efficiency and reducing the heat dissipation impact caused by chip heat generation. From the above analysis, a smaller Pdis indicates higher efficiency, therefore the (Vin-Vout) voltage drop should be reduced. However, for LDO circuits, the larger the current, the larger the required minimum voltage drop. Furthermore, the feedback voltage of a DC / DC converter is fixed, while the voltage drop (Vin-Vout) of an LDO regulator is adjustable. To balance low voltage drop and high efficiency with the requirement of minimum voltage drop at high current, this invention introduces a trimming resistor. Without changing the overall circuit structure and components, different circuit specifications are provided through the trimming resistor to adapt to different current requirements of the LDO circuit. For example, when there is no trimming, i.e., the trimming resistor is 0, the Rfb resistance is at its minimum, and the ratio of (Vin-Vout):VR = R5 / (Rfb+Rf1+…+Rfn) is at its maximum, i.e., (Vin-Vout) is at its maximum, suitable for LDOs with high current. As the trimming resistor increases, the ratio of (Vin-Vout):VR gradually decreases, i.e., (Vin-Vout) decreases, improving efficiency. Attached Figure Description

[0017] Figure 1 This describes a structure for powering an LDO regulator circuit using a conventional DC-DC converter.

[0018] Figure 2 Connection diagram of the LT3041 LDO regulator with VIOC function designed for Analog Devices (ADI) and its upstream switching converter.

[0019] Figure 3 This is a schematic diagram of the circuit for improving the efficiency of the switching converter and the post-adjusting LDO regulator of the present invention. Detailed Implementation

[0020] This invention proposes a circuit to improve the efficiency of switching converters and post-regulating LDO regulators. In scenarios where an LDO regulator is used downstream of a switching converter for post-regulation, a circuit is designed to improve the input-output voltage difference of the LDO regulator. By controlling the output voltage of the switching converter through feedback, the voltage difference of the LDO is controlled to be equal to the feedback reference voltage value of the switching converter, thereby improving the overall efficiency of the power supply system from the switching converter to the LDO.

[0021] like Figure 3 The diagram shown is a specific embodiment of the circuit diagram of the present invention. P1, P2, P3, P4, and P5 are PMOS transistors, and N1, N2, N3, N4, N5, and N6 are NMOS transistors; ND is a depletion-type NMOS transistor. Cc is a compensation capacitor, and R3, R4, R5, and Rfb are resistors. Rf1-Rfn are adjustment resistors, which are adjusted using methods such as laser adjustment. Vin is the input terminal of the LDO and also the output terminal of the DC-DC converter, and Vout is the output terminal of the LDO. FB is the output feedback port of the DC-DC converter.

[0022] This invention integrates a feedback control circuit into an LDO regulator circuit. It utilizes the voltage difference (Vin-Vout) between the LDO regulator's input Vin and output Vout to regulate the output voltage of the switching converter. The feedback control circuit includes: a first-stage operational amplifier circuit, a second-stage operational amplifier circuit, a bias circuit, and a self-biasing current source. The first input amplifier circuit detects the voltage difference between the LDO regulator's input voltage Vin and output voltage Vout. The second-stage operational amplifier circuit outputs a feedback signal to the switching converter's feedback pin FB based on the voltage difference. The self-biasing current source provides bias current to the bias circuit, which in turn provides a stable operating point for the first-stage operational amplifier circuit.

[0023] The second-stage operational amplifier circuit includes a PMOS transistor P5, adjustment resistors Rf1-Rfn, and a feedback resistor Rfb. The output of the first-stage operational amplifier circuit is input to the gate of P5. The input Vin of the LDO regulator is connected to the source and body of P5 through resistor R5. The drain of P5 is grounded through adjustment resistors Rf1-Rfn and feedback resistor Rfb. The drain of P5 also outputs a feedback voltage VR to the feedback pin FB of the switching converter.

[0024] The first-stage operational amplifier circuit includes resistors R4 and R5, PMOS transistors P1-P4, and compensation capacitor Cc. P1 is connected in series with R4, and P2 is connected in series with R5 as detection terminals to detect the input Vin and output Vout voltages of the LDO regulator. Specifically, the output Vout of the LDO regulator is connected to the source of P1 via R4, and the input Vin is connected to the source and body of P2, the body of P1, the body of P3, and the body of P4 via R5. The drain of P1 is connected to the source of P3, the drain of P2 is connected to the source of P4, and the gate of P3 is connected to the gate and drain of P4. The drains of P3 and P4 are connected to the bias circuit. The compensation capacitor Cc is connected between the gates of P1 and P2 and the drain of P3. P2 and P4 form diodes to provide mirror current sources for P1 and P3. The drain of P3 outputs the voltage difference between Vin and Vout.

[0025] The self-biased current source includes a depletion-mode NMOS transistor ND, a resistor R3, and NMOS transistors N1 and N3. The bias circuit includes NMOS transistors N2, N4, N5, and N6. The input Vin of the LDO regulator is connected to the drain of ND. The gate, drain, and body of ND are connected to the gates of N3, N4, and N6. The gate, drain, and body of ND are also connected to the drain of N3 and the gates of N1, N2, and N5 via R3. The source of N3 is connected to the drain of N1. The source and body of N1, the body of N3, the body of N4, the source and body of N2, the body of N6, and the source and body of N5 are all grounded.

[0026] In the circuit of this invention, the power dissipation resistors ND, R3, N3, and N1 form a self-biased current source, providing bias current to N2, N4, N5, and N6. R4, R5, P1, P2, P3, P4, P5, N2, N4, N5, N6, Cc, and Rfb form the core circuit for improving the LDO voltage drop. R4, R5, P1, P2, P3, P4, P5, N2, N4, N5, and N6 form the first stage of the operational amplifier. P1 connected in series with R4 and P2 connected in series with R5 serve as detection terminals to detect the Vin and Vout voltages of the LDO, thereby enabling real-time monitoring of the Vin-Vout voltage drop of the LDO. R5, P5, Rf1-Rfn, and Rfb form the second stage of the operational amplifier to control the voltage division across the adjustment resistors Rf1-Rfn and the feedback resistor Rfb.

[0027] Although ND is used as the reference current, N1 and N3 form a common-source cascode self-biased current source, and N2 and N4, N5 and N6 form a common-source cascode biased current source. P1 and P2 are source-detection inputs, serving as inputs to the first-stage operational amplifier circuit. The output of the first-stage operational amplifier circuit controls the gate of input P5 of the second-stage operational amplifier circuit. The output signal of the second-stage operational amplifier controls the voltage at the FB terminal.

[0028] The first and second stages of the op-amp, along with P5 and the series resistor (Rfb+Rf1+…+Rfn), form a follower circuit. This follower detects the voltage drop Vin-Vout from the power transistor Power of the LDO and applies this voltage drop across R5. Since R5 is connected in series with (Rfb+Rf1+…+Rfn), the output voltage VR is:

[0029] VR=(Rfb+Rf1+…..+Rfn)*(Vin-Vout) / R5

[0030] Feedback is sent to the FB port of the DC-DC.

[0031] When Rf1-Rfn are not adjusted, i.e., these n adjustment resistors Rf1=….=Rfn=0, then when (Rfb+Rf1+…..+Rfn)=R5, VR=Vin-Vout. Alternatively, by adjusting Rf1-Rfn, the series resistance of Rfb can be adjusted, thereby changing the ratio of (Rfb+Rf1+…..+Rfn) and R5, thus achieving a change in the ratio of VR and (Vin-Vout). For example, by setting the ratio of Rf1-Rfn to 1:2:4:8…, different ratios of VR and (Vin-Vout) such as 0.5, 1, 1.1, 1.2….2, 3, 4 can be achieved, thereby meeting the voltage difference requirements under different load currents. For example, with a FB feedback voltage of 0.8V, the voltage difference (Vin-Vout) can be adjusted to achieve different ratios such as 0.4V, 0.8V, 0.88V...1.6V, 2.4V, 3.2V, etc. This is because, for different load currents, with the same Ppower transistor on-resistance, the larger the current, the larger the voltage difference, requiring a higher (Vin-Vout) voltage difference to meet the load-carrying capacity. Therefore, the resistor adjustment technology used facilitates precise control of the voltage difference across the LDO over a wide Vin and Vout voltage range, as well as within different load current ranges.

[0032] When the circuit of this invention is introduced into a DC-DC converter that powers an LDO, the output voltage VR controls the FB voltage of the DC-DC converter. This voltage is compared with the internal reference voltage of the DC-DC converter, for example, the internal reference voltage Vref = 0.8V. When VR < 0.8V, the internal circuit of the DC-DC converter adjusts the inductor to increase the output voltage Vin, thereby increasing the voltage drop across the LDO (Vin - Vout). Simultaneously, the output voltage VR of Rfb rises (Vin - Vout) until VR = 0.8V, achieving a balance in the DC-DC output voltage. Similarly, when VR > 0.8V, the internal circuit of the DC-DC converter adjusts the inductor to decrease the output voltage Vin, thereby decreasing the voltage drop across the LDO (Vin - Vout). Simultaneously, the output voltage VR of Rfb falls (Vin - Vout) until VR = 0.8V, achieving a balance in the DC-DC output voltage. In this system, by introducing a circuit to improve the LDO voltage drop, it is possible to control the voltage drop across the LDO (Vin - Vout) to be equal to the FB feedback reference voltage value of the DC-DC converter, for example, 0.8V. This allows for stable control of the LDO voltage drop at a low level under different DC-DC output voltages, preventing excessive voltage drop and overheating due to excessive output power at high output currents, thus improving the overall efficiency of the DC-DC power supply system to the LDO.

[0033] As an example, in a DC-DC power supply system for an LDO, the DC-DC output voltage is 5V, the FB feedback voltage is 0.8V, the LDO output voltage is 1.8V, and the output current is 0.5A. Then, in... Figure 1 In traditional applications, the power consumed by an LDO is:

[0034] P=(Vin-Vout)xIout=(5-1.8)x0.5=1.6W

[0035] and Figure 3 When the circuit of this invention is used, when Rfb=R5, VR=Vin-Vout, which controls the voltage difference of the LDO to be equal to the DC-DC FB feedback voltage of 0.8V, i.e. (Vin-Vout)=0.8V. Therefore, the power consumption of the LDO is:

[0036] P=(Vin-Vout)xIout=(0.8)x0.5=0.4W

[0037] This significantly reduces the power consumption of the LDO, thereby improving the efficiency of the DC / DC power supply system to the LDO and reducing energy consumption.

[0038] Because the output voltage VR = (Rfb + Rf1 + ... + Rfn) * (Vin - Vout) / R5 is fed back to the FB port of the DC-DC converter. When (Rfb + Rf1 + ... + Rfn) = R5, VR = Vin - Vout; the ratio of (Rfb + Rf1 + ... + Rfn) and R5 can also be adjusted to change the ratio of VR to (Vin - Vout), where (Vin - Vout) = VR * R5 / (Rfb + Rf1 + ... + Rfn). Since VR ultimately equals the FB voltage, (Vin - Vout) = FB * R5 / (Rfb + Rf1 + ... + Rfn). By controlling the ratio of R5 and (Rfb + Rf1 + ... + Rfn), (Vin - Vout) can be made to be higher, equal to, or lower than the FB voltage of the DC-DC converter. For different load currents, with the same on-resistance of the power transistor, the larger the current, the larger the voltage drop, requiring a higher (Vin-Vout) voltage drop to meet the load-carrying capacity. A power transistor is similar to a resistor with a resistance of 1 ohm. At a 100mA current, it drops a voltage of 0.1V, and the minimum voltage drop is 0.1V; at a 1A current, it drops a voltage of 1V, and the minimum voltage drop is 1V. If Vin-Vout < 1V, it cannot output a 1A current and a stable output voltage. Therefore, Vin-Vout > 1V, i.e., the minimum voltage drop, is required. This necessitates balancing the minimum voltage drop and efficiency. The minimum voltage drop must be met based on the LDO's output current for it to operate normally. Furthermore, the smaller the LDO voltage drop, the higher the efficiency. Therefore, the resistor adjustment technology used facilitates precise control of the voltage drop across the LDO over a wide Vin and Vout voltage range, as well as different load current ranges, to adapt to the current requirements of different LDO regulators. This invention uses two internally integrated proportional resistors to control the LDO voltage drop and DC-DC feedback voltage ratio, which is easy to integrate. At the same time, the resistor adjustment technology used facilitates precise control over a wide voltage range. In addition, the internal detection port is located at both ends of the LDO power transistor and uses Kelvin contact, so it can accurately detect the power transistor voltage drop under different loads and avoid losses caused by line loss under high current.

[0039] In summary, this invention can use a simple integrated feedback control circuit to precisely control the LDO voltage difference, thereby improving the efficiency of the DC-DC power supply system to the LDO.

Claims

1. A circuit for improving the efficiency of a switching converter and a post-regulating LDO regulator, wherein an LDO regulator is used downstream of the switching converter for post-regulation, characterized in that... A feedback control circuit is integrated into the LDO regulator circuit. It utilizes the voltage difference Vin-Vout between the LDO regulator's input Vin and output Vout to regulate the output voltage of the switching converter. The feedback control circuit includes: a first-stage operational amplifier circuit, a second-stage operational amplifier circuit, a bias circuit, and a self-biasing current source. The first input amplifier circuit detects the voltage difference between the LDO regulator's input voltage Vin and output voltage Vout. The second-stage operational amplifier circuit outputs a feedback signal to the switching converter's feedback pin FB based on the voltage difference. The self-biasing current source provides bias current to the bias circuit, which in turn provides a stable operating point for the first-stage operational amplifier circuit. The second-stage operational amplifier circuit includes a PMOS transistor P5, adjustment resistors Rf1~Rfn, and a feedback resistor Rfb. The output of the first-stage operational amplifier circuit is the gate of P5. The input Vin of the LDO regulator is connected to the source and body of P5 through a resistor R5. The drain of P5 is grounded through the adjustment resistors Rf1~Rfn and the feedback resistor Rfb. R5 and (Rfb+Rf1+…+Rfn) form a proportional resistor. The drain of P5 simultaneously outputs a feedback voltage VR to the feedback pin FB of the switching converter. Rf1~Rfn is set to a proportional resistor ratio of 1:2:4:8… By adjusting Rf1~Rfn, the ratio of (Rfb+Rf1+…+Rfn) and R5 is changed, thereby realizing the change of the feedback voltage VR and the Vin-Vout ratio.

2. The circuit for improving the efficiency of a switching converter and a post-regulating LDO regulator according to claim 1, characterized in that: The first-stage operational amplifier circuit includes resistors R4 and R5, PMOS transistors P1-P4, and compensation capacitor Cc. P1 is connected in series with R4, and P2 is connected in series with R5 as detection terminals to detect the input Vin and output Vout voltages of the LDO regulator. Specifically, the output Vout of the LDO regulator is connected to the source of P1 via R4, and the input Vin is connected to the source and body of P2, the body of P1, the body of P3, and the body of P4 via R5. The drain of P1 is connected to the source of P3, the drain of P2 is connected to the source of P4, and the gate of P3 is connected to the gate and drain of P4. The drains of P3 and P4 are connected to the bias circuit. The compensation capacitor Cc is connected between the gates of P1 and P2 and the drain of P3. P2 and P4 form diodes to provide mirror current sources for P1 and P3. The drain of P3 outputs the voltage difference between Vin and Vout.

3. The circuit for improving the efficiency of a switching converter and a post-regulating LDO regulator according to claim 1, characterized in that: The self-biased current source includes a depletion-mode NMOS transistor ND, a resistor R3, and NMOS transistors N1 and N3. The bias circuit includes NMOS transistors N2, N4, N5, and N6. The input Vin of the LDO regulator is connected to the drain of ND. ND provides the reference current. N1, N3, and R3 form a common-source, common-gate self-biased current source for biasing. N2 and N4, and N5 and N6 form a common-source, common-gate biased current source.

4. The circuit for improving the efficiency of a switching converter and a post-regulating LDO regulator according to claim 3, characterized in that: The specific connection of the self-biased current source and bias circuit is as follows: the gate, drain and body terminals of ND are connected to the gates of N3, N4 and N6. The gate, drain and body terminals of ND are also connected to the drain of N3 and the gates of N1, N2 and N5 through R3. The source of N3 is connected to the drain of N1. The source and body terminals of N1, N3, N4, N2, N6 and N5 are all grounded.

5. The circuit for improving the efficiency of a switching converter and a post-regulating LDO regulator according to claim 1, characterized in that: When the first-stage operational amplifier circuit detects the voltage difference between the input voltage Vin and the output voltage Vout of the LDO regulator, detection ports for Vin and Vout are brought out from the two ends of the power transistor using Kelvin contacts.

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