Navigation computer system based on FMQL20S and software and hardware collaborative architecture

Abstract

The invention discloses an FMQL20S-based navigation computer system and a software and hardware collaborative architecture, and relates to the field of computer systems. Comprising a programmable fusion chip JFMQL20S4841, a 1553B transceiver and isolation transformer 6, an ARINC429 transceiver 7, a self-isolation RS422 chip 8, a self-isolation RS232 chip 9, an RC resistance-capacitance filter 10, an RS422 first interface chip 11, an RS422 second interface chip 15, an RS422 third interface chip 16 and an RS422 fourth interface chip 17. The method is used for solving the prominent defects of high design cost, poor universality, time-consuming calculation, incapability of miniaturization and the like due to the fact that various performance indexes such as fusion of different sensors and calculation of a large amount of data need to be realized in the current navigation computer system design.

Description

Technical Field

[0001] This application relates to the field of computer systems, and more particularly to a navigation computer system based on FMQL20S and its hardware and software co-architecture. Background Technology

[0002] The navigation computer is a key circuit in an inertial navigation system. With technological advancements, inertial navigation systems are widely used in defense equipment such as aircraft, missiles, and ships, and are gradually expanding into the civilian market. The size and cost of inertial navigation systems have significantly decreased, while their accuracy has continuously improved. An inertial navigation system consists of a main component, including an inertial measurement unit (IMU), a navigation computer, and display and control equipment. In the design process of a navigation system, the navigation computer, as the "brain" of the entire inertial system, includes minimum system design, inertial data acquisition modules, power supply modules, and communication interfaces. It needs to complete tasks such as inertial data acquisition, navigation data processing, and data transmission; its performance directly affects the reliability and accuracy of the navigation system.

[0003] In recent years, researchers have conducted some design work on navigation computer systems, but most are based on DSPs, ARMs, or microcontrollers as standalone core processors. Some designs utilize a DSP+FPGA architecture, leveraging the processing power of the DSP and the scalable interface capabilities of the FPGA to achieve tasks such as data processing, data transmission, and analog signal acquisition. However, DSPs and FPGAs are usually two independent devices, lacking tight integration and flexibility when handling complex software tasks. When facing large amounts of data processing and high-speed data transmission, the interface can introduce data transmission latency and inefficiency. Furthermore, the development process for implementing software functions independently on DSPs and FPGAs is relatively complex and costly. Further research is needed to develop highly integrated navigation computer system architectures that also possess high flexibility and low cost. Summary of the Invention

[0004] The purpose of this application is to provide a navigation computer system and hardware-software co-architecture based on FMQL20S, in order to solve the prominent shortcomings of current navigation computer system designs, which require the fusion of different sensors, processing of large amounts of data, and other performance indicators. These shortcomings include high design costs, poor versatility, long computation time, and inability to be miniaturized.

[0005] To achieve the above objectives, this application adopts the following technical solution:

[0006] On one hand, this application provides a navigation computer system based on FMQL20S, including a programmable fusion chip JFMQL20S4841, a 1553B transceiver and isolation transformer 6, an ARINC429 transceiver 7, a self-isolated RS422 chip 8, a self-isolated RS232 chip 9, an RC filter 10, an RS422 first interface chip 11, an RS422 second interface chip 15, an RS422 third interface chip 16, and an RS422 fourth interface chip 17, wherein:

[0007] One end of the 1553B transceiver and isolation transformer 6 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the aircraft control unit, used to receive host commands and send navigation data.

[0008] One end of the ARINC429 transceiver 7 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the satellite receiver and the atmospheric data system, which is used to realize data cross-linking with the satellite receiver and the atmospheric data system;

[0009] One end of the self-isolated RS422 chip 8 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the fiber optic gyroscope. It is used to receive gyroscope data and parse it according to the gyroscope's frame protocol to store the three-axis angular velocity and gyroscope temperature data in the register.

[0010] One end of the self-isolated RS232 chip 9 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the host computer. It is used to interact with the host computer and transmit real-time data and navigation results for users to view and process directly.

[0011] One end of the RC filter 10 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the accelerometer, which is used to suppress noise in the acquired accelerometer signal.

[0012] One end of the RS422 first interface chip 11 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the aircraft control unit and the fiber optic attitude component, for communication with the aircraft control unit and the fiber optic attitude component.

[0013] One end of the RS422 second interface chip 15 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the satellite receiver for receiving navigation information output by the satellite receiver in real time.

[0014] One end of the RS422 third interface chip 16 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the aircraft control unit. It is used to receive external standard frequency signals and realize synchronization with external devices.

[0015] One end of the RS422 fourth interface chip 17 is connected to the PL terminal of the programmable fusion chip JFMQL20S4841, and the other end is connected to the satellite receiver. It is used to receive the PPS second pulse generated by the satellite receiver and trigger the PS terminal.

[0016] On the other hand, this application provides a hardware and software co-engineering architecture based on FMQL20S, including inertial navigation algorithm processing software and FPGA software, wherein:

[0017] FPGA software includes:

[0018] The data acquisition module is used to acquire 6 pulse signals through RC filter 10, count them, and store the counting results in a register;

[0019] The ARINC429 bus interface module is used to control the reading and writing of the SPI bus through the ARINC429 transceiver 7, enabling data exchange with satellite receivers and atmospheric data systems.

[0020] The gyroscope data acquisition module is used to receive gyroscope data through RS422 interface 8 and parse it according to the gyroscope's frame protocol, storing the three-axis angular velocity and gyroscope temperature data in registers;

[0021] The synchronization signal generation module is used to output a 2.5ms synchronization clock signal through the RS422 interface chip 16 and receive external standard frequency signals to achieve synchronization with external devices.

[0022] The 1553B bus interface module is used to realize the transmission and reception control functions of the 1553B bus through the 1553B transceiver and isolation transformer 6, and to realize information interaction with the external aircraft control unit.

[0023] The RS232 serial communication module is used to connect to an external host computer via a self-isolated RS232 chip 9 to transmit real-time data navigation results for users to view and process directly.

[0024] The RS422 serial communication module is used to interact with external devices through 5 RS422 interface chips 11, 1 channel to communicate with the aircraft control unit, 2 channels to communicate with the fiber optic attitude and bearing components, 1 channel for the inertial navigation product to complete the online upgrade and verification of the fiber optic inertial navigation algorithm processing software, and 1 backup channel for debugging and loading.

[0025] Inertial navigation algorithm processing software includes:

[0026] The satellite navigation data fusion processing module is used to combine and process real-time received satellite receiver, atmospheric data and inertial navigation data through ARINC429 interface 7 and RS422 interface 15, and perform multi-source fusion processing through combined navigation algorithm to output high-precision navigation information in real time.

[0027] The navigation algorithm processing module is used to communicate with the gyroscope data acquisition module 8 and the meter data acquisition module 10 respectively, to collect the angular velocity rate information and acceleration information of external sensor devices in real time, and to realize the instrument data processing and accumulation, instrument data filtering, and real-time analysis and calculation of attitude, velocity and position information using alignment algorithm and pure inertial navigation algorithm.

[0028] Based on the above technical solution, this application can achieve the following technical effects:

[0029] This application addresses the shortcomings of navigation computer systems, such as low integration, high data transmission latency, and high development difficulty. On one hand, it integrates the hardware and software functions and interfaces of each subsystem, leveraging ZYNQ functionality to enrich the processor system and I / O interfaces, effectively resolving hardware driver modules and redundant hardware and software design within the system. This makes the navigation computer system more modular, universal, and miniaturized. On the other hand, it optimizes the system's hardware and software collaborative architecture, integrating navigation algorithm execution modules and interface logic modules on the FMQL20S platform, integrating inertial navigation and satellite navigation interfaces, and using pure inertial navigation algorithms and integrated navigation algorithms to fuse multi-source data, achieving pure inertial navigation and integrated navigation, thus improving system integration and navigation accuracy. This architecture establishes an efficient communication mechanism between hardware and software, and can be applied to various types of integrated navigation systems, such as "pure inertial + satellite navigation" and "pure inertial + atmospheric navigation," for sensor data acquisition, algorithm processing, and high-precision navigation and control. Attached Figure Description

[0030] Figure 1 This is a hardware block diagram of a navigation computer system based on FMQL20S provided in one embodiment of this application;

[0031] Figure 2 This is a schematic diagram of a hardware and software co-engineering architecture provided in an embodiment of this application. Detailed Implementation

[0032] The present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present application will become clearer from the following description and claims. It should be noted that the drawings are all in a very simplified form and are not to scale, and are only used to facilitate and clarify the illustration of the embodiments of the present application.

[0033] It should be noted that, in order to clearly illustrate the content of this application, several embodiments are provided to further explain the different implementations of this application. These embodiments are enumerated rather than exhaustive. Furthermore, for the sake of brevity, content mentioned in the preceding embodiments is often omitted in the following embodiments. Therefore, content not mentioned in the following embodiments can be referred to in the preceding embodiments.

[0034] Example 1

[0035] like Figure 1 The diagram shown is a hardware block diagram of a navigation computer system based on FMQL20S provided in this embodiment. The system includes a DDR3 memory chip 2, an SPIFLASH memory chip 3, a reset chip 4, a crystal oscillator 5, a temperature sensor 18B20 12, a level conversion chip 13, a power supply module 4644 14, a programmable fusion chip JFMQL20S484 1, a 1553B transceiver and isolation transformer 6, an ARINC429 transceiver 7, a self-isolated RS422 chip 8, a self-isolated RS232 chip 9, an RC filter 10, an RS422 first interface chip 11, an RS422 second interface chip 15, an RS422 third interface chip 16, and an RS422 fourth interface chip 17.

[0036] like Figure 1 As shown, the navigation computer system integrates one dual-redundant 1553B interface, four transmit and six receive ARINC429 bus interfaces, one three-axis integrated fiber optic gyroscope signal and one self-isolated RS422 interface, one external information communication interface and one RS232 interface, five external information communication interfaces and five RS422 interfaces, two satellite communication interfaces and two RS422 interfaces, one PPS second pulse (one RS422 interface), one 2.5ms synchronization clock signal and one RS422 interface, three temperature information signals, three temperature sensor interfaces, and other redundant interfaces.

[0037] In this embodiment, the 1553B transceiver and isolation transformer 6 utilize HKA32201 and BT2725A chips, respectively. Used in the aircraft control system, it acts as a remote terminal (RT), receiving commands from the host computer (BC) and sending navigation data. The 1553B bus protocol control logic is implemented at the PL (Programmable Logic Controller) of the System-on-Chips (SOC), using an IP core. The PS (Power Supply) of the SOC operates or reads the 1553B bus protocol controller in real time via the AXI bus to achieve data transmission and reception. This bus employs dual redundant channels, automatically switching to the backup bus when the primary bus fails, enhancing system stability.

[0038] In this embodiment, the ARINC429 transceiver 7 uses the HKZ3593 chip. It is used to implement read / write control of the SPI bus at the PL terminal, enabling data interconnection with satellite communication systems and atmospheric data systems. Compared to the traditional combination of a driver and transceiver required to achieve the 4-transmit, 8-receive ARINC429 communication interface protocol, this chip can be used alone, making the entire system more modular and miniaturized.

[0039] In this embodiment, the self-isolated RS422 interface 8 uses a GKI2682SM chip for gyroscope data acquisition. It receives gyroscope data and parses it according to the gyroscope's frame protocol, storing the three-axis angular velocity and gyroscope temperature data in registers for retrieval by the PS terminal. This self-isolated RS422 interface chip internally utilizes capacitor isolation technology to cut off input / output ground loops, enhancing anti-interference capabilities. Furthermore, RS422 supports simultaneous data transmission and reception, and the bus-side data transmission exhibits differential signal characteristics, ensuring the real-time transmission and reliability of high-precision gyroscope signals.

[0040] In this embodiment, the self-isolated RS232 interface 9 uses the GKI3232SM chip to interact with the host computer. Performance and function monitoring are performed via RS232, and software-defined test thresholds are used for both function and performance monitoring and parameter evaluation. This chip allows for a dual-channel RS-232 interface redundancy design, and the transceiver input / output pins have an ESD protection level of ±15KV, ensuring stable short-distance data transmission.

[0041] In this embodiment, the RC filter circuit 10 is designed with high-precision resistors and capacitors for each accelerometer signal acquisition channel to achieve noise suppression of the acceleration signal.

[0042] In this embodiment, the RS422 interface 11 uses a GKI3490SM transceiver chip. The UART protocol of the RS422 bus interface is implemented at the PL end of the SoC, and the physical layer design is completed by using an RS422 transceiver. It is used for communication with satellite receivers, aircraft control units, and fiber optic attitude control components. This chip has a maximum data rate of up to 10Mbps and features current limiting protection and overvoltage protection, ensuring high-speed and high-reliability data transmission with external devices.

[0043] In this embodiment, the temperature sensor 12 uses a GKQ18B20 chip. It communicates with the host computer, accelerometer, and fiber optic gyroscope via a single-bus protocol, acquiring temperature information from the sensor in real time and compensating for data errors caused by temperature. Using this chip requires only one signal line and one ground line to achieve temperature measurement within a range of -55℃ to +125℃, meeting the wide-temperature-range temperature acquisition requirements of the navigation computer system and improving system accuracy.

[0044] In this embodiment, discrete signals are implemented using the GKI164245SSM level conversion chip 13. Through communication with the aircraft control unit, the navigation computer receives the discrete signals and responds to the normal operation of external devices, enabling the switching of functions for navigation, simulation, testing, and other external devices. The GKI164245SSM level conversion chip has the advantages of wide power supply voltage and bidirectional level conversion, supporting multiple voltage standards for external devices. It eliminates the need to design independent level conversion circuits for each voltage domain, reducing circuit complexity.

[0045] In this embodiment, the power supply unit 14 uses a GKP4644BM chip. The navigation computer board receives a 5V DC power input, which is converted by the GKP4644BM DC-DC converter to the 3.3V, 1.8V, 1.5V, and 1.0V required for normal system operation. This chip has a wide input and output voltage range, and a maximum single-channel output current of up to 4A. It can meet the requirements of multiple input sources and flexibly match the load, making the system more integrated.

[0046] In this embodiment, the entire system uses a 5V DC power input, which is converted by the GKP4644BM power module 14 into 3.3V, 1.8V, 1.5V, and 1.0V required for normal system operation.

[0047] In this embodiment, the system uses the JFMQL20S484 chip 1 as the main controller to build the minimum hardware SOC system. This chip has a maximum clock frequency of 1GHz, which can ensure the high-speed operation of programs and algorithms. The program memory uses two SPI Flash chips EFM25QL256-E8 3, each with a capacity of 256Mbit. The Flash uses an SPI interface to complete data reading or writing. The running memory uses DDR3 memory SM41J128M16M 2, which performs read and write operations after the device is activated by standard instructions. The crystal oscillator 5 is JZPB31G-50-V3-A4-B, which provides stable clock signals to the PS and PL terminals of the SoC. The reset chip 4 is a GKQ706TS, which can monitor the power supply voltage and the operating status of the microprocessor or microcontroller.

[0048] In summary, this system integrates the hardware and software functions and interfaces of each subsystem, reducing hardware driver modules and redundant design within the system. This reduces, for example, the size of the main control component and lowers design costs, making the navigation computer system more modular, universal, and miniaturized. This invention can be applied to various types of combined navigation systems, such as "pure inertial navigation + satellite navigation" and "pure inertial navigation + atmospheric navigation," for sensor data acquisition, algorithm processing, and achieving high-precision navigation and control. It changes the traditional ARM / DSP + FPGA combined architecture, featuring high integration, small size, low power consumption, and low cost.

[0049] Example 2

[0050] like Figure 2 As shown, this embodiment provides a hardware-software co-engineering architecture based on FMQL20S. It includes inertial navigation algorithm processing software and FPGA software, wherein:

[0051] FPGA software includes:

[0052] The data acquisition module is used to acquire 6 pulse signals through RC filter 10, count them, and store the counting results in a register;

[0053] The ARINC429 bus interface module is used to control the reading and writing of the SPI bus through the ARINC429 transceiver 7, enabling data exchange with satellite receivers and atmospheric data systems.

[0054] The gyroscope data acquisition module is used to receive gyroscope data through RS422 interface 8 and parse it according to the gyroscope's frame protocol, storing the three-axis angular velocity and gyroscope temperature data in registers;

[0055] The synchronization signal generation module is used to output a 2.5ms synchronization clock signal through the RS422 interface chip 16 and receive external standard frequency signals to achieve synchronization with external devices.

[0056] The 1553B bus interface module is used to realize the transmission and reception control functions of the 1553B bus through the 1553B transceiver and isolation transformer 6, and to realize information interaction with the external aircraft control unit.

[0057] The RS232 serial communication module is used to connect to an external host computer via a self-isolated RS232 chip 9 to transmit real-time data navigation results for users to view and process directly.

[0058] The RS422 serial communication module is used to interact with external devices through 5 RS422 interface chips 11, 1 channel to communicate with the aircraft control unit, 2 channels to communicate with the fiber optic attitude and bearing components, 1 channel for the inertial navigation product to complete the online upgrade and verification of the fiber optic inertial navigation algorithm processing software, and 1 backup channel for debugging and loading.

[0059] Inertial navigation algorithm processing software includes:

[0060] The satellite navigation data fusion processing module is used to combine and process real-time received satellite receiver, atmospheric data and inertial navigation data through ARINC429 interface 7 and RS422 interface 15, and perform multi-source fusion processing through combined navigation algorithm to output high-precision navigation information in real time.

[0061] The navigation algorithm processing module is used to communicate with the gyroscope data acquisition module 8 and the meter data acquisition module 10 respectively, to collect the angular velocity rate information and acceleration information of external sensor devices in real time, and to realize the instrument data processing and accumulation, instrument data filtering, and real-time analysis and calculation of attitude, velocity and position information using alignment algorithm and pure inertial navigation algorithm.

[0062] Optionally, the inertial navigation algorithm processing software also includes a self-test module, implemented through PS-side software code. This module includes power-on self-test and online self-test. The power-on self-test mainly detects the power supply, main control chip, storage devices, and storage parameters of the inertial navigation product. The online self-test mainly includes the internal temperatures of the inertial navigation product, gyroscope and accelerometer data, navigation algorithm flow, and operating status of fiber optic inertial navigation components. After the self-test is completed, the self-test results are sent to the user through an RS232 interface 9.

[0063] Optionally, the FPGA software also includes a timer module, which establishes a timer with a resolution of 1μs through a crystal oscillator 5. The count value can be read by the PS terminal to verify and record the program running time.

[0064] Optionally, the FPGA software also includes a clock multiplier and divider module, which is used to divide or multiply the 50MHz clock signal input from the crystal oscillator 5 using the internal PLL phase-locked loop to generate the system clock used by the FPGA.

[0065] Optionally, the inertial navigation algorithm processing software also includes a PS interrupt module, which generates a 256kHz synchronous square wave clock by dividing the high-precision crystal oscillator by 5, and generates a synchronous clock with a rate of 400Hz as an interrupt signal through the logic processing of the PL part of the chip, realizing the navigation calculation function in the 2.5ms interrupt period.

[0066] Optionally, the FPGA software also includes a PPS second pulse interface, which is used by the RS422 interface chip 17 to acquire the PPS second pulse output from the satellite navigation board and generate an interrupt for PS triggering.

[0067] Optionally, the FPGA software also includes an AXI bus control module, which controls the internal AXI bus of the chip to realize data exchange between the PL end and the PS end;

[0068] Optionally, the inertial navigation algorithm processing software also includes a program and parameter upload / download module, which consists of the internal interface of the main control chip. This module is used to implement the upload / download functions of the program and gyroscope / addressing calibration parameters through software code, and can also upload the results to the system through offline data processing.

[0069] In summary, this solution optimizes the system's hardware and software collaborative architecture, integrates navigation algorithm operation modules and interface logic modules on the FMQL20S platform, integrates inertial navigation and satellite navigation interfaces, and achieves real-time and efficient operation of pure inertial navigation algorithms and combined navigation algorithms through multi-sensor data fusion processing, thereby improving system integration and navigation accuracy.

[0070] The above description is merely an embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of this application should be included within the scope of the claims of this application.

Claims

1. A navigation computer system based on FMQL20S, characterized in that, The system includes a programmable fusion chip JFMQL20S484 (1), a 1553B transceiver and isolation transformer (6), an ARINC429 transceiver (7), a self-isolated RS422 chip (8), a self-isolated RS232 chip (9), an RC filter (10), an RS422 first interface chip (11), an RS422 second interface chip (15), an RS422 third interface chip (16), and an RS422 fourth interface chip (17), wherein: One end of the 1553B transceiver and isolation transformer (6) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the aircraft control unit for receiving host commands and sending navigation data. One end of the ARINC429 transceiver (7) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the satellite receiver and the atmospheric data system to realize data cross-linking with the satellite receiver and the atmospheric data system; One end of the self-isolated RS422 chip (8) is connected to the PL end of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the fiber optic gyroscope. It is used to receive gyroscope data and parse it according to the gyroscope's frame protocol to store the three-axis angular velocity and gyroscope temperature data in the register. One end of the self-isolated RS232 chip (9) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the host computer for interaction with the host computer, transmitting real-time data and navigation results for users to view and process directly; One end of the RC filter (10) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the accelerometer, which is used to suppress noise in the acquired accelerometer signal. One end of the RS422 first interface chip (11) is connected to the PL end of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the aircraft control unit and the fiber optic attitude component, for communication with the aircraft control unit and the fiber optic attitude component. One end of the RS422 second interface chip (15) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the satellite receiver for receiving navigation information output by the satellite receiver in real time. One end of the RS422 third interface chip (16) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the aircraft control unit. It is used to receive external standard frequency signals and realize synchronization with external devices. One end of the RS422 fourth interface chip (17) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1), and the other end is connected to the satellite receiver. It is used to receive the PPS second pulse generated by the satellite receiver and trigger the PS terminal.

2. The navigation computer system according to claim 1, characterized in that, Also includes: The memory chip is DDR3 (2), and the DDR3 memory SM41J128M16M is selected; The storage chip SPI FLASH (3) uses two SPI Flash chips EFM25QL256-E8, each with a capacity of 256Mbit. The reset chip (4) is selected as GKQ706TS, which monitors the power supply voltage and the working status of the microprocessor or microcontroller. The crystal oscillator (5) is JZPB31G-50-V3-A4-B, which provides stable clock signals for the PS and PL terminals respectively.

3. The navigation computer system according to claim 1, characterized in that, The 1553B transceiver and isolation transformer (6) use HKA32201 and BT2725A chips respectively, and adopt dual redundant channels.

4. The navigation computer system according to claim 1, characterized in that, The ARINC429 transceiver (7) uses the HKZ3593 chip.

5. The navigation computer system according to claim 1, characterized in that, The self-isolated RS232 chip (9) adopts the GKI3232SM chip and uses a dual-channel RS-232 interface redundancy design.

6. The navigation computer system according to claim 1, characterized in that, The RS422 first interface chip (11) adopts the GKI3490SM transceiver chip.

7. The navigation computer system according to claim 1, characterized in that, Also includes: The temperature sensor (12) is connected at one end to the PL terminal of the programmable fusion chip JFMQL20S484 (1) and at the other end to the fiber optic gyroscope and accelerometer. It uses the GKQ18B20 chip and realizes communication between the host computer and the accelerometer and fiber optic gyroscope through the single bus protocol to collect the temperature information of the sensor in real time.

8. The navigation computer system according to claim 1, characterized in that, Also includes: The level conversion chip (13) is connected to the PL terminal of the programmable fusion chip JFMQL20S484 (1) at one end and to the aircraft control unit at the other end. It is used to receive 8 discrete input signals, respond to the normal operation of external devices, and realize the function switching of external devices.

9. The navigation computer system according to claim 1, characterized in that, Also includes: The power module (14) is connected to the PS terminal of the programmable fusion chip JFMQL20S484 (1). It uses the GKP4644BM chip to convert the 5V DC power input into 3.3V, 1.8V, 1.5V and 1.0V power supplies required for normal system operation.

10. A hardware and software co-architecture based on the navigation computer system of claim 1, characterized in that, This includes inertial navigation algorithm processing software and FPGA software, among which: FPGA software includes: The data acquisition module is used to acquire 6 pulse signals through RC filter (10) for counting and store the counting results in a register; The ARINC429 bus interface module is used to control the reading and writing of the SPI bus through the ARINC429 transceiver (7) to achieve data cross-linking with the satellite receiver and the atmospheric data system; The gyroscope data acquisition module is used to receive gyroscope data through the RS422 interface (8) and parse it according to the gyroscope's frame protocol, and store the three-axis angular velocity and gyroscope temperature data in the register; The synchronization signal generation module is used to output a 2.5ms synchronization clock signal through the RS422 interface chip (16), receive external standard frequency signals, and realize synchronization with external devices; The 1553B bus interface module is used to realize the transmission and reception control function of the 1553B bus through the 1553B transceiver and isolation transformer (6) to realize information interaction with the external aircraft control unit. The RS232 serial communication module is used to connect to an external host computer through a self-isolated RS232 chip (9) to transmit real-time data navigation results for users to view and process directly; The RS422 serial communication module is used to interact with external devices through 5 RS422 interface chips (11), 1 channel is connected to the aircraft control unit, 2 channels are connected to the fiber optic attitude component, 1 channel is used for the inertial navigation product to complete the online upgrade and verification of the fiber optic inertial navigation algorithm processing software, and 1 backup channel is used for debugging and loading. Inertial navigation algorithm processing software includes: The satellite navigation data fusion processing module is used to combine and process the real-time received satellite receiver, atmospheric data and inertial navigation data through the ARINC429 interface (7) and RS422 interface (15), and perform multi-source fusion processing through the combined navigation algorithm to output high-precision navigation information in real time. The navigation algorithm processing module is used to communicate with the gyroscope data acquisition module (8) and the meter data acquisition module (10) respectively, to collect the angular velocity rate information and acceleration information of external sensor devices in real time, and to realize the instrument data processing and accumulation, instrument data filtering, and real-time analysis and calculation of attitude, velocity and position information using alignment algorithm and pure inertial navigation algorithm.

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