A semiconductor wafer thermal insulation testing device

Abstract

This invention relates to the field of thermal insulation testing technology, and provides a semiconductor wafer thermal insulation testing device, including a base, a test chamber mounted on top of the base, and a base plate mounted on the bottom wall of the test chamber for positioning the semiconductor wafer at its initial position. A temperature measuring component is provided at the bottom of the base plate. The test chamber has a vertically movable cover platform inside, a heat flow assembly on the outside of the test chamber, and a localized instantaneous heating assembly inside the cover platform. The localized instantaneous heating assembly includes a toothed ring pillar rotatably disposed inside the cover platform and at least three thermal shock test plates evenly distributed along the circumference of the toothed ring pillar. A slidable thermal insulation base is provided at the bottom end of each thermal shock test plate. In use, this invention integrates global steady-state and localized transient thermal testing, enabling not only the evaluation of the wafer's macroscopic thermal insulation performance but also the identification of microscopic thermal stress defects by reproducing instantaneous overheating scenarios, thereby achieving a precise and comprehensive assessment of its thermal reliability.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of heat insulation testing, more particularly to a semiconductor wafer heat insulation testing device. BACKGROUND

[0002] A semiconductor wafer is a circular semiconductor sheet made of silicon, germanium, gallium arsenide, etc. as a substrate, through single crystal growth, cutting, polishing and other precision processing. It is the core carrier for manufacturing chips. In order to evaluate its performance stability under continuous high temperature or temperature cycle conditions, including whether the electrical parameters meet the requirements, whether there is thermal-induced structural change, the body of the semiconductor wafer needs to be characterized for thermal performance.

[0003] At present, the industry generally relies on equipment based on steady-state or quasi-steady-state principles when testing the heat insulation performance of the semiconductor wafer body. This type of equipment slowly heats one side of the wafer or its surrounding environment, waits for the entire system to reach thermal equilibrium, and then measures the steady-state temperature difference between the two sides to calculate the thermal resistance or equivalent thermal conductivity coefficient and other parameters.

[0004] However, the current testing method relies on applying a global and stable thermal field to the wafer. This slow and uniform heating method cannot form a rapidly changing local transient high temperature on the wafer surface, making it impossible to reproduce the key thermal conditions in actual working conditions during the testing process. As a result, it is difficult to effectively stimulate and identify micro thermal stress defects in the wafer material caused by severe temperature changes, ultimately leading to a significant deviation between the evaluation results of its thermal reliability and the actual performance.

[0005] Therefore, the present application proposes a semiconductor wafer heat insulation testing device to solve the above problems. SUMMARY

[0006] The technical problem to be solved: In view of the problems existing in the prior art, the purpose of the present application is to provide a semiconductor wafer heat insulation testing device, which solves the problem of inaccurate thermal reliability evaluation caused by the inability to form a rapidly changing local transient high temperature on the wafer surface in the existing testing method based on steady-state thermal field, which makes it difficult to effectively stimulate and identify micro thermal stress defects.

[0007] To solve the above technical problems, the application provides the following technical scheme: a semiconductor wafer heat insulation testing device, comprising a base, a testing box mounted on the top of the base, and a bottom base plate mounted on the bottom wall of the testing box for positioning the initial position of the semiconductor wafer, wherein the bottom of the bottom base plate is provided with a temperature measuring component; the inside of the testing box is provided with a vertically movable cover base, the outside of the testing box is provided with a heat flow assembly, and the inside of the cover base is provided with a local transient heat assembly; the local transient heat assembly comprises a gear ring column rotatably arranged in the inside of the cover base and at least three heat shock testing plates uniformly distributed along the circumference of the gear ring column, and the bottom end of each heat shock testing plate is provided with a slidable heat insulation base, and the bottom of each heat insulation base is mounted with a pulse heat source surface; the testing surface of the semiconductor wafer is divided into three regions of an outer ring, a middle ring and an inner ring in advance, and the pulse heat source surfaces of the three heat shock testing plates are configured to correspond to the outer ring, the middle ring and the inner ring regions of the semiconductor wafer respectively; in operation, the gear ring column drives the heat shock testing plates to rotate, so as to selectively make the pulse heat source surfaces implement local transient heat shock testing on the corresponding regions of the semiconductor wafer.

[0008] In a new embodiment, a lower convex resistance plate is mounted on the upper side of the inside of the cover base, an upper concave guide plate is mounted on the lower side of the inside of the cover base, and a gap between the lower convex resistance plate and the upper concave guide plate forms a heat flow channel; wherein the hot air inlet of the heat flow channel is a tapered flow guide opening for converging and guiding the airflow, and the hot air outlet of the heat flow channel is a tapered pressure relief opening for smoothly diffusing and discharging the airflow; the top end of the cover base is fixedly connected with the telescopic end of the hydraulic rod fixedly mounted on the top wall of the testing box.

[0009] In a new embodiment, a regulating assembly is arranged on the lower convex resistance plate to provide lifting and rotation of the gear ring column, and the regulating assembly comprises a circular groove, an electric push rod and a tray; the bottom of the lower convex resistance plate is provided with the circular groove, the top wall of the circular groove is mounted with the electric push rod, the telescopic end of the electric push rod is fixedly connected with the tray, and the bottom of the tray is rotatably mounted with the gear ring column; the inside of the tray is provided with a driving component, and the driving component adopts the cooperation of a motor and a gear to meshingly drive the gear ring column to rotate in the tray.

[0010] In a new embodiment, a cover is slidably arranged on the inner wall of the circular groove, the bottom end of the cover is in abutment with the top end of the tray, and a plurality of magnetic blocks one are annularly mounted on the lower side of the inner wall of the cover; four spring columns are annularly mounted on the top wall of the circular groove, and the cover is sealed and slid on the spring columns.

[0011] In a new embodiment, the middle part of the upper concave guide plate is provided with a circular chuck hole, and the top outer side of the circular chuck hole is provided with an anti-warping assembly; the anti-warping assembly comprises a positioning block and a compression spring column; a plurality of positioning blocks are equidistantly and annularly installed on the top wall of the upper concave guide plate, the middle part of each positioning block is slidably provided with a compression spring column, the outward end of the compression spring column is installed with a magnetic block two, and the inward end of the compression spring column is installed with a close contact pressing block, and the bottom end of the close contact pressing block is provided with a flexible cotton pressing block.

[0012] In a new embodiment, the top end of the bottom base disc is installed with a circular chuck ring, the top annular groove of the circular chuck ring is provided with an adaptive sealing ring, and the adaptive sealing ring is placed with a semiconductor wafer.

[0013] In a new embodiment, the heat flow assembly comprises: a sleeve box installed on the top of the base and located on the outer side of the test box, a backflow air duct is formed between the sleeve box and the outer wall of the test box, and the rear part of the sleeve box is provided with a heat dissipation door; a fan group is provided with two groups and is installed on the left and right sides of the test box, one side of the fan group is the air inlet side, and the other side of the fan group is the air outlet side; the outer side of the fan group is installed with a heating cover; wherein the fan group is configured to drive air circulation, the air flow is heated after passing through the air inlet side, and then flows through the heat flow channel to act on the surface of the semiconductor wafer, and then is discharged into the backflow air duct through the air outlet side, and gradually fills the air inlet side.

[0014] In a new embodiment, the bottom of the thermal shock test plate is provided with an electric sliding rail, a sliding table is slidably installed on the electric sliding rail, and a heat insulation base is installed on the table top of the sliding table; the pulse heat source surface is electrically connected with a pulse power source located on the top of the cover table, and the pulse power source is configured to apply a high-power electric pulse to the pulse heat source surface to generate a transient high heat flow.

[0015] In a new embodiment, the side walls of the sliding table are installed with displacement monitors for monitoring the distance between the pulse heat source surface and the upper surface of the semiconductor wafer.

[0016] In a new embodiment, the temperature measuring component is a high-speed infrared thermal imager, which performs non-contact temperature measurement on the back temperature field of the semiconductor wafer through the infrared window arranged in the center of the bottom base disc.

[0017] Advantages: Compared with the prior art, the advantages of the present application are: 1, the present application integrates global steady-state thermal field testing and local transient thermal shock testing in a single device, which not only can evaluate the macroscopic heat insulation parameters of the semiconductor wafer in a stable state, but also can reproduce the instantaneous overheating scene in the actual working condition, effectively stimulate and identify the microscopic thermal stress defects caused by rapid temperature change, thereby realizing the all-round and more accurate evaluation of the thermal reliability of the semiconductor wafer.

[0018] 2. By rotating the toothed ring column and the at least three heat shock test plates distributed in the circumference, the three pulse heat source surfaces are respectively arranged as the outer ring, middle ring and inner ring areas of the semiconductor wafer, and by rotating the toothed ring column, the ring area interval to be tested can be switched, and the heat insulation data measured in different ring area intervals can be compared to the heat performance difference of different ring areas, the test is more targeted, and the obtained data is more representative.

[0019] 3. Since local transient heat shock may cause wafer uneven thermal expansion and warping, and damage the sealing of the test environment, by the anti-warping assembly driven by magnetic force, the repulsive force between the magnetic blocks when the cover moves down is used to automatically drive the compression structure to uniformly compress the wafer edge, forming a dynamic constraint torque, so as to effectively suppress wafer warping when high-strength local heat shock is applied, ensuring that the wafer is always in close contact with the base sealing ring, and maintaining the sealing integrity of the test chamber.

[0020] 4. The three independent heat shock test plates and the pulse heat source surfaces at the bottom thereof can be flexibly arranged, they can be independently tested corresponding to the inner, middle and outer rings of the wafer respectively, or they can be concentrated in a certain ring area to realize parallel and synchronous heat shock test of multiple positions in the ring area, which improves the test efficiency, and also comprehensively evaluates the thermal performance consistency of different circumferential positions in the same ring area, and reveals the local heat insulation defects and performance distribution rules that cannot be found by traditional single test point. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 It is a perspective structural schematic diagram of the present application.

[0022] Figure 2 It is another perspective structural schematic diagram of the present application.

[0023] Figure 3 It is a schematic diagram of the internal structure of the test box of the present application.

[0024] Figure 4 It is a schematic diagram of the position structure of the fan group of the present application.

[0025] Figure 5 It is a schematic diagram of the position structure of the sleeve box of the present application.

[0026] Figure 6 It is a schematic diagram of the internal structure of the cover table of the present application.

[0027] Figure 7 It is a schematic diagram of the position structure of the regulating assembly of the present application.

[0028] Figure 8 It is a schematic diagram of the base disc structure of the present application.

[0029] Figure 9 It is a schematic diagram of the upper concave guide plate structure of the present application.

[0030] Figure 10 A structure amplification diagram of the application. Figure 9

[0031] Figure 11 A structure diagram of the application.

[0032] Figure 12 A structure diagram of the application.

[0033] Figure 13 A structure diagram of the application.

[0034] Figure 14 A structure diagram of the application.

[0035] Figure 15 A structure diagram of the application.

[0036] Figure 16 A structure diagram of the application.

[0037] The figure mark is: 1, base station;

[0038] 2, test box; 21, hydraulic rod;

[0039] 3, bottom base; 31, round into ring; 32, adaptive sealing ring;

[0040] 4, cover station; 41, lower convex resistance plate; 42, upper concave guide plate; 421, round into disc hole; 43, heat flow channel;

[0041] 5, heat flow assembly; 51, sleeve box; 511, heat dissipation door; 52, fan group; 53, heating cover;

[0042] 6, local transient heat assembly; 61, gear ring column; 62, heat shock test plate; 621, electric sliding rail; 622, sliding table; 623, displacement monitor; 63, heat insulation base; 64, pulse heat source surface;

[0043] 7, regulation and control assembly; 71, round groove; 711, cover; 712, magnetic block one; 713, spring column; 72, electric push rod; 73, tray;

[0044] 8, anti-warping assembly; 81, positioning block; 82, compression spring column; 83, magnetic block two; 84, close pressing block; 85, flexible cotton pressing block. DETAILED DESCRIPTION

[0045] ​With reference to the accompanying drawings, the technical solutions in the embodiments of the present application will be described clearly and completely; obviously, the described embodiments are only a part of the embodiments of the present application, and not all the embodiments; based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work belong to the protection scope of the present application.

[0046] The semiconductor wafer heat insulation test equipment provided by the embodiments of the present application solves the problem that the existing test method based on a steady thermal field cannot effectively stimulate and identify micro thermal stress defects due to the inability to form a rapidly changing local transient high temperature on the wafer surface, and finally leads to inaccurate thermal reliability evaluation. In use, the global steady state and local transient heat test are integrated, which can not only evaluate the macro heat insulation performance of the wafer, but also stimulate and identify micro thermal stress defects by reproducing a transient overheating scene, thereby realizing accurate and comprehensive evaluation of the thermal reliability of the wafer.

[0047] The technical solutions in the embodiments of the present application are as follows to solve the above technical problems.

[0048] Embodiment one, please refer to Figures 1-16 The semiconductor wafer heat insulation test equipment provided by the embodiments of the present application includes a base 1, a test box 2 mounted on the top of the base 1, and a bottom base 3 mounted on the bottom wall of the test box 2 for positioning the initial position of the semiconductor wafer. The bottom of the bottom base 3 is provided with a temperature measuring component; the inside of the test box 2 is provided with a cover table 4 that can move vertically, the outside of the test box 2 is provided with a heat flow assembly 5, and the inside of the cover table 4 is provided with a local transient heat assembly 6; the local transient heat assembly 6 includes a gear ring column 61 rotatably arranged in the inside of the cover table 4 and at least three heat shock test plates 62 uniformly distributed along the circumference of the gear ring column 61. The bottom end of the heat shock test plate 62 is provided with a slidable heat insulation base 63, and the bottom of the heat insulation base 63 is mounted with a pulse heat source surface 64; the test surface of the semiconductor wafer is divided into three regions of an outer ring, a middle ring and an inner ring in advance, and the pulse heat source surfaces 64 of the three heat shock test plates 62 are configured to correspond to the outer ring, the middle ring and the inner ring regions of the semiconductor wafer respectively; in operation, the gear ring column 61 drives the heat shock test plate 62 to rotate, so as to selectively make the pulse heat source surface 64 implement local transient heat shock test on the corresponding region of the semiconductor wafer.

[0049] Further, the temperature measuring component is a high-speed infrared thermal imager, which performs non-contact temperature measurement on the back temperature field of the semiconductor wafer through an infrared window arranged at the center of the bottom base 3.

[0050] In the preferred implementation, the semiconductor wafer heat insulation test device provided by the application establishes a uniform and stable steady-state thermal field in the closed chamber through the heat flow assembly 5, and evaluates the macroscopic heat insulation performance of the wafer by means of the high-speed infrared thermal imager; then, by linkage of the regulating assembly 7 and the cover 711, the device is switched to an isolated local test environment, the wafer edge is locked by the magnetic drive anti-warping assembly 8, finally, the specified ring area is subjected to transient thermal shock by the pulse heat source surface 64 of the local transient heat assembly 6, and the transient thermal response data is synchronously collected. The device combines steady-state uniform heating and transient local shock, can not only measure traditional heat insulation parameters, but also effectively excite and identify microscopic thermal stress defects caused by severe temperature change, so as to realize omnidirectional evaluation of the thermal reliability of the semiconductor wafer.

[0051] Specifically, the working principle of the semiconductor wafer heat insulation test device is as follows:

[0052] Firstly, the operator places the semiconductor wafer to be tested horizontally on the wafer entering ring 31 at the top end of the base disc 3, and the lower edge of the semiconductor wafer is sealed and supported by the adaptive sealing ring 32, which can ensure that there is no gap leakage between the semiconductor wafer and the wafer entering ring 31 during the test. Then, the hydraulic rod 21 fixed to the top wall of the test box 2 is started, the hydraulic rod 21 pushes the cover table 4 to move horizontally downward, so that the cover table 4 moves as a whole to the base disc 3, until the lower concave guide plate 42 of the cover table 4 accommodates the semiconductor wafer through the wafer entering disc hole 421, and the bottom surface of the upper concave guide plate 42 is tightly engaged with the outer side step belt of the wafer entering ring 31, thereby completing the sealed placement of the semiconductor wafer. At this time, the upper surface of the wafer is in the heat flow channel 43 formed between the lower convex blocking plate 41 and the upper concave guide plate 42, ready to receive heat flow loading;

[0053] It should be noted that in the global steady-state test, the heat flow assembly 5 provides a uniform and slowly changing temperature field, which induces synchronous and balanced thermal stress on the entire wafer upper surface. This overall and uniform thermal expansion is mainly converted into a slight change in wafer thickness direction and in-plane compressive stress, and will not produce unbalanced bending moment leading to warping. Under this condition, the constraint of the adaptive sealing ring 32 itself can provide sufficient in-plane constraint force to suppress this overall expansion trend, thereby effectively preventing the occurrence of macroscopic warping.

[0054] Second, turn on the hot air assembly 5, the left side of the air inlet side fan group 52 inhales air and converts it into hot air through the heating cover 53, the hot air enters the cover table 4, is collected through the tapered guide hole at the top of the hot air channel 43, enters the narrow hot air channel 43 between the lower convex resistance plate 41 and the upper concave guide plate 42, forms a steady-state heat field uniformly impacting the upper surface of the wafer, and the airflow after heat exchange on the surface of the semiconductor wafer is extracted by the right side of the air outlet side fan group 52, wherein the temperature sensor arranged on the heating cover 53 can realize real-time feedback and adjustment of the temperature, and the exhaust air is discharged into the return air duct formed by the sleeve box 51 and the outer wall of the test box 2, and the exhaust air flows in the return air duct and gradually fills and mixes with the fresh air at the air inlet side, realizing partial recovery of waste heat, improving thermal efficiency, and forming a temperature-stable steady-state heat flow circulation in the hot air channel 43, which is suitable for single test temperature circulation; In this process, the high-speed infrared thermal imager arranged at the bottom of the base plate 3 transmits through the center infrared window, and the semiconductor wafer back surface temperature field is monitored non-contactly, so as to evaluate the overall heat insulation performance (the infrared window separates the high-speed infrared thermal imager and the test chamber inside the base plate 3, effectively preventing dust, volatile matter or hot air flow disturbance generated during the test from directly polluting or affecting the lens of the thermal imager, and ensuring the clarity and stability of the measurement signal);

[0055] It should be noted that if subsequent step-by-step temperature test is performed, the hot air circulation needs to be turned off to avoid interference with the formation of the step heat field, and this operation mode only needs to open the heat dissipation door 511 at the rear of the sleeve box 51 to interrupt the operation of the return air duct;

[0056] Third, when performing local transient thermal shock test, a certain ring area (inner ring, middle ring, or outer ring) of the semiconductor wafer needs to be selected for transient thermal shock (during the test of the semiconductor wafer, the local transient thermal assembly 6 has been adjusted to adapt to the tested semiconductor wafer); First, the electric push rod 72 of the control assembly 7 drives the tray 73 to move downward, and the cover 711 in contact with the tray 73 and sliding in the circular groove 71 also synchronously descends with the tray 73 due to the action of the spring column 713, until the bottom end of the tray 73 contacts the top surface of the lower convex resistance plate 41, thereby locking the space of the circular disc hole 421 on the lower convex resistance plate 41, forming a sealed environment required for local test, then the electric push rod 72 continues to drive the tray 73, the toothed ring column 61 and the thermal shock test plate 62 to move downward, and when the displacement monitor 623 installed on the side surface of the sliding table 622 of the thermal shock test plate 62 feeds back that the sliding table 622 and the pulse heat source surface 64 thereon have reached the preset non-contact distance from the upper surface of the semiconductor, the displacement monitor 623 feeds back the signal to the control terminal of the equipment to stop the movement of the electric push rod 72, thereby completing the preparation process of the local transient thermal shock test;

[0057] In the above process, the magnetic block one 712 in the inner wall of the cover 711 and the magnetic block two 83 of the anti-warping assembly 8 generate magnetic repulsion (magnetic block one 712 and magnetic block two 83 are same-pole magnets), the magnetic block one 712 pushes the compression spring column 82 installed with the magnetic block two 83 to move inward, so that the compression block 84 tightly abutting the flexible compression cotton block 85 compresses the edge of the wafer, and multiple compression points form a uniform constraint torque at the edge of the wafer, which effectively resists the uneven expansion and warping trend caused by local transient high heat, and fundamentally ensures that the wafer always maintains close contact with the adaptive sealing ring 32 during the entire test process, maintaining the sealing integrity.

[0058] Subsequently, the driving components in the tray 73 are started, the motor drives the gear transmission to engage the tooth ring column 61 to rotate, and in turn drives the three thermal shock test plates 62 evenly distributed thereon to rotate synchronously. The pulse heat source surface 64 at the bottom of each thermal shock test plate 62 corresponds to the outer ring, middle ring and inner ring test areas of the semiconductor wafer pre-divided, and the target ring area can be accurately selected by rotation, so that the corresponding pulse heat source surface 64 is positioned directly above the test area of the semiconductor wafer, and then a high-power transient pulse is applied to the activated pulse heat source surface 64. The heat energy generated is effectively isolated by the heat insulation base 63 and is concentrated downward, acting on the specified ring area of the wafer to simulate local overheating impact in actual working conditions. At the same time, the high-speed infrared thermal imager continuously records the transient temperature field change of the back of the semiconductor wafer, providing data support for the identification of thermal stress defects and the accurate evaluation of local thermal performance, thereby completing the local transient thermal shock test of the specified ring area. After the test is completed, the control assembly 7 is reset, the hydraulic rod 21 drives the cover table 4 to move upward and away from the wafer entry ring 31 of the bottom base 3, and then the semiconductor wafer after the test is manually taken out;

[0059] It should be noted that the pulse heat source surface 64 is a low-heat-capacity thin-film resistance heater, which is composed of a patterned metal film on a ceramic substrate and an insulating layer. When working, the pulse power source applies a high-power electric pulse to the thin-film resistance heater, which generates a high-energy-density transient heat flow due to the Joule effect in an instant;

[0060] Fourthly, after completing all the predetermined tests, the recorded data from the high-speed infrared thermal imager during the entire process, including the global steady-state test values and the transient temperature values captured in the local transient thermal shock test, are integrated to analyze the thermal insulation performance of the tested semiconductor wafer.

[0061] Please refer to Figures 6-8The inner upper side of the cover table 4 is provided with a lower convex resistance plate 41, and the inner lower side of the cover table 4 is provided with an upper concave guide plate 42, and the gap between the lower convex resistance plate 41 and the upper concave guide plate 42 forms a heat flow channel 43; wherein the hot air inlet of the heat flow channel 43 is a tapered flow guide port for converging and guiding the airflow, and the hot air outlet of the heat flow channel 43 is a tapered pressure relief port for smoothly diffusing the airflow; the top end of the cover table 4 is fixedly connected with the telescopic end of the hydraulic rod 21 fixedly installed on the top wall of the test box 2.

[0062] In the preferred embodiment of the present scheme, by providing the lower convex resistance plate 41 and the upper concave guide plate 42, and providing a specific gap between the lower convex resistance plate 41 and the upper concave guide plate 42 to form the heat flow channel 43, a structured flow path is provided for the airflow, which ensures that the hot air can uniformly cover the entire upper surface of the semiconductor wafer, avoids local overheating or insufficient heating caused by uneven flow field, and provides a prerequisite for accurate steady-state thermal insulation test. At the same time, the hydraulic rod 21 drives the cover table 4 to stably descend, so that the cover table 4 can be closed with the wafer ring 31 on the bottom base 3, and then the semiconductor wafer completes the operation of entering the heat flow channel 43.

[0063] Secondly, the tapered flow guide port of the hot air inlet of the heat flow channel 43 can effectively converge the airflow to prevent it from diffusing before entering the channel, thereby improving the airflow speed and impact, and ensuring that heat can be efficiently transferred to the semiconductor wafer. The tapered pressure relief port of the heat flow channel 43 can make the outflowing airflow diffuse and discharge smoothly, and after clamping the semiconductor wafer, a closed and directional heat flow environment can be quickly formed.

[0064] Please refer to Figure 7 , Figure 12 and Figure 14 , the lower convex resistance plate 41 is provided with a control assembly 7 for lifting and rotating the tooth ring column 61, the control assembly 7 includes a circular groove 71, an electric push rod 72 and a tray 73; the bottom of the lower convex resistance plate 41 is provided with a circular groove 71, the top wall of the circular groove 71 is provided with an electric push rod 72, the telescopic end of the electric push rod 72 is fixedly connected with a tray 73, and the bottom of the tray 73 is rotatably installed with a tooth ring column 61; the tray 73 is provided with a driving part, the driving part adopts the cooperation of a motor and a gear to mesh and drive the tooth ring column 61 to rotate in the tray 73.

[0065] Further, please refer to Figure 13 and Figure 15 , the side walls of the sliding table 622 are each provided with a displacement monitor 623 for monitoring the distance between the pulsed heat source surface 64 and the upper surface of the semiconductor wafer.

[0066] In the preferred embodiment of the present scheme, by arranging the circular groove 71, the electric push rod 72 and the tray 73, the motor in the driving component drives the gear to rotate, the gear meshes with the driving gear ring column 61 to rotate in the tray 73, which can drive the circumferentially distributed thermal shock test plate 62 to rotate synchronously, so that the pulse heat source surface 64 at different positions can be quickly and accurately moved to the test station directly above the wafer, realizing flexible selection and accurate positioning of the outer ring, middle ring and inner ring areas of the wafer, and meeting the needs of complex test sequences.

[0067] Secondly, by cooperation of the electric push rod 72 and the displacement monitor 623, the tray 73 and the combination of the gear ring column 61 and the thermal shock test plate 62 can be driven as a whole to ascend and descend, so that the distance between the pulse heat source surface 64 and the upper surface of the semiconductor wafer becomes a variable that can be accurately controlled, which can not only ensure effective application of thermal shock, but also ensure safe distance from the semiconductor wafer in the non-test state or movement process, avoiding product damage caused by collision.

[0068] Please refer to Figure 7 and Figure 12 , the inner wall of the circular groove 71 is slidably provided with a cover 711, the bottom end of the cover 711 is in abutment with the top end of the tray 73, and a plurality of magnetic blocks 712 are annularly installed on the inner wall of the cover 711.

[0069] Further, please refer to Figure 9 and Figure 10 , the middle part of the upper concave guide plate 42 is provided with a circular disc hole 421, and the top outer side of the circular disc hole 421 is provided with an anti-warping assembly 8; the anti-warping assembly 8 comprises a positioning block 81 and a compression spring column 82; a plurality of positioning blocks 81 are equidistantly annularly installed on the top wall of the upper concave guide plate 42, the middle part of each positioning block 81 is slidably provided with a compression spring column 82, one end of the compression spring column 82 outwardly is installed with a magnetic block 83, and the other end of the compression spring column 82 inwardly is installed with a close pressing block 84, and the bottom end of the close pressing block 84 is provided with a flexible cotton pressing block 85.

[0070] In the preferred embodiment of the present scheme, by arranging the positioning block 81, the compression spring column 82, the magnetic block 83, the close pressing block 84 and the flexible cotton pressing block 85, when the tray 73 descends, the cover 711 synchronously descends under the action of the spring column 713 and finally seals the circular disc hole 421 on the lower convex resistance plate 41, so as to physically isolate the active area of the local transient thermal assembly 6 from the stable thermal field below, complete the environmental switching from global stable state test to local transient test, and effectively avoid mutual interference between the two test modes.

[0071] Secondly, the anti-warping assembly 8 uses the repulsion force between the magnetic block one 712 and the magnetic block two 83 as the power source to drive the compression spring column 82 to push the close compression block 84 and the flexible compression cotton block 85 to compress the wafer edge, which can provide instant and uniform distributed compression force for the semiconductor wafer, resist the non-uniform deformation caused by transient high heat, and ensure the sealing and accuracy of the test.

[0072] Please refer to Figure 7 and Figure 11 , the top end of the base disc 3 is provided with an entry ring 31, an adaptive sealing ring 32 is arranged in the top ring groove of the entry ring 31, and the adaptive sealing ring 32 is placed with the semiconductor wafer.

[0073] In the preferred embodiment of the present scheme, the entry ring 31 and the adaptive sealing ring 32 provide accurate physical positioning for the semiconductor wafer, so that the operator can quickly and accurately place the semiconductor wafer in the predetermined work station, and the adaptive sealing ring 32 can effectively fill the micro gap between the wafer and the entry ring 31, establish a reliable airtight environment at the beginning of the global steady-state test, prevent heat flow leakage, and ensure the stability of the steady-state temperature field.

[0074] Please refer to Figures 1-5 , the heat flow assembly 5 includes: a sleeve box 51 installed on the top of the base 1 and located outside the test box 2, a backflow air duct is formed between the sleeve box 51 and the outer wall of the test box 2, and the rear part of the sleeve box 51 is provided with a heat dissipation door 511; the fan group 52 is provided with two groups, which are installed on the left and right sides of the test box 2, one side of the fan group 52 is the air inlet side, and the other side of the fan group 52 is the air outlet side; the outer side of the fan group 52 is provided with a heating cover 53; wherein the fan group 52 is configured to drive the circulation of air flow, the air flow is heated after passing through the air inlet side, then flows through the heat flow channel 43 to act on the surface of the semiconductor wafer, and then is discharged into the backflow air duct through the air outlet side, and gradually fills the air inlet side.

[0075] In the preferred embodiment of the present scheme, by arranging the sleeve box 51, the heat dissipation door 511, the fan group 52 and the heating cover 53, using the backflow air duct formed by the sleeve box 51 and the outer wall of the test box 2, and using the driving of the two fan groups 52, the internal hot air circulation is established, the hot air flowing out of the surface of the semiconductor wafer will not be directly discharged, but gradually fills and mixes into the air inlet side (it should be noted that the top of the sleeve box 51 on the air inlet side has an internal and external air exchange channel) to realize the recycling of the heat energy in the exhaust gas, significantly reduce the energy consumption required for continuous heating of the heating cover 53, improve the thermal efficiency of the whole equipment, and is particularly suitable for long-time steady-state heat preservation test, and when gradient temperature change detection is performed, the backflow air can be interrupted by opening the heat dissipation door 511 to ensure the normal performance of the gradient temperature insulation test.

[0076] Please refer to Figure 7 , Figures 13-16The bottom of the thermal shock test plate 62 is provided with an electric sliding rail 621, the electric sliding rail 621 is slidably provided with a sliding table 622, and the heat insulation base 63 is installed on the table top of the sliding table 622; the pulse heat source surface 64 is electrically connected with the pulse power supply located at the top of the cover table 4, and the pulse power supply is configured to apply a high-power electric pulse to the pulse heat source surface 64 to generate a transient high heat flow.

[0077] In the preferred embodiment of the present application, the rotation of the driving tooth ring column 61 can drive the plurality of thermal shock test plates 62 distributed in the circumferential direction to rotate synchronously, so that the pulse heat source surfaces 64 at the bottom of the thermal shock test plates 62 corresponding to different ring regions (inner ring, middle ring and outer ring) are sequentially and accurately moved to the test station directly above the wafer, realizing the quick and accurate selection of the ring region to be tested only by rotation, greatly improving the test efficiency and the convenience of operation.

[0078] Secondly, the pulse heat source surfaces 64 on the three thermal shock test plates 62 can be moved and positioned in any annular region of the wafer. This enables the device to flexibly configure the test mode: first, the pulse heat source surfaces 64 can be distributed in the inner ring, the middle ring and the outer ring according to different ring regions (inner ring, middle ring and outer ring), and the three ring regions of the semiconductor wafer can be tested independently; second, the three pulse heat source surfaces 64 can be simultaneously concentrated in any specified ring region in the outer ring, the middle ring or the inner ring, and the transient thermal shock can be applied synchronously at different circumferential positions in the ring region, realizing the parallel and multi-point synchronous test of one ring region. Compared with the traditional single-point sequential test, it can obtain the thermal response data of the whole ring region faster, greatly improves the test efficiency, and can more comprehensively evaluate the consistency of the heat insulation performance of the ring region.

[0079] The above embodiments are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A semiconductor wafer heat insulation test equipment, comprising a base (1), a test box (2) mounted on the top of the base (1), and a bottom base (3) mounted on the bottom wall of the test box (2) for positioning the initial position of the semiconductor wafer, and the bottom of the bottom base (3) is provided with a temperature measuring component; characterized in that: the inside of the test box (2) is provided with a vertically movable cover table (4), the outside of the test box (2) is provided with a heat flow assembly (5), and the inside of the cover table (4) is provided with a local transient heat assembly (6); the local transient heat assembly (6) comprises: a tooth ring column (61) rotatably arranged in the inside of the cover table (4) and at least three heat shock test plates (62) uniformly distributed along the circumference of the tooth ring column (61), and the bottom end of the heat shock test plate (62) is provided with a slidable heat insulation base (63), and the bottom of the heat insulation base (63) is mounted with a pulse heat source surface (64); the test surface of the semiconductor wafer is divided into three regions of an outer ring, a middle ring and an inner ring, and the pulse heat source surfaces (64) of the three heat shock test plates (62) are configured to correspond to the outer ring, the middle ring and the inner ring of the semiconductor wafer respectively; in operation, the tooth ring column (61) drives the heat shock test plate (62) to rotate, so as to selectively make the pulse heat source surface (64) implement local transient heat shock test on the corresponding region of the semiconductor wafer. the inside of the cover table (4) is mounted with a lower convex resistance plate (41), and the inside of the cover table (4) is mounted with an upper concave guide plate (42), and the gap between the lower convex resistance plate (41) and the upper concave guide plate (42) forms a heat flow channel (43); wherein the hot air inlet of the heat flow channel (43) is a tapered flow guide port for converging and guiding airflow, and the hot air outlet of the heat flow channel (43) is a tapered pressure relief port for smoothly diffusing and discharging airflow; the top end of the cover table (4) is fixedly connected with the telescopic end of a hydraulic rod (21) fixedly mounted on the top wall of the test box (2). the lower convex resistance plate (41) is provided with a control assembly (7) for providing lifting and rotating of the tooth ring column (61), and the control assembly (7) comprises a circular groove (71), an electric push rod (72) and a tray (73); the bottom of the lower convex resistance plate (41) is provided with a circular groove (71), the top wall of the circular groove (71) is mounted with an electric push rod (72), the telescopic end of the electric push rod (72) is fixedly connected with a tray (73), and the bottom of the tray (73) is rotatably mounted with a tooth ring column (61); the inside of the tray (73) is provided with a driving component, and the driving component adopts the cooperation of a motor and a gear to meshingly drive the tooth ring column (61) to rotate in the tray (73). the inner wall of the circular groove (71) is slidably provided with a cover (711), the bottom end of the cover (711) is in abutment with the top end of the tray (73), and the inner wall of the cover (711) is annularly mounted with a plurality of magnetic blocks (712) on the lower side; the top wall of the circular groove (71) is annularly mounted with four spring columns (713), and the cover (711) is sealingly slid on the spring columns (713). ​ ​ 2. The semiconductor wafer heat isolation test apparatus of claim 1, wherein ​ ​ ​ 3. The semiconductor wafer heat isolation test apparatus of claim 2, wherein ​ ​ ​ 4. The semiconductor wafer heat isolation test apparatus of claim 3, wherein ​ ​ 5. The semiconductor wafer heat isolation test apparatus of claim 2, wherein The middle part of the upper concave guide plate (42) is provided with a circular chuck hole (421), and the top outer side of the circular chuck hole (421) is provided with an anti-warping assembly (8); The anti-warping assembly (8) comprises a positioning block (81) and a compression spring column (82); A plurality of positioning blocks (81) are equidistantly and annularly mounted on the top wall of the upper concave guide plate (42), the middle part of each positioning block (81) is slidably provided with a compression spring column (82), one end of the compression spring column (82) outward is provided with a magnetic block two (83), and the other end of the compression spring column (82) inward is provided with a close pressing block (84), and the bottom end of the close pressing block (84) is provided with a flexible cotton pressing block (85).

6. The semiconductor wafer heat isolation test apparatus of claim 1, wherein, The top end of the bottom base disc (3) is provided with an entering circular supporting ring (31), the top annular groove of the entering circular supporting ring (31) is provided with an adaptive sealing ring (32), and a semiconductor wafer is placed on the adaptive sealing ring (32).

7. The semiconductor wafer heat isolation test apparatus as claimed in claim 1, wherein The heat flow assembly (5) comprises: A sleeve box (51) is installed on the top of the base (1) and located outside the test box (2), a backflow air duct is formed between the sleeve box (51) and the outer wall of the test box (2), and the rear part of the sleeve box (51) is provided with a heat dissipation door (511); A fan group (52) is provided with two groups, which are respectively installed on the left and right sides of the test box (2), one side of the fan group (52) is the air inlet side, and the other side of the fan group (52) is the air outlet side; The outer side of the fan group (52) is provided with a heating cover (53); The fan group (52) is configured to drive air circulation, the air is heated after passing through the air inlet side, and then flows through the heat flow channel (43) to act on the surface of the semiconductor wafer, and then is discharged into the backflow air duct through the air outlet side, and gradually fills the air inlet side.

8. The semiconductor wafer heat isolation test apparatus of claim 1, wherein, The bottom of the thermal shock test plate (62) is provided with an electric sliding rail (621), and the electric sliding rail (621) is slidably provided with a sliding table (622), and the table top of the sliding table (622) is provided with a heat insulation base (63); The pulse heat source surface (64) is electrically connected with a pulse power supply located on the top of the cover table (4), and the pulse power supply is configured to apply a high-power electric pulse to the pulse heat source surface (64) to generate a transient high heat flow.

9. The semiconductor wafer heat isolation test apparatus of claim 8, wherein, The side wall of the sliding table (622) is provided with a displacement monitor (623) for monitoring the distance between the pulse heat source surface (64) and the upper surface of the semiconductor wafer.

10. The semiconductor wafer heat isolation test apparatus of claim 1, wherein, The temperature measuring component is a high-speed infrared thermal imager, which measures the temperature of the back surface of the semiconductor wafer in a non-contact manner through an infrared window arranged in the center of the bottom base disc (3).

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