Virtual network card and electronic device

Abstract

The application discloses a virtual network card and an electronic device, and relates to the technical field of computers, which comprises a first interface module, a virtual direct memory access module, a virtual network device offloading module and a virtual device management module; the first interface module supports an extensible input / output virtualization function and is used for expanding the number of virtual ports by using an extensible device interface; the virtual direct memory access module is used for creating and maintaining a virtual queue and establishing data transmission between the virtual queue and a host through a direct memory access interface; the virtual network device offloading module is used for transferring network processing tasks from the host to a hardware network card; and the virtual device management module is used for configuring various parameters of the virtual device. The application can greatly improve the number of virtual ports and transmission performance of the network card.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computers, and particularly relates to a virtual network card and an electronic device. BACKGROUND

[0002] Under the background of rapid development of cloud computing and virtualization technology, data centers have an increasing demand for high-performance and high-density network devices. As one of the core hardware for realizing sharing of computing resources, the performance and scalability of a virtual network card directly affect the communication efficiency between virtual machines and the flexibility of resource allocation.

[0003] Traditional network cards are limited by the Peripheral Component Interconnect Express (PCIE) resource allocation mechanism, and have a limited number of virtual ports and insufficient dynamic expansion capability. New applications (such as large-scale virtual container clusters and high-performance computing clusters) have a demand for the number of virtual ports and data transmission efficiency of network cards that far exceeds the upper limit of traditional solutions. Therefore, how to greatly improve the number of virtual ports and transmission performance of network cards is a technical problem that needs to be solved at present. SUMMARY

[0004] The present application provides a virtual network card and an electronic device, which can greatly improve the number of virtual ports and transmission performance of network cards.

[0005] In a first aspect, the present application provides a virtual network card, comprising: a first interface module, a virtual direct memory access module, a virtual network device offload module and a virtual device management module; the first interface module supports an extensible input / output virtualization function, and is used for expanding the number of virtual ports by using an extensible device interface; the virtual direct memory access module is used for creating and maintaining a virtual queue, and establishes data transmission between the virtual queue and a host through a direct memory access interface; the virtual network device offload module is used for transferring network processing tasks from the host to the hardware network card; and the virtual device management module is used for configuring various parameters of the virtual device.

[0006] The present application also provides an electronic device comprising the virtual network card provided in the first aspect.

[0007] The virtual network card and the electronic device provided by the application can make the virtual network card fully utilize the BDF (Bus:Device:Function) resource of the PCIE bus through the virtualization technology of the input / output, thereby greatly increasing the number of virtual ports of the network card; in addition, the direct data transmission mechanism of the direct memory access interface penetrating the virtual machine monitor avoids the multiple memory copying in the traditional software driver, and the transmission path realized by the hardware further optimizes the transmission performance. The application not only solves the problem of the limited number of virtual ports, but also realizes the transmission performance close to the physical device through the hardware acceleration, thereby significantly improving the transmission performance of the virtual machine communication in the cloud computing environment. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0009] Figure 1 A structure diagram of a virtual network card provided in the embodiments of the application;

[0010] Figure 2 Another structure diagram of a virtual network card provided in the embodiments of the application;

[0011] Figure 3 A structure diagram of a virtual device management module in a virtual network card provided in the embodiments of the application;

[0012] Figure 4 A structure diagram of a virtualization direct memory access module in a virtual network card provided in the embodiments of the application;

[0013] Figure 5 A structure diagram of a virtual network device offload module in a virtual network card provided in the embodiments of the application;

[0014] Figure 6 A queue state memory table entry definition table provided in the embodiments of the application;

[0015] Figure 7 A structure diagram of a sending data packet scheduling module provided in the embodiments of the application. DETAILED DESCRIPTION

[0016] With reference to the drawings and the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present application.

[0017] It should be noted that, in the description of the present application, the terms “comprise”, “contain” or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0018] In the embodiments of the present application, “multiple” refers to two or more. “And / or” describes the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the following cases: A exists alone, A and B exist together, and B exists alone, where A and B can be singular or plural. The character “ / ” generally represents that the associated objects before and after it are in an “or” relationship.

[0019] In the cloud computing scenario, the intelligent network card or high-performance network card needs to provide network port resources close to the performance of the original network card and supporting port isolation for the guest machine through the virtualization network port. The more virtualization ports a single network card provides, the lower the user's use cost.

[0020] In order to support the virtualization of input / output (I / O) devices (such as network cards) in a computer system, each component of the computer system has developed related technologies. For example, the input-output memory management unit (IOMMU) subsystem included in the central processing unit (CPU) can implement functions such as flexible allocation of I / O devices to virtual machines, direct memory access (DMA) remapping, and interrupt remapping.

[0021] In the related art, Single Root I / O Virtualization (SR-IOV) and Scalable I / O Virtualization (SIOV) technologies are proposed to virtualize PCIE devices (network cards connected to the system as PCIE devices).

[0022] Among them, SR-IOV is a virtualization standard defined in PCIE, which divides a physical network card into multiple Virtual Functions (VF), and each VF can be directly assigned to a virtual machine. Its advantage is high compatibility, supporting old systems, but has the following limitations:

[0023] Limited number of virtual ports: The number of VFs per Physical Function (PF) is limited by PCIE configuration space and Base Address Register (BAR) resource allocation, usually no more than 2048.

[0024] Static resource allocation: VF resources are statically allocated at system initialization, which cannot be dynamically expanded, resulting in low resource utilization.

[0025] Compatibility dependency: SR-IOV protocol needs to be supported by both host and virtual machine, limiting flexibility.

[0026] SIOV identifies virtual devices through Scalable Device Interface (SDI), breaking the limitations of SR-IOV, its advantages include:

[0027] Virtual port quantity expansion: SDI interface does not occupy PCIE configuration space and BAR resources, a single PF can support up to 65535 virtual ports (actual number limited by system configuration and hardware resources).

[0028] Dynamic resource allocation: SDI resources can be dynamically allocated during system runtime, fully utilizing PCIE bus resources and improving resource utilization.

[0029] High flexibility: SDI interface design is more lightweight, supporting more flexible virtualization scenarios.

[0030] However, the SIOV standard only defines the identification mechanism of virtual devices and does not provide specific virtual queue implementation schemes, resulting in the need to combine other technologies in actual applications, such as using the Virtual Input Output (VirtIO) protocol to achieve efficient data transmission.

[0031] Among them, VirtIO as a kind of semi-virtualization framework, through the definition of virtual queue (Virtqueue) to realize the efficient communication between virtual machine and physical device, can support a variety of devices and application mode, its technical evolution includes:

[0032] Virtual host (Virtual host, Vhost) technology: VirtIO back-end device program can be transferred to the host kernel to achieve, data directly between virtual machine and host kernel interaction, help to improve the transmission performance.

[0033] Virtual host user space interface (Vhost-user) technology: the data path unloaded from the kernel to the user space running, VirtIO front and back-end are in the process of user space, using large page as shared memory, further improve the transmission performance.

[0034] VirtIO data path acceleration (virtIO Data Path Acceleration, vDPA) technology: a kind of data path acceleration technology for virtualization environment, aims to solve the performance bottleneck of traditional virtual I / O path through the combination of hardware offload and standardized interface, while taking into account the device compatibility and migration flexibility.

[0035] Some virtualization technology is composed of various virtualization technology components supporting processor platform, so as to run multiple operating systems and applications in independent partitions. The behavior of each partition is similar to virtual machine (Virtual Machine, VM), and isolation and protection are provided between partitions. This hardware-based virtualization solution, together with virtualization software, realizes a variety of purposes such as server integration, active partition, workload isolation, embedded management, legacy software migration and disaster recovery.

[0036] The above virtualization system can be divided into two parts, virtual machine monitor (Virtual Machine Monitor, VMM) and virtual machine (guest software).

[0037] Among them, VMM is a key component of platform infrastructure in virtualization. VMM must support the virtualization of I / O requests from guest software. VMM can expose virtual devices to guest software by emulating I / O devices. I / O virtualization implemented by emulation provides good compatibility, but limits performance and functionality.

[0038] Or provide a synthetic device interface similar to I / O emulation, but not completely emulated. Compared with the overhead related to I / O emulation, synthetic device interface is friendly to virtualization to achieve efficient virtualization.

[0039] In addition to emulated devices, a VMM can also directly assign physical I / O devices to a VM. In this model, the driver of the assigned I / O device runs in the VM to which it is assigned and allows direct interaction with the device hardware. Among them, I / O assignment requires additional hardware support to ensure that the access of the assigned device is isolated and limited within the resource range owned by the assigned partition. As an extension of the I / O assignment model, the I / O device supports multiple functional interfaces, each of which can be independently assigned to a VM, thereby realizing the sharing of I / O devices.

[0040] In related technologies, by isolating and limiting the access of ordinary users to the resources owned by the virtualized device, the following functions can be realized:

[0041] I / O device assignment: for flexibly assigning I / O devices to VMs and extending the protection and isolation properties of VMs for I / O operations.

[0042] DMA remapping: for supporting address translation of DMA from devices.

[0043] Interrupt remapping: for supporting interrupt isolation and routing from devices and external interrupt controllers to appropriate VMs.

[0044] Interrupt delivery: for supporting the direct delivery of virtual interrupts from devices and external interrupt controllers to virtual processors.

[0045] Reliability: for recording and reporting DMA and interrupt errors to system software, which might otherwise corrupt memory or affect VM isolation.

[0046] With the development of cloud technology, SIOV has become an I / O virtualization technology standard parallel to SR-IOV. Compared with SR-IOV, SIOV can greatly expand the number of available devices, and virtual devices do not occupy the configuration space and allocation BAR space of PCIE, and are not limited by the resources of PCIE system initialization. In addition, the resources of SDI can be dynamically allocated when the system is used, and do not statically occupy system resources.

[0047] Cloud service providers need to allocate independent network interfaces for each virtual machine or container, while ensuring that the network traffic of different tenants does not interfere with each other. In addition, with the development of 5th Generation Mobile Communication Technology (5G), edge computing and Internet of Things technology, data centers need to support the access of a large number of terminal devices and high-concurrency data transmission, which puts higher requirements on the virtualization capability, transmission performance and resource scalability of network cards.

[0048] Traditional virtualization solutions are limited by the PCIE bus resource allocation mechanism, with limited number of virtual ports (usually no more than 2048) and insufficient dynamic expansion capability. New applications such as large-scale virtualization container clusters and high-performance computing clusters have much higher requirements for the number of virtual ports and data transmission efficiency of network cards than the upper limit of traditional solutions.

[0049] Therefore, there is an urgent need for a virtualization network card technology that can break through the physical network card resource limit, support a large number of virtual ports, and also consider high-performance transmission.

[0050] In the face of the above technical problems, the virtual network card provided in the embodiments of the present application combines the characteristics of SIOV high scalability and high flexibility, and can support a number of virtual ports that can break through the upper limit of the number of PCIE bus devices, both supporting a large number of virtual queues and ensuring transmission performance.

[0051] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below in conjunction with the drawings and specific embodiments.

[0052] The virtual network card provided in the embodiments of the present application can be used in scenarios that require large-scale network resource virtualization such as cloud computing, virtualization data center, and containerization service.

[0053] For example, the virtual network card provided in the embodiments of the present application can be applied to the high-performance network virtualization scenario of a cloud computing data center, such as a 400GbE and above high-speed Ethernet environment that requires large-scale virtual machine communication. The CPU system is connected through the PCIE interface, and high-bandwidth network transmission is realized by using a Quad Small Form-factor Pluggable (QSFP) optical port. This solution can be deployed in a physical server, a virtualization platform, or a network infrastructure of a cloud service provider, and provides virtualization network services close to the hardware performance for virtual machines.

[0054] Referring to Figure 1 , Figure 1 A structure diagram of a virtual network card provided in the embodiments of the present application is shown. In some embodiments, the virtual network card includes a first interface module, a virtual direct memory access module, a virtual network device offload module, and a virtual device management module.

[0055] In some embodiments, the first interface module supports SIOV functions and is used to extend the number of virtual ports by using SDI.

[0056] SDI is an interface identifier designed to provide a flexible and scalable virtual connection solution, aiming to support the interconnection of various devices and systems.

[0057] Through the SDI technology, the first interface module can dynamically create and manage more virtual ports, thereby meeting the needs of multiple virtual machines or containers for network interfaces.

[0058] In some embodiments, the virtualized direct memory access module is used to create and maintain virtual queues, and establish data transmission between the virtual queues and the host through the direct memory access interface.

[0059] Wherein, DMA technology is a method for efficient data transmission, allowing hardware devices to bypass the CPU and directly exchange data with memory. This means that during data transmission, the CPU does not need to participate byte by byte or word by word, thereby freeing up CPU resources to handle other tasks.

[0060] It can be understood that since DMA transmission does not require the intervention of the CPU, the rate of data transmission can be significantly improved, especially when dealing with large amounts of data. DMA technology reduces the involvement of the CPU in data transmission, thereby reducing the load on the CPU and allowing it to focus more on handling other critical tasks. DMA transmission allows the CPU and hardware devices to work simultaneously, enabling parallel processing and improving the overall performance of the system.

[0061] The virtualized direct memory access module can achieve efficient data transmission between the host memory and the virtual queue through DMA technology. This helps to reduce the involvement of the CPU, improve data transmission efficiency, and reduce the load on the CPU. At the same time, the management of the virtual queue also ensures the orderly transmission and processing of data.

[0062] In some embodiments, the virtual network device offload module is used to transfer network processing tasks from the host to the hardware network card.

[0063] Wherein, the hardware network card has higher processing capacity and efficiency, and can better cope with high-speed network traffic.

[0064] By offloading network processing tasks to the hardware network card, the virtual network device offload module reduces the processing burden of the host and improves the overall performance of the system.

[0065] In some embodiments, the virtual device management module is used to configure various parameters of the virtual device.

[0066] The virtual device management module provides flexible configuration capabilities for virtual device parameters, including the number of virtual ports, the size of virtual queues, and the parameters of DMA transmission. By configuring these parameters, the performance of the virtual device can be optimized to meet the needs of different application scenarios.

[0067] In some embodiments, the virtual network card can be connected with a CPU system using a PCIE interface, and the network interface uses a QSFP optical port.

[0068] The QSFP optical port is a hot-pluggable optical module package form supporting four-channel independent transmission, and each channel can carry different rate data signals.

[0069] The virtual network card provided in the application can make full use of the BDF resources of the PCIE bus through the virtualization technology of the scalable input / output, thereby greatly increasing the number of virtual ports of the network card. In addition, the direct data transmission mechanism of the direct memory access interface penetrating the virtual machine monitor avoids the multiple memory copying in the traditional software driver, and the transmission path realized by the hardware further optimizes the transmission performance. The application not only solves the problem of limited number of virtual ports, but also realizes the transmission performance close to the physical device through hardware acceleration, thereby significantly improving the transmission performance of the virtual machine communication in the cloud computing environment.

[0070] In some embodiments, the first interface module includes a PCIE hard core and a hardware interface bus adaptation module; the PCIE hard core supports the virtualization function of the scalable input / output; and the hardware interface bus adaptation module is used to adapt the interface of the PCIE hard core into a Completer Request (CQ) / Completer Completion (CC) interface and a Requester Request (RQ) / Requester Completion (RC) interface.

[0071] Optionally, the PCIE hard core can be a pre-designed, verified and optimized hardware module.

[0072] The CQ is a request sent by a requester to a completer, requiring the completer to respond to the previous transaction request. The CQ is used to track and manage the uncompleted requests, and ensures that each request can be responded by the completer.

[0073] The CC is a response of the completer to the requester, indicating that the completer has processed the transaction request sent by the requester. The CC is used to provide the transaction processing result to the requester, including success, failure or other state information.

[0074] In some embodiments, the PCIE hard core also supports the SR-IOV function; the SR-IOV function can be started when the number of virtual ports required by the virtual network card is less than a preset threshold.

[0075] Referring toFigure 2 , Figure 2 Another structure diagram of a virtual network card provided in an embodiment of the present application. In some embodiments, the virtual network card comprises: a PCIE hard core, a hardware interface bus adaptation module, a management interface conversion module, a DMA interface adaptation module, a virtualized DMA module (VirtIO-DMA module), a virtual network device offload module (VirtIO-net offload module), a virtual Ethernet port mapping module, an Ethernet media access control module (Ethernet MAC module), and a virtual device management module.

[0076] In some embodiments, the PCIE hard core can support SIOV function.

[0077] In some embodiments, the hardware interface bus adaptation module is configured to adapt the interface of the PCIE hard core IP into the form of CQ / CC and RQ / RC interface, so as to realize the connection with the subsequent modules.

[0078] In some embodiments, the PCIE hard core also supports SR-IOV function, which is enabled when the number of virtual ports required by the virtual network card is less than a preset threshold.

[0079] For example, the PCIE hard core can support both SIOV and SR-IOV functions. When the number of required virtual ports exceeds 2048, the SIOV function is enabled, and the maximum number of SDI that can be enabled in one PF is 65535; when the number of required virtual ports does not exceed 2048, the SIOV feature or the SR-IOV function can be selected to be enabled. Among them, the SR-IOV function can better compatible with old systems.

[0080] In some embodiments, the first end of the management interface conversion module is connected with the CQ / CC interface, and the second end of the management interface conversion module is connected with the first interface of the virtual device management module. The management interface conversion module is configured to convert the format of data transmitted between the CQ / CC interface and the first interface.

[0081] For example, the management interface conversion module is configured to realize the conversion of the (Transaction Layer Packet, TLP) frame of the CQ / CC bus into the Advanced eXtensible Interface Lite (AXIL).

[0082] The AXIL interface is a lightweight subset of the Advanced eXtensible Interface (AXI) protocol.

[0083] In some embodiments, the first end of the DMA interface adaptation module is connected with the RQ / RC interface, the second end is connected with the virtual device management module, and the third end is connected with the virtualized direct memory access module (also referred to as VirtIO-DMA module). The DMA interface adaptation module is used to convert the bus signals of the descriptors and data separated by the DMA interface into a PCIE compatible format.

[0084] For example, the DMA interface adaptation module can convert the bus of the descriptors and data separated by the DMA interface into a PCIE compatible TLP frame format for transmission on the RQ / RC bus.

[0085] In some embodiments, the virtualized DMA module is used to create and maintain a virtual queue and establish data transmission between the virtual queue and the host through the direct memory access interface.

[0086] For example, the virtualized DMA module can implement the virtual queue function defined in the VirtIO specification.

[0087] In some embodiments, the virtual network device offload module (also referred to as VirtIO-net offload module) is used to transfer network processing tasks from the host to the hardware network card.

[0088] For example, the virtual network device offload module can implement the partial offload function defined in the VirtIO specification.

[0089] In some embodiments, the virtual Ethernet port mapping module is used to split the data frames of the virtual network card to the host.

[0090] For example, the virtual Ethernet port mapping module can split the Ethernet frames of the card to host (C2H) direction based on the IP address segment and correspond to the SDI.

[0091] In some embodiments, the Ethernet media access control (MAC) module is used to connect the optical module transmission interface.

[0092] For example, the Ethernet MAC module can use mature IP to implement standard Ethernet frame link layer processing and finally connect the QSFP optical port to complete the transmission and reception of Ethernet frames.

[0093] In some embodiments, the virtual device management module can implement the feature negotiation, parameter configuration and operation of the virtual device, support the implementation of the VirtIO management queue, and the configuration management function of other modules in the network card.

[0094] Optionally, the virtual device management module can be connected with the virtualized DMA module, the virtual network device offload module, the virtual Ethernet port mapping module, and the Ethernet media access control module respectively by using an AXIL bus.

[0095] Optionally, the virtualized DMA module, the virtual network device offload module, the virtual Ethernet port mapping module, and the Ethernet media access control module can be connected by using an Advanced eXtensible Interface Stream (AXIS) bus.

[0096] The AXIS is a stream interface based on the AXI protocol, is designed for continuous data flow, does not need an address cycle, and is suitable for stream media applications such as video, audio, and network data packets.

[0097] In some embodiments, the virtual device management module includes a Microcontroller Unit (MCU) subsystem; the MCU subsystem is configured to:

[0098] configure a virtualized input / output device based on an extensible device interface mapping; and / or, process a control queue of the virtualized input / output device based on the extensible device interface mapping.

[0099] For example, refer to Figure 3 , Figure 3 FIG. 1 is a structural schematic diagram of a virtual device management module in a virtual network card according to an embodiment of the present application. In some embodiments, the virtual device management module includes:

[0100] The MCU subsystem is implemented by using an MCU, cooperates with a local memory, a first AXIL interconnection module, and a Universal Asynchronous Receiver / Transmitter (UART) debugging interface.

[0101] The processing logic of the general configuration and the interrupt configuration of the VirtIO based on the SDI mapping can be implemented by using software code, related data tables in the hardware logic are configured by using the AXIL extension interface of the VirtIO device, and the synchronization of the software logic and the hardware logic is implemented. The processing logic of the control queue of the VirtIO based on the SDI mapping can also be implemented by using software code.

[0102] In some embodiments, the AXIL interface of the virtual device management module corresponds to the access address of the BAR space of the PF device, and when the SIOV function is enabled, each virtual device occupies a segment of address space of the PF BAR space for register access of the virtual device. When the SR-IOV function is enabled, each virtual device is allocated an independent BAR space for register access.

[0103] In some embodiments, due to the large number of virtual devices and the slow access process of configuration management, an embedded MCU subsystem can be used to implement its main functions, achieving the goals of saving resources and strong scalability.

[0104] In some embodiments, the notification message related to the VirtIO device directly operates the related register through the AXIL interface, thereby saving the waiting time.

[0105] In addition, the DMA interface of the VirtIO control queue can be directly connected with the DMA adaptation module through the DMA interface of the VirtIO control queue.

[0106] The main AXIL module from the management interface conversion module is connected with the AXIL extension interface of the MCU subsystem, the AXIL interface of the VirtIO module and the AXIL interface of the common module through the second AXIL interconnection module.

[0107] Among them, the output of the MCU subsystem and the second AXIL interconnection module is the main mode of AXIL, and the MCU shared register interface is added between them for information transmission and synchronization.

[0108] In some embodiments, the virtualized direct memory access module is specifically configured to read a descriptor ring of a virtual queue, and receive or send data based on the descriptor ring.

[0109] In some embodiments, the virtualized direct memory access module is specifically configured to read a descriptor ring of a virtual queue through a first direct memory access interface bus, and receive or send data through a second direct memory access interface bus.

[0110] For example, refer to Figure 4 , Figure 4 A structure diagram of a virtualized direct memory access module in a virtual network card provided in an embodiment of the present application. In some embodiments, the virtualized direct memory access module includes:

[0111] A send-side available descriptor first-in first-out (FIFO) queue is used to buffer the available descriptors of the send side.

[0112] ​A free descriptor storage is provided at the receiving side to buffer free descriptors.

[0113] A free descriptor ring reading module is configured to read free descriptors from a free descriptor queue created in the system memory.

[0114] A used descriptor ring writing back module is configured to return used descriptors after receiving or sending data.

[0115] A free queue management module is configured to read descriptor information from the free descriptor queue at the system side, implement dequeuing of the descriptors, and maintain state information of the local virtual queue.

[0116] A used queue management module is configured to update a flag bit of the descriptor and implement enqueuing of the descriptor by using the used descriptor ring writing back module.

[0117] A data packet sending processing module is configured to form data frames corresponding to a virtual network device from data frames read from a direct memory access interface, and send the data frames to a virtual network device offloading module for processing.

[0118] A data packet receiving processing module is configured to send data frames received to a direct memory access interface adaptation module after the data frames are decomposed into one or more write operations according to a maximum load length of a supported TLP frame.

[0119] In some embodiments, the VirtIO-DMA module can implement taking of a descriptor queue ring of a virtual queue, and implement a receiving and sending process of Ethernet frames based on the descriptor queue ring.

[0120] In some embodiments, the VirtIO-DMA module can manage all virtual queues, and implement complete multiplexing of a flow based on a queue number. A separate DMA interface bus is used for reading and writing of the descriptor queue ring, such as a control DMA reading (ctrl_dma_read) / control DMA writing (ctrl_dma_write) bus; another separate DMA interface bus is used for reading and writing of the Ethernet frames, such as a data DMA reading (data_dma_read) / data DMA writing (data_dma_write) bus, and the two buses are connected to the DMA interface adaptation module after multiplexing.

[0121] In some embodiments, the free descriptor ring reading module is configured to read free descriptors from a free descriptor queue created in the system memory. Free descriptors at the sending side are buffered in a sending free descriptor FIFO, and free descriptors at the receiving side are buffered in a receiving free descriptor storage.

[0122] The available descriptor ring reading module is a shared execution channel of all virtual queues, and when a specific queue is operated, information of the queue needs to be applied to the available queue management module, and the de-queue operation of the descriptor is queued and executed. Each descriptor queue manages a one-way data transmission, and thus the transmission and reception directions occupy a virtual queue for management respectively to form a queue pair to realize bidirectional data transmission.

[0123] In some embodiments, the transmission and reception directions both need to obtain available descriptors from the system side, and after the transmission and reception of Ethernet data are implemented, the used descriptors are returned by the used descriptor ring writing back module.

[0124] In some embodiments, the available queue management module stores state information of all virtual queues, is initialized by an AXIL interface, receives a notification message of a CPU, starts transmission of the queue, and triggers the sending packet scheduling module and the receiving pre-fetch descriptor scheduling module to start the reading operation of the descriptor by a doorbell signal or a descriptor queue buffer state.

[0125] In some embodiments, the VirtIO-DMA module further includes a sending engine module and a receiving engine module.

[0126] In some embodiments, the transmission and reception of data can be implemented by the sending engine module and the receiving engine module using the obtained available descriptors. After the transmission and reception of data are completed, the writing back operation of the used descriptor is triggered. The used descriptor ring writing back module obtains queue information from the used queue management module, and executes the en-queue operation of the descriptor in a queue. After the en-queue is completed, whether to trigger the configured interrupt is determined according to system configuration.

[0127] The packet sending processing module is configured to read the data frame from the DMA interface, temporarily cache the data frame, form a data frame defined by a virtual network device, and send the data frame to the virtual network device offload module through a virtual network sending interface tx_vnet_axis.

[0128] The packet receiving processing module is configured to receive the data frame through a virtual network receiving interface rx_vnet_axis, split the received data frame into a plurality of write operations according to a maximum load length of a supported TLP frame, and send the data frame to the DMA interface adaptation module.

[0129] In some embodiments, the virtual network device offload module includes a virtual network device frame parsing module, a sending side transmission control segmentation offload (TSO) module, a sending frame checksum insertion module, and a sending short frame padding module.

[0130] Wherein, TSO is a network protocol acceleration technology, allowing Transmission Control Protocol (TCP) stack to hand over large block of data to Network Interface Controller (NIC) for processing, and NIC is responsible for splitting the data into appropriate size of TCP segment, and calculating the checksum of TCP, IP layer, and finally sending smaller data packets to the network.

[0131] Wherein, TSO hands over the TCP segmentation and checksum calculation tasks originally completed by host CPU to NIC for processing, thereby releasing CPU resources. By reducing the number of CPU interrupts and memory copy times, TSO can significantly improve the transmission efficiency of large block of data.

[0132] Wherein, the virtual network device frame parsing module is configured to parse the received virtual network device frame (Vnet frame) and extract key information; the transmit side Transmission Control segmentation offload module is configured to receive Transmission Control Protocol frames and split the received Transmission Control Protocol frames; the transmit frame checksum insertion module is configured to calculate the checksum before sending the data packet and insert it into the appropriate position of the to-be-sent frame; and the transmit short frame padding module is configured to pad the to-be-sent frame with a length less than the minimum frame length.

[0133] In some embodiments, the virtual network device offload module further comprises: a receive frame checksum checking module, a Receive Side Scaling (RSS) queue mapping module, a receive side TSO module, and a virtual network device frame encapsulation module.

[0134] Wherein, RSS allows a multi-queue network card to distribute different network streams to multiple receiving queues, and each queue is processed by an independent CPU core. This mechanism avoids the CPU overload problem caused by single-queue network cards and fully utilizes the parallel computing capability of multi-core processors.

[0135] Wherein, the receive frame checksum checking module is configured to calculate the checksum of the received data frame and verify the integrity and accuracy of the received data frame; the Receive Side Scaling queue mapping module is configured to map the received data frame to different virtual queues; the receive side Transmission Control segmentation offload module is configured to buffer the received data frame and assemble it into a Transmission Control Protocol frame; and the virtual network device frame encapsulation module is configured to encapsulate the assembled Transmission Control Protocol frame into a data frame carrying a virtual network device frame header.

[0136] For example, refer to Figure 5 , Figure 5 is a structural schematic diagram of a virtual network device offload module in a virtual network card provided in an embodiment of the present application.

[0137] In some embodiments, the transmit side TSO module can receive the complete TCP frame transmitted by the system side, and the module further splits the frame according to the maximum transmission unit (MTU) length, so as to improve the transmission efficiency of DMA.

[0138] The receive side TSO module can cache the Ethernet frame, assemble the TCP payload, and transmit the data to the system side through DMA, so as to improve the transmission efficiency of DMA.

[0139] The transmit frame checksum insertion module is used for calculating the checksum at the network card, so as to reduce the calculation load of the CPU. Whether this function is enabled can be negotiated through the capability attribute. If the TSO function is enabled, the transmit frame checksum insertion module also needs to be enabled.

[0140] The RSS queue mapping module is used for mapping the received Ethernet frame to different virtual queues, so as to improve the parallel processing capability of the CPU. The module extracts the IP quintuple of the Ethernet frame, performs Hash operation on the key, takes the operation result modulo the number of available virtual queues, and distributes the frame to the corresponding virtual queue based on the modulus value. The RSS related configuration can be configured through the management channel of the virtual queue.

[0141] The transmit short frame padding module is used for expanding the Ethernet frame smaller than the minimum frame length to the minimum frame length, so as to meet the Ethernet transmission frame length requirement. The Vnet frame is an Ethernet data frame with a VirtIO-net frame header, which is used to identify the type of the frame, the number of buffers, the start and offset position of the checksum, and the like.

[0142] In some embodiments, the virtual Ethernet port mapping module can be used to solve the mapping problem of the Ethernet frame in the receive direction and the virtual network card port.

[0143] The C2H direction: the received Ethernet frame is parsed in the IP frame format, and the destination IP address of the IP frame and the target IP address in the address resolution protocol (ARP) frame are identified, both of which are bound to the IP address of the virtual network port of the virtual network device, and are recorded as the query IP address. The IP address network segment of all activated virtual network port in the network card is associated with the router identifier (RID), and is allocated to the content addressable memory table (CAM) table in the network card. The query IP address of the received Ethernet frame obtains the RID by querying the CAM table, that is, the corresponding relationship with the virtual network port is established.

[0144] Host to Card (H2C) direction: frames to the Ethernet MAC module do not require additional processing, and are directly sent to the network port.

[0145] In some embodiments, the Virtio-DMA module implements the specific process of virtual queue management, including the following information:

[0146] (1) Driver of the virtual network card

[0147] The driver is used to identify the network card present in the system, register the virtual network device (VirtIO-net device) to the system based on the identified PF device, and indicate that the network card has the attribute of supporting virtualization device.

[0148] An Application Programming Interface (API) interface is provided for the system to enable and configure the virtual network card device. When the system executes the command to enable a certain number of virtual network cards, the driver agent device registers the virtual network device to the system and completes the related negotiation and configuration process.

[0149] (2) Descriptor queue

[0150] The descriptor queue adopts the packed mode of VirtIO. For example, the length of each descriptor can be 16 bytes, in which the memory address pointed to by the descriptor is 64 bits, the memory length managed by the descriptor is 32 bits, the BufferID bit is 16 bits, and the Flag bit is 16 bits. N descriptors form a ring queue, occupy a continuous physical address, and are used to manage a virtual queue for DMA data transmission.

[0151] There are 2 bits in the flag bit for indicating that the descriptor is available or used, and one bit for indicating that multiple descriptors form a chain structure to support the use requirement of scatter / gather list.

[0152] In addition, the driver and the device both maintain a single-bit wrap-around counter initialized to 1 in the internal. When the driver or the device uses the last descriptor in the queue ring, the counter changes to identify that the use of the descriptor has wrapped around.

[0153] In the embodiments of the present application, the compact virtual queue combines the descriptor queue with the available queue and the used queue, which helps to improve the cache hit rate.

[0154] In some embodiments, the receiving process of the Ethernet frame includes:

[0155] When the host side virtual network interface sends an Ethernet frame, the Ethernet frame can be written into a certain virtual queue under the network interface, and the available descriptor queue of the queue will increase the available descriptors. The host writes the virtual queue number and the available descriptor number into the BAR space register of the device side through the VirtIO device notification register.

[0156] The available queue management module receives the notification message sent by the CPU and updates the producer pointer of the queue state random access memory (RAM) storage (the RAM address is the virtual queue number). If the producer pointer and the consumer pointer of the virtual queue are different (there is a descriptor dequeuing requirement), the module sends a request to the sending side scheduling module through the doorbell interface.

[0157] The sending data packet scheduling module can determine which data packet to send and then pass the request to send the data packet to the sending engine module. The module manages the transmission operation of the data path, including descriptor dequeuing and retrieval through DMA, packet data retrieval through DMA, packet transmission, and "write completion" enqueuing and writeback through DMA.

[0158] The sending engine sends a request to the available descriptor ring reading module to retrieve available descriptors, and the available descriptor ring reading module sends a request to the available queue management module and then obtains the DMA address for reading descriptors.

[0159] For example, refer to Figure 6 , Figure 6 A queue state storage table entry definition table is provided in the embodiments of the present application.

[0160] The high 32 bits [127:96] of the queue ring base address can be used to construct the complete queue ring base address.

[0161] The high 20 bits [95:76] of the low 32 bits of the queue ring base address and the low 12 bits, which are 0 by default, together with the high 32 bits, form a complete 64-bit base address.

[0162] The reserved bits [75:64] are used for future expansion or specific purposes and are not used at present.

[0163] The entry activation state [63:56] is used to indicate whether the queue state table entry is in an active state.

[0164] The operation table number [55:48] identifies the operation table number associated with the queue state table entry and can be used to obtain or update the information in the operation table.

[0165] The RID [47:32] corresponding to the queue ring can be used to store the RID data used by the queue ring.

[0166] The consumer pointer [31:16] of the queue ring can indicate the latest position of the descriptors that have been read by the device side locally (in the available queue management module) or the latest position of the descriptors that have been written back by the device side to the driver side (in the used queue management module).

[0167] The producer pointer [15:0] of the queue ring can indicate the latest position of the descriptors that have been prepared by the driver side (the definition is consistent in the available queue management module and the used queue management module).

[0168] The above fields work together to manage and track the state and operation of the queue ring, ensuring efficient and accurate transmission of data between the producer and the consumer.

[0169] In some embodiments, the number of entries of the queue state RAM is consistent with the number of virtual queues, which can be used to track the usage of the descriptor queue on the host side; the operation table is used to track the pipeline execution process of the parallel operation queue state RAM. During the initialization and negotiation process of the VirtIO device, the queue state RAM is configured synchronously, and the AXIL interface of the module is used for reading and writing configuration.

[0170] In some embodiments, the available queue management module reads the state information (such as the table entry shown in Figure 6 If the table entry is in the active state and the available descriptor queue is not empty, an operation table is allocated, and the operation table number used by the table entry is subsequently written into the table entry.

[0171] The above state information of the virtual queue is used to create the operation table and output to the available descriptor ring reading module. After the available descriptor ring reading module completes the reading of the descriptor, a submission instruction is returned to update the state of the operation table and the consumer pointer (representing the latest available descriptor pointer obtained from the device side). Then the operation table is popped out, and the required information is updated back to the queue state RAM.

[0172] The transmit engine receives the data of the available descriptor, and uses the descriptor to perform the packet transmission operation. After the packet passes through the packet transmission processing module, the enqueue operation of the used descriptor is started.

[0173] After the used descriptor ring write-back module receives the enqueue request of the used descriptor, it enters the used queue management module to start processing the enqueue request of the used descriptor. The used queue management module reads the state information of the virtual queue based on the requested virtual queue number (the state RAM table of the virtual queue is shown in Figure 6 If the table entry is in the active state and the used descriptor queue is not full, an operation table is allocated, and the operation table number used by the table entry is subsequently written into the table entry.

[0174] The virtual queue status information can be used to create an operation table and output to the used descriptor ring write back module. After the used descriptor ring write back module completes the write back operation of the used descriptor status, it returns a commit instruction to update the operation table status and the consumer pointer (representing the latest used descriptor pointer used by the device side). Then the operation table is popped and the required information is updated back to the queue status RAM.

[0175] After the update operation of the used descriptor is completed, according to the configuration, an interrupt request "Irq_vector" interface can be used to issue an interrupt application of the virtual queue configuration to notify the CPU to continue the subsequent processing of the data packet.

[0176] In some embodiments, the data packet sending processing module can set a buffer area for each queue based on the number of queues that can be processed in parallel by the available queue management module, and when a chain descriptor is encountered, the complete data frame is collected before the Ethernet frame is sent to the lower module. Similarly, the write back operation of the used descriptor can also be performed on the complete Ethernet frame.

[0177] In some embodiments, the receiving process of the Ethernet frame includes:

[0178] The virtual network interface driver on the host side fills the available descriptors of the virtual queue and notifies the device side to obtain the available descriptors for receiving the Ethernet frame. When the available descriptor queue will increase the available descriptors, the host writes the virtual queue number and the available descriptor number of the descriptor into the BAR space register on the device side through the VirtIO device notification register.

[0179] The queue management module receives the notification message sent by the CPU and updates the producer pointer (RAM address is the virtual queue number) of the queue status RAM. If the producer pointer and the consumer pointer of the virtual queue are different (there is a need to dequeue the descriptor), the receiving pre-fetch descriptor scheduling module is sent a request through the doorbell interface.

[0180] The receiving pre-fetch descriptor scheduling module can check whether the cache state of the available descriptor RAM on the receiving side of the application queue is full. If it is not full, the receiving engine initiates a pre-read operation of the available descriptor. The receiving pre-fetch descriptor scheduling module reserves a dedicated cache area for each receiving side virtual queue to store the pre-fetched descriptor information. In addition to the doorbell trigger, the receiving pre-fetch descriptor scheduling module also establishes a polling mechanism to obtain the available descriptors for each virtual queue and store them in the cache area.

[0181] The receive engine forwards the instruction of reading the available descriptor to the available descriptor reading module, which applies for the de-queue operation of the available descriptor to the available queue management module after receiving the instruction. The available queue management module is consistent in the operation process of the transceiving side. The available descriptor ring reading module stores the returned available descriptor in the receive-side available descriptor RAM.

[0182] When the receive engine receives the packet sending request of the data packet receiving processing module, it directly queries the number of available descriptors of the virtual queue cache, meets the sending requirement of the data packet, and then uses the descriptors to send the data packet to the CPU, otherwise directly discards the data packet.

[0183] After being processed by the Ethernet data frame receiving processing module, the receive engine starts the en-queue operation of the used descriptor. The en-queue process of the receive-side used descriptor is consistent with the processing process of the sending side.

[0184] The Ethernet frame receiving process allows the use of multiple descriptors to form a descriptor chain for transmission, and the used queue management is responsible for updating the flag bit of the descriptor and implementing the descriptor en-queue process through the used descriptor ring write-back module.

[0185] For example, refer to Figure 7 , Figure 7 A structure diagram of a sending data packet scheduling module provided in an embodiment of the present application.

[0186] In some embodiments, the sending data packet scheduling module comprises a state table initialization module, a scheduling processing module, a virtual queue state table, a scheduled FIFO, and a parallel operation table.

[0187] The state table initialization module is configured to initialize the state table through an AXIL interface, including setting the initial state of the virtual queue, such as the enable bit and the active bit.

[0188] In some embodiments, the scheduling processing module is configured to check whether the queue receiving the doorbell signal is enabled and activated, and to enable the queue that is not activated and is enabled to enter the scheduled FIFO and mark it as activated; the queue that is not enabled or is activated discards the doorbell signal.

[0189] In some embodiments, the scheduling processing module can also be configured to read the virtual queue number from the FIFO, create an operation table item, and send a scheduling request to the sending engine if the scheduled FIFO is not empty and the parallel operation table is not full.

[0190] In some embodiments, the scheduling processing module can also be configured to process the feedback signal of the sending engine, and update the queue state and the operation table.

[0191] In some embodiments, the virtual queue status table is used to store the status information of the virtual queues, including the enable bit and the active bit.

[0192] In some embodiments, the scheduled FIFO is used to buffer the active virtual queue numbers.

[0193] In some embodiments, the parallel operation table is used to record the operations currently being processed, including the relevant virtual queue information.

[0194] In some embodiments, the status table is initialized via the AXIL interface, the virtual queue status table is arranged based on the virtual queue numbers, and the status bits include the enable bit (indicating whether the virtual queue is enabled) and the active bit (indicating whether the queue enters the scheduled FIFO, marked as active if entering the scheduled FIFO, and vice versa).

[0195] The doorbell signal is output to the scheduling processing module after being buffered by the FIFO. The function block checks whether the queue receiving the doorbell signal is enabled and active. The queue that is enabled but not active enters the scheduled FIFO and is marked as active. The queue that is not enabled or is active discards the doorbell signal and does not perform other processing.

[0196] If the scheduled FIFO is not empty and the parallel operation table is not full, the virtual queue number of the scheduled FIFO is read, a new operation table entry is created, and a request information for scheduling the queue is sent to the sending engine. The above operations are repeated until the scheduled FIFO is empty or the parallel operation table is full.

[0197] When receiving the feedback information fed back by the sending engine, indicating that a data packet in the queue is successfully sent, the queue number is re-added to the scheduled queue, and the operation table entry is deleted.

[0198] When receiving the feedback signal fed back by the sending engine, indicating that there is no new data packet to be sent in the queue, the virtual queue is marked as inactive, and the operation table entry is deleted.

[0199] In some embodiments, the structure of the receiving pre-fetch descriptor scheduling module is similar to that of the sending data packet scheduling module.

[0200] The status table is initialized via the AXIL interface, the virtual queue status table is arranged based on the virtual queue numbers, and the status bits include the enable bit (indicating whether the virtual queue is enabled), the active bit (indicating whether the queue enters the scheduled FIFO, marked as active if entering the scheduled FIFO, and vice versa), and the buffer full bit (indicating that the descriptor buffer of the queue is full, initially empty).

[0201] The doorbell signal is output to the dispatch processing module after FIFO buffering. The function block checks the status bit of the queue receiving the doorbell signal, enables the queue with an unactivated buffer and not full to enter the dispatched FIFO, and marks it as activated. Otherwise, the queue discards the doorbell signal and does not perform other processing. The virtual queue status table is continuously polled, and the queue with an enabled unactivated buffer and not full is added to the dispatched FIFO again.

[0202] If the dispatched FIFO is not empty and the parallel operation table is not full, the virtual queue number of the dispatched FIFO is read, a new operation table item is created, and a request for dispatching a queue is sent to the receiving engine. The above operation is repeated until the dispatched FIFO is empty or the parallel operation table is full.

[0203] When receiving the feedback signal of the receiving engine, indicating that the queue descriptor buffer queue is successfully added and not full, the queue number is added to the dispatched queue again, and the operation table item is deleted.

[0204] When receiving the feedback signal of the receiving engine, indicating that the queue descriptor buffer queue is successfully added and full, the virtual queue is marked as an unactivated state, and the operation table item is deleted.

[0205] When receiving the feedback signal of the sending engine, indicating that the queue descriptor buffer does not retrieve data, the virtual queue is marked as an unactivated state, and the operation table item is deleted.

[0206] In some embodiments, the control logic for the full state of the descriptor buffer includes: receiving a feedback signal from the receiving engine indicating that the descriptor buffer of a certain queue is full, setting the state to a full state; receiving a new received data frame of a certain queue, setting the state to a non-full state.

[0207] The virtual network card provided by the embodiment of the application introduces the advantages of SIOV in the virtualization scheme into the design scheme of the virtual network card by supporting the new capability attribute of the PCIE of SIOV, and introduces a virtual network device, and improves the common software virtualization technical scheme to a hardware-implemented virtual network card implementation scheme. The scheme can ensure that the user obtains a transmission performance close to hardware implementation, and the consumed resources are much smaller than the cumulative single network card resources.

[0208] The virtual network card provided by the embodiment of the application has the following characteristics:

[0209] (1) The PCIE interface of the system supports the SIOV function, and after the SIOV feature is enabled, the maximum number of SDIs that can be enabled in a PF is 65535 (the actual supported number is limited by the hardware resources of the network card and the number of assignable RIDs).

[0210] (2) The PCIE interface of the system can optionally support the SR-IOV feature. When the number of virtual ports is required to be no more than 2048, the SIOV function or the SR-IOV feature can be selected to be enabled. The advantage of enabling the SR-IOV feature is compatibility with old systems.

[0211] (3) The storage mode of the compact virtual queue based on the VirtIO specification, by constructing a DMA transmission mechanism between the host (including the virtual machine) and the network card, the interaction frequency can be reduced when the peripheral device accesses the descriptor, and the transmission performance of the DMA is improved. The transmission layer of VirtIO maintains a certain degree of compatibility, which is conducive to the integration of new network cards into existing virtualization application environments and provides transmission performance close to hardware.

[0212] (4) The transmission scheduling is implemented by using hardware logic. In the H2C direction, the CPU notifies the scheduling module to directly poll the virtual queue for data transmission. The scheduled queue directly takes the descriptor and continues to transmit the data frame. In the C2H direction, the scheduling module monitors the cache state of the available descriptor queue and initiates a pre-fetch operation of the available descriptor. The transmission of the network data frame is automatically triggered when the data arrives at the receiving cache module. This can reduce the demand for storage resources of the descriptor and the data frame cache of the virtual queue.

[0213] (5) The software driver is responsible for mapping the virtual queue provided by the hardware into a standard virtual network device, so that the network card can work in the existing virtualization environment. The software driver can also provide non-standard functions to enhance the ability of the device to apply in new virtualization environments. The VirtIO specification has content for device management using virtual queues. This management queue does not require high-performance transmission and can be implemented using an embedded CPU soft core. The implementation and management of this virtual queue are independent.

[0214] The virtual network card provided by the embodiments of the present application can achieve the following beneficial effects:

[0215] Efficient support of a large number of virtual ports: the BDF resources of the PCIE bus can be fully utilized, thereby greatly increasing the number of virtual ports of the network card.

[0216] Performance optimization of the virtual queue: the compact virtual queue is adopted, which can reduce the descriptor interaction frequency and improve the DMA transmission efficiency.

[0217] Support for virtual network device offloading function: the CPU load can be reduced, and the data frame processing efficiency can be improved.

[0218] Based on the content described in the above embodiments, some embodiments of the present application further provide an electronic device, which includes a virtual network card.

[0219] Optionally, in some embodiments, the virtual network card comprises a first interface module, a virtual direct memory access module, a virtual network device offload module, and a virtual device management module.

[0220] The first interface module supports the extended input / output virtualization function, and is configured to expand the number of virtual ports by using an extended device interface; the virtual direct memory access module is configured to create and maintain a virtual queue, and establish data transmission between the virtual queue and a host through a direct memory access interface; the virtual network device offload module is configured to transfer network processing tasks from the host to the hardware network card; and the virtual device management module is configured to configure various parameters of the virtual device.

[0221] In some embodiments, the first interface module comprises a high-speed serial computer expansion bus hard core and a hardware interface bus adaptation module; the high-speed serial computer expansion bus hard core supports the extended input / output virtualization function; and the hardware interface bus adaptation module is configured to adapt the interface of the high-speed serial computer expansion bus hard core into a requester / requester completion interface and a completion request / completion completion interface.

[0222] In some embodiments, the high-speed serial computer expansion bus hard core also supports a single root input / output virtualization function; and the single root input / output virtualization function is enabled when the number of virtual ports required by the virtual network card is less than a preset threshold.

[0223] In some embodiments, the virtual network card further comprises a management interface conversion module, a first end of the management interface conversion module being connected with the completion request / completion completion interface, and a second end of the management interface conversion module being connected with a first interface of the virtual device management module; and the management interface conversion module is configured to convert the format of data transmitted between the completion request / completion completion interface and the first interface.

[0224] In some embodiments, the virtual network card further comprises a direct memory access interface adaptation module, a first end of the direct memory access interface adaptation module being connected with the requester / requester completion interface, a second end of the direct memory access interface adaptation module being connected with the virtual device management module, and a third end of the direct memory access interface adaptation module being connected with the virtual direct memory access module; and the direct memory access interface adaptation module is configured to convert a bus signal, which separates descriptors and data transmitted by using a direct memory access interface, into a format compatible with a high-speed serial computer expansion bus.

[0225] In some embodiments, the virtual device management module is configured to:

[0226] In a case that the SR-IOV function is enabled, a first address space in a base address register space of the physical function device is allocated to the virtual device; in a case that the SR-IOV function is disabled, an independent base address register space is allocated to the virtual device.

[0227] In some embodiments, the virtual device management module comprises a micro control unit subsystem; the micro control unit subsystem is configured to:

[0228] configure a virtualized input / output device based on the scalable device interface mapping; and / or, process a control queue of the virtualized input / output device based on the scalable device interface mapping.

[0229] In some embodiments, the virtualized DMA module is configured to:

[0230] read a descriptor queue ring of the virtual queue, and receive or send data based on the descriptor queue ring.

[0231] In some embodiments, the virtualized DMA module is specifically configured to:

[0232] read a descriptor queue ring of the virtual queue by using a first DMA interface bus; and receive or send data by using a second DMA interface bus.

[0233] In some embodiments, the virtualized DMA module comprises a transmit-side available descriptor FIFO queue and a receive-side available descriptor memory.

[0234] The transmit-side available descriptor FIFO queue is configured to cache available descriptors on the transmit side; and the receive-side available descriptor memory is configured to cache available descriptors on the receive side.

[0235] In some embodiments, the virtualized DMA module further comprises an available descriptor ring reading module and a used descriptor ring writing back module.

[0236] The available descriptor ring reading module is configured to read available descriptors from an available descriptor queue created in the system memory; and the used descriptor ring writing back module is configured to return used descriptors after receiving or sending data.

[0237] In some embodiments, the virtualized DMA module further comprises an available queue management module and a used queue management module.

[0238] The available queue management module is configured to read descriptor information in the available descriptor queue, implement dequeuing of the descriptors, and maintain state information of the virtual queue; and the used queue management module is configured to update flag bits of the descriptors, and implement enqueuing of the descriptors by using the used descriptor ring writing back module.

[0239] In some embodiments, the virtualized DMA module further comprises a packet sending processing module and a packet receiving processing module.

[0240] The packet sending processing module is configured to assemble data frames read from the DMA interface into data frames corresponding to the virtual network device and send the data frames to the virtual network device offload module for processing. The packet receiving processing module is configured to split received data frames into at least one write operation according to a maximum load length of a supported transaction layer data frame, and then send the data frames to the DMA interface adaptation module.

[0241] In some embodiments, the virtualized DMA module further comprises a sending packet scheduling module, which is configured to:

[0242] check whether a virtual queue receiving a doorbell signal is enabled and activated; write a virtual queue that has been enabled but not activated into a scheduled queue and mark it as activated; read a virtual queue number from the scheduled queue, create an operation table entry, and send a scheduling request to the sending engine when the scheduled queue is not empty and the parallel operation table is not full; receive a feedback signal from the sending engine and update the queue state and the parallel operation table.

[0243] In some embodiments, the virtualized DMA module further comprises a receiving pre-fetch descriptor scheduling module, which is configured to:

[0244] check whether the cache state of the available descriptor storage is full; if the cache state of the available descriptor storage is not full, initiate a pre-reading operation of the available descriptor through the receiving engine; wherein the receiving engine triggers a receiving process of the data packet and completes a scheduling process of the data packet when the packet receiving processing module receives the data packet.

[0245] In some embodiments, the virtual network device offload module comprises a virtual network device frame parsing module, a sending side transport control protocol segment offload module, a sending frame checksum insertion module, and a sending short frame padding module.

[0246] The virtual network device frame parsing module is configured to parse a received virtual network device frame and extract key information. The sending side transport control protocol segment offload module is configured to receive a transport control protocol frame and split the received transport control protocol frame. The sending frame checksum insertion module is configured to calculate a checksum before sending a data packet and insert the checksum into a proper position of the to-be-sent frame. The sending short frame padding module is configured to pad a to-be-sent frame with a length less than a minimum frame length.

[0247] In some embodiments, the virtual network device offload module further comprises a receiving frame checksum checking module, a receiving side scaling queue mapping module, a receiving side transport control protocol segment offload module, and a virtual network device frame encapsulation module.

[0248] The receiving frame check sum checking module is configured to calculate the check sum of the received data frame and verify the integrity and accuracy of the received data frame; the receiving side scaling queue mapping module is configured to map the received data frame into different virtual queues; the receiving side transmission control segment unloading module is configured to buffer the received data frame and assemble the data frame into a transmission control protocol frame; and the virtual network device frame encapsulating module is configured to encapsulate the assembled transmission control protocol frame into a data frame carrying a virtual network device frame header.

[0249] In some embodiments, the virtual network card further comprises a virtual Ethernet port mapping module; the virtual Ethernet port mapping module is configured to split the data frame from the virtual network card to the host.

[0250] In some embodiments, the virtual network card further comprises an Ethernet media access control module; the Ethernet media access control module is configured to connect the optical module transmission interface.

[0251] Those skilled in the art will also realize that the modules of the examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or combinations of both. The disclosure will be described in connection with the functional blocks and steps of the examples as described above in order to illustrate the interchangeability of hardware and software under these circumstances. The implementation of the functionality of each example described above is a matter of choice dependent on the performance requirements of the particular application and the constraints imposed on the design of the overall system. The skilled person can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as a departure from the scope of the present application.

[0252] The above provides a detailed description of the technical solutions of the present application. The principles and embodiments of the present application are described by applying specific examples, and the above description of the examples is only applicable to help understand the technical solutions of the present application and its core ideas. It should be noted that, for those skilled in the art, without departing from the principles of the present application, some improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A virtual network card, comprising: The virtual network card comprises a first interface module, a virtual direct memory access module, a virtual network device offloading module and a virtual device management module; The first interface module supports the extended input / output virtualization function, and is configured to expand the number of virtual ports by using an extended device interface; The virtual direct memory access module is configured to create and maintain a virtual queue, and establish data transmission between the virtual queue and a host through a direct memory access interface; The virtual network device offloading module is configured to transfer network processing tasks from the host to a hardware network card; The virtual device management module is configured to configure various parameters of a virtual device; The first interface module comprises a high-speed serial computer extended bus hard core and a hardware interface bus adaptation module; The high-speed serial computer extended bus hard core supports the extended input / output virtualization function; The hardware interface bus adaptation module is configured to adapt the interface of the high-speed serial computer extended bus hard core into a completion request / completer completion interface and a requester request / requester completion interface; The high-speed serial computer extended bus hard core also supports the single root input / output virtualization function, and the single root input / output virtualization function is started when the number of virtual ports required by the virtual network card is less than a preset threshold.

2. The virtual network card of claim 1, wherein, The virtual network card further comprises a management interface conversion module, a first end of the management interface conversion module being connected with the completion request / completer completion interface, and a second end of the management interface conversion module being connected with a first interface of the virtual device management module; The management interface conversion module is configured to convert the format of data transmitted between the completion request / completer completion interface and the first interface.

3. The virtual network card of claim 1, wherein, The virtual network card further comprises a direct memory access interface adaptation module, a first end of the direct memory access interface adaptation module being connected with the requester request / requester completion interface, a second end of the direct memory access interface adaptation module being connected with the virtual device management module, and a third end of the direct memory access interface adaptation module being connected with the virtual direct memory access module; The direct memory access interface adaptation module is configured to convert bus signals of descriptors and data transmitted by using the direct memory access interface into a format compatible with the high-speed serial computer extended bus.

4. The virtual network card of claim 1, wherein, The virtual device management module is configured to: allocate a first address space in a base address register space of a physical function device to the virtual device when the extended input / output virtualization function is started; and allocate an independent base address register space to the virtual device when the single root input / output virtualization function is started.

5. The virtual network card of claim 1, wherein, The virtual direct memory access module comprises: a sending-side available descriptor first-in-first-out queue configured to cache available descriptors of the sending side; a receiving-side available descriptor memory configured to cache available descriptors of the receiving side; an available descriptor ring reading module configured to read available descriptors from an available descriptor queue created in a system memory; an used descriptor ring writing back module configured to return used descriptors after receiving or sending data; an available descriptor ring reading module configured to read available descriptors from an available descriptor queue created in a system memory; an used descriptor ring writing back module configured to return used descriptors after receiving or sending data; A used queue management module is configured to read descriptor information in the used descriptor queue, implement de-queue of the descriptor, and maintain state information of the virtual queue; A used queue management module is configured to update a flag bit of the descriptor, and implement in-queue of the descriptor by using the used descriptor ring write-back module; A data packet sending processing module is configured to group data frames read from the direct memory access interface into data frames corresponding to the virtual network device, and send the data frames to the virtual network device offload module for processing; A data packet receiving processing module is configured to split received data frames into at least one write operation according to a maximum load length of a supported transaction layer data frame, and then send the data frames to the direct memory access interface adaptation module.

6. The virtual network card of claim 5, wherein, The virtualized direct memory access module further comprises a sending data packet scheduling module and a receiving pre-fetch descriptor scheduling module. The sending data packet scheduling module is configured to: check whether a virtual queue receiving a bell signal is enabled and activated; write a virtual queue that is enabled but not activated into a scheduled queue, and mark the virtual queue as activated; read a virtual queue number from the scheduled queue, create an operation table entry, and send a scheduling request to a sending engine when the scheduled queue is not empty and a parallel operation table is not full; receive a feedback signal of the sending engine, and update a queue state and the parallel operation table; The receiving pre-fetch descriptor scheduling module is configured to: check whether a cache state of a used descriptor storage is full; 7. The virtual network card of claim 1, wherein, if the cache state of the used descriptor storage is not full, initiate a pre-reading operation of the used descriptor by using a receiving engine; wherein the receiving engine triggers a receiving process of a data packet when the data packet receiving processing module receives the data packet, and completes a scheduling process of the data packet. The virtual network device offload module comprises a virtual network device frame analysis module, a sending side transmission control segmentation offload module, a sending frame checksum insertion module, and a sending short frame padding module. The virtual network device frame analysis module is configured to analyze a received virtual network device frame, and extract key information. The sending side transmission control segmentation offload module is configured to receive a transmission control protocol frame, and segment the received transmission control protocol frame. The sending frame checksum insertion module is configured to calculate a checksum before sending a data packet, and insert the checksum into a proper position of a to-be-sent frame.

8. The virtual network card of claim 7, wherein, The sending short frame padding module is configured to pad a to-be-sent frame with a length less than a minimum frame length. The virtual network device offload module further comprises a receiving frame checksum checking module, a receiving side scaling queue mapping module, a receiving side transmission control segmentation offload module, and a virtual network device frame encapsulation module. The receiving frame checksum checking module is configured to calculate a checksum of a received data frame, and verify integrity and accuracy of the received data frame. The receiving side scaling queue mapping module is configured to map the received data frame to different virtual queues. The receiving side transmission control segmentation offload module is configured to buffer the received data frame, and assemble the data frame into a transmission control protocol frame. The virtual network device frame encapsulation module is configured to encapsulate the assembled transmission control protocol frame into a data frame carrying a virtual network device frame header.

9. An electronic device, comprising: A virtual network card as claimed in any of claims 1 to 8.

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