Circuit simulation data processing methods, devices, and equipment based on artificial neural networks

Abstract

This application discloses a circuit simulation data processing method, apparatus, and device based on artificial neural networks. The method's model takes port voltage as input and outputs port current and S-parameters. Its structure includes two parts: an IV network and a SP network, and a residual network is introduced. During the training phase, the IV network extracts node voltages and currents from the simulation data as training samples, while the SP network takes node voltages and corresponding S-parameters as input and extracts poles, residuals, and gains using a vector fitting method. During the deployment phase, the model file is loaded into the circuit simulator, and the IV and SP networks are loaded and cached synchronously during initialization. During the simulation, according to the linearization process of the nonlinear devices in the circuit simulator, the output of the IV network is used to calculate the equivalent conductance and equivalent current source, while the output of the SP network is used to reconstruct the standard S-parameters. This application's embodiments avoid cross-programming language call overhead, are compatible with multiple ports, and improve the speed, accuracy, and convergence of broadband simulation.

Description

Technical Field

[0001] This application relates to a circuit simulation data processing method, apparatus, and device based on Artificial Neural Network (ANN), belonging to the fields of circuit and system simulation, artificial intelligence device modeling, and numerical algorithm implementation. Background Technology

[0002] Traditional nonlinear device models generally employ equivalent circuits or parameter fitting methods. However, when the device exhibits strong nonlinearity, has a large number of ports, and needs to cover a wide frequency band, these methods struggle to balance accuracy and numerical stability. While deep neural networks can improve nonlinear mapping capabilities, frequent calls to external interpreters (such as Python) during simulation iterations introduce cross-language call delays and additional data copying, reducing the convergence speed and overall efficiency of Newton's iteration. Furthermore, these delay and copying issues become more pronounced when frequency domain expansion is required: multi-port nonlinear devices must remain compatible with the linearization process within the circuit simulator (such as Newton-Raphson iteration) and correctly recover the scattering parameters (S-parameters) in the frequency domain analysis, thereby converting them into admittance or impedance forms that can be used for matrix filling.

[0003] In summary, the existing solutions lack integrated and engineered implementation. Summary of the Invention

[0004] In view of this, this application provides a circuit simulation data processing method, apparatus and device based on artificial neural networks. The embodiments of this application divide the ANN device model into two parts: a current-voltage (IV) model and a scattering parameter (SP) model, and integrate them to complete training, deployment and subsequent simulation calculations, eliminating cross-language calls, and improving simulation accuracy, convergence speed and overall efficiency.

[0005] The first aspect of this application discloses a circuit simulation data processing method based on an artificial neural network. The method includes: acquiring circuit simulation data for training, wherein the data of an IV model is preprocessed to extract node voltages and port currents, the data of an SP model is preprocessed to extract node voltages and S-parameters, and vector fitting is performed on the data of the SP model to obtain the poles, residuals, and gains of each set of S-parameter matrix elements; the IV model and the SP model are trained respectively and exported as model files that can be directly inferred in a circuit simulator, wherein both the IV model and the SP model adopt a residual network structure; the trained IV model and the SP model are loaded and cached during the initialization phase of the circuit simulator and set to inference mode; during the simulation analysis, the IV model is driven to obtain port currents using device port voltages as input, and a linearized equivalent model is constructed based on the derivative of current with respect to voltage to fill the circuit matrix; the SP model is driven to obtain poles, residuals, and gains using device port voltages as input, and standard S-parameters are recovered for frequency domain representation or parameter transformation.

[0006] In one embodiment, the residual unit of the residual network structure includes a normalization layer, an activation function, and a linear layer.

[0007] In one embodiment, the SP model employs a multi-head prediction structure with a shared hidden layer and subsequent branches to predict poles, residuals, and gains respectively.

[0008] In one embodiment, the model file is in TorchScript serialization format and carries normalization parameters or denormalization parameters.

[0009] In one embodiment, for the IV model, the training loss includes the port current mean square error, Kirchhoff's current law penalty term, and derivative smoothing regularization term; for the SP model, the training loss includes the S-parameter mean square error and passivity and causality regularization terms.

[0010] In one embodiment, the simulation analysis process specifically includes: a DC analysis step: using the port voltage of the current iteration as input, the port current is output through the IV model; based on the linearization principle of the nonlinear device, the equivalent admittance and equivalent current source are calculated from the port voltage and port current to achieve matrix filling; a small-signal AC analysis step: after linearizing the nonlinear device at the DC operating point, the poles, residuals, and gains are output from the SP model; the S-parameters at a specified frequency point are reconstructed using the poles, residuals, and gains, and the S-parameters are converted into an admittance matrix or an impedance matrix to achieve frequency domain filling.

[0011] In one embodiment, the circuit simulator is a multi-port nonlinear device.

[0012] The second aspect of this application discloses a circuit simulation data processing device based on an artificial neural network. The device includes: an acquisition module for acquiring circuit simulation data for training, wherein the data of the IV model is preprocessed to extract node voltages and port currents, the data of the SP model is preprocessed to extract node voltages and S-parameters, and vector fitting is performed on the data of the SP model to obtain the poles, residuals, and gains of each set of S-parameter matrix elements; a training module for training the IV model and the SP model respectively and exporting them as model files that can be directly inferred in a circuit simulator, wherein both the IV model and the SP model adopt a residual network structure; a loading and caching module for loading and caching the trained IV model and the SP model during the initialization phase of the circuit simulator and setting them to inference mode; and a driving module for driving the IV model to obtain port currents using device port voltages as input during simulation analysis, and constructing a linearized equivalent model based on the derivative of current with respect to voltage to fill the circuit matrix; and driving the SP model to obtain poles, residuals, and gains using device port voltages as input, and recovering standard S-parameters for frequency domain representation or parameter transformation.

[0013] A third aspect of this application discloses a computer-readable storage medium comprising a stored program, wherein the program, when running, controls the execution of the circuit simulation data processing method of the above embodiments in the processor of the device.

[0014] A fourth aspect of this application discloses a computer device, the computer device including a processor and a memory; wherein the memory stores a computer program adapted to be loaded by the processor and executed by the above-described circuit simulation data processing method.

[0015] Compared with the prior art, the embodiments of this application have the following beneficial effects:

[0016] The embodiments of this application perform native inference within the circuit simulator, avoiding cross-language calls and duplicate data copying;

[0017] This embodiment can be seamlessly integrated with the nonlinear linearization process of a circuit simulator;

[0018] This embodiment employs a vector fitting-supervised preprocessing and branch prediction structure to improve the accuracy of S-parameter reconstruction and reduce training complexity. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0020] Figure 1 A flowchart illustrating a circuit simulation data processing method based on an artificial neural network, provided in an embodiment of this application.

[0021] Figure 2 This is a network architecture diagram of an IV model provided in an embodiment of this application.

[0022] Figure 3 This is a network architecture diagram of an SP model provided in an embodiment of this application.

[0023] Figure 4 This is a flowchart illustrating a simulation analysis process provided in an embodiment of this application.

[0024] Figure 5 This is a structural block diagram of a circuit simulation data processing device based on an artificial neural network, provided in an embodiment of this application. Detailed Implementation

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0026] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0027] Example 1:

[0028] Figure 1 This is a flowchart illustrating a circuit simulation data processing method based on an artificial neural network, provided as an embodiment of this application. Figure 1 As shown, the method includes:

[0029] S101 acquires circuit simulation data for training, wherein the data of the IV model is preprocessed to extract node voltages and port currents, the data of the SP model is preprocessed to extract node voltages and S-parameters, and vector fitting is performed on the data of the SP model to obtain the poles, residuals and gains of each set of S-parameter matrix elements.

[0030] In this step, port voltage-current samples are collected, normalized, and cleaned; vector fitting is performed on the S-parameters at each frequency point to obtain the corresponding poles, residuals, and gains.

[0031] As an optional implementation, firstly, for the IV model, node / port voltages and port currents are extracted from simulation or measurement data to form training samples. These samples are then normalized and outlier removed to ensure the accuracy and robustness of the model training. Secondly, for the SP model, node / port voltages and S-parameters are extracted. Using vector fitting techniques, the poles, residuals, and gains corresponding to each Sxx parameter are obtained. These parameters are used as training data in the model training process. This effectively constructs IV and SP models that accurately reflect the device characteristics.

[0032] The Sxx parameters mentioned above refer to scattering parameters, which are a set of parameters used to describe the signal transmission characteristics of electronic networks (such as amplifiers, filters, antennas, etc.) between different ports.

[0033] In multiport networks, S-parameters can quantify the relationship between incident waves and reflected or transmitted waves.

[0034] Specifically, the S-parameters include the following:

[0035] S 11 This represents the reflection coefficient of the input port, which is the ratio of the incident wave to the reflected wave at the input port.

[0036] S 21 It represents the transmission coefficient from the input port to the output port, that is, the ratio of the incident wave at the input port to the transmitted wave at the output port.

[0037] S 12 It represents the transmission coefficient from the output port to the input port, that is, the ratio of the incident wave at the output port to the reflected wave at the input port.

[0038] S 22This represents the reflection coefficient of the output port, which is the ratio of the incident wave to the reflected wave at the output port.

[0039] In cases with more than two ports, the S-parameter can be extended to more port combinations, such as S... 13 ,S 31 ,S 33 wait.

[0040] The vector fitting technique described above is a method for extracting network parameters (such as S-parameters) from limited frequency sampling data. It is a mathematical technique used to model frequency response data so that it can accurately predict and interpolate this data in the absence of the original data.

[0041] S102 trains the IV model and the SP model respectively and exports them as model files that can be directly inferred in the circuit simulator. Both the IV model and the SP model adopt a residual network structure.

[0042] In this step, both the IV model and the SP model are built based on ANN, and a residual network structure is introduced into the ANN.

[0043] In some embodiments, the residual unit of the residual network structure includes a normalization layer, an activation function, and a linear layer, and the network depth and width can be adaptively configured according to the target bandwidth and number of ports.

[0044] In some embodiments, the SP model employs a multi-head prediction structure with a shared hidden layer and a back branch to predict poles, residuals, and gains respectively.

[0045] As an optional implementation method, such as Figure 2 As shown in the figure, this illustrates the structure of a deep learning model. First, the raw data is cleaned and prepared using a data preprocessing module. Next, the simulation data passes through a training / evaluation data loader and is input to the model's input layer, which receives the input voltages Vgs and Vds. Subsequently, the data undergoes a linear input block to transform the input dimension from len_input to nc. The core of the model consists of multiple residual blocks, each further refined into substructures containing batch normalization, ReLU activation functions, and linear transformations. After a series of residual block processing steps, the data is split into two distinct output paths: the IGS and IDS paths. Each path contains its own hidden and output blocks, where the hidden blocks consist of residual blocks, and the output blocks include a linear layer, a Dropout layer, and a final linear layer. Finally, the model outputs two key current parameters: the gate current (Igs) and the drain current (Ids).

[0046] As an optional implementation method, such as Figure 3As shown in the figure, this illustrates the structure of a deep learning model. First, the model cleans and prepares the raw data through a data preprocessing stage. Next, the simulation data undergoes vector fitting (Pole / Residue) processing and is loaded by the training / evaluation data loader. The model's input layer receives the input voltages Vgs and Vds and transforms the input dimension from len_input to nc through a linear input block. Subsequently, the data is processed through multiple residual blocks, each containing batch normalization, a ReLU activation function, and a linear transformation. After a series of residual blocks, the data is split into different output paths, including gain blocks, pole blocks, and S-parameter blocks (S...). 11 S 12 S 21 S 22 Each block contains a hidden layer and an output layer. The output layer consists of a linear layer, a Dropout layer, and another linear layer. Ultimately, the model output includes the gain, poles, and S. 11 S 12 S 21 S 22 In addition, there is an extra number of poles and scattering parameters.

[0047] It is worth noting that residual network structures are used to train the IV model and the SP model separately. The IV model takes the port voltage as input and outputs the port current; the SP model uses branch output poles, residuals and gains after sharing the hidden layer, which can improve wideband accuracy.

[0048] In some embodiments, for the IV model, the training loss includes the port current mean square error, Kirchhoff's current law penalty term, and derivative smoothing regularization term; for the SP model, the training loss includes the S-parameter mean square error and passivity and causality regularization terms.

[0049] It should be noted that for the IV model, the mean square error of the port current is minimized, and derivative smoothing regularization is added if necessary. For the SP model, a shared backbone and branch heads (pole / residual / gain) are constructed and jointly trained. Passive regularization and pole stabilization constraints can be optionally added to improve broadband stability.

[0050] After evaluation on the validation set, the trained IV / SP model and its corresponding normalized parameters are exported.

[0051] S103 loads and caches the trained IV model and SP model during the initialization phase of the circuit simulator, and sets it to inference mode.

[0052] In this step, both types of models are exported as a serialized format that can be directly loaded by LibTorch (the model files are in TorchScript serialization format with numerical protection), carrying normalization / denormalization parameters. The circuit simulator automatically performs dimensional restoration before and after inference, performing inference entirely within the circuit simulator using the serialized format, avoiding cross-language calls and interpreter overhead.

[0053] The aforementioned numerical protection includes gradient clipping, pole stabilization, and passive correction.

[0054] Furthermore, during the initialization phase of the circuit simulator, the IV and SP models are loaded and cached, set to inference mode, and thread and memory management configurations are completed.

[0055] As an optional implementation, during deployment, the IV and SP models are first loaded using the LibTorch library and set to the eval state to ensure that training-related operations are not performed during inference. Next, normalized parameters are read and cached, while buffers and thread pools required for inference are established to optimize inference performance. Finally, device interfaces are registered, and port mapping and parameter parsing are completed. For example, the number of device interfaces can be obtained through additional port information in the SP model, device ports can be determined, and port mapping and parameters (such as model file paths) can be completed. This ensures that the model can correctly interact with the circuit simulation environment, thereby achieving efficient circuit simulation and analysis.

[0056] During the simulation analysis, S104 uses the device port voltage as input to drive the IV model to obtain the port current, and constructs a linearized equivalent model based on the derivative of current with respect to voltage to fill the circuit matrix. Using the device port voltage as input, it drives the SP model to obtain poles, residuals, and gains, and recovers the standard S-parameters for frequency domain representation or parameter transformation. The linearized equivalent model is used for matrix filling in the form of port submatrices within the modified node analysis framework of the circuit simulator.

[0057] like Figure 4 As shown, this flowchart describes the processing path of an IV / SP model. It first involves loading or reusing the model, a crucial step due to its high cost. Next, the flow enters the analysis phase, which, based on the analysis results, is divided into two main branches: DC / transient analysis and AC / scattering parameter analysis. In the DC / transient analysis branch, IV inference is performed first, followed by linearization, ultimately generating the equivalent model. In the AC / scattering parameter analysis branch, the operating point is first determined, then SP inference is performed, followed by pole / residual recovery, and finally, scattering parameters are generated.

[0058] As an optional implementation, in the DC analysis, for the port current relationship i = f(v), linearization is performed at the iteration point v̂: i≈î + G·(v −v̂), where G = ∂f / ∂v|v̂. Then, the equivalent current source Ieq =î − G·v̂, and the simulator fills in the admittance G and current Ieq. In the AC analysis, the SP model is called to obtain the poles, residuals, and gain to reconstruct the S-parameters, and the S-parameter matrix is ​​filled.

[0059] It is understandable that the circuit simulator iteratively calls the IV model to generate linearized equivalent admittance and equivalent current in DC analysis, linearizes at the DC operating point in small-signal AC analysis and can be converted into Y parameters after recovering the S parameters from the SP model for filling, and updates the linearized equivalent model according to the time step in transient analysis.

[0060] In summary, for DC simulation, this method iteratively updates the voltage v, calls the IV model to obtain the current i and admittance G, then populates these parameters into the simulator and performs a convergence check. For AC simulation, linearization is first performed at the DC operating point, then the SP model is called to obtain the S-parameters, and these parameters are used for matrix filling.

[0061] Specifically, the poles, residuals, and gains output by the SP model are used to reconstruct the scattering matrix on a given frequency grid, and the admittance matrix or impedance matrix is ​​obtained through parameter transformation for use by the circuit simulator in the frequency domain.

[0062] In this embodiment, the device is a three-terminal nonlinear device by default, which can be expanded to multiple ports, and the number of ports N is configurable. Overhead is reduced through batch inference and caching strategies.

[0063] Figure 5 This is a structural block diagram of a circuit simulation data processing device based on an artificial neural network, provided as an embodiment of this application. Figure 5 As shown, the device includes:

[0064] The acquisition module 501 is used to acquire circuit simulation data for training. The data of the IV model is preprocessed to extract node voltages and port currents, the data of the SP model is preprocessed to extract node voltages and S-parameters, and vector fitting is performed on the data of the SP model to obtain the poles, residuals and gains of each set of S-parameter matrix elements.

[0065] Training module 502 is used to train the IV model and the SP model respectively and export them as model files that can be directly inferred in the circuit simulator. Both the IV model and the SP model adopt a residual network structure.

[0066] The loading and caching module 503 is used to load and cache the trained IV model and SP model during the initialization phase of the circuit simulator, and set them to inference mode.

[0067] The driving module 504 is used to drive the IV model to obtain the port current during the simulation analysis process, using the device port voltage as input, and to construct a linearized equivalent model based on the derivative of current with respect to voltage, which is used to fill the circuit matrix; using the device port voltage as input, it drives the SP model to obtain poles, residuals and gains, and to recover the standard S-parameters for frequency domain representation or parameter transformation.

[0068] Example 2:

[0069] Embodiments of this application also provide a computer device, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods in various embodiments of the present invention during runtime.

[0070] The aforementioned memory can refer to devices inside a computer used to store data and programs, including RAM, hard disks, etc. RAM can be used to temporarily store running programs and data, while hard disks can be used to store programs and data long-term. Memory enables the computer to read and write data and execute programs. The aforementioned processor is responsible for executing instructions in computer programs and performing data processing. It can also be responsible for controlling and executing various operations, including arithmetic operations, logical operations, and data transmission.

[0071] Example 3:

[0072] Embodiments of this application also provide a computer-readable storage medium including a stored executable program, wherein, when the executable program is running, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of the present invention.

[0073] The aforementioned computer storage media can refer to the media used in computer memory to store certain discontinuous physical quantities. Computer storage media mainly include semiconductors, magnetic cores, magnetic drums, magnetic tapes, laser discs, etc. Computer-readable storage media include stored programs, which can be a set of instructions that a computer can recognize and execute, running on an electronic computer to meet certain information needs.

[0074] Example 4:

[0075] Embodiments of this application also provide a computer program product, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.

[0076] The aforementioned computer program products can refer to software programs that have been written, tested, and released, and can run on computers or other devices. Computer program products can include application programs, operating systems, utility software, etc., used to achieve specific functions or solve specific problems.

[0077] Example 5:

[0078] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program that, when executed by a processor, implements the methods in various embodiments of the present invention.

[0079] The aforementioned non-volatile computer-readable storage medium can refer to a medium for storing data. Non-volatile computer-readable storage media can retain data without loss when power is off and can be used to store long-term data, such as operating systems, applications, and user files. Non-volatile storage media can include hard disk drives, solid-state drives, optical disks, and flash memory storage devices, etc.

[0080] Example 6:

[0081] Embodiments of this application also provide a computer program that, when executed by a processor, implements the methods described in the various embodiments of the present invention.

[0082] The aforementioned computer program can refer to a set of instructions used to tell the computer to perform specific tasks or operations. Computer programs can be written by programmers using specific programming languages ​​and can include algorithms, data structures, logic, and control flow. Computer programs can be used for a variety of purposes, including application software, operating systems, etc.

[0083] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0084] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.

[0085] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0086] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0087] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0088] In summary, this application provides an artificial neural network (ANN) black-box device model implemented in a circuit simulator. This model employs a dual-network structure of current-voltage (IV) and scattering parameter (SP), a residual structure, and vector fitting supervision. Combined with the simulator's native linearization and matrix filling mechanisms, it achieves high-precision, high-efficiency, and high-stability simulation of nonlinear, multi-port, and wideband devices. This method is simple to implement, easy to integrate into engineering, and particularly suitable for various simulation scenarios such as integrated circuits, RF / microwave, and power integrity.

[0089] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A circuit simulation data processing method based on artificial neural networks, characterized in that, include: Obtain circuit simulation data for training, wherein the data of the IV model is preprocessed to extract node voltages and port currents, the data of the SP model is preprocessed to extract node voltages and S-parameters, and vector fitting is performed on the data of the SP model to obtain the poles, residuals and gains of each set of S-parameter matrix elements; The IV model and the SP model are trained separately and exported as model files that can be directly inferred in the circuit simulator. Both the IV model and the SP model adopt a residual network structure. During the initialization phase of the circuit simulator, the trained IV model and SP model are loaded and cached, and set to inference mode. During the simulation analysis, the device port voltage is used as input to drive the IV model to obtain the port current, and a linearized equivalent model is constructed based on the derivative of current with respect to voltage to fill the circuit matrix; the device port voltage is used as input to drive the SP model to obtain poles, residuals and gains, and recover the standard S-parameters for frequency domain representation or parameter transformation. The IV model is the current-voltage model; the SP model is the scattering parameter model; and the S-parameters are the scattering parameters.

2. The circuit simulation data processing method according to claim 1, characterized in that, The residual unit of the residual network structure includes a normalization layer, an activation function, and a linear layer.

3. The circuit simulation data processing method according to claim 1, characterized in that, The SP model employs a multi-head prediction structure with a shared hidden layer and subsequent branches to predict poles, residuals, and gains respectively.

4. The circuit simulation data processing method according to claim 1, characterized in that, The model file is in TorchScript serialization format and carries normalization or denormalization parameters.

5. The circuit simulation data processing method according to claim 1, characterized in that, For the IV model, the training loss includes the mean square error of the port current, the Kirchhoff current law penalty term, and the derivative smoothing regularization term; for the SP model, the training loss includes the mean square error of the S-parameters and the passivity and causality regularization terms.

6. The circuit simulation data processing method according to claim 1, characterized in that, The simulation analysis process specifically includes: DC analysis steps: Using the port voltage of the current iteration as input, the port current is output through the IV model; based on the linearization principle of nonlinear devices, the equivalent admittance and equivalent current source are calculated from the port voltage and port current to achieve matrix filling; Small signal communication analysis steps: After linearizing the nonlinear device at the DC operating point, the SP model is called to output the poles, residuals, and gain; the S-parameters at the specified frequency point are reconstructed using the poles, residuals, and gain, and the S-parameters are converted into an admittance matrix or an impedance matrix to achieve frequency domain filling.

7. The circuit simulation data processing method according to claim 1, characterized in that, The circuit simulator is a multi-port nonlinear device.

8. A circuit simulation data processing device based on an artificial neural network, characterized in that, include: The acquisition module is used to acquire circuit simulation data for training. Specifically, the data of the IV model is preprocessed to extract node voltages and port currents, the data of the SP model is preprocessed to extract node voltages and S-parameters, and vector fitting is performed on the data of the SP model to obtain the poles, residuals and gains of each set of S-parameter matrix elements. The training module is used to train the IV model and the SP model respectively and export them as model files that can be directly inferred in the circuit simulator. Both the IV model and the SP model adopt a residual network structure. A loading and caching module is used to load and cache the trained IV model and SP model during the initialization phase of the circuit simulator, and set them to inference mode. The driving module is used to drive the IV model to obtain the port current during the simulation analysis process, taking the device port voltage as input, and constructing a linearized equivalent model based on the derivative of current with respect to voltage, which is used to fill the circuit matrix; taking the device port voltage as input, it drives the SP model to obtain poles, residuals and gains, and recovers the standard S-parameters for frequency domain representation or parameter transformation. The IV model is the current-voltage model; the SP model is the scattering parameter model; and the S-parameters are the scattering parameters.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the circuit simulation data processing method as described in any one of claims 1-7.

10. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the circuit simulation data processing method as described in any one of claims 1-7.

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