Method for manufacturing coupled coaxial inductor in packaging structure
By introducing a coupled coaxial magneto-inductor layer (CMIL) into the package structure, the alignment and filtering efficiency challenges in coupled inductor manufacturing are solved, resulting in a high-efficiency inductor structure that reduces self-flux and ripple, improves current skew rate, and reduces manufacturing steps and costs.
Patent Information
- Application Number
- CN202510672686.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-06-27
- Filing Date
- 2025-05-23
- Publication Date
- 2025-12-30
AI Technical Summary
In existing technologies, the design of coupled inductors presents alignment challenges and reduces filtering efficiency, leading to increased manufacturing difficulty.
By introducing a coupled coaxial magnetic inductor layer (CMIL) into the core layer of the package structure, the coupled CMIL inductor structure extends within the core. It utilizes copper-plated through-holes filled with high-permeability magnetic material, combined with the design of conductive pads and non-magnetic materials, to form a smaller through-hole spacing and stronger magnetic coupling.
A more efficient inductor structure was achieved, reducing self-flux and ripple, improving current skew rate, reducing manufacturing steps, and lowering manufacturing costs.
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Figure CN121237785A_ABST
Abstract
Description
Background Technology
[0001] In electronic device manufacturing, integrated circuit (IC) packaging is a manufacturing stage in which the IC, already fabricated on a die or chip comprising semiconductor material, is coupled to a support housing or "package" that protects the IC from physical damage and supports electrical interconnections suitable for further connection to host components, such as printed circuit boards (PCBs). In the IC industry, the process of manufacturing a package is often referred to as packaging or assembly.
[0002] Implementing integrated power options in semiconductor packages requires inductor structures with high efficiency and low transient times. Such a combination can be achieved using coupled inductor structures. Coupled inductors offer several advantages over uncoupled inductors. For example, coupled inductors have significantly lower self-flux compared to uncoupled inductors, resulting in lower ripple and higher current slack. However, coupled inductor design can be challenging due to alignment and filtering efficiency challenges. Attached Figure Description
[0003] The subjects described herein are illustrated in the accompanying drawings by way of example rather than limitation. For simplicity and clarity, the elements shown in the drawings are not necessarily drawn to scale. For example, the dimensions of some elements may be exaggerated relative to others for clarity. Furthermore, reference numerals have been repeated in the drawings where deemed appropriate to indicate corresponding or similar elements. In the drawings:
[0004] Figures 1A-1B This is a cross-sectional view of an IC package structure including a coupling enhancement structure according to some embodiments.
[0005] Figure 1C This is a top view of an IC package structure including a coupled coaxial magnetic inductor (CMIL) structure according to some embodiments.
[0006] Figures 2A-2G This is a top view of an IC package structure including a coupled CMIL inductor structure according to some embodiments.
[0007] Figure 2H This is a cross-sectional view of an IC package structure including a coupled CMIL inductor structure according to some embodiments.
[0008] Figures 3A-3H This is a top view of an IC package structure including a method for forming a coupled CMIL inductor structure according to some embodiments.
[0009] Figures 4A-4G This is a cross-sectional view of an IC package structure including a coupled CMIL inductor structure according to some embodiments.
[0010] Figure 5 This is a cross-sectional view of an IC package structure including a coupled CMIL inductor structure according to some embodiments.
[0011] Figures 6A-6B A flowchart of a process for manufacturing an IC package structure having a coupled CMIL inductor structure, according to some embodiments, is shown.
[0012] Figure 7 This is a functional block diagram of an electronic computing device according to some embodiments of the present disclosure. Detailed Implementation
[0013] Embodiments are described with reference to the accompanying drawings. While specific configurations and arrangements are depicted and discussed in detail, it should be understood that this is for illustrative purposes only. Those skilled in the art will recognize that other configurations and arrangements are possible without departing from the spirit and scope of this specification. It will be apparent to those skilled in the art that the techniques and / or arrangements described herein can be used in a variety of other systems and applications besides those described in detail herein.
[0014] The following detailed description is taken with reference to the accompanying drawings, which form part of the description and illustrate exemplary embodiments. Furthermore, it should be understood that other embodiments may be utilized, and structural and / or logical changes may be made, without departing from the scope of the claimed subject matter. It should also be noted that orientations and references (e.g., up, down, top, bottom, etc.) may be used only to facilitate the description of the features in the drawings. Therefore, the following detailed description should not be considered limiting, and the scope of the claimed subject matter is defined only by the appended claims and their equivalents.
[0015] Numerous details are set forth in the following description. However, it will be apparent to those skilled in the art that embodiments may be practiced without these specific details. In some instances, well-known methods and apparatuses are shown in block diagram form rather than in detail to avoid obscuring the embodiments. Throughout this specification, references to “embodiment,” “one embodiment,” or “some embodiments” mean that a particular feature, structure, function, or characteristic described in connection with that embodiment is included in at least one embodiment. Therefore, the appearance of the phrases “in an embodiment,” “in one embodiment,” or “some embodiments” throughout this specification does not necessarily refer to the same embodiment. Furthermore, in one or more embodiments, particular features, structures, functions, or characteristics may be combined in any suitable manner. For example, a first embodiment may be combined with a second embodiment, provided that the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive.
[0016] As used in the specification and appended claims, the singular forms “a,” “an,” and “the” are also intended to include the plural forms, unless the context clearly indicates otherwise. It will also be understood that the term “and / or,” as used herein, refers to and includes one or more of the associated listed items and any and all possible combinations of the associated listed items.
[0017] The terms “coupling” and “connection”, and their derivatives, are used herein to describe functional or structural relationships between components. It should be understood that these terms are not intended to be synonyms. Rather, in certain embodiments, “connection” can be used to indicate that two or more elements are in direct physical, optical, or electrical contact with each other. “Coupling” can be used to indicate that two or more elements are in direct or indirect physical or electrical contact with each other (with other intermediary elements in between), and / or that two or more elements cooperate or interact with each other (e.g., as in a causal relationship).
[0018] As used herein, the terms "above," "below," "between," and "on" refer to the relative position of a component or material with respect to other components or materials, where such physical relationships are noteworthy. For example, in the context of materials, a material or layer above or below another material or layer may be in direct contact, or may have one or more intermediate materials or layers. Furthermore, a material between two materials or layers may be in direct contact with both materials / layers, or may have one or more intermediate materials / layers. Conversely, a first material or layer "on" a second material or layer is in direct physical contact with that second material / layer. Similar distinctions exist in the context of component assembly.
[0019] As used throughout this specification and in the claims, the list of items accompanying the terms “at least one of…” or “one or more of…” can represent any combination of the listed items. For example, the phrase “at least one of A, B or C” can mean A; B; C; A and B; A and C; B and C; or A, B, C.
[0020] Unless otherwise specified in the explicit context of use, the term "major" means more than 50%, or more than half. For example, a composition that is primarily the first component means that more than half of the composition is the first component (e.g., <50 at.%). The term "primary" means the majority or the largest portion. For example, a composition that is primarily the first component means that the composition contains more of the first component than any other component.
[0021] The term "package" typically refers to a self-contained carrier of one or more dies, wherein the dies are attached to a package substrate and can be encapsulated for protection, with integrated or wire-jointed interconnections between the die and leads, pins, or bumps located on the exterior of the package substrate. A package can contain a single die or multiple dies providing a specific function. Packages are typically mounted on printed circuit boards for interconnection with other packaged integrated circuits and discrete components to form larger circuits.
[0022] The term "dielectric" generally refers to any number of non-conductive materials that make up the structure of the packaging substrate.
[0023] The term "metallization" generally refers to the formation of a metal layer on and through the dielectric material of a package substrate. The metal layer is typically patterned to form metallic structures such as traces and bonding pads. Metallization of the package substrate can be confined to multiple layers or a single layer separated by dielectric layers.
[0024] The term "bonding pad" typically refers to the metallized structure that terminates integrated traces and vias in integrated circuit packages and dies. The term "solder pad" is sometimes used interchangeably with "bonding pad" and has the same meaning.
[0025] The term "solder bump" typically refers to a layer of solder formed on bonding pads. Solder layers are usually circular in shape, hence the name "solder bump".
[0026] The term "substrate" generally refers to a planar platform comprising dielectric and metallized structures. The substrate mechanically supports and electrically couples one or more IC dies onto a single platform, wherein the one or more IC dies are encapsulated by a moldable dielectric material. The substrate typically includes solder bumps as bonding interconnects on both sides. One side of the substrate, often referred to as the "die side," includes solder bumps for chip or die bonding. The opposite side of the substrate, often referred to as the "land side," includes solder bumps for bonding the package to a printed circuit board.
[0027] The vertical direction is in the z-direction, and it is understood that the descriptions of "top," "bottom," "above," and "below" refer to relative positions in the z-dimensional dimension with their usual meaning. However, it is understood that embodiments are not necessarily limited to the orientations or configurations shown in the figures.
[0028] The terms “basically,” “close to,” “approximately,” “near,” and “about” generally refer to within + / - 10% of the target value (unless otherwise specified). Unless otherwise stated, the use of ordinal adjectives such as “first,” “second,” and “third” to describe common objects merely indicates different instances of similar objects involved and is not intended to imply that the objects described must be in a given order in time, space, sequence, or any other way.
[0029] Views labeled "Cross-section," "Section," and "Plan" correspond to orthogonal planes in the Cartesian coordinate system. Therefore, cross-sectional and section views are taken on the xz-plane, while plan views are taken on the xy-plane. Typically, a section view in the xz-plane is a cross-sectional view. Where appropriate, the figures are labeled with axes to indicate the orientation of the figures.
[0030] The embodiments discussed herein address problems associated with methods and packaging architectures for providing inductor structures that enable integrated power options on a semiconductor package architecture with high efficiency and low transient time. For example, the packaged inductor structure can be used with voltage regulators such as fully integrated voltage regulators (FIVRs) for voltage power regulation. The embodiments described herein achieve more efficient FIVR circuits. The embodiments also provide inductor manufacturing methods that require a reduced number of process steps, thereby reducing manufacturing costs.
[0031] High efficiency and low transient response times can be achieved by employing coupled inductor structures. Coupled inductors offer several advantages over uncoupled inductors. For example, coupled inductors have significantly lower self-flux compared to uncoupled inductors, resulting in lower ripple and higher current skew rate. Currently, fabricating coupled inductor designs is challenging due to alignment challenges and reduced filtering efficiency.
[0032] The embodiments described herein include semiconductor package structures having a coupled coaxial magneto-inductor layer (CMIL) in the core layer of the package structure / device. The coupled CMIL coupled inductor structure may include a copper-plated via (TH) at the center of a larger diameter TH, the via being filled with a high-permeability magnetic material, such as a magnetic resin, magnetic paste, or magnetic thin film. The embodiments describe methods for fabricating package structures with coupled inductor structures to achieve smaller plated via (PTH) spacing, and thus a wall-to-wall distance of 100 micrometers, resulting in stronger magnetic coupling.
[0033] In one embodiment, the core of the packaging substrate has a coupled CMIL inductor extending within the core. The inductor has a length extending vertically through the core. The inductor includes a first sidewall of magnetic material on the sidewall of the core. A conductive pad is located on the second sidewall of the magnetic material, wherein a first portion of the conductive pad in a plane orthogonal to the length of the inductor includes a first opening. A second portion of the conductive pad in the orthogonal plane includes a second opening, wherein the first and second openings face each other and are separated by a distance. A non-magnetic material is located between the first and second portions of the conductive pad.
[0034] In another embodiment, the coupled CMIL inductor extends within the core of the package structure. The inductor includes a first sidewall of magnetic material on the sidewall of the core. A conductive pad is located on the second sidewall of the magnetic material, wherein a first portion of the conductive pad includes a first opening in a plane orthogonal to the length of the inductor. A second portion of the conductive pad in the orthogonal plane includes a second opening, wherein the first and second openings face each other and are separated by a distance. A recess is located between the first and second openings. A non-magnetic material is located between the first and second portions of the conductive pad, wherein a portion of the non-magnetic material extends beyond the end sidewalls of the first and second openings.
[0035] The architecture described herein can be assembled and / or manufactured using one or more of the features or properties provided according to various embodiments. A variety of different assembly and / or manufacturing methods can be implemented based on one or more of the features or properties described herein to achieve the formation of coupled CMIL inductor designs with tighter design specifications and stronger magnetic coupling, which reduces self-flux and increases the current ramp rate of such packaged systems.
[0036] Figures 1A-1C An embodiment of a package structure including a coupled CMIL inductor design is shown. The package structure is formed using standard IC processing techniques. The fabrication method described herein results in improved device performance in advanced 2.5D and 3D packages.
[0037] Figure 1A This is a cross-sectional view of a portion of an integrated circuit (IC) package structure 100 including a coupled CMIL structure inductor 104 according to some embodiments. As shown, the package substrate 101 may include a core portion 102, wherein a build-up layer portion 103 is on the core 102. The package substrate 101 may include an organic substrate or any other suitable material and may have a thickness between approximately 100 micrometers and 3 millimeters. The package substrate 101 may provide mechanical support and electrical connectivity for dies 131, such as logic dies that may be attached to the package substrate 101. In embodiments, the package substrate 101 may include an inserter or a board. In some embodiments, the package substrate 101 may include materials such as dielectric materials, epoxy resins, glass, or glass fibers.
[0038] In some embodiments, the accumulation layer 103 may be on the top and / or bottom surface of the encapsulation substrate 101. The accumulation layer 103 may comprise a multilayer stack of laminated sheets (e.g., accumulation films). The material of the accumulation layer 103 may include composite epoxy resins, liquid crystal polymers, and polyimides. Other suitable materials may also be used. In some embodiments, the accumulation layer 103 is a monolithic sheet rather than a laminated film. Suitable organic or inorganic materials may be used. The accumulation layer 103 may comprise materials such as FR4 (e.g., epoxy laminates), bismaleimide-triazine, polyimide, silicone, or epoxy resin.
[0039] One or more inductor structures 104 may be located within the core material 102. The inductor structure 104 may include a coupled CMIL inductor structure 104 and may include a first sidewall 105 of a magnetic material 106 on the core 102, wherein a conductive pad 108 is located on a second sidewall 107 of the magnetic material 106. A non-magnetic material 110 may be located on the conductive pad 108.
[0040] Die 131 may be on package substrate 101, and die 131 may include, for example, a central processing unit (CPU) or field-programmable gate array (FPGA) die or FIVR circuit module, or may include any suitable logic die for a particular application. Die 131 may be bonded to package substrate 101 and one or more inductors 104 via solder structure 137 coupled to conductive contact structure 134.
[0041] The accumulation layer 103 may include a dielectric material 122 having conductive traces 124 distributed throughout, which can couple another substrate or die (e.g., die 131) to an inductor 104 within the package substrate 101. In an embodiment, the conductive traces 124 may include copper or a copper alloy. A passivation material 126 may be present on the surface of the accumulation dielectric material 122. The passivation material 126 may include materials such as silicon nitride and may be adjacent to the board contact pads 128.
[0042] Magnetic material 106 may comprise any suitable thickness or material, including but not limited to iron, nickel, and nickel-iron alloys (e.g., special metals (Mu metal) and / or permalloy). In some embodiments, the magnetic material comprises lanthanides and / or actinides. In some embodiments, magnetic material 106 comprises a cobalt-zirconium-tantalum alloy (e.g., CZT). Suitable magnetic materials may also comprise semiconductor or half-metallic Hessler compounds and non-conductive (ceramic) ferrites. In some embodiments, in addition to iron, the ferrite material includes any of nickel, manganese, zinc, and / or cobalt cations. In some embodiments, the ferrite material includes barium and / or strontium cations. Hessler compounds may include any of manganese, iron, cobalt, molybdenum, nickel, copper, vanadium, indium, aluminum, gallium, silicon, germanium, tin, and / or antimony. Hessler alloy, Co, Fe, Ni, Gd, B, Ge, Ga, permalloy or yttrium iron garnet (YIG), wherein the Hessler alloy is a material comprising one or more of the following: Cu, Mn, Al, In, Sn, Ni, Sb, Ga, Co, Fe, Si, Pd, Sb, V, Ru, Cu2MnAl, Cu2MnIn, Cu2MnSn, Ni2MnAl, Ni2MnIn, Ni2MnSn, Ni2MnSb, Ni2MnGa, Co2MnAl, Co2MnSi, Co2MnGa, Co2MnGe, Pd2MnAl, Pd2MnIn, Pd2MnSn, Pd2MnSb, Co2FeSi, Co2FeAl, Fe2Val, Mn2VGa, Co2FeGe, MnGa, MnGaRu, or Mn3X, wherein 'X' is one of Ga or Ge.
[0043] Magnetic materials with particles containing magnetic alloys, such as Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr2O3, CoO, Dy, Dy2O, Er, Er2O3, Eu, Eu2O3, Gd, Gd2O3, FeO, Fe2O3, Nd, Nd2O3, KO2, Pr, Sm, Sm2O3, Tb, Tb2O3, Tm, Tm2O3, V, V2O3, or epoxy resin materials, can be used. Alternatively, the magnetic alloy can be an alloy formed from one or more of Pt, Pd, W, Ce, Al, Li, Mg, Na, Cr, Co, Dy, Er, Eu, Gd, Fe, Nd, K, Pr, Sm, Tb, Tm, or V. While some of the magnetic materials are conductors, it is understood that the composite is non-conductive to avoid short-circuiting the conductive pad 108. In an embodiment, the magnetic material 106 may include a thickness of 200-300 micrometers.
[0044] In an embodiment, at least a portion of the conductive pad 108 lies between the magnetic material 106 and the non-magnetic material 110. In an embodiment, the conductive pad 108 may comprise any suitable conductive material, such as copper and / or copper alloys, and may comprise a thickness of approximately 50 micrometers or less. In an embodiment, the non-magnetic material 110 may comprise a dielectric material or a non-magnetic paste. In an embodiment, the non-magnetic material 110 may comprise silicate-based glass, composite polymers, and inorganic fillers (e.g., glass fibers or polycrystalline ceramic materials), or may comprise the same material as the core 102. In an embodiment, the non-magnetic material may comprise any suitable insulating blocking material.
[0045] In one embodiment, the non-magnetic material 110 may include a width of approximately 150 micrometers or less. In another embodiment, the non-magnetic material 110 may include a lateral width between approximately 80 micrometers and approximately 150 micrometers. In another embodiment, the first pad 116 and the second pad 116' are located on the top surface 117 of the core 102. In another embodiment, the first and second pads 116, 116' may include copper or a copper alloy. The first and second pads 116, 116' may be coupled to a first portion of the conductive pad 108a and a second portion of the conductive pad 108b, respectively. A distance 114 is between the first and second pads 116, 116'. In another embodiment, the distance 114 may range from approximately 40 micrometers to approximately 70 micrometers.
[0046] Figure 1B This is a cross-sectional view of a portion of a coupled CMIL inductor according to some embodiments, such as Figure 1A The inductor 104 of the IC package structure 100 is shown. As illustrated, the inductor 104 may include a magnetic material 106 on a core 102 and conductive pads 108 on the magnetic material 106, wherein a non-magnetic material 110 is at least partially surrounded by the conductive pads 108. A first pad 116 is on a first portion of the conductive pad 108a, and a second pad 116' is on a second portion of the conductive pad 108b. A distance 114 separates the first pad 116 from the second pad 116'. In an embodiment, the inductor 104 includes a length 115, which may be substantially equal to the length of the core 102.
[0047] Figure 1B The top view is taken from the tangent A-A' across inductor 104, and... Figure 1C As shown in [the image]. Figure 1CIn this embodiment, the first sidewall 105 of the magnetic material 106 is on the core 102, and the second sidewall 107 of the magnetic material 106 is on the first and second portions 108a and 108b of the conductive pad 108. The first portion 108a of the conductive pad 108 includes a first opening 153a, and the second portion 108b of the conductive pad 108 includes a second opening 153b. In an embodiment, the first portion 108a and the second portion 108b are semi-circular or semi-elliptical. In an embodiment, the terminal ends / sidewalls 152a of the first portion 108a and the terminal ends / sidewalls 152b of the second portion 108b of the conductive pad include a distance 119 between them.
[0048] A groove 132 is located between a first portion 108a and a second portion 108b of the conductive pad. In an embodiment, the distance 119 is approximately 100 micrometers or less. In an embodiment, a first opening 153a faces a second opening 153a in a plane orthogonal to the length 115 of the inductor 104. In an embodiment, a portion 133 of the nonmagnetic material 110 may extend beyond the outer sidewall 143 of the first portion of the conductive pad 108a and beyond the outer sidewall 143 of the second portion of the conductive pad 108b. In an embodiment, a portion 133 of the nonmagnetic material 110 extends into a portion of the magnetic material 106. The coupled CMIL inductor design of the embodiments herein provides a smaller PTH pitch of 150 micrometers or less, which results in stronger magnetic coupling.
[0049] Figures 2A-2H This illustrates an IC package structure that includes a coupled CMIL inductor (such as, for example...). Figures 1A-1C Examples of IC packaging structures. Figure 2A A top view of a portion of core 102 according to some embodiments is depicted. As shown, core 102 may comprise any suitable material or combination of materials and provide rigid mechanical support for the fabrication of the encapsulation substrate. Encapsulation core 102 is formed by lamination of a dielectric layer and a metallization structure as described above. In some embodiments, core 102 comprises materials such as, but not limited to, glass fiber reinforced epoxy, glass, or polymer-ceramic composites.
[0050] exist Figure 2B The image depicts a top view of a core opening 130, which may be formed in a core 102. The core opening 130 can be formed by, for example, wiring or drilling processes. In an embodiment, the core opening 130 may include a through-hole. Figure 2CIn this process, a magnetic material 106 can be formed within the core opening 130 using process 160. The magnetic material 106 can include any suitable magnetic material 106 used to form one or more CMIL-coupled inductors in the core 102. In some embodiments, the magnetic material 106 includes a magnetic material having a relative permeability between 5 and 50. In an embodiment, the magnetic material 106 can fill the core opening / core via 130 and can subsequently be planarized using, for example, a grinding process. In an embodiment, the top surface of the magnetic material 106 can be coplanar with the top surface of the core 102.
[0051] In one embodiment, process 160 may include inserting / forming a magnetic slurry into the core opening 102. In some embodiments, the magnetic material may be formed within the core opening by dispensing a liquid or slurry comprising magnetic particles suspended in a polymer matrix. In various embodiments, the polymer matrix comprises a curable epoxy resin. Other filling techniques may include filling the core opening with uncured core material, including inkjet printing. In some embodiments, a photopatternable matrix material comprising magnetic particles is deposited by spin coating or spraying and then patterned using photolithography. The photopatternable matrix may fill the core opening 102 and be patterned and cured.
[0052] Figure 2D A top view of process 161 is depicted, in which two through holes 109a and 109b can be formed through magnetic material 106. In an embodiment, the through holes 109a and 109b may be circular in shape. In an embodiment, the through holes 109a and 109b can be formed by drilling through the magnetic material 106. In an embodiment, the through holes 109a and 109b may include magnetic openings 109a and 109b.
[0053] Figure 2E Process 162 is described, in which a conductive material 108 is formed within vias 109a and 109b to form plated vias 109a and 109b. The conductive material 108 may include any suitable conductive material (e.g., copper or copper alloy, nickel, gold, silver, tungsten, or molybdenum) and may be formed using a plating process. In an embodiment, the conductive material 108 may include a thickness of approximately 15 micrometers to approximately 30 micrometers. The conductive pad 108 is a continuous layer within the PTHs 109a and 109b. In an embodiment, the wall-to-wall spacing 127 between the PTHs 109a and 109b is 100 micrometers or less.
[0054] Figure 2FA top view of process 163 is depicted, wherein a groove 132 is formed between PTHs 109a and 109b using, for example, a wiring process. The formation of the groove 132 gives PTHs 109a and 109b a semi-circular shape, wherein openings 153a and 153b are formed in the conductive pad 108. In an embodiment, openings 153a and 153b face each other. Figure 2G A top view of process 164 is depicted, wherein a non-magnetic material 110 may be formed between PTHs 109a and 109b and on the inner sidewalls of conductive pads 108a and 108b. In embodiments, the non-magnetic material 110 may comprise a non-magnetic paste or any suitable dielectric material.
[0055] exist Figure 2H The text shows how to cross... Figure 2G A cross-sectional view taken by tangent BB of inductor 104. Inductor 104 includes magnetic material 106 on core 102. First and second portions 108a, 108b of conductive pad 108 are on magnetic material 106, wherein non-magnetic material 110 is within plated through-holes in conductive pad 108. Non-magnetic material 110 is between PTH 109a, 109b and on the inner sidewalls of conductive pads 108a, 108b.
[0056] Figures 3A-3G Describes the manufacture of, for example Figure 1A The encapsulation structure described in the text is a method for encapsulation structures. Figures 3A-3B A top view depicting a core opening 130 formed in a portion of core 102 is shown. Core 102 may include any suitable substrate used to attach a die and construct a package structure thereon. In embodiments, core 102 may provide mechanical support and provide electrical communication within the package structure and between devices coupled to such a package structure.
[0057] Figures 3C-3D A top view of process 160 is depicted, wherein magnetic material 106 is formed within core opening 130, and then magnetic opening 109 / through-hole opening is formed within magnetic material 106. Conductive pad 108 is formed on the sidewall of magnetic material 106. Figure 3E The through-hole opening 109 is lined with a conductive material 108 and may include a conductive pad 109. The conductive pad 108 is a continuous layer within the PTH 109. Figure 3FIn this process, wiring process 163 can be performed, wherein a groove 132 is formed in the central portion of PTH 109 using, for example, a wiring process that removes a portion of the conductive material 108, primarily in the central portion of the conductive layer. In an embodiment, a portion of the magnetic material 106 above the groove 132 can be removed. The formation of the groove 132 creates two semi-circular or horseshoe shapes in PTH 109, with openings 153a, 153b formed in the two conductive pad portions 108a, 108b. A distance 119 lies between the openings 153a, 153b. In an embodiment, the openings 153a, 153b face each other. The groove 132 creates a coaxial structure for the inductor 104. In an embodiment, the groove 132 extends beyond a portion of the outer sidewall of the conductive pad 108. A portion of the magnetic material 106 is removed by process 163.
[0058] Then, as Figure 3G As depicted, using process 164, a non-magnetic material 110 is formed on the inner sidewalls of conductive pad portions 108a, 108b and within the groove 132. In an embodiment, the width 121 of the magnetic material 106 includes a range of 100 micrometers to 160 micrometers, and the distance 111 between the outer sidewalls 143 of the second conductive portion 108b (and similarly for the first conductive portion 108a) includes a range of approximately 100 micrometers to approximately 160 micrometers. A portion 133 of the non-magnetic material 110 is formed above the groove 132 and adjacent to the outer sidewalls 143 of the conductive pad portions 108a, 108b. In another embodiment, the groove 132 is filled with the non-magnetic material 110, while at least a portion of the inner sidewalls 141 of the conductive materials 108a, 108b is free of the non-magnetic material 110, such as... Figure 3H As depicted in the text.
[0059] Figures 4A-4D A cross-sectional view depicting a method for manufacturing a package structure of a coupled CMIL inductor, the package structure being, for example, the package structure depicted in any of the previous figures. Figure 4A A portion of package core 102 is depicted. Package core 102 may include any suitable substrate used to attach a die and construct an optical package structure. In embodiments, package substrate 101 may provide mechanical support and electrical communication within the package structure and between devices coupled to such package structure. In embodiments, package core 102 may include an inserter or a plate.
[0060] exist Figure 4B In this embodiment, opening 130 may be formed within core 102. In an embodiment, opening 130 may include a through-hole opening 130. In an embodiment, opening 130 may be formed using, for example, drilling and / or laser drilling processes. Figure 4CIn this process, magnetic material 106 can be formed (using process 160) within a core opening 130 on the core sidewall. In an embodiment, magnetic material 106 can be formed by plugging the core opening with a magnetic paste. The magnetic paste can include a material having a relative permeability between 5 and 50. In an embodiment, the magnetic paste can include magnetic powder, epoxy resin, reactive diluent, and curing agent.
[0061] exist Figure 4D In this embodiment, process 161 may include forming an opening 109 through the magnetic material 106. The opening 109 may be formed using, for example, a drilling or etching process. The opening 109 extends through the length of the core 102. In an embodiment, the spacing 113 between the openings 109 may be less than about 500 micrometers, but may be optimized for a specific application. In an embodiment, any number of openings 109 may be formed in the magnetic material 106 using process 161.
[0062] exist Figure 4E In this process, process 162 can be used to form conductive pads 108 on the sidewalls 107 of the magnetic material 106 and on the surface of the core 102 to form one or more PTHs 109 in the core 102. In some embodiments, a conductive seed layer (not shown) is formed prior to the formation of the conductive layer 108. The conductive seed layer may comprise a suitable metal film, including any of copper, nickel, gold, silver, tungsten, ruthenium, or molybdenum, and having a thickness ranging from 100 nanometers (nm) to several micrometers. The conductive layer may be deposited on top of the seed layer. In some embodiments, the core 102 may be immersed in a plating bath within a plating tank. The conductive layer 108 may comprise a metal suitable for electrodeposition, such as, but not limited to, copper, silver, gold, nickel, aluminum, or tungsten. Depending on the specific application, techniques other than electroplating may be used to form the conductive layer 108.
[0063] exist Figure 4F In this embodiment, a non-magnetic material can be formed within the opening 109 on the sidewall of the conductive pad 108 using, for example, process 164. In this embodiment, the non-magnetic material may include a dielectric material. In this embodiment, the non-magnetic material 110 may fill the opening 109 and may include any suitable dielectric material. Figure 4G In this embodiment, first and second conductive pads 116 and 116' can be formed on conductive pad portions 108a and 108b, respectively, to form a coupled coaxial inductor structure 104. In this embodiment, the first pad 116a can be formed on a first portion of the conductive pad 108a, and the second pad 116b can be formed on a second portion of the conductive pad 108b, wherein there is a distance 114 between the first and second pads 116a and 116b.
[0064] Figure 5An IC package structure 500 is depicted, such as a package structure including an inductor structure according to embodiments of this document. Package structure 500 may be similar to, for example... Figure 1A The package structure depicted includes one or more coupled CMIL inductor structures 104 within a die 102, and wherein the inductor structures 104 are coupled to a die 131 via conductive traces 124 within a package substrate 101. In some embodiments, the die 131 may include a chiplet structure, which may include components of a system-on-a-chip (SoC) structure. In embodiments, the package substrate 101 may include an inserter.
[0065] Any number of dies / devices 131 can be coupled to the package substrate 101. In an embodiment, the package substrate 101 can be coupled to a board 142, such as a printed circuit board. In an embodiment, the board 142 can be coupled to the package substrate 101 via solder structure 149. In an embodiment, a power supply device 40 can be coupled to the die 131 via the IC package substrate 101, and the power supply device 140 can include any suitable power supply device as known in the art. The inductor 104 can include a coupled CMIL inductor, wherein a first pad 116 is on a first portion 108a of a conductive pad 108, and a second pad 116' is on a second portion 108b of the conductive pad 108 separated by a distance 114, for example, as... Figure 4G As depicted in the illustration, the solder interconnect structure 137 couples the die 131 to the substrate 101. In an embodiment, an underfill material 136 may surround the solder structure 137.
[0066] Now we will discuss the operations of assembling and / or manufacturing the structure in question.
[0067] Figure 6A This is a flowchart of process 600 for manufacturing a package structure (e.g., an in-chip coupled CMIL inductor) according to some embodiments. For example, process 600 can be used to manufacture... Figures 2A-2H Any packaging structure in the microelectronic IC packaging structure.
[0068] As illustrated in box 602, core openings can be formed in the core material. The core material can provide rigid mechanical support for the fabrication of a packaging substrate (e.g., packaging substrate 101), which is formed by laminating a dielectric layer and a metallization structure. In some embodiments, the core comprises a material such as, but not limited to, glass fiber reinforced epoxy, glass, or a polymer-ceramic composite. In embodiments, the core openings can be formed by a drilling process followed by a cleaning process. In embodiments, the core openings can include through-hole openings. In embodiments, the core openings are formed along the entire length of the core.
[0069] As illustrated in box 604, magnetic material can be formed in the core opening. In an embodiment, the magnetic material can be formed to completely fill the core opening. In an embodiment, the magnetic material can include any suitable magnetic material as known in the art, such as any suitable magnetic paste material. For example, the magnetic material can be formed by plugging the core opening with a magnetic paste. In an embodiment, the magnetic paste can include iron powder, such as iron oxide powder, such as Mg-Zn-based ferrite, Fe-Mn-based ferrite, Mn-Zn-based ferrite, Mn-Mg-based ferrite, Cu-Zn-based ferrite, Mg-Mn-Sr-based ferrite, Ni-Zn-based ferrite, Ba-Zn-based ferrite, Ba-Mg-based ferrite, Ba-Ni-based ferrite, Ba-Co-based ferrite, Ba-Ni-Co-based ferrite, Y-based ferrite, iron oxide powder (III), or trioxide. Iron, iron alloy-based metal powders (e.g., Fe-Si-based alloy powders, Fe-Si-Al-based alloy powders, Fe-Cr-based alloy powders, Fe-Cr-Si-based alloy powders, Fe-Ni-Cr-based alloy powders, Fe-Cr-Al-based alloy powders, Fe-Ni-based alloy powders, Fe-Ni-Mo-based alloy powders, Fe-Ni-Mo-Cu-based alloy powders, Fe-Co-based alloy powders, or Fe-Ni-Co-based alloy powders) or amorphous alloys, such as Co-group amorphous alloys.
[0070] Magnetic slurries may further include epoxy resins, such as bisphenol A epoxy resin; bisphenol F epoxy resin; bisphenol S epoxy resin; bisphenol AF epoxy resin; dicyclopentadiene epoxy resin; triphenol epoxy resin; phenolic epoxy resin; tert-butylcatechol epoxy resin; epoxy resins with fused ring structures, such as naphthol phenolic epoxy resin, naphthalene epoxy resin, naphthol epoxy resin, or anthracene epoxy resin; glycidylamine epoxy resin; glycidyl ester epoxy resin; cresol phenolic epoxy resin; biphenyl epoxy resin; linear aliphatic epoxy resin; epoxy resins with butadiene structures; alicyclic epoxy resins; heterocyclic epoxy resins; spirocyclic epoxy resins; cyclohexanediol epoxy resin; trimethylolpropene epoxy resin; or tetraphenylethane epoxy resin. Magnetic slurries may further include dispersants, such as phosphate-based dispersants, curing agents, or curing accelerators.
[0071] At frame 606, a first through-hole (TH) opening can be formed in the magnetic material, and a second TH opening adjacent to the first TH opening can be formed in the magnetic material, wherein the first TH opening and the second TH opening are separated by a certain distance. In an embodiment, the first and second TH openings may include a second through-hole penetrating the core and the magnetic material within the core. The first and second TH openings extend through the entire core. In an embodiment, the first and second TH openings can be formed using a drilling process. In an embodiment, the first and second TH openings may include a circular shape.
[0072] At frame 608, a first conductive pad can be formed within a first TH opening, and a second conductive pad can be formed within a second TH opening. In an embodiment, the first and second conductive pads are formed on the sidewalls of the magnetic material within the first and second TH openings, respectively. In an embodiment, the conductive pad material can include any suitable conductive material, such as copper and copper alloys. In an embodiment, the conductive material of the first and second conductive pads can be formed using an electroplating process and can include a thickness between approximately 15 micrometers and approximately 30 micrometers, wherein the openings remain within the first and second TH openings. In an embodiment, the distance between the outer sidewalls of the first and second conductive pads and the outer sidewalls of the magnetic material includes between approximately 140 micrometers and approximately 160 micrometers.
[0073] At frame 610, a first opening may be formed in a first conductive pad and a second opening may be formed in a second conductive pad, wherein the first and second openings face each other. In an embodiment, the first and second openings in the conductive pads are formed by forming a groove between the first and second conductive pads. In an embodiment, as viewed from a top view, the groove may be formed across the X-axis direction using a wiring process. In an embodiment, the wiring process may include an engraving process, and in an embodiment, it may be performed using micro-broaching. In an embodiment, the groove between the first and second openings in the first and second conductive pads may include a width of approximately 80 micrometers to approximately 120 micrometers between a first portion and a second portion of the conductive pad. First and second conductive pads may be formed on the top surfaces of the first and second portions of the conductive pads, respectively.
[0074] For example, a buildup layer can then be formed on the dies, and one or more dies can be attached to the buildup layer to form, for example... Figure 1A The package structure shown is illustrated. The die may include, for example, a central processing unit (CPU) or a field-programmable gate array (FPGA) die, or may include any suitable logic die for a particular application. The die can be attached using any suitable die-attachment process known in the art.
[0075] By removing a portion of the conductive pad between the two conductive pads, two semi-circular or semi-elliptical portions of the conductive pad are formed and separated by a distance equal to the groove width. Forming a groove between the two semi-circular portions of the conductive pad eliminates the need for a third through-hole drilling and plugging step. Furthermore, it reduces the risk of misalignment and manufacturing costs. The embodiments described herein result in a tighter wall-to-wall distance (less than 100 μm), which produces stronger magnetic coupling for the coupled CMIL inductor described according to embodiments of this disclosure.
[0076] Figure 6B This is a flowchart of process 612 for manufacturing a package structure (e.g., an in-chip coupled CMIL inductor) according to some embodiments. For example, process 612 can be used to manufacture... Figures 3A-3H Any packaging structure in the microelectronic IC packaging structure.
[0077] As illustrated in box 614, a core opening is formed in the core material. The core material may include a metallized structure separated by layers of laminated dielectric. In some embodiments, the core includes a material such as, but not limited to, glass fiber reinforced epoxy, glass, or a polymer-ceramic composite. In embodiments, the core opening may be formed by a drilling process followed by a cleaning process. In embodiments, the core opening is formed along the entire length of the core. In embodiments, the core opening may include a through-hole.
[0078] As illustrated in box 616, in an embodiment, a magnetic material may be formed in the core opening, wherein the magnetic material may include any suitable components as previously described, and may include a magnetic paste. In an embodiment, the thickness of the magnetic material, as measured from the core to the conductive pad, can range from approximately 10 micrometers to approximately 200 micrometers.
[0079] As illustrated in box 618, a first opening can be formed in the magnetic material. In an embodiment, the TH opening may be elliptical, as viewed from a plan view.
[0080] As illustrated in box 620, a conductive pad can be formed within the TH opening. The conductive pad material can include any suitable conductive material, such as copper and / or copper alloys. In embodiments, the conductive material can be formed using an electroplating process and can include a thickness between approximately 15 micrometers and approximately 30 micrometers. In embodiments, the TH opening with the conductive pad can include a PTH.
[0081] As illustrated in box 622, a portion of the conductive pad can be removed, wherein a first opening is formed in a first portion of the conductive pad, and a second opening is formed in a second portion of the conductive pad, wherein the first and second openings face each other. This portion of the conductive pad can be removed at the center of the conductive pad, wherein a groove is formed between the first and second portions of the conductive pad. In an embodiment, as viewed from a top view, the groove can be formed using a wiring process across the Y-axis direction. In an embodiment, the wiring process can include an engraving process, and in an embodiment, it can be performed using micro-broaching drilling.
[0082] For example, a buildup layer can then be formed on the dies, and one or more dies can be attached to the buildup layer to form, for example... Figure 1AThe package structure shown is illustrated. The die may include, for example, a central processing unit (CPU) or a field-programmable gate array (FPGA) die, or may include any suitable logic die for a particular application. The die can be attached using any suitable die-attachment process known in the art.
[0083] By removing a portion of the conductive pad in the middle of the PTH, two semi-circular portions of the conductive pad are formed and separated by a distance equal to the groove width. Forming a groove between the two semi-circular portions of the conductive pad eliminates the need for a third through-hole drilling and plugging step. Furthermore, it reduces the risk of misalignment and manufacturing costs.
[0084] Figure 7 An electronic or computing device 700 according to one or more implementations of this specification is illustrated. The computing device 700 may include a housing 701 having a board 702 disposed therein. The computing device 700 may include a plurality of integrated circuit components, including but not limited to a processor 704, at least one communication chip 706A, 706B, volatile memory 708 (e.g., DRAM), non-volatile memory 710 (e.g., ROM), flash memory 712, a graphics processor or CPU 714, a digital signal processor (not shown), a cryptographic processor (not shown), a chipset 716, an antenna, a display (touchscreen display), a touchscreen controller, a battery, an audio codec (not shown), a video codec (not shown), a power amplifier (AMP), a global positioning system (GPS) device, a compass, an accelerometer (not shown), a gyroscope (not shown), a speaker, a camera device, and a mass storage device (not shown) (e.g., a hard disk drive, an optical disc (CD), a digital multifunction disc (DVD), etc.). Any integrated circuit component in the integrated circuit components may be physically and electrically coupled to the board 702. In some implementations, at least one integrated circuit component in the integrated circuit components may be part of the processor 704.
[0085] Communication chips enable wireless communication for transmitting data to and from computing devices. The term "wireless" and its derivatives can be used to describe circuits, devices, systems, methods, technologies, communication channels, etc., that can transmit data via modulated electromagnetic radiation through a non-solid medium. This term does not imply that associated devices do not contain any wiring, although in some embodiments they may not contain any wiring. Communication chips can implement any of a variety of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, LTE, Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, and their derivatives, as well as any other wireless protocols designated as 3G, 4G, 5G, and higher. Computing devices may include multiple communication chips. For example, the first communication chip can be dedicated to short-range wireless communication such as Wi-Fi and Bluetooth, while the second communication chip can be dedicated to long-range wireless communication such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, Ev-DO, etc.
[0086] The term "processor" can refer to any device or part of a device that processes electronic data from registers and / or memory to convert that electronic data into other electronic data that can be stored in registers and / or memory. At least one integrated circuit component may include a package structure with coupled CMIL, as described in any of the embodiments herein.
[0087] In various implementations, the computing device can be a laptop, netbook, notebook, ultrabook, smartphone, tablet, personal digital assistant (PDA), ultra-mobile PC, mobile phone, desktop computer, server, printer, scanner, monitor, set-top box, entertainment control unit, digital camera, portable music player, or digital video recorder. In other implementations, the computing device can be any other electronic device that processes data.
[0088] While certain features described herein have been referenced to various implementations, this description is not intended to be construed as limiting. Therefore, it will be apparent to those skilled in the art to which this disclosure pertains that various modifications and other implementations of the implementations described herein are considered to fall within the spirit and scope of this disclosure. It is understood that the subject matter of this specification is not necessarily limited to Figure 1- Figure 7 The specific application illustrated is not provided. As those skilled in the art will understand, this subject matter can be applied to other integrated circuit device and assembly applications, as well as any suitable electronic applications.
[0089] The following examples relate to other embodiments, and the details in the examples may be used anywhere in one or more embodiments, wherein the first example is a device comprising a package substrate having two or more conductive layers separated by a dielectric material, a core on the dielectric material, and an inductor having a length extending vertically through the core, the inductor comprising: a magnetic material on a sidewall of the core; a first portion of a conductive pad on an inner sidewall of the magnetic material; a second portion of a conductive pad on an inner sidewall of the magnetic material opposite to the first portion of the conductive pad, wherein the first portion and the second portion of the conductive pad are separated by a non-magnetic material; a first conductive pad on a top surface of the core coupled to the first portion of the conductive pad; and a second conductive pad on a top surface of the core coupled to the second portion of the conductive pad, wherein the distance between the first conductive pad and the second conductive pad is [missing information].
[0090] In the second example, the first example also includes a distance between 40 micrometers and 80 micrometers, and an inductor comprising a coupled coaxial magnetic inductor.
[0091] In the third example, any of Examples 1-2 further includes the distance comprising a gap, and the dielectric material being within the gap.
[0092] In the fourth example, any one of Examples 1-3 further includes a non-magnetic material located on the inner sidewall of the first portion of the conductive pad and on the inner sidewall of the second portion of the conductive pad, wherein the non-magnetic material comprises at least one of a composite epoxy material, silica, or an inorganic filler.
[0093] In the fifth example, any of Examples 1-4 further includes the distance comprising a gap, and the dielectric material being within the gap.
[0094] In the sixth example, any of Examples 1-5 further includes a first portion of the conductive pad including a first portion end sidewall, and a second portion of the conductive pad including a second portion end sidewall, wherein a portion of the nonmagnetic material is on the first portion end sidewall and on the second portion end sidewall.
[0095] In the seventh example, any of Examples 1-6 further includes a portion of the first portion of the conductive pad in a plane orthogonal to the length of the inductor including a first opening, and a portion of the second portion of the conductive pad in that plane including a second opening, wherein the first opening and the second opening face each other in that plane.
[0096] In the eighth example, Example 7 also includes a distance between the first opening and the second opening that is between 50 micrometers and 100 micrometers.
[0097] In the ninth example, any of Examples 1-8 further includes a first portion of the conductive pad comprising an outer wall, wherein a portion of the non-magnetic material between the first portion of the conductive pad and the second portion of the conductive pad extends beyond the outer wall.
[0098] In the tenth example, any of Examples 1-9 further includes a non-magnetic material between the first portion and the second portion of the conductive pad that does not extend beyond the outer wall of the first portion of the conductive pad.
[0099] In the eleventh example, any one of Examples 1-10 further includes a width of magnetic material between 100 micrometers and 160 micrometers, and a distance between the outer walls of the second portion of the conductive pad between 100 micrometers and 160 micrometers.
[0100] The twelfth example is a device including a packaging substrate comprising a core, an inductor having a length extending vertically through the core, the inductor including a magnetic material on a sidewall of the core; a first conductive pad on the sidewall of the magnetic material, wherein a portion of the first conductive pad in a plane orthogonal to the length of the inductor includes a first opening; and a second conductive pad on the sidewall of the magnetic material, wherein a portion of the second conductive pad in the plane includes a second opening, wherein the first opening and the second opening face each other and are separated by a distance.
[0101] In the thirteenth example, wherein example twelve further includes a non-magnetic material between the first opening and the second opening, wherein the first conductive pad includes an outer sidewall, and the second conductive pad includes an outer sidewall, wherein a portion of the non-magnetic material extends beyond the outer sidewalls of the first and second conductive pads.
[0102] In the fourteenth example, any one of Examples 12-13 further includes a portion of the non-magnetic material that does not extend beyond the outer sidewall of the first conductive pad, and wherein the first and second conductive pads are comprised of a semicircle or semi-ellipse in a plane.
[0103] In the fifteenth example, any one of Examples 12-14 further includes a magnetic material comprising at least one of iron, nickel, cobalt, manganese, samarium, ytterbium, gadolinium, terbium, or dysprosium.
[0104] In the sixteenth example, any one of Examples 12-15 further includes a first conductive pad and a second conductive pad comprising copper or a copper alloy, and wherein the die is coupled to an inductor and a power supply device is coupled to the die.
[0105] In the seventeenth example, any one of Examples 12-16 further includes a distance of about 150 micrometers or less between the outer wall of the magnetic material and the outer wall of the first conductive pad, and a wall-to-wall spacing of 100 micrometers or less between the inner walls of the first and second conductive pads.
[0106] The eighteenth example is a method comprising forming a core opening in a core material, forming a magnetic material in the core opening, forming a first through-hole (TH) in the magnetic material, and forming a second TH adjacent to the first TH in the magnetic material, wherein the first TH and the second TH are separated by a certain distance, forming a first conductive pad in the first TH, and forming a second conductive pad in the second TH, and forming a first opening in the first conductive pad and a second opening in the second conductive pad, wherein the first opening and the second opening face each other.
[0107] In the nineteenth example, any of the eighteenth examples further includes forming a non-magnetic material on the inner surface of the first conductive pad and the inner surface of the second conductive pad.
[0108] In the twentieth example, any one of Examples 18-19 further includes wherein forming a first opening in the first conductive pad and forming a second opening in the second conductive pad comprises removing a portion of the first conductive pad and removing a portion of the second conductive pad by using a wiring process.
[0109] It will be appreciated that the principles of this disclosure are not limited to the embodiments described herein, but can be implemented with modifications and variations without departing from the scope of the appended claims. The above embodiments may include employing only a subset of such features, employing different orders of such features, employing different combinations of such features, and / or employing additional features beyond those expressly listed. Therefore, the scope of the embodiments should be determined by reference to the appended claims and the full scope of their equivalents.
Claims
1. An apparatus comprising: a package substrate comprising two or more electrically conductive layers separated by a dielectric material; a core on the dielectric material; and an inductor having a length extending vertically through the core, the inductor comprising: a magnetic material on a sidewall of the core; a first portion of an electrically conductive pad on an inner sidewall of the magnetic material; a second portion of the electrically conductive pad on the inner sidewall of the magnetic material, opposite the first portion of the electrically conductive pad, wherein the first portion of the electrically conductive pad and the second portion of the electrically conductive pad are separated by a non-magnetic material; a first electrically conductive pad on a top surface of the core coupled to the first portion of the electrically conductive pad; and a second electrically conductive pad on the top surface of the core coupled to the second portion of the electrically conductive pad, wherein a distance is between the first electrically conductive pad and the second electrically conductive pad.
2. The apparatus of claim 1, wherein, the distance is between 40 microns and 80 microns, and wherein the inductor comprises a coupled coaxial magnetic inductor.
3. The apparatus of claim 1, wherein, the distance comprises a gap, and wherein the dielectric material is within the gap.
4. The apparatus of claim 1, wherein, the non-magnetic material is on an inner sidewall of the first portion of the electrically conductive pad and on an inner sidewall of the second portion of the electrically conductive pad, and wherein the non-magnetic material comprises at least one of a composite epoxy material, silicon dioxide, or an inorganic filler.
5. The apparatus of claim 1, wherein, the first portion of the electrically conductive pad comprises a first portion end sidewall and the second portion of the electrically conductive pad comprises a second portion end sidewall, wherein a portion of the non-magnetic material is on the first portion end sidewall and on the second portion end sidewall.
6. The apparatus of claim 1, wherein, the non-magnetic material comprises a different material than the dielectric material, and wherein the non-magnetic material comprises a width between 80 microns and 150 microns.
7. The apparatus of claim 1, wherein, a portion of the first portion of the electrically conductive pad in a plane orthogonal to a length of the inductor comprises a first opening, and a portion of the second portion of the electrically conductive pad in the plane comprises a second opening, wherein the first opening and the second opening face each other in the plane.
8. The apparatus of claim 7, wherein, a distance between the first opening and the second opening is between 50 microns and 100 microns.
9. The apparatus of claim 1, wherein, the first portion of the electrically conductive pad comprises an outer sidewall, wherein a portion of the non-magnetic material between the first portion of the electrically conductive pad and the second portion of the electrically conductive pad extends beyond the outer sidewall.
10. The apparatus of claim 9, wherein, the non-magnetic material between the first portion of the electrically conductive pad and the second portion of the electrically conductive pad does not extend beyond the outer sidewall of the first portion of the electrically conductive pad.
11. The apparatus of claim 1, wherein, a width of the magnetic material is between 100 microns and 160 microns, and a distance between outer sidewalls of the second portion of the electrically conductive pad is between 100 microns and 160 microns.
12. An apparatus comprising: a package substrate comprising a core; an inductor having a length extending vertically through the core, the inductor comprising: a magnetic material on a sidewall of the core; a first electrically conductive liner on a sidewall of the magnetic material, wherein a portion of the first electrically conductive liner in a plane orthogonal to a length of the inductor comprises a first opening; and a second electrically conductive liner on the sidewall of the magnetic material, wherein a portion of the second electrically conductive liner in the plane comprises a second opening, wherein the first opening and the second opening face each other and are separated by a distance.
13. The apparatus of claim 12, wherein, a non-magnetic material between the first opening and the second opening, wherein the first electrically conductive liner comprises an outer sidewall and the second electrically conductive liner comprises an outer sidewall, wherein a portion of the non-magnetic material extends beyond the outer sidewalls of the first electrically conductive liner and the second electrically conductive liner.
14. The apparatus of claim 13, wherein, a portion of the non-magnetic material does not extend beyond the outer sidewall of the first electrically conductive liner, and wherein the first electrically conductive liner and the second electrically conductive liner comprise a semi-circle or a semi-ellipse in the plane.
15. The apparatus of claim 12, wherein, the magnetic material comprises at least one of iron, iron, nickel, cobalt, manganese, samarium, ytterbium, gadolinium, terbium, or dysprosium.
16. The apparatus of claim 12, wherein, the first electrically conductive liner and the second electrically conductive liner comprise copper or a copper alloy, and wherein a die is coupled to the inductor and a power supply device is coupled to the die.
17. The apparatus of claim 12, wherein, a distance between an outer sidewall of the magnetic material and an outer sidewall of the first electrically conductive liner is about 150 microns or less, and wherein a wall-to-wall spacing between inner sidewalls of the first electrically conductive liner and the second electrically conductive liner is 100 microns or less.
18. A method comprising: forming a core opening in a core material; forming a magnetic material in the core opening; forming a first through hole (TH) in the magnetic material and a second TH adjacent to the first TH in the magnetic material, wherein the first TH is separated from the second TH by a distance; forming a first electrically conductive liner within the first TH and a second electrically conductive liner within the second TH; and forming a first opening in the first electrically conductive liner and a second opening in the second electrically conductive liner, wherein the first opening and the second opening face each other.
19. The method of claim 18, further comprising forming a non-magnetic material on an inner surface of the first electrically conductive liner and on an inner surface of the second electrically conductive liner.
20. The method of claim 18, wherein, forming the first opening in the first electrically conductive liner and the second opening in the second electrically conductive liner comprises removing a portion of the first electrically conductive liner and removing a portion of the second electrically conductive liner by using a wiring process.