Control instruction time sequence synchronization method and device of multi-node industrial control system

Abstract

The invention provides a control instruction time sequence synchronization method and device of a multi-node industrial control system. The control instruction time sequence synchronization method comprises the following steps: a control node calculates an initial time offset through a calibration frame, loops back a test frame to measure link transmission delay, and compensates a local clock of an execution node to realize initial alignment; periodically broadcasting a reference clock, calculating an accumulated drift amount in real time by an execution node, and adjusting a local clock frequency when the accumulated drift amount exceeds a threshold value; sending a control instruction based on a synchronization period starting moment, synchronizing a trigger signal to enable an execution node to sample data at the same time, and reading the data by a period ending boundary. According to the control instruction time sequence synchronization method, the initial synchronization precision is + / -10ns, the accumulated drift distance is controlled within + / -10ns, the total time sequence deviation is smaller than 100ns, system errors are effectively eliminated, the problem of crystal oscillator deviation is solved, the method can be compatible with an industrial bus, the hardware cost is reduced, and the multi-axis cooperative control precision and stability are greatly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to a kind of control instruction timing synchronization method and device of multi-node industrial control system, belong to industrial automation control technical field, especially suitable for the distributed control system based on industrial bus, can be widely applied in numerical control machine tool, multi-axis industrial robot, intelligent production line etc. The scene needing high-precision cooperative control. BACKGROUND

[0002] In the field of industrial automation, the control instruction timing synchronization precision requirement of multiple nodes cooperative control to instruction sending and data sampling is extremely high, for example, in the scene such as multi-axis mechanical arm movement, numerical control machine tool machining track planning control, multiple mechanical arms need to complete precision assembly task when, each joint driver (i.e. the execution node in the present scheme) needs to receive control instruction and feedback position data at the same time, if instruction and data timing synchronization are not accurate, then it will lead to end effector trajectory deviation, assembly error out of tolerance even equipment collision. So-called instruction, i.e. the control instruction or control command sent by control node to execution node, is the operation signal triggering execution node to execute specific action, instruction is shown as data packet containing operation type, target parameter, execution time etc. So-called data is the feedback fresh collected by sensor or internal state register after receiving instruction by execution node, and the data reflects the execution effect of control instruction or the current state of node, and data is shown as data packet containing physical quantity, state flag, time stamp.

[0003] In prior art, the synchronization method of multiple nodes cooperative control mainly includes two modes, FreeRun mode and SM synchronization mode, in FreeRun mode, each node runs local clock independently, without global synchronization mechanism, due to the difference of crystal oscillator precision of each execution node and environmental interference, node clock drift accumulation can reach millisecond level, leading to uncontrolled instruction execution delay. In SM synchronization mode, master station (control node) periodically sends synchronization signal to trigger slave station action, but only static synchronization can be realized, cannot compensate link transmission delay, for example, the signal arrival time difference of different execution nodes due to cable length difference reaches hundreds of nanoseconds, and there is clock drift in long-term operation, for example, there is clock drift when the environmental temperature of different execution nodes is quite different.

[0004] When the prior art solves the precise control of multi-node cooperation, the FreeRun mode and the SM synchronization mode cannot be directly combined to form a conventional solution to the problem, because the FreeRun mode and the SM synchronization mode cannot form a unified time reference. In the FreeRun mode, each execution node independently runs a local clock and does not need to be synchronized, so there is no hardware module designed for synchronization. In the SM synchronization mode, static synchronization is adopted. If the synchronization signal of the SM synchronization mode is directly sent to the execution node in the FreeRun mode, a unified time reference cannot be formed. How to form a unified time reference is also the main idea of solving the problem of the present solution. In addition, if the FreeRun mode and the SM synchronization mode are only combined in theory, the synchronization accuracy of the theory can only reach the microsecond level at most. The multi-node cooperative control in the present solution requires nanosecond-level synchronization accuracy. The prior art and the combination cannot achieve the nanosecond-level accuracy requirement of cooperative control, which is also the underlying reason for the redesign of the present solution.

[0005] Therefore, the prior art has problems such as accumulation of system cumulative error and inability to eliminate it, long-term synchronization accuracy drifting to the microsecond level, and time sequence closed-loop control causing the time axis of control instructions and feedback data to be out of sync, and urgently needs a new solution to achieve time sequence precise synchronization control of instructions and data of a multi-node network. SUMMARY

[0006] In view of the above problems of the prior art, the purpose of the present application is to provide a control instruction time sequence synchronization method and device for a multi-node industrial control system.

[0007] According to an embodiment of the present application, a first solution is provided: a control instruction time sequence synchronization method for a multi-node industrial control system, comprising the following steps: S1: The control node calculates an initial time offset by sending a calibration frame with a time stamp to each execution node, and measures the link transmission delay through a loopback test frame, and compensates the execution node based on the initial time offset and the link transmission delay to initially align the local clock of the execution node with the reference clock; S2: The control node periodically broadcasts the reference clock, and each execution node calculates the cumulative drift of the local clock and the reference clock in real time, and adjusts the frequency of the local clock to control the cumulative drift within a preset threshold when the cumulative drift exceeds the preset threshold; S3: The control node sends a control instruction at the starting moment of a synchronization period based on the system time, and makes each execution node sample data at the same system time point through a synchronization trigger signal, and reads data at the end boundary of the synchronization period to achieve time sequence matching of the control instruction and the data reading.

[0008] Further, the step of calculating the initial time offset is: initial time offset ΔT = T_exec_node - T_control_node, wherein T_exec_node is the local timestamp of the execution node receiving the calibration frame, and T_control_node is the reference clock timestamp carried by the calibration frame.

[0009] Further, the step of calculating the link transmission delay is: Delay = (T_receive - T_send) / 2, wherein T_send is the timestamp of the control node sending the test frame, and T_receive is the timestamp of the control node receiving the return frame.

[0010] Further, the step of compensating the execution node includes: first, aligning the time axis of the local clock and the reference clock through the initial time offset ΔT, and then compensating the physical delay on the transmission path through the link transmission delay Delay, to ensure the synchronization of the local clock of the execution node and the reference clock of the control node in the initial state.

[0011] Further, the step of calculating the cumulative drift of each execution node is: the execution node receives the reference clock frame periodically broadcast by the control node, the reference clock frame includes the system timestamp T_reference of the control node, records the receiving time T_local_receive through the hardware timestamp unit, calculates T_local_compensation = T_local_receive - ΔT - Delay, wherein ΔT is the initial time offset, Delay is the link transmission delay, T_local_compensation is the timestamp of the local clock after compensation of the initial time offset and compensation of the link transmission delay, and the real-time cumulative drift is Drift = T_reference - T_local_compensation.

[0012] Further, the preset threshold is 50ns, and when the cumulative drift |Drift| calculated by the execution node is greater than 50ns, the local clock frequency adjustment is triggered, and the drift after adjustment is controlled within ±10ns.

[0013] Further, the step of triggering the local clock frequency adjustment includes: the execution node adjusts the local clock frequency through the hardware frequency adjustment module.

[0014] Further, the sending time of the synchronization trigger signal is: T_Sync = T_period_start - Delay_max, wherein Delay_max is the maximum link delay between the control node and all execution nodes.

[0015] Further, the step of reading data at the end boundary of the synchronization period is: starting the reading process within a preset window before the end of the synchronization period, reading data through the reading process, and the preset window is 100ns.

[0016] According to an embodiment of the present application, the first scheme of the multi-node industrial control system control instruction timing synchronization method is provided, and the second scheme is provided as follows: A multi-node industrial control system control instruction timing synchronization device comprises: a clock initial alignment module, configured to control the node to calculate an initial time offset by sending a calibration frame with a timestamp to each execution node, measure a link transmission delay by a loopback test frame, and compensate the execution node based on the initial time offset and the link transmission delay to initially align the local clock of the execution node with the reference clock; a dynamic drift suppression module, configured to control the node to periodically broadcast the reference clock, and each execution node to calculate a cumulative drift amount of the local clock and the reference clock in real time, and adjust the local clock frequency to control the cumulative drift amount within a preset threshold when the cumulative drift amount exceeds the preset threshold; a timing coordination control module, configured to control the node to send a control instruction at a starting time of a synchronization period based on a system time, and make each execution node sample data at the same system time point through a synchronization trigger signal, and read the data at an ending boundary of the synchronization period to realize timing matching of the control instruction and the data reading.

[0017] A computer device comprises a memory and a processor, the memory stores a computer program, and the computer program is executed by the processor to make the processor execute the following steps: a clock initial alignment module, configured to control the node to calculate an initial time offset by sending a calibration frame with a timestamp to each execution node, measure a link transmission delay by a loopback test frame, and compensate the execution node based on the initial time offset and the link transmission delay to initially align the local clock of the execution node with the reference clock; a dynamic drift suppression module, configured to control the node to periodically broadcast the reference clock, and each execution node to calculate a cumulative drift amount of the local clock and the reference clock in real time, and adjust the local clock frequency to control the cumulative drift amount within a preset threshold when the cumulative drift amount exceeds the preset threshold; a timing coordination control module, configured to control the node to send a control instruction at a starting time of a synchronization period based on a system time, and make each execution node sample data at the same system time point through a synchronization trigger signal, and read the data at an ending boundary of the synchronization period to realize timing matching of the control instruction and the data reading.

[0018] A computer readable storage medium stores a computer program, and the computer program is executed by a processor to make the processor execute the following steps: The control node calculates an initial time offset by sending a calibration frame with a time stamp to each execution node, measures a link transmission delay by a loopback test frame, and compensates the execution nodes based on the initial time offset and the link transmission delay to initially align the local clock of the execution nodes with the reference clock; The control node periodically broadcasts the reference clock, each execution node calculates a cumulative drift between the local clock and the reference clock in real time, and adjusts the frequency of the local clock to control the cumulative drift within a preset threshold when the cumulative drift exceeds the preset threshold; The control node sends a control instruction based on a system time at the start of a synchronization period, makes each execution node sample data at the same system time point through a synchronization trigger signal, and reads the data at the end boundary of the synchronization period to achieve timing matching of the control instruction and data reading.

[0019] Compared with the prior art, the technical scheme provided by the present application has the following beneficial effects: The present timing synchronization method realizes nanosecond-level timing coordination of instructions and data of a multi-node network through a three-stage synchronization process, the local clock of the execution node is compensated twice through the clock initial alignment module, the initial synchronization accuracy reaches ±10ns, and the microsecond-level system error caused by the initial offset and the link delay in the prior art is eliminated; the control node periodically broadcasts the reference clock, the execution node calculates the cumulative drift in real time and controls the cumulative drift within ±10ns, and the crystal oscillator offset caused by environmental interference is solved; based on the start time of the synchronization period, the instruction is sent, the synchronization trigger signal makes the execution node sample data at the same time and reads the data within a window of 100ns at the end of the period, forming a timing closed loop from instruction sending to sampling to data reading, realizing strict matching of instructions and data, and controlling the total timing deviation within 100ns at least. In the scene of multi-axis robots, numerical control machine tools, etc., the trajectory error can be reduced, the machining tolerance can be reduced, and at the same time, the present scheme is also compatible with the current mainstream industrial bus, which reduces the hardware cost while significantly improves the cooperative control precision and stability. BRIEF DESCRIPTION OF DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor based on these drawings.

[0021] Among them: Figure 1 It is a flowchart of the control instruction timing synchronization method of the multi-node industrial control system in an embodiment; Figure 2A structural block diagram of a control instruction timing synchronization device of a multi-node industrial control system in an embodiment is shown in the figure; Figure 3 A structural block diagram of a computer device in an embodiment is shown in the figure. DETAILED DESCRIPTION

[0022] In order for those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0023] Embodiment one The scheme of the present embodiment is applied to the field of industrial automation, mainly involving multi-node collaborative control, such as multi-axis robot assembly, numerical control machine tool machining, etc. Multi-node collaborative control requires extremely high timing synchronization accuracy of instructions and data.

[0024] The prior art relies on FreeRun mode and SM synchronization mode. FreeRun mode has no global synchronization, and the cumulative drift can reach milliseconds after running for a period of time. SM synchronization mode is static synchronization, cannot compensate for link delay, and has long-term drift. The synchronization accuracy of the prior art can only reach microseconds, which cannot meet the demand of high-precision collaborative work of multiple nodes at nanosecond level.

[0025] Specifically, the FreeRun mode and the SM synchronization mode of the synchronization method of multi-node collaborative control. In the FreeRun mode, each node independently runs the local clock without a global synchronization mechanism. Due to the difference in crystal oscillator accuracy of each execution node and environmental interference, the node clock drift accumulates up to milliseconds, resulting in uncontrollable instruction execution delay. In the SM synchronization mode, the master station (control node) periodically sends a synchronization signal to trigger the action of the slave station, but only static synchronization can be achieved, and the link transmission delay cannot be compensated. For example, the difference in signal arrival time caused by the difference in cable length between different execution nodes can reach hundreds of nanoseconds, and there is clock drift in long-term operation, such as when the environmental temperature of different execution nodes differs greatly.

[0026] In the implementation of nanometer-level precision control, the combination solution of FreeRun mode and SM synchronization mode cannot be realized due to the inability to form a unified time reference. In the FreeRun mode, each execution node independently runs the local clock without synchronization, so there is no hardware module designed for synchronization. The SM synchronization mode uses static synchronization, so if the synchronization signal of the SM synchronization mode is directly sent to the execution node in the FreeRun mode, a unified time reference cannot be formed.

[0027] In particular, the nanosecond-level precision required for collaborative control in the existing FreeRun mode and SM synchronization mode is unattainable by current technology. If the two modes are combined, the collaborative precision will be further reduced. Therefore, a completely new solution needs to be designed to achieve precise timing synchronization control of instructions and data in multi-node networks.

[0028] To address the aforementioned technical problems, this embodiment provides a method for synchronizing the timing of control commands in a multi-node industrial control system, such as... Figure 1 As shown, the steps include: S1: Initial clock alignment. The control node calculates the initial time offset by sending a calibration frame with a timestamp to each execution node, and measures the link transmission delay by using a loopback test frame. Based on the initial time offset and the link transmission delay, the execution nodes are compensated so that the local clock of the execution node is initially aligned with the reference clock. S2: Dynamic drift suppression, the control node periodically broadcasts the reference clock, and each execution node calculates the cumulative drift between the local clock and the reference clock in real time. When the cumulative drift exceeds a preset threshold, the local clock frequency is adjusted to control the cumulative drift to within the preset threshold. S3: Timing Coordination Control. The control node sends control commands at the beginning of the synchronization cycle based on the system time. Through the synchronization trigger signal, each execution node samples data at the same system time point and reads data at the end boundary of the synchronization cycle to achieve timing matching between control commands and data reading.

[0029] Specifically, taking a multi-axis driver multi-node network as an example, the control node is the central adjustment node in the industrial bus network, equivalent to the master station in a master-slave architecture. In a multi-axis driver, it can be the central controller of the industrial robot, responsible for initiating clock calibration, broadcasting reference clocks, sending control commands and synchronization trigger signals, and actively coordinating the timing of the entire multi-node network system. Each execution node is equivalent to a slave station in a master-slave architecture, receiving commands from the control node and executing specific operations. It can adjust its local clock and data acquisition timing according to the synchronization signal from the control node. Execution nodes include FPGAs (Field-Programmable Gate Arrays), dedicated chips, etc., for local clock adjustment and data latching. For example, in this embodiment, each execution node includes an X-axis driver, a Y-axis driver, a Z-axis driver, and a C-axis driver.

[0030] S11 Clock Initial Alignment Steps: The control node sends a timestamped calibration frame to the X / Y / Z / C axis driver. The execution node records the local timestamp T_execution node of the received calibration frame. The timestamp of the reference clock carried in the control node's calibration frame is T_control node. The initial offset can be calculated as follows: ΔT = T_Execution Node - T_Control Node; For example, the X-axis driver receives the local timestamp of the calibration frame as 100000000ns, and the control node timestamp carried by the calibration frame is 999999800ns, then ΔT=200ns.

[0031] Wherein, ΔT can be positive or negative, and the absolute value is required when calculating the compensation amount.

[0032] S12 link transmission delay measurement step: the control node sends a loopback test frame, records the timestamp T_send of sending the test frame, and receives the timestamp T_receive of returning the frame of the execution node, and can calculate the one-way link delay: Delay=(T_receive-T_send) / 2.

[0033] For example, the control node sends a test frame timestamp 1000000000ns, and receives a return frame timestamp 1000000160ns, then Delay=(160ns) / 2=80ns.

[0034] S13 double compensation to achieve initial alignment: the execution node subtracts the initial time offset from the local clock through the hardware register, and then compensates the link delay, so that the local clock is synchronized with the reference clock of the control node, and the initial synchronization accuracy reaches ±10ns.

[0035] S21 real-time calculation of accumulated drift: the control node periodically broadcasts the reference clock every 10ms, and the broadcast reference clock carries the system timestamp T_reference. The execution node calculates the accumulated drift according to the timestamp T_local_compensated of the compensated local clock: T_local_compensated=T_local_receive-ΔT-Delay; Drift=T_reference-T_local_compensated.

[0036] S22 threshold triggering frequency adjustment: the preset drift threshold is 50ns, when the accumulated drift |Drift| of the execution node is greater than 50ns, the local clock frequency adjustment is triggered, for example, the execution node can adjust the local crystal oscillator frequency through the PLL (hardware phase-locked loop), the adjustment step length accuracy of the PLL is 0.1ppm, and the accumulated drift is controlled within ±10ns. For example, when Drift=60ns, the PLL increases the crystal oscillator frequency by 0.1ppm, and after 5 cycles, the drift decreases to 8ns, and the frequency adjustment is completed.

[0037] S31 calculation of the sending time of the synchronization trigger signal: the control node sends a control instruction at the starting time of the synchronization cycle, for example, T=0ns in a 10ms cycle, and the sending time of the synchronization trigger signal is calculated as: T_Sync=T_cycle_start-Delay_max; Wherein Delay_max is the maximum link delay between the control node and all execution nodes, for example, the Delay of the C-axis driver is 100 ns, using Delay_max can ensure that all axis drivers receive instructions at the same system time point.

[0038] Specifically, T_period start refers to the absolute start time of each synchronization period, which is the reference time point when the control node and the execution node act together. It is defined by reference clock, for example, the synchronization period is 10 ms, and the period start time is 0 ns, 10000 ns, 20000 ns, and so on. T=0 ns is an example of the start time of each specific synchronization period. In the first synchronization period, T_period start = 0 ns, in the second synchronization period, T_period start = 10000 ns, and so on.

[0039] T_Sync is the time when the control node sends the synchronization trigger signal, which can ensure that all execution nodes receive and execute instructions at the same T_period start, that is, by T_Sync to realize the advance sending of signals, to ensure that all execution nodes receive instructions at the same time at T_period start, to realize the nanosecond-level synchronization and cooperative action of the system.

[0040] S32 data sampling and reading window control: the execution node feeds back data at the T=0 ns synchronization sampling position of each synchronization period, and the control node also starts the data reading process before the end of the synchronization period, such as T=9900 ns, to ensure that the data reception is completed before the end of T=10000 ns period, forming the overall timing control process from instruction sending to boundary reading.

[0041] Through the three-level cooperative synchronization mechanism of S1, S2 and S3, the nanosecond-level timing matching of the 4-axis driver is realized, the initial synchronization accuracy reaches ±10 ns, the dynamic drift is controlled within ±10 ns / 8 hours, the timing deviation of instructions and data is less than 100 ns, and finally the nanosecond-level timing accurate synchronization control of instructions and data of the multi-node network is realized. At the same time, the scheme can be compatible with the existing EtherCAT industrial bus, and the hardware modification cost is very low.

[0042] Embodiment two Based on the scheme of embodiment one, this embodiment continues to provide a control instruction timing synchronization method for a multi-node industrial control system. This embodiment is directed to the exception handling of the embodiment.

[0043] For example, when machining a curved surface on a high-precision numerical control machine tool, the X / Y / Z axis and the rotary axis C-axis driver are required to receive control instructions and feedback position data with nanosecond-level synchronization accuracy. If the synchronization time is not effective, the movement will lag or lead, and the machining trajectory will have a wavy error.

[0044] Summary of abnormal conditions: 1. Reference clock interruption in special cases, such as bus failure, will cause the control node to suspend broadcasting the reference clock for a few points, and after a certain running time, the local clock drift of the node will be accumulated to cause the instruction execution deviation of each axis to reach the microsecond level.

[0045] 2. Link failure causes sampling time to be out of position. When the EtherCAT link between the driver and the control node is subjected to serious electromagnetic interference from the environment, data packet loss occurs, and the transmission delay of the synchronization signal fluctuates, causing the data sampling time to be out of position.

[0046] 3. Temperature drift. In a relatively complex processing environment, the ambient temperature may rise from room temperature 25℃ to 40℃ or even higher, causing the frequency offset of the crystal oscillator of different execution nodes to be large. Without triggering compensation, the 8-hour cumulative drift in the extreme case will exceed 500ns, exceeding the nanosecond-level synchronization requirement of precise cooperation.

[0047] To solve the above technical problems, the embodiment provides a control instruction timing synchronization method of a multi-node industrial control system, comprising the following steps: S41 Local maintenance of reference clock interruption: if the reference clock broadcast interruption exceeds 100ms, the execution node starts the local clock maintenance algorithm.

[0048] The execution node records the drift trend curve in the past 10 minutes in the EEPROM (non-volatile memory), for example, the deviation between the local clock and the reference clock can be collected every 10ms, and a linear regression model is established; If no reference clock is received for N consecutive synchronization periods, it is determined that the interruption has occurred, for example, N is 10, i.e. 100ms, a prediction algorithm based on the linear regression model is started, the clock deviation in the future 100ms is predicted based on the linear regression model and the historical drift rate, and the local clock is corrected once at the end of each synchronization period; After the interruption ends, the execution node synchronizes with the control node through a fast calibration frame, and the data amount of the fast calibration frame is much smaller than that of the regular calibration frame.

[0049] S42 Adaptive compensation for link failure: if it is detected that the link packet loss rate exceeds 1%, the control node shortens the reference clock broadcast period to improve the real-time compensation, and increases the data frame redundancy check bit.

[0050] For example, the electromagnetic interference in the workshop causes the link packet loss rate to be 1.8%, the control node still broadcasts the reference clock at a period of 1ms, when the packet is lost, the execution node does not receive the compensation instruction, and the cumulative drift amount reaches 300ns, which will cause the overcut phenomenon of surface machining.

[0051] Specifically, the control node counts the packet loss rate of the past 100 data frames through the AL state code of EtherCAT, and triggers compensation when the packet loss rate is greater than 1%.

[0052] For example, the reference clock broadcast period can be shortened from 1ms to 500us, and the CRC redundancy check bit in the data frame can be increased from 16 bits to 32 bits, improving the anti-interference ability.

[0053] After link recovery, for example, the packet loss rate is less than 0.5%, the broadcast period of the reference clock is gradually recovered through step-by-step period recovery to avoid EtherCAT bus congestion.

[0054] S43 Adaptive optimization of temperature drift: A temperature sensor is built into the execution node, and the sensor accuracy is required to be ±0.5℃. When the detected environmental temperature change exceeds 5℃, the drift compensation period is automatically shortened to limit the synchronization accuracy in high temperature environment.

[0055] For example, the driver at each execution node reads the temperature data collected by the NTC temperature sensor in real time, with a sampling frequency of 10Hz, and establishes a temperature / drift rate mapping table. The calibration parameters of 25℃→3ppm, 35℃→5ppm and 45℃→7ppm can be pre-stored.

[0056] When the temperature change exceeds 5℃, the compensation period is shortened from 1ms to 500us, and FPGA hardware is used to accelerate the drift calculation to ensure real-time performance.

[0057] When the temperature drops, such as from 45℃ to 42℃, the original compensation period is restored to avoid frequent switching.

[0058] This scheme uses historical data prediction, dynamic period adjustment, and overall temperature / drift design to maintain nanosecond-level synchronization accuracy in abnormal scenarios, is compatible with industrial buses, and significantly improves the reliability of high-end equipment manufacturing.

[0059] Embodiment three The embodiment provides a control instruction timing synchronization device of a multi-node industrial control system, as shown in Figure 2 The device comprises: A clock initial alignment module 100, configured to control the control node to calculate an initial time offset by sending a calibration frame with a timestamp to each execution node, and to measure the link transmission delay through a loopback test frame, and to compensate the execution node based on the initial time offset and the link transmission delay to initially align the local clock of the execution node with the reference clock. The dynamic drift suppression module 200 is used to control the node to periodically broadcast the reference clock. Each execution node calculates the cumulative drift between the local clock and the reference clock in real time. When the cumulative drift exceeds a preset threshold, the local clock frequency is adjusted to control the cumulative drift to within the preset threshold. The timing coordination control module 300 is used to control nodes to send control commands at the beginning of the synchronization cycle based on system time. Through the synchronization trigger signal, each execution node samples data at the same system time point and reads data at the end boundary of the synchronization cycle, so as to achieve timing matching between control commands and data reading.

[0060] Example 4 Figure 3 An internal structural diagram of a computer device in one embodiment is shown. This computer device can specifically be a terminal or a server. Figure 3 As shown, the computer device includes a processor, memory, and a network interface connected via a system bus. The memory includes a non-volatile storage medium and internal memory. The non-volatile storage medium stores an operating system and may also store a computer program. When executed by the processor, this computer program enables the processor to implement a timing synchronization method. The memory may also store a computer program, which, when executed by the processor, enables the processor to implement a timing synchronization method. Those skilled in the art will understand that… Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0061] In one embodiment, a computer device is provided, including a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the following steps: The control node calculates the initial time offset by sending a timestamped calibration frame to each execution node and measures the link transmission delay by using a loopback test frame. Based on the initial time offset and the link transmission delay, the execution nodes are compensated to ensure that the local clock of the execution node is initially aligned with the reference clock. The control node periodically broadcasts a reference clock, and each execution node calculates the cumulative drift between the local clock and the reference clock in real time. When the cumulative drift exceeds a preset threshold, the local clock frequency is adjusted to control the cumulative drift to within the preset threshold. The control node sends a control instruction at the start of a synchronization period based on a system time, and makes each execution node sample data at the same system time point through a synchronization trigger signal, and reads the data at the end boundary of the synchronization period, so as to match the timing of the control instruction and the data reading.

[0062] In one embodiment, a computer readable storage medium is provided, which stores a computer program. The computer program is executed by a processor to cause the processor to perform the following steps: The control node calculates an initial time offset by sending a calibration frame with a time stamp to each execution node, and measures a link transmission delay through a loopback test frame, and compensates the execution nodes based on the initial time offset and the link transmission delay to initially align the local clock of the execution nodes with the reference clock; The control node periodically broadcasts the reference clock, each execution node calculates a cumulative drift between the local clock and the reference clock in real time, and adjusts the frequency of the local clock to control the cumulative drift within a preset threshold when the cumulative drift exceeds the preset threshold; The control node sends a control instruction at the start of a synchronization period based on a system time, and makes each execution node sample data at the same system time point through a synchronization trigger signal, and reads the data at the end boundary of the synchronization period, so as to match the timing of the control instruction and the data reading.

[0063] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiments can be completed by a computer program instructing related hardware. The program can be stored in a non-volatile computer readable storage medium, and when executed, can include the processes of the above-mentioned embodiments. Any reference to memory, storage, database or other medium used in the embodiments provided by the present application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration but not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0064] Any combination of the technical features in the above embodiments can be made, and for the sake of brevity, not all possible combinations are described, however, any combination of the technical features is deemed to be within the scope of the present disclosure as long as there is no inconsistency.

[0065] The above embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the patent scope of the present application. It should be pointed out that for ordinary skilled persons in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application should be subject to the appended claims.

Claims

1. A method for synchronizing the timing of control commands in a multi-node industrial control system, characterized in that, Includes the following steps: The control node calculates the initial time offset by sending a timestamped calibration frame to each execution node and measures the link transmission delay by using a loopback test frame. Based on the initial time offset and the link transmission delay, the execution nodes are compensated to ensure that the local clock of the execution node is initially aligned with the reference clock. The control node periodically broadcasts a reference clock, and each execution node calculates the cumulative drift between the local clock and the reference clock in real time. When the cumulative drift exceeds a preset threshold, the local clock frequency is adjusted to control the cumulative drift to within the preset threshold. The control node sends control commands at the beginning of the synchronization cycle based on the system time. The synchronization trigger signal enables each execution node to sample data at the same system time point and read data at the end boundary of the synchronization cycle, so as to achieve timing matching between control commands and data reading.

2. The control command timing synchronization method for a multi-node industrial control system according to claim 1, characterized in that, The calculation steps for the initial time offset are as follows: The initial time offset ΔT = T_execution node - T_control node, where T_execution node is the local timestamp of the calibration frame received by the execution node, and T_control node is the reference clock timestamp carried in the calibration frame.

3. The control command timing synchronization method for a multi-node industrial control system according to claim 2, characterized in that, The steps for calculating the link transmission delay are as follows: Delay = (T_receive - T_send) / 2, where T_send is the timestamp of the control node sending the test frame, and T_receive is the timestamp of the control node receiving the return frame.

4. The control command timing synchronization method for a multi-node industrial control system according to claim 3, characterized in that, The steps for compensating execution nodes include: First, the local clock and the reference clock are aligned using an initial time offset ΔT. Then, the physical delay on the transmission path is compensated by the link transmission delay Delay to ensure that the local clock of the execution node and the reference clock of the control node are synchronized in the initial state.

5. The control command timing synchronization method for a multi-node industrial control system according to claim 1, characterized in that, The steps for each execution node to calculate the cumulative drift are as follows: The execution node receives a reference clock frame periodically broadcast by the control node. The reference clock frame includes the control node's system timestamp T_reference. The reception time T_local reception is recorded by a hardware timestamp unit. T_local compensation is calculated as T_local reception - ΔT - Delay, where ΔT is the initial time offset, Delay is the link transmission delay, and T_local compensation is the timestamp of the local clock after initial time offset compensation and link transmission delay compensation. The real-time cumulative drift is Drift = T_reference - T_local compensation.

6. The control command timing synchronization method for a multi-node industrial control system according to claim 1, characterized in that, The preset threshold is 50ns. When the cumulative drift amount |Drift| calculated by the execution node is greater than 50ns, the local clock frequency is adjusted. After adjustment, the drift amount is controlled within ±10ns.

7. The control command timing synchronization method for a multi-node industrial control system according to claim 6, characterized in that, The step of triggering local clock frequency adjustment includes: the execution node adjusting the local clock frequency through a hardware frequency adjustment module.

8. The control command timing synchronization method for a multi-node industrial control system according to claim 1, characterized in that, The timing of sending the synchronization trigger signal is: T_Sync = T_cycle start - Delay_maximum, where Delay_maximum is the maximum link delay between the control node and all execution nodes.

9. The control command timing synchronization method for a multi-node industrial control system according to claim 1, characterized in that, The steps for reading data at the end boundary of the synchronization cycle are as follows: start the reading process within a preset window before the end of the synchronization cycle, and read data through the reading process. The preset window is 100ns.

10. A control command timing synchronization device for a multi-node industrial control system, characterized in that, include: The clock initial alignment module is used to control the node to calculate the initial time offset by sending a calibration frame with a timestamp to each execution node, and to measure the link transmission delay by using a loopback test frame. Based on the initial time offset and the link transmission delay, the execution node is compensated so that the local clock of the execution node is initially aligned with the reference clock. The dynamic drift suppression module is used to control the nodes to periodically broadcast the reference clock. Each execution node calculates the cumulative drift between the local clock and the reference clock in real time. When the cumulative drift exceeds a preset threshold, the local clock frequency is adjusted to control the cumulative drift to within the preset threshold. The timing coordination control module is used to control nodes to send control commands at the beginning of the synchronization cycle based on system time. Through the synchronization trigger signal, each execution node samples data at the same system time point and reads data at the end boundary of the synchronization cycle, so as to achieve timing matching between control commands and data reading.

Images