An array type chalcogenide phase change material electric control structure, a preparation method and a crystallization state synchronous electric control method thereof

Abstract

The application provides an array type chalcogenide phase change material electric control structure, a preparation method and a synchronous crystallization state electric control method, and belongs to the fields of micro-nano manufacturing technology and chalcogenide phase change regulation. The electric control structure comprises a substrate, an adiabatic layer on the substrate, a heating plate structure, a front electrode structure, an insulating layer, a chalcogenide phase change material layer, and a back electrode structure under the substrate; the back electrode structure is electrically connected with the front electrode structure through a through hole structure. Firstly, an array type micro-heating unit model is established, and after the material type and thickness parameters of each functional layer are determined, the array type micro-heating unit model is prepared; and then, by applying a controllable electric pulse signal to the array, the synchronous crystallization and amorphization regulation of the chalcogenide phase change material are realized. The application can realize the rapid, stable and repeatable synchronous electric control switching of each chalcogenide phase change unit in the array, and can realize the stable and reversible regulation of the crystallization state of the phase change unit in the large-area array, so as to ensure the spatial synchronism and uniformity of the whole array.

Description

Technical Field

[0001] This invention belongs to the field of micro-nano manufacturing technology and chalcogenide phase change control, and relates to an array-type chalcogenide phase change material with an electrically controlled structure, preparation method and synchronous electrically controlled method for crystallization state. Background Technology

[0002] Chalcogenide phase change materials are a class of multi-element alloys formed by doping elements such as germanium (Ge), tellurium (Te), and antimony (Sb) in different proportions. By adjusting the composition ratio of each element, the crystal structure of the material can be effectively changed, thus exhibiting significant differences in phase transition rate, phase transition temperature, and crystallization synchronicity. Among them, germanium-antimony-tellurium alloy (GST, Ge x Sb y Te z Due to its rapid phase transition rate, excellent stability, and good repeatability, chalcogenide phase change materials (CPCs) have become one of the most widely used chalcogenide CPC materials. The crystal lattice of chalcogenide CPC materials can undergo reversible changes under various external heating methods, leading to significant alterations in their electrical and optical properties. The reversible lattice structure changes of these materials under various external thermal stimuli, accompanied by significant changes in electrical and optical properties, lay the foundation for their applications in optoelectronic control, information storage, and infrared modulation. Existing electronic modulation methods mainly include: one is direct electrical heating of the chalcogenide CPC material, triggering the phase transition through Joule heating; the other is indirect heating using integrated microheaters. While the former has a simple structure, it is prone to localized overheating and damage to the material and is difficult to achieve a reverse phase transition; the latter, by integrating a microheating unit beneath the material to achieve localized thermal control, has advantages such as fast response, low energy consumption, high stability, and reversible control, making it more suitable for precision electronic control and programmable phase change applications.

[0003] Currently, scholars both domestically and internationally have conducted extensive research on the electrical control of phase change materials (PCMs). For example, Chinese invention patent (application number CN202210821376.3) provides a method for achieving the conversion between amorphous and crystalline states by applying electrical excitation to the entire PCM film. While this method can achieve phase change on the entire film, the high driving voltage and energy consumption due to the whole-film electrification method easily lead to macroscopic heat accumulation and film thermal stress, thus affecting cycle stability. Chinese invention patent (application number CN201710890276.5) achieves crystalline state switching of local units by constructing electrodes above and below the PCM and applying electrical pulses. This structure is suitable for unit-level phase change control, but it is difficult to extend to large-area arrays, thus limiting its application in integrated devices. While existing technologies can achieve the electrotuning function of phase change materials, they generally suffer from problems such as high driving voltage, high energy consumption, difficulty in achieving synchronous control of multiple units, insufficient scalability of arrayed devices, and poor uniformity of large-area devices. These issues make it difficult to meet the requirements of low power consumption, high consistency, and high scalability of arrayed phase change devices in practical engineering applications.

[0004] Currently, domestic and international research on the electrical control of chalcogenide phase change materials mainly focuses on the heating and regulation of a single micro-heating unit. Sajjad Abdollahramezani et al. [Nature Communications. 2022 Mar 30; 13(1): 1696] proposed an indirect heating scheme based on a heterostructure resistive microheater, which achieves reversible phase transition of GST thin films by applying pulse voltage. This scheme can achieve precise heating and reset control at the unit scale, but its structural design is complex and the thermal field distribution is limited to a local area, making it difficult to balance the uniformity and scalability of large areas, thus limiting its application in arrayed devices. Hossei Taghinejad et al. [Optics Express. 2021 Jun 21; 29(13): 20449-20462] used an indium tin oxide microheater to achieve a rapid electrically controlled phase transition of GST thin films, exhibiting low energy consumption and fast thermal response characteristics. However, this method is prone to heat accumulation and local overheating during repeated cycles, which leads to a decrease in phase transition stability. At the same time, its driving mode is still limited to unit-level control and lacks the ability to synchronously regulate multi-unit structures, making it difficult to meet the requirements of complex array devices for coordinated electronic control.

[0005] In recent years, with the rapid development of micro-nano fabrication processes and phase change material (PCM) electronic modulation technology, programmable electronically controlled devices based on chalcogenide PCMs have become an important research direction in the fields of optoelectronics and information control. Existing research mainly focuses on the local heating and reversible phase change control of chalcogenide PCMs by a single micro-heating unit, achieving a certain degree of precise modulation of the phase change process. However, this method struggles to guarantee heating synchronization, crystallization uniformity, and thermal field consistency among units in array structures, and still suffers from significant shortcomings in cycle stability, energy consumption optimization, and system integration. For example, in applications such as electronically tunable metasurfaces, PCM optical memories, reconfigurable photonic devices, and intelligent infrared control systems, it is typically necessary to achieve fast, low-power, repeatable, and synchronous electronic control of array-level chalcogenide PCMs to ensure the consistency of the overall device in dynamic response and spatial distribution. Currently, a systematic control scheme that combines array fabrication precision with multi-unit synchronous driving capability is lacking. Therefore, a synchronous electronic control integration method for chalcogenide PCMs oriented towards array structures is urgently needed. This method should achieve high consistency, fast response, cycle stability and easy integration of electronic control modulation while maintaining the non-volatility and low power consumption characteristics of materials, so as to provide reliable technical support for the design and application of next-generation intelligent optoelectronic devices, infrared stealth and thermal management systems. Summary of the Invention

[0006] This invention addresses the problem that existing electrically controlled chalcogenide phase change material (CCT) technologies can only achieve localized control at the unit level and struggle to achieve synchronous electrical control of the crystallization state of multiple units in an array structure. It proposes an array-type electrically controlled structure for CCT, its preparation method, and a method for synchronously electrically controlling the crystallization state. While prioritizing low energy consumption, non-volatility, and structural compatibility, existing technologies still struggle to achieve synchronization, uniformity, and repeatability of multiple units in a large-area array. This invention, through optimized multilayer film structure design and a thermo-electric synergistic control mechanism, introduces an electrode layout of insulating layers and metal vias, achieving rapid, stable, and repeatable synchronous electrical control switching of each chalcogenide CCT unit in the array. This structure enables stable and reversible control of the crystallization state of CCT units in a large-area array, ensuring the overall spatial synchronization and uniformity of the array.

[0007] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0008] An array-type chalcogenide phase change material electrical control structure includes a substrate 1, an insulation layer 2, a heating plate structure 3, a front electrode structure 4, an insulating layer 5, a chalcogenide phase change material layer 6, and a back electrode structure 7.

[0009] The substrate 1 serves as the supporting base for the entire structure. The substrate 1 is made of materials such as silicon, quartz, silicon nitride, or aluminum nitride, possessing excellent mechanical strength and thermal stability. Silicon is the preferred material for the substrate 1.

[0010] The heat insulation layer 2 is deposited on the surface of the substrate 1 to block downward heat conduction and improve local heating efficiency. The heat insulation layer 2 is made of silicon dioxide or hafnium dioxide, with a thickness ranging from 100 to 300 nm, and can be formed by magnetron sputtering, chemical vapor deposition, or atomic layer deposition. Silicon dioxide is the preferred material for the heat insulation layer 2.

[0011] The heating plate structure 3 is disposed on the insulation layer 2, and its thickness is 30-200 nm. The heating plate structure 3 can be designed in the shape of a dumbbell, rectangle, butterfly, rhombus, or trapezoid to achieve different local heating characteristics. The material of the heating plate structure 3 can be a material with good electrical conductivity, such as indium oxide, tungsten, or graphene, which can generate heat through the Joule effect to drive the phase transition of the chalcogenide phase change material. The preferred material for the heating plate structure 3 is tungsten, and the preferred shape is dumbbell-shaped.

[0012] The front electrode structure 4 is disposed at both ends of the heating plate structure 3 for electrical connection with the heating unit, enabling synchronous on / off control of the unit. The front electrode structure 4 can be made of gold, aluminum, platinum, or silver, with a thickness of 30–200 nm. Furthermore, it is fabricated in an array to provide an electrical path for subsequent synchronous electronic control. Gold is the preferred material for the electrode structure.

[0013] The insulating layer 5 is disposed in the middle of the heating plate structure 3 and does not contact the front electrode structure 4, serving to achieve electrical isolation between the heating plate structure 3 and the chalcogenide phase change material layer 6. The coverage area of ​​the insulating layer 5 is consistent with the area of ​​the chalcogenide phase change material layer 6 and does not extend into the area where the front electrode structure 4 is located, ensuring effective conduction between the electrode and the external circuit. The coverage area of ​​the insulating layer 5 basically corresponds to the deposition area of ​​the chalcogenide phase change material layer 6. It can be an alumina or silicon nitride thin film with a thickness of 10–100 nm, prepared by atomic layer deposition or plasma-enhanced chemical vapor deposition. The preferred material for the insulating layer 5 is alumina.

[0014] The chalcogenide phase change material layer 6 is deposited on the surface of the insulating layer 5, with the same area as the insulating layer 5, and is used to realize the phase change function. Its thickness is 20–100 nm, and it can be obtained by magnetron sputtering deposition. Under the action of an applied pulse voltage, the chalcogenide phase change material layer can achieve a reversible transition between crystallization and amorphization, thus forming a basic unit structure with independent controllability. By integrating multiple such units in the array, independent or synchronous electrical control of multiple units can be achieved, providing a structural basis for subsequent array-level optical or electrical performance control.

[0015] The back electrode structure 7 is deposited on the lower surface of the pretreated substrate 1 in a periodic array to provide overall electrical connectivity. The back electrode structure 7 can be made of copper, aluminum, titanium, silver, indium tin oxide, or other highly conductive alloys, with a thickness of 1–10 μm. Copper is preferred as the material for the back electrode structure 7. The back electrode structure 7 is electrically connected to the front electrode structure 4 through a via structure 8, thereby achieving array-level synchronous electrical control.

[0016] A method for fabricating an array-type chalcogenide phase change material (CPC) electrically controlled structure involves determining the material type and thickness parameters of each functional layer within the structure. First, an array-type micro-heating unit model is established through multiphysics simulation and structural parameter optimization. The thermal regulation characteristics of the chalcogenide CPC crystallization state under different electrical pulse conditions are analyzed. After determining the material type and thickness parameters of each functional layer in the electrically controlled structure, fabrication is carried out. The method includes the following steps:

[0017] The first step involved establishing an electro-thermal coupling simulation model of the array-type chalcogenide phase change material (CPC) phase control structure to systematically optimize different material combinations and layer thickness parameters. The optimized array-type CPC phase control structure unit can achieve and maintain a stable temperature of approximately 160℃–200℃ in the heating region under millisecond-level electrical pulses, meeting the thermal requirements for the transformation of chalcogenide CPC phase change materials from amorphous to crystalline states. Under nanosecond-level electrical pulses, the temperature of the heating region can instantaneously rise to approximately 600℃–800℃ and then rapidly cool, realizing the reversible transformation of the chalcogenide CPC phase change material from crystalline to amorphous states. Through this optimization process, the material type and thickness parameters of each functional layer in the array-type chalcogenide CPC phase control structure were determined.

[0018] The second step involves fabricating an array-type chalcogenide phase change material electrical control structure based on the structural design and material parameters determined through simulation optimization. On the front side of substrate 1, each functional layer is deposited sequentially using a thin-film deposition apparatus, and patterning is performed using a structural etching apparatus to fabricate the following structures: insulation layer 2, heating plate structure 3, front electrode structure 4, insulating layer 5, and chalcogenide phase change material layer 6. Subsequently, a through-hole structure 8 is fabricated on the back side of substrate 1, and a back electrode structure 7 is deposited to achieve subsequent electrical connection with the front electrode structure.

[0019] Step 2.1, Pre-treatment of the back side of substrate 1. To ensure good bonding between the back electrode structure 7 and the substrate 1 and the via structure 8, the back side of the substrate is first cleaned and decontaminated. The specific steps are as follows: The substrate 1 is immersed in isopropanol solution and placed in an ultrasonic cleaner for ultrasonic cleaning to remove organic residues and microparticle contamination on the surface; then, it is ultrasonically cleaned again with deionized water to further remove surface impurities; after cleaning, the substrate surface is dried with high-purity nitrogen.

[0020] Step 2.2: Using a thin film deposition apparatus, a thermal insulation layer 2 is deposited on substrate 1, while controlling the chamber's background vacuum to be better than... The working gas flow rate is 2-3 mtorr, the sputtering power is 80-120W, the sputtering is carried out at room temperature, and the thickness of the deposition is controlled by controlling the deposition time.

[0021] Step 2.3: Using a structural etching device, the heating plate structure 3 pattern is formed on the surface of the insulation layer 2 by exposure and development according to the designed mask; subsequently, the heating plate structure material is deposited in the patterned area using a thin film deposition device, while controlling the background vacuum of the chamber to be better than that of the heat exchanger. The working gas flow rate is 2-3 mtorr, the sputtering power is 90-120 W, and sputtering is performed at room temperature. The deposition thickness is controlled by adjusting the deposition time. Finally, a photoresist removal process is performed to remove excess photoresist, resulting in the heating plate structure 3.

[0022] Step 2.4: Using a structural etching device, define the electrode structure region above the heating plate structure 3 according to the designed mask; using a thin film deposition device, sequentially deposit the front electrode structure 4, controlling the chamber background vacuum to be better than... The working gas flow rate is 2-3 mtorr, the sputtering power is 50-120 W, and room temperature sputtering is used. The deposition thickness is controlled by adjusting the deposition time. Finally, a photoresist removal process is performed to remove residual photoresist, resulting in the front electrode structure 4.

[0023] Step 2.5: Using a structural etching device, an insulating layer 5 and a chalcogenide phase change material 6 pattern are fabricated on the heating plate structure 3 region according to the designed mask. The insulating material and the chalcogenide phase change material are then deposited sequentially using a thin film deposition device to achieve effective electrical isolation between structures and integration of phase change functions, while controlling the chamber's background vacuum to be better than... The working gas flow rate is 2-3 mtorr, the sputtering power is 80-120 W, and sputtering is performed at room temperature. The deposition thickness is controlled by adjusting the deposition time. Finally, a photoresist removal process is performed to remove photoresist residue and obtain the target structure.

[0024] Step 2.6: Through-hole structures 8 are formed at designated locations on substrate 1 using mechanical drilling to achieve electrical connection channels on both sides. A continuous metal conductive structure is formed inside the through-holes using conventional copper plating to ensure conductive continuity between the back electrode structure 7 and the front electrode structure 4. Based on a pre-designed mask pattern, the back electrode structure 7 is patterned on the back side of substrate 1 and formed using copper plating, enabling synchronous electrical control of the array units.

[0025] A method for synchronously controlling the crystallization state of an array-type chalcogenide phase change material, based on the electrically controlled structure of the prepared array-type chalcogenide phase change material, achieves synchronous crystallization and amorphization regulation of the chalcogenide phase change material by applying a controllable electrical pulse signal to the array, including the following steps:

[0026] The first step involves using the chalcogenide phase change material electrical control structure prepared in the preceding steps as the basic unit, and repeatedly arranging them on the surface of substrate 1 to form an array structure. The array contains M×N repeating electrical control units, with each unit arranged at equal spatial intervals of 1 cm. Subsequently, the electrode structures of each electrical control unit are connected in a series-parallel combination through the back electrode structure 7 and the through-hole structure 8 to form a controllable array electrode network, realizing an electrical path for synchronous driving of multiple units.

[0027] The second step involves applying an electrical pulse signal through the back electrode structure 7 after the array structure is constructed to achieve phase transition modulation. When a millisecond-level pulse voltage is applied (voltage range from 5×(M+M / 5)V to 9×(M+M / 5)V, pulse width from 100 to 500ms), the chalcogenide phase transition material in the array changes from an amorphous state to a crystalline state; when a nanosecond-level pulse voltage is applied (voltage range from 15×(M+M / 5)V to 25×(M+M / 5)V, pulse width from 100 to 1000ns), the material changes from a crystalline state to an amorphous state.

[0028] The third step, to verify the consistency of phase transitions among the units in the array, involved characterizing the state of the chalcogenide phase transition material under electrically controlled conditions using laser Raman spectroscopy. A 532 nm laser was used as the excitation source, with the laser power controlled below 1 mW to avoid the influence of photoheating. The positions and intensity changes of the characteristic peaks in the Raman spectra of the material in both amorphous and crystalline states were measured, and point-by-point scanning tests were performed on multiple units in the array. By comparing the Raman spectral changes of different units under the same pulse conditions, the synchronicity of the electrically controlled phase transition process of the array was evaluated.

[0029] The beneficial effects of this invention are:

[0030] This invention constructs an array structure for each chalcogenide phase change material by combining series and parallel connections of the electrical control structures. This significantly reduces the driving voltage of each unit and greatly simplifies the design and control complexity of the electrical control circuit. Simultaneously, this structure enables reversible conversion between the crystalline and amorphous states of the chalcogenide phase change materials, achieving synchronous and stable electrical control adjustment of multiple units. This technical solution provides a reliable structural foundation and technical support for the design and application of intelligent optoelectronic devices, infrared stealth systems, and thermal management systems. Attached Figure Description

[0031] Figure 1 This is a three-dimensional structural diagram of the electronically controlled unit structure of the array-type chalcogenide phase change material in this invention;

[0032] Figure 2 This is a diagram showing the structural dimensions of each unit of the array-type chalcogenide phase change material electronic control structure in this invention;

[0033] Figure 3 This invention simulates the application of millisecond-level electrical pulses to an electrically controlled structure of an array-type chalcogenide phase change material, resulting in heat distribution on the surface of the heating plate.

[0034] Figure 4 This invention simulates the application of nanosecond-level electrical pulses to an electrically controlled structure of an array-type chalcogenide phase change material, and the heat distribution on the surface of the heating plate.

[0035] Figure 5 This is a front view of the electronically controlled structure of the array-type chalcogenide phase change material in this invention;

[0036] Figure 6 This is a schematic cross-sectional view of the electronically controlled structure of the array-type chalcogenide phase change material in this invention.

[0037] Figure 7 This is a schematic diagram of the back side of the electronically controlled structure of the array-type chalcogenide phase change material in this invention;

[0038] Figure 8 These are the Raman characterization spectra of the electrically controlled chalcogenide phase change materials in this invention;

[0039] In the figure: 1 Substrate, 2 Insulation layer, 3 Heating plate structure, 4 Front electrode structure, 5 Insulating layer, 6 Chalcogenide phase change material layer, 7 Back electrode structure, 8 Through hole structure. Detailed Implementation

[0040] The embodiments of the present invention are described in detail with reference to the accompanying drawings and technical solutions, illustrating the electrically controlled structure of the array-type chalcogenide phase change material, its preparation method, and its synchronous electrically controlled method for crystallization state.

[0041] This invention provides an array-type electrically controlled structure for chalcogenide phase change materials, such as... Figure 1 As shown, from bottom to top, it includes: substrate 1, insulation layer 2, heating plate structure 3, front electrode structure 4, insulating layer 5, chalcogenide phase change material layer 6, and back electrode structure 7. This structure adopts an array arrangement, which can realize independent or synchronous electric control of multiple units.

[0042] The substrate 1 is made of silicon, which serves as the supporting base for the entire structure. It has a thickness of 500 μm and exhibits excellent mechanical strength and thermal stability.

[0043] The insulation layer 2 is made of silicon dioxide and is deposited on the upper surface of the substrate 1 with a thickness of 200 nm. It is used to suppress the downward conduction of heat and improve the local heating efficiency.

[0044] The heating plate structure 3 is made of tungsten and is disposed on the insulation layer 2 with a thickness of 100 nm. The heating plate structure 3 is designed as a dumbbell shape, which achieves rapid heating through the Joule effect to provide a heat source for the chalcogenide phase change material layer.

[0045] The front electrode structure 4 is made of gold and is located at both ends of the heating plate structure 3. It has a thickness of 100nm and is used to provide a current input path for the heating unit to achieve synchronous control of each unit in the array.

[0046] The insulating layer 5 is made of aluminum oxide, covers the middle of the heating plate structure 3, and does not contact the front electrode structure 4. It has a thickness of 50 nm. This layer is used to achieve electrical isolation.

[0047] The chalcogenide phase change material layer 6 is deposited on the surface of the insulating layer 5, with a thickness of 80 nm and an area consistent with that of the insulating layer 5. This phase change material can achieve a reversible transition between crystalline and amorphous states under the action of an electrical pulse, making it a key layer for realizing the electrically controlled phase change function.

[0048] The copper back electrode structure 7 is deposited on the lower surface of the silicon substrate 1 with a thickness of 5 μm, and is used to provide overall electrical connection. The back electrode structure 7 is electrically connected to the front electrode structure 4 through the through-hole structure 8, thereby realizing array-level synchronous electrical control.

[0049] A method for preparing an array-type chalcogenide phase change material electrically controlled structure includes the following steps:

[0050] The first step is to determine the dimensions of the array-type chalcogenide phase change material electrically controlled structure, as shown in the figure. Figure 2As shown, a1 is 66 μm, a2 is 40 μm, L1 is 200 μm, L2 is 120 μm, and W1 is 180 μm. Based on these structural parameters, an array-type chalcogenide phase change material (CCCT) electrical control structure model was constructed, consisting of, from bottom to top, a substrate 1, an insulating layer 2, a heating plate structure 3, a front electrode structure 4, an insulating layer 5, and a chalcogenide CCCT layer 6. Different material combinations and layer thickness parameters were optimized to determine the material type and thickness parameters of each functional layer in the array-type CCCT electrical control structure. Substrate 1 is made of silicon with a thickness of 500 μm and material parameters including density of 2330 kg / m³, specific heat capacity of 700 J / (kg·K), and thermal conductivity of 148 W / (m·K); insulation layer 2 is made of silicon dioxide with a thickness of 200 nm and material parameters including density of 2200 kg / m³, specific heat capacity of 703 J / (kg·K), and thermal conductivity of 1.4 W / (m·K); heating plate structure 3 is made of tungsten with a thickness of 200 nm and material parameters including density of 19250 kg / m³, specific heat capacity of 134 J / (kg·K), and thermal conductivity of 174 W / (m·K); front electrode structure 4 is made of gold with a thickness of 100 nm and material parameters including density of 19300 kg / m³, specific heat capacity of 134 J / (kg·K), and thermal conductivity of 174 W / (m·K); The specific heat capacity is 129 J / (kg·K), and the thermal conductivity is 317 W / (m·K). The insulating layer 5 is made of alumina with a thickness of 200 nm. The material parameters include a density of 3950 kg / m³, a specific heat capacity of 880 J / (kg·K), and a thermal conductivity of 30 W / (m·K). The chalcogenide phase change material has a thickness of 80 nm. The parameters of the crystalline chalcogenide phase change material include a density of 6300 kg / m³, a specific heat capacity of 212 J / (kg·K), and a thermal conductivity of 0.91 W / (m·K). The parameters of the amorphous chalcogenide phase change material include a density of 5900 kg / m³, a specific heat capacity of 212 J / (kg·K), and a thermal conductivity of 0.27 W / (m·K). The specific electrothermal simulation results are as follows: Figure 3 As shown, a 7V pulse with a pulse width of 200ms is applied to the front electrode structure 4. Simulation results show that the temperature of the chalcogenide phase change material can reach the crystallization temperature of 200℃ and remain stable during the pulse duration, thus enabling a controllable phase transition from amorphous to crystalline state. Figure 4 As shown, when a pulse of 22V and 400ns is applied to the front electrode structure 4, the temperature of the chalcogenide phase change material reaches 800℃, satisfying the thermodynamic conditions required for the transition from crystalline to amorphous state. It should be noted that GST belongs to a class of reversible chalcogenide phase change materials, and its specific crystallization and amorphization conditions depend on the composition ratio. The array-type chalcogenide phase change material electrical control structure designed in this work can generally meet the phase change requirements of this type of material.

[0051] The second step involves fabricating an array-type chalcogenide phase change material electrical control structure based on the structural design and material parameters determined through simulation optimization. On the front side of substrate 1, each functional layer is deposited sequentially using a thin-film deposition apparatus, and patterning is performed using a structural etching apparatus to fabricate the following structures: insulation layer 2, heating plate structure 3, front electrode structure 4, insulating layer 5, and chalcogenide phase change material layer 6. Subsequently, a through-hole structure 8 is fabricated on the back side of substrate 1, and a back electrode structure 7 is deposited to achieve subsequent electrical connection with the front electrode structure.

[0052] Step 2.1, Pretreatment of the back side of substrate 1. First, the back side of substrate 1 is cleaned and decontaminated; the specific steps are as follows: Substrate 1 is organically cleaned. First, it is ultrasonically cleaned in acetone solution for 10 minutes at an ultrasonic power of 70W; then, substrate 1 is ultrasonically cleaned in isopropanol for 10 minutes at an ultrasonic power of 70W; next, substrate 1 is ultrasonically cleaned in ultrapure water for 10 minutes at an ultrasonic power of 70W; finally, substrate 1 is dried with nitrogen gas and then dried on a heating stage at 130℃ for 5 minutes to avoid moisture residue, obtaining a clean and smooth substrate interface, providing a good adhesion foundation for subsequent film deposition.

[0053] Step 2.2: Using a thin film deposition apparatus, silicon dioxide is deposited on substrate 1, and the chamber floor vacuum is controlled to be better than 5 × 10⁻⁻⁻⁶. 4 Pa, working gas flow rate of 3 mtorr, sputtering power of 120 W, sputtering thickness of 200 nm.

[0054] Step 2.3: Using a structural etching device, a dumbbell-shaped pattern of the heating plate structure 3 is formed on the surface of the insulation layer 2 by exposure and development according to the designed mask; subsequently, the heating plate structure material is deposited in the patterned area using a thin film deposition device, while controlling the background vacuum of the chamber to be better than that of the heating plate structure 3. The working gas flow rate was 3 mtorr, the sputtering power was 90 W, sputtering was performed at room temperature, the sputtering material was tungsten, and the thickness was 100 nm. Finally, a photoresist removal process was performed to remove excess photoresist, resulting in the heating plate structure 3.

[0055] Step 2.4: Using a structural etching device, define the electrode structure region above the heating plate structure 3 according to the designed mask; using a thin film deposition device, sequentially deposit the front electrode structure 4, controlling the chamber background vacuum to be better than... The working gas flow rate was 3 mtorr, the sputtering power was 100 W, room temperature sputtering was used, and the sputtering material was gold with a thickness of 100 nm. To improve the adhesion between the gold layer and the tungsten layer, a 10 nm titanium transition layer was sputtered before gold film deposition, also with a sputtering power of 100 W. Finally, a photoresist removal process was performed to remove residual photoresist, resulting in the front electrode structure 4.

[0056] Step 2.5: Using a structural etching device, an insulating layer 5 and a chalcogenide phase change material 6 pattern are fabricated on the heating plate structure 3 region according to the designed mask. The insulating material and the chalcogenide phase change material are then deposited sequentially using a thin film deposition device to achieve effective electrical isolation between structures and integration of phase change functions, while controlling the chamber's background vacuum to be better than... The working gas flow rate was 3 mtorr, sputtering was performed at room temperature, the sputtering insulating layer 5 was made of alumina, the sputtering power was 80 W, the thickness was 50 nm, and the sputtering GST power was 60 W, with a thickness of 80 W. Finally, a photoresist removal process was performed to remove photoresist residue and obtain the target structure.

[0057] Step 2.6: A through-hole structure 8 is formed at a specified location on substrate 1 using a mechanical drilling process, such as... Figure 6 A schematic diagram of the front side of the electrical control structure of the array-type chalcogenide phase change material. Metallized vias with a diameter of 50 μm are fabricated. A continuous metallic conductive structure is formed inside the vias using a conventional copper plating process to ensure the conductive continuity between the back electrode structure 7 and the front electrode structure. The back electrode structure 7 is formed as follows... Figure 7 A schematic diagram of the back side of the electrically controlled structure of the array-type chalcogenide phase change material. Based on the pre-designed back electrode pattern, electrode patterning is performed on the back side of the substrate, and the back electrode structure 7 is formed by a copper plating process. The plating process is a copper plating process with a plating rate of 0.6 μm / min and a deposition thickness of 5 μm.

[0058] A method for synchronously controlling the crystallization state of an array-type chalcogenide phase change material includes the following steps:

[0059] The first step involves using the chalcogenide phase change material (CPC) electrically controlled structure prepared in the preceding steps as a basic unit. An array of these CPC electrically controlled structures is repeatedly arranged on the surface of substrate 1. The array contains 4×8 repeating electrically controlled units, with each unit spaced equidistantly at 1 cm intervals. Phase change modulation of the CPC material in the array is achieved by applying an electrical pulse through the back electrode structure 7: when the applied pulse voltage is 28.8 V and the pulse width is 300 ms, the CPC material changes from amorphous to crystalline; when the applied pulse voltage is 91.2 V and the pulse width is 800 ns, the CPC material changes from crystalline to amorphous.

[0060] The second step, to verify the consistency of phase transitions among the units in the array, involved characterizing the state of the chalcogenide phase transition materials using laser Raman spectroscopy. Laser Raman spectroscopy was used to analyze the phase transition states of each chalcogenide phase transition material in the array under electrically controlled conditions. A 532nm laser was used as the excitation source, and the laser power was controlled within a low power range (less than 1mW) to avoid the influence of photoheating on the phase transition state. By comparing the Raman spectra of the samples before and after the application of the electric pulse, the transition from amorphous to crystalline or vice versa was determined. Raman spectra of the materials in amorphous and crystalline states were measured using a Raman spectrometer. Figure 8 Raman characterization spectra of electrically controlled chalcogenide phase change materials, and characteristic peaks of chalcogenide phase change materials in the crystalline state. The characteristic peak in the amorphous state is This indicates that the chalcogenide phase change material underwent a reversible phase transition from an amorphous to a crystalline state under electrical stimulation, and the electrically controlled structure can effectively and synchronously regulate the phase transition state of the material. Further point-by-point Raman spectroscopy tests on multiple units in the array showed that the Raman spectral changes of each unit under the same pulse parameters were consistent, verifying the synchronicity of the crystallization state of the chalcogenide phase change material in the array and the stability of the electrically controlled driving structure.

[0061] This invention provides an electrically controlled structure for an array-type chalcogenide phase change material, its preparation method, and a method for synchronously controlling its crystallization state. Through multilayer film structure optimization and electrode layout design, synchronous electrical modulation of the chalcogenide phase change material in the array can be achieved by applying a pulsed voltage to the back electrode structure, thereby realizing reversible cyclic control of the crystallization state. This structure combines low-power drive, high synchronization, and excellent structural compatibility, enabling consistent control of large-area arrays while maintaining non-volatility. The system design is reasonable, and the process controllability is high, making it suitable for applications in reconfigurable metasurfaces, intelligent dimming and thermal control, infrared stealth, and multifunctional optoelectronic integrated systems, with broad application prospects.

[0062] The embodiments described above are merely illustrative of the implementation methods of the present invention, but should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the protection scope of the present invention.

Claims

1. An array-type electrically controlled structure for chalcogenide phase change materials, characterized in that, The phase change material electrical control structure includes a substrate (1), an insulation layer (2), a heating plate structure (3), a front electrode structure (4), an insulating layer (5), a chalcogenide phase change material layer (6), and a back electrode structure (7). The substrate (1) serves as the supporting base for the entire structure; The heat insulation layer (2) is deposited on the surface of the substrate (1); The heating plate structure (3) is disposed on the upper surface of the insulation layer (2); The front electrode structure (4) is disposed at both ends of the heating plate structure (3) for electrical connection with the heating unit to realize synchronous on / off control of the unit; The insulating layer (5) is disposed in the middle of the heating plate structure (3) and does not contact the front electrode structure (4), and is used to achieve electrical isolation between the heating plate structure (3) and the chalcogenide phase change material layer (6); the coverage area of ​​the insulating layer (5) is consistent with the area of ​​the chalcogenide phase change material layer (6) and does not extend to the area where the front electrode structure (4) is located, to ensure the conduction between the electrode and the external circuit; The chalcogenide phase change material layer (6) is deposited on the surface of the insulating layer (5) and has the same area as the insulating layer (5) to realize the phase change function; the chalcogenide phase change material layer (6) can realize reversible crystallization and amorphization under the action of an applied pulse voltage, forming a basic unit structure with independent control capability; The back electrode structure (7) is deposited on the lower surface of the pretreated substrate (1). The back electrode structure (7) is electrically connected to the front electrode structure (4) through the through-hole structure (8) to provide overall electrical connection. The heat insulation layer (2) above the substrate (1) and its structure above it, and the back electrode structure (7) at the bottom of the substrate (1) are arranged in a periodic array. Array-level synchronous electronic control is achieved by integrating multiple back electrode structures (7) in the array; By integrating multiple chalcogenide phase change material layers (6) in the array, independent or synchronous electrical control of multiple units can be achieved, providing a structural basis for subsequent array-level optical or electrical performance regulation.

2. The array-type chalcogenide phase change material electrical control structure according to claim 1, characterized in that, The specific material and thickness of the phase change material electronic control structure are as follows: The substrate (1) material is silicon, quartz, silicon nitride or aluminum nitride; The insulation layer (2) is made of silicon dioxide or hafnium dioxide, with a thickness ranging from 100 to 300 nm, and is formed by magnetron sputtering, chemical vapor deposition or atomic layer deposition. The heating plate structure (3) is made of indium oxide, tungsten, graphene or other materials with good conductivity, which can generate heat through the Joule effect to drive the phase change of the chalcogenide phase change material; the thickness of the heating plate structure (3) is 30-200nm; the heating plate structure (3) is designed in the shape of dumbbell, rectangle, butterfly, rhombus or trapezoid to achieve different local heating characteristics; The front electrode structure (4) is made of gold, aluminum, platinum or silver and has a thickness of 30–200 nm; the insulating layer (5) is made of aluminum oxide or silicon nitride film with a thickness of 10–100 nm and is prepared by atomic layer deposition or plasma-enhanced chemical vapor deposition. The chalcogenide phase change material layer (6) has a thickness of 20–100 nm and is obtained by magnetron sputtering deposition; The material of the back electrode structure (7) is copper, aluminum, titanium, silver, indium tin oxide or other highly conductive conductive alloy materials, with a thickness of 1–10 μm.

3. The array-type chalcogenide phase change material electrical control structure according to claim 1, characterized in that, The material of the phase change material electronic control structure is specifically: The substrate (1) is made of silicon; The insulation layer (2) is made of silicon dioxide; The heating plate structure (3) is made of tungsten and is dumbbell-shaped; The front electrode structure (4) is made of gold; The material of the back electrode structure (7) is copper.

4. A method for preparing an array-type chalcogenide phase change material electrically controlled structure according to any one of claims 1-3, characterized in that, To determine the material type and thickness parameters of each functional layer in the electrically controlled structure of the array-type chalcogenide phase change material, an array-type micro-heating unit model was first established through multiphysics simulation and structural parameter optimization. The thermal regulation characteristics of the crystallization state of the chalcogenide phase change material under different electrical pulse conditions were analyzed. After determining the material type and thickness parameters of each functional layer in the electrically controlled structure of the array-type chalcogenide phase change material, its fabrication was carried out, including the following steps: The first step involves establishing an electro-thermal coupling simulation model of the array-type chalcogenide phase change material (CPC) phase control structure to systematically optimize different material combinations and layer thickness parameters. The optimized array-type CPC phase control structure unit can achieve and maintain a stable temperature of 160℃–200℃ in the heating region under millisecond-level electric pulse conditions, meeting the thermal requirements for the transformation of chalcogenide CPC phase change materials from amorphous to crystalline states. Under nanosecond-level electric pulse conditions, the heating region temperature can instantaneously rise to 600℃–800℃ and rapidly cool, realizing the reversible transformation of the chalcogenide CPC phase change material from crystalline to amorphous states. Through this optimization process, the material type and thickness parameters of each functional layer in the array-type CPC phase change material's electrical control structure are determined. The second step is to prepare an array-type chalcogenide phase change material electrical control structure. Based on the structure design and material parameters determined by simulation optimization, the functional layers are deposited sequentially on the front side of the substrate (1) using a thin film deposition equipment, and patterning is performed using a structure etching equipment to form a heat insulation layer (2), a heating plate structure (3), a front electrode structure (4), an insulating layer (5), and a chalcogenide phase change material layer (6) structure. A through-hole structure (8) is processed on the back side of the substrate (1), and a back electrode structure (7) is deposited.

5. The method for preparing the array-type chalcogenide phase change material electrically controlled structure according to claim 4, characterized in that, The second step is specifically as follows: Step 2.1, pretreatment of the back side of the substrate (1), including ultrasonic cleaning and drying with high-purity nitrogen; Step 2.2, deposit an insulating layer (2) on the upper surface of the substrate (1), and control the bottom vacuum of the chamber to be better than The working gas flow rate is 2-3 mtorr, the sputtering power is 80-120W, the sputtering is carried out at room temperature, and the thickness of the deposition is controlled by controlling the deposition time. Step 2.3: Expose and develop the surface of the insulation layer (2) to form a pattern of the heating plate structure (3); deposit the heating plate structure (3) within the pattern area; control the background vacuum of the chamber to be better than The working gas flow rate is 2-3 mtorr, the sputtering power is 90-120W, the room temperature sputtering is used, and the thickness of the deposition is controlled by controlling the deposition time; finally, the gel is degelatinated to obtain the heating plate structure (3); Step 2.4: Define the electrode structure region above the heating plate structure (3) and deposit the front electrode structure (4); control the chamber background vacuum to be better than The working gas flow rate is 2-3 mtorr, the sputtering power is 50-120 W, and the sputtering is carried out at room temperature. The thickness of the deposition is controlled by controlling the deposition time. Finally, the gel is debonded to obtain the front electrode structure (4). Step 2.5: An insulating layer (5) and a chalcogenide phase change material layer (6) pattern are prepared on the heating plate structure (3) region; the insulating material and the chalcogenide phase change material are deposited sequentially to achieve effective electrical isolation and phase change function integration between the structures; the background vacuum of the chamber is controlled to be better than The working gas flow rate is 2-3 mtorr, the sputtering power is 80-120W, and the sputtering is carried out at room temperature. The thickness of the deposition is controlled by controlling the deposition time. Finally, the gel is degelded to obtain the insulating layer (5) and the chalcogenide phase change material layer (6). Step 2.6: A via structure (8) is formed at a specified position on the substrate (1), and a continuous metal conductive structure is formed inside the via structure (8) to ensure the conductive connection between the back electrode structure (7) and the front electrode structure (4). The back electrode structure (7) is patterned in the back area of ​​the substrate (1), and the back electrode structure (7) is formed by copper plating process to realize the synchronous electrical control of the array unit.

6. A method for synchronously controlling the crystallization state of an array-type chalcogenide phase change material, characterized in that, Based on the array-type chalcogenide phase change material electrically controlled structure according to any one of claims 1-3, the synchronous crystallization and amorphization regulation of the chalcogenide phase change material is achieved by applying a controllable electrical pulse signal to the array, including the following steps: First, the electrical control structure of the chalcogenide phase change material is used as the basic unit, and the substrate (1) is repeatedly arranged to form an array structure; the array contains M×N repeated electrical control units; the electrode structures of each electrical control unit are connected in series and parallel through the back electrode structure (7) and the through hole structure (8) to form an overall controllable array electrode network, and realize the electrical path of multi-unit synchronous drive. The second step is to apply an electrical pulse signal through the back electrode structure (7) to achieve phase change control after the array structure is constructed. When a millisecond-level pulse voltage is applied, the chalcogenide phase change material in the array electrode network changes from amorphous to crystalline. When a nanosecond-level pulse voltage is applied, the material changes from crystalline to amorphous.

7. The method for synchronously controlling the crystallization state of an array-type chalcogenide phase change material according to claim 6, characterized in that, In the first step, each electronic control unit is arranged at equal intervals in space, with the unit spacing set to 1cm.

8. The method for synchronously controlling the crystallization state of an array-type chalcogenide phase change material according to claim 6, characterized in that, In the second step, the voltage range of the millisecond-level pulse voltage is 5×(M+M / 5)V to 9×(M+M / 5)V, and the pulse width is 100–500ms.

9. The method for synchronously controlling the crystallization state of an array-type chalcogenide phase change material according to claim 6, characterized in that, In the second step, the voltage range of the nanosecond-level pulse voltage is 15×(M+M / 5)V to 25×(M+M / 5)V, and the pulse width is 100–1000ns.

Images