Operation system and operation method with multi-order thermometer coding

Abstract

The invention provides an operation system and an operation method with multi-order thermometer coding. The computing system includes a memory and a search encoder. A memory includes: a plurality of memory strings, each memory string coupled to a match line and a source line, the match line coupled to a sense amplifier, and each memory string including a plurality of series devices, each series device having and responsive to a configuration state and a corresponding control input, the configuration state being one of three or more mutually exclusive state values; and a plurality of word lines, each word line coupled to a corresponding one of the plurality of corresponding control inputs of the plurality of series devices. The search encoder is used for receiving a search and driving a plurality of word lines according to the search code. Each memory string is configured to couple a match line and a source line via an impedance, the impedance being responsive to an amount of match between a plurality of configuration states of the memory strings and a plurality of corresponding control inputs of the plurality of series devices, and the sense amplifier is configured to generate a corresponding indication of the amount of match, the corresponding indication being indicated by the impedance.

Description

Technical Field

[0001] The encoding technique of In-Memory Approximate Searching (IMAS) of this invention can be implemented using NAND memory (e.g., three-dimensional NAND memory) and can be applied to big data and / or artificial intelligence (AI) processing. Background Technology

[0002] The growth of big data and AI technologies (such as AI hardware accelerators) has increased the importance of searching, comparing, and / or ranking data. In traditional systems, ternary content-addressable memory (TCAM) technology is used to achieve concurrent searching.

[0003] Traditional TCAM technology is implemented using static random access memory (SRAM) technology, which results in relatively low memory density (such as using 16 transistors to form a single TCAM cell) and relatively high power consumption.

[0004] Recently proposed TCAM technology can be implemented using non-volatile memory technologies, such as two-transistor-two-resistor (2T2R) and two-ferroelectric field-effect transistor (2FeFET) technologies. However, TCAM technology implemented with non-volatile technologies requires pairs of memory cells for a single TCAM cell (or pairs of memory cells to implement a search bit or a data bit), thus limiting the efficiency of searching and data storage.

[0005] Examples of techniques for performing exact and approximate matching operations using NAND flash memory-based in-memory search (IMS) are described in "In-Memory-Searching Architecture Based on 3D-NAND Technology with Ultra-high Parallelism" published by PH Tseng et al. in 2020 and "In-Memory Approximate Computing Architecture Based on 3D-NAND Flash Memories" published in 2022.

[0006] However, more efficient search, comparison, and / or ranking, such as technologies related to big data and / or AI processing, require additional technologies to achieve. Summary of the Invention

[0007] A system having one or more computers can be used to perform specific operations or actions by means of software, firmware, hardware, or a combination thereof installed in the system. In operation, this software, firmware, hardware, or combination thereof causes the system to perform actions. One or more computer programs are used to perform specific operations or actions by containing instructions that, when executed by a data processing device, cause that device to perform the actions.

[0008] A system having one or more computers can be used to perform specific operations, actions, and / or functions through software, firmware, hardware, or combinations thereof installed in the system. In operation, this software, firmware, hardware, or combination thereof causes the system to perform these operations, actions, and / or functions. One or more computer programs are used to perform specific operations, actions, and / or functions by including instructions that, when executed by a data processing device, cause the device to perform these operations, actions, and / or functions. One embodiment includes a computing system comprising a memory that selectively includes a plurality of memory strings and a plurality of word lines. Each memory string is coupled to a match line and a source line, the match line being coupled to a sense amplifier, and each memory string selectively includes a plurality of serially connected devices, each serially connected device having and responding to a configuration state and a corresponding control input, the configuration state being one of three or more mutually exclusive state values. Each word line is coupled to a corresponding one of the plurality of corresponding control inputs. This system also includes a search encoder for receiving a search and driving multiple word lines according to a search code, wherein each memory string is used to impedance-coupled a matching line and a source line, the impedance responding to a matching amount between multiple configuration states of the memory string and multiple corresponding control inputs of multiple series-connected devices, and a sense amplifier is used to generate a corresponding indication of the matching amount, the corresponding indication being indicated by the impedance. Other embodiments include corresponding computer systems, devices, and computer programs recorded in one or more computer storage devices, each for performing the actions of the system.

[0009] The implementation selectively includes one or more of the following features. In the computing system, the search code includes a multi-level thermometer search code. The multi-level thermometer search code uses multiple numbers, each number having a corresponding numeric value, the corresponding numeric value being one of N mutually exclusive numeric values, and there are N mutually exclusive state values, where N is an integer greater than 2. Multiple word lines operate in pairs according to the multi-level thermometer search code, and multiple configuration states are managed in pairs according to the multi-level thermometer feature code. A matching impedance is found in response to an impedance detection, and a corresponding indication of the matching amount indicated by the impedance is a matching detection indication. Multiple series devices selectively include multiple series floating-gate transistors, each configuration state corresponding to a corresponding threshold voltage, the multiple series floating-gate transistors being operated according to the corresponding threshold voltage, and each corresponding control input being coupled to one or more corresponding gates of the multiple series floating-gate transistors. Implementations of the described techniques selectively include hardware, methods, or processes, or computer software in a computer-accessible medium.

[0010] One embodiment includes a computational method comprising: receiving a search request, wherein the search request is encoded according to a thermometer code having a plurality of search digits, the plurality of search digits representing one of more than two dissimilar values; performing a determination in response to the search request, the determination comprising determining whether a memory array having a plurality of in-memory approximation search (IMAS) units has stored a feature corresponding to the search request in a subset of the plurality of IMAS units, each IMAS unit in the subset storing a corresponding digit of the stored feature, each corresponding digit representing one of more than two dissimilar values; and indicating a result of the determination. Other embodiments include corresponding computer systems, apparatuses, and computer programs recorded in one or more computer storage devices, each for performing actions of the system.

[0011] The implementation selectively includes one or more of the following features. In the operation method, each IMAS cell selectively includes a pair of multiple floating-gate transistors connected in series, each floating-gate transistor operating according to more than two dissimilar threshold voltages, and the determination selectively includes: applying multiple word line voltages to multiple control gates of the multiple floating-gate transistors according to the more than two dissimilar threshold voltages. The search request is an encoded search request, and the operation method selectively includes: receiving an unencoded search request and generating an encoded search request based on the unencoded search request. The result of the determination selectively includes: indicating one of the following two: (a) a match between the search request and a stored feature that matches the search request; and (b) a mismatch between the search request and any of the features stored in the memory array. The result of the determination selectively includes: indicating an approximate match between the search request and a stored feature that matches the search request. The multiple IMAS cells correspond to at least one of a multi-level cell (MLC) flash memory technology and a tri-level cell (TLC) flash memory technology. The described implementation of the technology may selectively include hardware, methods or processes, or computer software in a computer-accessible medium.

[0012] One embodiment includes a computing system comprising interface circuitry, a plurality of memory strings, a plurality of sense amplifiers, and a priority encoder circuit. The interface circuitry enables a host agent to provide a search and receive one or more search results. Each memory string receives a plurality of word lines corresponding to a set, the plurality of word lines having a plurality of voltages determined in response to a search, and the plurality of voltages being selected from more than three word line voltage values. Each sense amplifier is coupled to a corresponding one of the plurality of memory strings. The priority encoder circuitry receives a plurality of match indications from the plurality of sense amplifiers. The plurality of sense amplifiers perform a plurality of determinations on a plurality of pairings between feature information stored in the plurality of memory strings coupled to the plurality of sense amplifiers and the plurality of word lines received by the plurality of memory strings coupled to the plurality of sense amplifiers, to determine whether a match does not exist and whether at least one match exists. The priority encoder circuitry indicates at least a portion of one or more results as the highest priority match among any matches identified by the plurality of sense amplifiers based on the plurality of determinations from the plurality of sense amplifiers. Other embodiments include corresponding computer systems, apparatuses, and computer programs recorded in one or more computer storage devices, each for performing actions of the system.

[0013] The implementation selectively includes one or more of the following features. The computing system selectively includes a multi-level thermometer search encoder for determining multiple word line voltages in response to a search. The computing system selectively includes a host agent. A priority encoder circuit is used to indicate at least another portion of one or more results as the second highest priority match among any matches identified by the multiple sense amplifiers, based on multiple decisions of the multiple sense amplifiers. Feature information is stored in multiple memory strings by configuring multiple threshold voltages of multiple floating-gate transistors of multiple memory strings according to multiple encoding results of the multi-level thermometer feature encoder. A feature code is used to encode at least a portion of the feature information, and a search code is used to encode at least a portion of the search. The feature code is a multi-level thermometer code compatible with multiple memory strings operating according to multiple threshold voltages, the multiple threshold voltages being set according to more than two threshold voltages. The computing system is part of a single-chip system. Implementations of the described techniques selectively include hardware, methods, or processes, or computer software in a computer-accessible medium. Attached Figure Description

[0014] To make the above and other objects, features, advantages and embodiments of the present invention more apparent and understandable, the accompanying drawings are described below:

[0015] Figures 1A to 1CVarious embodiments of example 3D (search) engines are shown, such as a NAND-based 3D (search) engine incorporating multi-level thermometer encoding for multi-bit cell NAND memory search technology.

[0016] Figures 2A to 2E Together, they demonstrate an example of a multi-level thermometer encoding using a 3D (search) engine employing Multi-Level Cell (MLC) technology;

[0017] Figure 3 The example shows a basic two-dimensional (search) engine for MLC;

[0018] Figure 4 This demonstrates a usage example of a 3D (search) engine using MLC technology;

[0019] Figures 5A to 5E Together, they demonstrate an example of multi-level thermometer encoding using a 3D (search) engine employing Tri-Level Cell (TLC) technology;

[0020] Figure 6 This example demonstrates the basic two-dimensional (search) engine of TLC.

[0021] Figure 7 This demonstrates a usage example of a 3D (search) engine using TLC technology;

[0022] Figure 8 The example operation flow of the 3D (search) engine is shown;

[0023] Figure 9 An instance 3D engine device containing an instance 3D engine apparatus is shown;

[0024] Figure 10 An example hardware system with a 3D (search) engine is shown; and

[0025] Figures 11A to 11C Each example illustrates a corresponding instance of a multi-level thermometer encoding that performs storage and searching of multi-bit NAND feature memory.

[0026] Explanation of reference numerals in the attached figures:

[0027] 100: Word line 0_0

[0028] 109: Character line 0_511

[0029] 119: Word line 1_511

[0030] 129: Word line 2_511

[0031] 140: Bit line_0

[0032] 148: Bitline_128K-2

[0033] 149: Bitline_128K-1

[0034] 150: 2D Engine_0

[0035] 158: 2D Engine_128K-2

[0036] 159: 2D Engine_128K-1

[0037] 160: Grounding selection line 0

[0038] 169: Grounding Selection Line 511

[0039] 170: Serial select line_0

[0040] 179: Serial select line 511

[0041] 180: Word line 126_0

[0042] 190: Word line 127_0

[0043] 200A~200C: Table

[0044] 200D, 200E: Tables / Graphics

[0045] 201: Overdrive quantity 1_OD / Stored characteristics

[0046] 202: Overdrive quantity 2_OD / search input

[0047] 203A, 203B: Overdrive quantity 3_OD

[0048] 206: Overdrive quantity 6_OD

[0049] 300: 2D Engine_0

[0050] 310: Feature 0 "15"

[0051] 311: Feature 1 "8"

[0052] 318: Feature 8 "318"

[0053] 319: Feature 9 "319"

[0054] 320~324: IMAS Data Units

[0055] 330: Memory string 0

[0056] 331: Memory string 1

[0057] 338: Memory string 510

[0058] 339: Memory string 511

[0059] 340: Bitline

[0060] 350: Common Source Line

[0061] 360: Series current

[0062] 398: Sensing Amplifier

[0063] 399: Sensor Output

[0064] 411: Database 1 Feature 1

[0065] 419: Database 4 Features 1

[0066] 451: Database 1 Feature 501

[0067] 459: Database 4 Features 501

[0068] 500A~500C, 500E: Table

[0069] 500D: Tables / Graphics

[0070] 501: Overdrive 1_OD

[0071] 503: Overdrive 3_OD

[0072] 507A, 507B: Overdrive Quantity 7_OD

[0073] 514: Overdrive quantity 14_OD

[0074] 551: Storage characteristics

[0075] 552: Search input

[0076] 600: 2D Engine_0

[0077] 610: Feature 0 "15"

[0078] 611: Feature 1 "11"

[0079] 618: Feature 8 [2]

[0080] 619: Feature 9 "0"

[0081] 620, 621: IMAS Data Units

[0082] 630: Memory string 0

[0083] 631: Memory String 1

[0084] 638: Memory String 510

[0085] 639: Memory string 511

[0086] 640: Bit line

[0087] 650: Common Source Line

[0088] 660: Series current

[0089] 698: Sensing Amplifier

[0090] 699: Sensor Output

[0091] 711: Database 1 Feature 1

[0092] 719: Database 24 Features 1

[0093] 751: Database 1 Feature 501

[0094] 759: Database 24 Features 501

[0095] 800: Engine Process

[0096] 801: Feature Selection and Search Encoding

[0097] 802: Programmatic Features

[0098] 803: Encoding Search

[0099] 804: Driver word line

[0100] 805: Sensing bit line

[0101] 806: Priority coding pairing

[0102] 807: Provide Results

[0103] 940: 3D Engine Equipment

[0104] 941: Device Interface

[0105] 942: Host / Bus Coupling

[0106] 950: 3D Engine Unit

[0107] 951: Controller

[0108] 953: Engine Interface

[0109] 954: Analog Source

[0110] 1000: 3D Engine System

[0111] 1010: Central Processing Unit (CPU)

[0112] 1020: Graphics Processing Unit (GPU)

[0113] 1030: Random Access Read / Write Memory (RAM)

[0114] 1050: Solid State Drive (SSD)

[0115] 1060: Hard Disk Drive (HDD)

[0116] 1070: Input / Output (I / O)

[0117] 1080: Bus / Interface

[0118] 9000: 3D Engine

[0119] 9001: Features

[0120] 9002: Search

[0121] 9003: Bit Line Encoder

[0122] 9004: Feature Input

[0123] 9005: Word Line Encoder

[0124] 9006: Search input

[0125] 9007: Sensing Amplifier

[0126] 9008: Page buffer, cache, priority encoder

[0127] 9009: Output matching results

[0128] 9010: Feature Thermometer Encoder

[0129] 9011: Feature Coding

[0130] 9020: Search Thermometer Encoder

[0131] 9021: Search Code

[0132] 9030: Memory String

[0133] 9040: Matching line

[0134] 9050: 2D Engine

[0135] 9060: Word Line

[0136] 9099: Result

[0137] 9900: Storage characteristics

[0138] FG, FG': Floating gate transistor

[0139] GSL0~GSL511: Grounding Selection Line

[0140] SSL0~SSL511: Serial select line

[0141] VH1~VH8: Voltage

[0142] Vt1~Vt8: Voltage

[0143] WL,WL': Word lines

[0144] WL0_0~WL127_0: Word lines

[0145] WL0_1~WL127_1: Word lines

[0146] WL0_510~WL127_510: Word lines

[0147] WL0_511~WL127_511: Word lines

[0148] X, Y, Z: Dimensions Detailed Implementation

[0149] This invention refers to Figures 1A to 1C , Figures 2A to 2E , Figure 3 , Figure 4 , Figures 5A to 5E , Figures 6 to 10 and Figures 11A to 11C A detailed description of technologies related to the architecture of three-dimensional (3D) search engines is provided, such as the use of multi-level thermometer encoding for multi-bit cell NAND memory technology. In some cases, using multi-level thermometer encoding for multi-bit cell NAND memory technology can improve the efficiency of NAND arrays (e.g., for big data applications, such as large database storage) by reducing the number of devices connected in series in the NAND cells used for storing and searching quantized data.

[0150] Multi-level thermometer encoding can be used to search for approximate matches between stored features. The best match (e.g., high similarity) has the highest memory string current (e.g., lowest impedance). The worst match (e.g., low similarity) has the lowest memory string current (e.g., highest impedance). The number of digits indicating a match (or mismatch) can be determined by measuring the current and / or impedance of the memory string.

[0151] This invention describes one or more flowcharts. The processes described in the flowcharts can be implemented and / or directly controlled using processors, dedicated logic hardware (including field-programmable integrated circuits), and various combinations thereof, wherein the processor is programmed using a computer program stored in memory accessible to the computer system, and this computer program can be executed by the processor. Various actions are composable, can be executed in parallel, and / or can be executed in different orders without affecting the processing results. In some examples, rearranged actions only achieve the same result if certain additional changes are performed. In other examples, rearranged actions only achieve the same result if specific conditions are met. Furthermore, for clarity, some flowcharts in this invention omit specific actions that are unnecessary for understanding the disclosed technology. Various additional actions can be performed before, after, and / or between the disclosed actions.

[0152] The following are examples of acronyms, symbols, and abbreviations used in this instruction manual.

[0153] An example of a number system is a base-N number system. In a base-N number system, each digit used can represent one of N mutually exclusive states, such as by quantizing it to one of N corresponding values. As a specific example, in a base-2 number system, a binary digit (or simply "bit") can represent either of two mutually exclusive states (e.g., one of "0" or "1"), which is quantized to one of two corresponding values. As another specific example, in a base-4 number system, a quaternary digit can represent any of four mutually exclusive states (e.g., one of "0", "1", "2", or "3"), which is quantized to one of four corresponding values. Other specific examples include a base-8 number system, which uses octal digits quantized to one of eight values, and a base-16 number system, which uses hexadecimal digits quantized to one of sixteen values.

[0154] In one instance of encoding, the encoding is unary, such as using a code length one greater than the value of a natural number to represent this natural number. In another instance of unary encoding, the unary encoding is a single-order thermometer code. In one instance, a single-order thermometer code is one or more "0" digits followed by one or more "1" digits. For example, "3" can be represented by sixteen digits, consisting of thirteen "0" digits followed by three "1" digits, such as "0000_0000_0000_0111" (for readability, every four bits in the sixteen digits are separated by an underscore "_" character). In another instance, "6" can be represented by sixteen digits, consisting of ten "0" digits followed by six "1" digits, such as "0000_0000_0011_1111".

[0155] Compared to the single-level thermometer coding described above, multi-level thermometer coding allows for more variations. Besides "0" and "1", multi-level thermometer coding can use additional numeric values, such as "2" and "3", resulting in four mutually exclusive numeric values ​​"0" to "3". For example, "3" can be represented by five digits: two "0"s followed by three "1"s, such as "00111". In another example, "6" can be represented by five digits: one "2" followed by four "1"s, such as "21111". In yet another example of multi-level thermometer coding, in addition to the numeric values ​​"0" to "3", multi-level thermometer coding can use additional numeric values, such as numeric values ​​"4" to "7". For example, "3" can be represented by two digits: one "2" followed by one "1", such as "21". In another example, "6" can be represented by two "3"s, such as "33". In the context of this invention, single-stage thermometer coding and / or multi-stage thermometer coding are referred to as extended coding.

[0156] In some cases, the sum of the digits in a multi-level thermometer code indicates the corresponding value, allowing the stored digits and / or search digits to be rearranged while retaining the same corresponding value. For example, the sum of the digits in the multi-level thermometer code "00111" is 3, corresponding to the encoded value "3". Therefore, the alternative multi-level code for the value "3" is "01110". In another instance, the sum of the digits in the multi-level thermometer code "21" is 3, corresponding to the encoded value "3".

[0157] An example of a memory device is an element that can store information indicating one of at least two mutually exclusive states of the memory device. These states can be set by programming the memory device (e.g., setting it to a configuration state) and can be read by activating a control input to the memory device. In some types of memory devices (e.g., floating-gate memory devices), programming is achieved by configuring a threshold voltage of the memory device. Exemplary configurations are achieved by programming the memory device (e.g., setting it to "0", "1", "2", "3" or other suitable values), also referred to as storing values ​​(e.g., "0", "1", "2", "3" or other suitable values).

[0158] The characteristics of memory devices can be summarized based on how much information each device can represent (such as through mutually exclusive states that can be quantized into corresponding values). For example, a memory device using Single-Level Cell (SLC) technology (referred to as, for example, an SLC memory device) can represent either of two mutually exclusive states, where the state is quantized into one of two corresponding values, and thus can be used to represent a single base-2 number. In another instance, a memory device using Multi-Level Cell (MLC) technology (referred to as, for example, an MLC memory device) can represent any of four mutually exclusive states, where the state is quantized into one of four corresponding values, and thus can be used to represent a single base-4 number. Other examples include memory devices that use a three-level cell (TLC) memory technology that uses eight values ​​to represent a single base-8 number, memory devices that use a four-level cell (QLC) memory technology that uses sixteen values ​​to represent a single base-16 number, and memories that enable the memory device to represent any other multiple NAND memory states that are more than two mutex states.

[0159] An example of NAND memory is non-AND memory, such as a memory string formed by serially connected devices. An example of a memory string is multiple memory devices connected in series. An example of an In-Memory Approximate Searching (IMAS) cell is a pair of memory devices connected in series, such as a pair of memory devices in a memory string. An example of a memory string terminates as a bit line (BL), such as coupled to a sense amplifier (SA). Another example of a memory string terminates as a common source line (CSL). An IMAS cell can store a characteristic digit and compare the stored characteristic digit with a received search input digit. An example of an SA is a circuit that can convert a relatively small analog signal (e.g., current or voltage) or its variation into a full-swing digital signal.

[0160] The concept of a 3D (search) engine is explained below.

[0161] This invention provides a 3D search engine architecture that can be implemented using 3D NAND memory, enabling high-performance searching, comparison, and / or ranking, such as searching, comparison, and / or ranking related to big data and / or artificial intelligence (AI) processing. This architecture offers low latency, high resolution, high content density, multi-functionality, and robust reliability. It is suitable for various fields, such as big data search, AI hardware accelerators and / or classifiers, approximate computation, associative memory, few-shot learning, solid-state drive (SSD) data management, DNA matching, data filtering, high-dimensional operations, and other applications that benefit from IMAS to handle long search terms and large data volumes. Because this architecture supports high-performance comparison and ranking, similar to searching, the term "search" is used as an additional annotation in both "3D (search) engine" and "2D (search) engine".

[0162] The 3D (search) engine receives a search request applied to the word lines (WL) of the non-volatile memory array. For each digit in the search information, the 3D (search) engine uses two word lines. The 3D (search) engine uses the corresponding bit lines of the non-volatile memory array as corresponding matching lines for the search. The corresponding memory strings of the non-volatile memory array (e.g., NAND memory strings) can be used to store, for example, corresponding data words corresponding to the feature to be searched. Multiple corresponding memory strings are coupled in parallel to their corresponding common bit lines.

[0163] In some use cases, the read latency of a 3D (search) engine can be reduced by operating multiple blocks in parallel (at the potential cost of larger instantaneous current). Parallel operation is performed by switching multiple start controls (e.g., string select lines (SSL)).

[0164] The 3D (Search) engine is specifically suited for big data and / or AI, such as for various search, comparison, and / or ranking operations. The host agent manages the storage of features in the 3D (Search) engine and provides searches to the 3D (Search) engine to determine matches against the stored features. Match indications are sent back to the host agent.

[0165] A 3D search engine uses multiple 2D search engines to perform parallel operations of those 2D search engines, and the 3D search engine can be referred to as a "search cube" or simply a "cube." A 3D search engine can perform multiple searches simultaneously using multiple search parameters with multiple stored features. In some use cases, parallel search is performed per 2D search engine. For example, each 2D search engine is responsible for performing a unique search operation. In some use cases, parallel search is performed within a specific 2D search engine. For example, different parts of a specific 2D search engine are responsible for performing unique search operations. In some use cases, parallel search is performed in parallel between multiple 2D search engines and within one or more 2D search engines. Matching indications between search parameters and stored features are provided by the 2D search engines for processing. This process includes, for example, determining the overall similarity between search parameters and stored features, and / or identifying one or more stored features that are similar to the search parameters (e.g., via buffers, caches, and / or priority encoding (circuits)).

[0166] Each 2D search engine used by the 3D search engine contains multiple memory devices to detect whether matches exist between search information provided to the 2D search engine, as determined based on search parameters and features stored in the 2D search engine. The 2D search engine generates a match indication in response to the detection and provides the match indication for buffering, caching, priority encoding, and output for use in the system. Features are stored according to feature encoding. Search information is encoded according to search encoding. Examples of features and storage encoding include multi-level thermometer encoding, such as that used with multi-bit NAND memory employing technologies such as MLC, TLC, QLC, or any other multi-bit NAND memory, enabling the memory device to represent more than two mutually exclusive states. The 3D search engine can selectively perform exact and approximate matches, such as based on stored and / or feature encoding. An exact match corresponds to the pairing of all numbers, such as matching all numbers of the search parameters to all numbers of the values ​​stored in the memory string. Approximate matching corresponds to a pair of fewer than all the numbers, such as a pair of all the numbers except one, a pair of all the numbers except two, or alternatively, a pair of partial numbers, such as a pair of 90% of the numbers (e.g., a pair of nine out of ten numbers).

[0167] The control agent of the 3D (search) engine selectively operates the 2D (search) engines in parallel. This parallel operation enables parallel matching decisions for the same set of search information provided to the concurrently operating 2D (search) engines. Each 2D (search) engine generates a matching indication based on the search information and stored features within the 2D (search) engine. The priority encoder of the 3D (search) engine processes the matching indications to determine corresponding matches between and / or within one or more 2D (search) engines.

[0168] The 2D (search) engine has multiple memory strings that can operate in parallel. These memory strings are connected in parallel between the matching and source lines of the 2D (search) engine. Each memory string can be used to store one or more corresponding features, each feature having one or more numbers, and stored according to the selected feature encoding. Each memory string can be used to compare one or more (encoded) search inputs with one or more (encoded) features stored in the memory string. Before performing a search, the control agent programs the features in pairs into the memory devices according to the selected feature encoding. Pair programming is performed using a pair of cascaded memory devices (e.g., IMAS units) for each number of the feature. For the search, the control agent drives the control inputs in pairs according to the search information and the selected search encoding. The search information includes the search mode and optional parameters. The search results are provided as multiple matching indications, and then optionally buffered, cached, and / or prioritized.

[0169] The implementation method of the 3D (search) engine example is explained below.

[0170] One example of a 3D (search) engine implementation is the use of floating-gate transistors as memory devices. Floating-gate transistors are exemplified as NAND serial memory strings. Therefore, a 3D (search) engine is sometimes referred to as a 3D NAND search engine, or more broadly as a search system or computing system. The memory string is exemplified as being sequentially and parallelly distributed between a common bit line and a common source line. Memory strings coupled to the common bit line are sometimes referred to as 2D (search) engines, or more broadly as memory.

[0171] The floating-gate transistor is programmed to store digital features based on multiple mutually exclusive states, such as two mutually exclusive states (SLC technology), four mutually exclusive states (MLC technology), eight mutually exclusive states (TLC technology), or sixteen mutually exclusive states (QLC technology). This programming operation configures the threshold voltage of the floating-gate transistor. The programmed floating-gate transistor responds conditionally (e.g., through impedance changes) to indicate a match between the stored features and a search provided on a word line coupled to the control gate of the floating-gate transistor.

[0172] Word lines can be used to provide one or more search inputs for searching within stored features programmed into a memory string, such as a floating-gate transistor. Each memory string can be used to compare one or more search values ​​provided by word lines coupled to the memory string with one or more stored features programmed into the memory string.

[0173] Each common bit line can serve as a match line to indicate zero, one, or more matches between one or more search inputs provided to each memory string coupled to the common bit line and the stored features of the corresponding memory string.

[0174] The matching indication provided by the shared bitline is priority-encoded (e.g., according to a predetermined priority scheme) and indicates one or more matching results to one or more other agents in the system. In this way, multiple 2D (search) results are combined into one or more 3D (search) results.

[0175] Figure 1A , Figure 1B and Figure 1C Various embodiments of example 3D (search) engines are shown, such as the NAND-based 3D (search) engine, which incorporates multi-level thermometer coding for multi-bit cell NAND memory search technology, such as 3D Engine 9000.

[0176] More specifically, Figure 1A An overview of the instance 3D (search) engine is shown. Figure 1B Shown in different details Figure 1A Some embodiments of the instance 3D (search) engine, and Figure 1C Showing more details Figure 1A Some implementations of the instance 3D (search) engine.

[0177] Refer again Figure 1A 3D Engine 9000 contains multiple (e.g., 128,000) identical (or substantially similar) 2D (search) engines, such as 2D Engine 9050. For clarity, any details of all the other 2D (search) engines except for one are omitted.

[0178] Each 2D (search) engine in the 2D engine 9050 has multiple memory strings (represented by memory string 9030) for storing feature information provided to the 3D engine 9000. The stored features are represented by stored features 9900. The memory string 9030 is also used to determine the match between the stored feature information and the search information provided to the 3D engine 9000 by conditionally influencing the matching line corresponding to the matching line 9040. For example, conditionally influencing the match based on a portion of the search input and a portion of the stored features releases the precharge value of the matching line.

[0179] Feature thermometer encoder 9010 receives feature 9001 (e.g., provided by a host agent) provided to 3D engine 9000. In response, feature thermometer encoder 9010 generates feature code 9011 according to selected multi-level thermometer feature encoding. Bitline encoder 9003 receives feature code 9011. In response, bitline encoder 9003 generates feature input 9004 via selected bitline encoding, suitable for application to a memory string of 2D (search) engine, for storage as part of stored feature 9900. In some cases, feature thermometer encoder 9010 and bitline encoder 9003 are jointly implemented as and / or referred to as feature encoder. In some implementations, bitline encoder 9003 is omitted, and feature code 9011 is suitable for direct application to the memory string of 2D (search) engine. Each memory string of each 2D (search) engine can store unique features, so feature input 9004 is represented as having a unique coupling with each 2D (search) engine of 2D engine 9050. This unique coupling can be achieved through independent signals transmitted to each 2D (search) engine, a shared set of time-division multiplexing signals (e.g., a bus), or any other suitable communication mechanism that allows each memory string of each 2D (search) engine to store unique features.

[0180] Search thermometer encoder 9020 receives a search 9002 (e.g., provided by a host agent) provided to 3D engine 9000. In response, search thermometer encoder 9020 generates search code 9021 according to a selected multi-level thermometer search code. Word line encoder 9005 receives search code 9021. In response, word line encoder 9005 generates a search input 9006 suitable for application to a memory string in a 2D (search) engine via a selected word line code to determine a match (if any) between search input 9006 and stored feature 9900. In some implementations, search thermometer encoder 9020 and word line encoder 9005 are jointly implemented as and / or referred to as search encoders. In some implementations, digital encoding is used for search code 9021. In some implementations, word line encoder 9005 converts search code 9021 into a corresponding analog word line voltage pair, such as a bias level, like a search bias level. Each 2D (search) engine receives the same search information, therefore the search input 9006 is represented as having parallel coupling with each 2D (search) engine. This configuration contrasts with the unique coupling used to distribute feature information for storage. Parallel coupling can be achieved through independent buffered signals transmitted to each 2D (search) engine, a set of coupling signals (e.g., a bus), or any other suitable communication mechanism that allows each 2D (search) engine to receive the same search information. Each memory device in each memory string of a particular 2D (search) engine receives unique word lines (provided via search input 9006) as samples of the word lines, such as... Figure 1A The concept is illustrated as word line 9060. Although each 2D (search) engine receives the same search information, each memory string within a 2D (search) engine receives unique search information.

[0181] In response to search input 9006 and based on the stored features 9900 of each 2D (search) engine, each 2D (search) engine bit line (e.g., each matching line 9040) provides corresponding matching information to a corresponding sense amplifier 9007 to determine a matching indication for each 2D (search) engine (or, the source lines of the memory string provide matching information to the sense amplifier). The matching indication is then processed by a page buffer, cache, and priority encoder 9008 and provided as an output matching result 9009, and transmitted as a result 9099 to, for example, a host agent.

[0182] Now refer to Figure 1B , Figure 1B Explained in more detail Figure 1A Some implementations of the instance 3D (search) engine. Figure 1B and Figure 1A Elements with the same symbol are considered to be the same element.

[0183] Three of the 2D (search) engines (e.g., 2D (search) engine_0 150, 2D (search) engine_128K-2158, and 2D (search) engine_128K-1 159) are illustrated as having memory strings that can be operated in parallel. Figure 1A In summary, the 3D engine 9000 includes sense amplifier circuitry. Each 2D (search) engine can have one sense amplifier, collectively referred to as sense amplifier 9007. For clarity, three sense amplifiers are illustrated, each coupled to the corresponding illustrated 2D (search) engine. The 3D engine 9000 also includes post-sensing circuitry, collectively referred to as page buffer, cache, and priority encoder 9008, for processing the output of each of the sense amplifiers 9007 to produce the matching search result as output matching result 9009.

[0184] Each 2D (search) engine is shown in both X and Z dimensions. In some variations of integrated circuits built using planar technology, the layers of the integrated circuit are constructed in the Z dimension. The 2D (search) engines are arranged in the Y dimension.

[0185] Next refer to Figure 1C , Figure 1C Explained in more detail Figure 1A and Figure 1B Some implementations of the instance 3D (search) engine. Figure 1C , Figure 1B and Figure 1A Elements with the same symbol are identical elements.

[0186] Each 2D (search) engine contains corresponding bit lines. Specifically, 2D (search) engine_0 150, 2D (search) engine_128K-2 158, and 2D (search) engine_128K-1 159 contain bit lines_0 140,_128K-2 148, and_128K-1 149, respectively. It should be noted that in... Figure 1A In this context, the bit lines are collectively referred to as match lines 9040 because each bit line can be used to indicate a match between search information and stored information. Each 2D (search) engine contains multiple memory strings (e.g., 512 memory strings). For clarity, four memory strings are shown in each 2D (search) engine. Each memory string is selectively coupled to the bit lines of the 2D (search) engine via transistors controlled by corresponding String Select Line (SSL) inputs. The transistors and SSL inputs together selectively enable (disable) the memory string based on the activation (deactivation) of the SSL input. Each SSL input is coupled to one memory string of each 2D (search) engine. Therefore, each SSL input can selectively enable (disable) one block of memory string based on the activation (deactivation) status of the SSL input.

[0187] For example, string select line 0 170 is enabled to selectively couple the first memory string of 2D (search) engine_0 150 to bit line_0 140 via corresponding transistors, the first memory string of 2D (search) engine_128K-2 158 to bit line_128K-2 148, and the first memory string of 2D (search) engine_128K-159 to bit line 128K-1 149. String select line 0 170 can also selectively couple the first memory string (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158 to the respective bit lines via corresponding transistors.

[0188] In another example, string select line 511 179 is enabled to selectively couple the 512th memory string of 2D (search) engine_0 150 to bit line_0 140 via corresponding transistors, the 512th memory string of 2D (search) engine_128K-2 158 to bit line_128K-1 148, and the 512th memory string of 2D (search) engine_128K-159 to bit line 128K-1 149. String select line 511 179 can also selectively couple the 512th memory string (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158 to the respective bit lines via corresponding transistors.

[0189] Similar to bit lines, each 2D (search) engine contains a corresponding source line (shown but not labeled for clarity). Each memory string is selectively coupled to the source line of the 2D (search) engine via a transistor controlled by the corresponding Ground Select Line (GSL) input.

[0190] Similar to bit lines, for example, ground select line 0 160 is enabled to selectively couple the first memory string of 2D (Search) Engine_0 150 to the source line of 2D (Search) Engine_0 150 via corresponding transistors, the first memory string of 2D (Search) Engine_128K-2 158 to the source line of 2D (Search) Engine_128K-2 158, and the first memory string of 2D (Search) Engine_128K-1 159 to the source line of 2D (Search) Engine_128K-1 159. Ground select line 0 160 can also selectively couple the first memory string (not shown) of 2D (Search) Engine 128K-3 between 2D (Search) Engine_0 150 and 2D (Search) Engine_128K-2 158 to the source lines therein via corresponding transistors. All source lines are connected to ground.

[0191] Similarly, in another instance, ground select line 511 169 is enabled to selectively couple the 512th memory string of 2D (Search) Engine_0 150 to the source line of 2D (Search) Engine_0 150 via the corresponding transistor, couple the 512th memory string of 2D (Search) Engine_128K-2 158 to the source line of 2D (Search) Engine_128K-2 158, and couple the 512th memory string of 2D (Search) Engine_128K-1 159 to the source line of 2D (Search) Engine_128K-1159. The ground selection line 511 169 can also selectively couple the 512th memory string (not shown) of 2D (search) engine 128K-3 between 2D (search) engine_0 150 and 2D (search) engine_128K-2 158 to the source line therein via the corresponding transistors.

[0192] The SSL inputs and GSL inputs are coupled in parallel to the corresponding transistors in the corresponding memory strings of each 2D (search) engine. Since there are 512 memory strings in each 2D (search) engine, there will be 512 SSL inputs and 512 GSL inputs. It should be noted that... Figure 1C In the diagram, for clarity, the coupling between the ground select line 0 160 and the transistor of the 2D (search) engine_128K-1 159 is omitted, although the dashed extension of the ground select line 0 160 is shown.

[0193] In 3D Engine 9000, each memory string consists of 128 floating-gate transistors of the same length (excluding the transistors that couple each memory string to the bit line and source line). In the planar integrated circuit process implementation of 3D Engine 9000, a certain number of layers are used to implement the memory strings. As the length of the memory string increases, the number of layers used to implement the memory string also increases. Therefore, doubling the length of the memory string doubles the number of layers used to implement the memory string.

[0194] Referring then to the word lines, conceptually, each 2D (search) engine is coupled to the same 2D word line array. In the X dimension, 512 rows of word lines correspond to each of the 512 memory strings. In the Z dimension, 128 columns of word lines correspond to the floating-gate transistors of each memory string. Therefore, the 2D word line array is 512 rows multiplied by 128 columns, or 512 multiplied by 128 individual word lines. Each word line is coupled to a single floating-gate transistor of a single memory string in each 2D (search) engine. It should be noted that... Figure 1C In the diagram, for clarity, the coupling between word line 0_0 100 and the floating gate transistor of the 2D (search) engine_128K-1 159 is omitted, although the dashed extension of word line 0_0 100 is shown.

[0195] For example, word line 0_0 100 is coupled to the floating-gate transistor of the first memory string of 2D (Search) Engine_0 150, the floating-gate transistor of the first memory string of 2D (Search) Engine_128K-2 158, and the floating-gate transistor of the first memory string of 2D (Search) Engine_128K-1159. Word line 0_0 100 is also coupled to the floating-gate transistor of the first memory string (not shown) in each of the 2D (Search) Engines 128K-3 between 2D (Search) Engine_0 150 and 2D (Search) Engine_128K-2 158.

[0196] In another example, word line 0_511 109 is coupled to the floating-gate transistor of the 512th memory string of 2D (Search) Engine_0 150, the floating-gate transistor of the 512th memory string of 2D (Search) Engine_128K-2 158, and the floating-gate transistor of the 512th memory string of 2D (Search) Engine_128K-1 159. Word line 0_511 109 is also coupled to the floating-gate transistor of the 512th memory string (not shown) in each of the 2D (Search) Engines 128K-3 between 2D (Search) Engine_0 150 and 2D (Search) Engine_128K-2 158.

[0197] In this invention, word lines are sometimes described in 2D form using block numbers and layer numbers. Conceptually, a block exists in the Y and Z dimensions, while a layer exists in the X and Y dimensions. Conceptually, block numbers correspond to row numbers, and layer numbers correspond to column numbers.

[0198] One block corresponds to a memory string from each 2D (search) engine. In one specific instance, the memory string coupled between ground select line 511 169 and string select line 511 179 corresponds to block number 511. In another specific instance, the memory string coupled between ground select line 0 160 and string select line 0 170 corresponds to block number 0.

[0199] One layer corresponds to the floating-gate transistor for each memory string of all 2D (search) engines. In one specific instance, the floating-gate transistor coupled to word lines 0_511 109 and 0_0 100 is part of layer number 0. In another specific instance, the floating-gate transistor coupled to word line 1_511 119 is part of layer number 1. Similarly, the floating-gate transistors coupled to word lines 2_511 129, 126_0 180, and 127_0 190 are part of layers 2, 3, 126, and 127, respectively. Multiple layers correspond to multiple layers of a planar integrated circuit process, although the floating-gate transistors of one layer correspond to one or more planar integrated circuit process layers.

[0200] Therefore, word lines can be labeled as "WL", "<layer number>", and "<block number>" in the Z and X dimensions, respectively. Thus, word line 0_0 100 has a layer number of 0 and a block number of 0. Word line 0_511 109 has a layer number of 0 and a block number of 511.

[0201] Figure 1A , Figure 1B and Figure 1C An example 3D (search) engine is shown, which has a specific number of 2D (search) engines, each 2D (search) engine has a specific number of memory strings, and each memory string has a specific number of IMAS data units (each as a pair of cascaded floating gate transistors). Specifically, 3D Engine 9000 has 128,000 2D (search) engines (2D (search) engine_0 150, ..., 2D (search) engine_128K-1 159), but some variants have fewer or more 2D (search) engines. Each 2D (search) engine has 512 memory strings, but some variants have fewer or more memory strings. Each memory string has 64 IMAS data units (e.g., coupled to word line pairs (word line 0_1 and word line 1_0), ..., word line pairs (word line 126_0 and word line 27_0)), but some variants have fewer or more IMAS data units per memory string.

[0202] The example multi-level thermometer encoding resolutions include 4 bits implemented using 32 3D NAND layers, 5 bits implemented using 64 3D NAND layers, 6 bits implemented using 128 3D NAND layers, 7 bits implemented using 256 3D NAND layers, and 8 bits implemented using 512 3D NAND layers. Therefore, for these examples, the resolution increases by one bit with every doubling of the number of 3D NAND layers.

[0203] Variations of 2D (search) engines and related sense amplifier circuitry enable the sense amplifier to determine a single bit (e.g., match / no match). Variations enable the sense amplifier to determine multiple bits (e.g., coded mismatch, one match, or two or more matches). Variations enable the sense amplifier to indicate the amount of matching (e.g., similarity), such as highly similar, moderately similar, or completely dissimilar. Variations allow the sense amplifier indication to be analog rather than digital. For example, the sense amplifier output may be a monotonically increasing function based on the memory string current, which is a monotonically increasing (or decreasing) indicator of the similarity between the search input and stored features.

[0204] Some variants of 3D (search) engines can identify at most one feature (stored in a single memory string) as a search match. Some variants can identify at most multiple features (stored in multiple memory strings) as search matches simultaneously. Some variants can identify at most one 2D (search) engine simultaneously, which stores one or more features that match the search. Some variants enable the parallel identification of multiple 2D (search) engines, each storing one or more features that match the search.

[0205] Some variations of the 3D (search) engine can prioritize matching indications based on a predetermined 2D (search) engine priority order (e.g., one predetermined 2D (search) engine has the lowest priority, while another predetermined 2D (search) engine has the highest priority). Therefore, a matching indication from the predetermined highest-priority 2D (search) engine corresponds to the highest-priority match. Furthermore, a matching indication from the predetermined second-highest-priority 2D (search) engine corresponds to the second-highest-priority match. Some variations can implement priority encoding based on the number of matches (e.g., zero matches, one match, two matches, or three or more matches) between the feature numbers stored in the memory string and the corresponding search input numbers. Therefore, the highest-priority match corresponds to the maximum number of feature numbers stored in the memory string that matches the corresponding search input number, while the second-highest-priority match corresponds to the second-largest number of feature numbers stored in the memory string that matches the corresponding search input number. Some variations can implement priority encoding based on the number of matching memory strings in a particular 2D (search) engine (e.g., zero matches, one match, two matches, or three or more matches). Therefore, the highest priority match corresponds to the largest number of memory strings matched within a specific 2D (search) engine, while the second highest priority match corresponds to the second largest number of memory strings matched within a specific 2D (search) engine.

[0206] Some variants can implement priority encoding for identifying stored features that match a single match. Some variants can implement priority encoding for identifying stored features that match multiple matches. Some variants can implement priority encoding for identifying stored features that match a single "best match" (e.g., those with the highest number of stored feature numbers that match the search, and the highest number is less than the maximum stored feature length). Some variants can implement priority encoding for identifying stored features that match multiple "best matches" (e.g., sorted according to the number of stored feature numbers that match the search for each of the multiple stored features).

[0207] In various use cases (e.g., due to functionality programmed into the 2D (search) engine, the search information provided, and / or its encoding), various numbers of 2D (search) engines in the 3D (search) engine detect a match between one or more features stored in one or more memory strings of the 2D (search) engine and the search information provided to the 3D (search) engine by the 2D (search) engine.

[0208] In some use cases, zero, one, or more memory strings in the 2D (search) engine detect matches, and the sense amplifier circuit encodes the match results into multiple bits. For example, the sense amplifier circuit encodes zero memory string matches, one memory string match, two memory string matches, and more than two memory string matches into four mutually exclusive codes. Some variations can implement priority encoding based on one or more factors, such as the 2D (search) engine priority, the number of matched stored feature numbers, and the number of memory strings (e.g., features).

[0209] For example, in response to no match in any of the 2D (search) engines_0 150, ..., 2D (search) engines_128K-1 159, the sensing amplifier 9007 provides an all-zero vector to the page buffer, cache, and priority encoder 9008. In response, the page buffer, cache, and priority encoder 9008 prioritizes the all-zero vector into a binary value indicating a zero match and provides this binary value via the output match result 9009.

[0210] Continuing with this example, in response to a single memory string of the 2D (search) engine_0 150 detecting a match, the sensing amplifier 9007 provides a vector corresponding to the least significant bit (LSB) of the 2D (search) engine_0 150 being 1, while all other bits are 0. In response, the page buffer, cache, and priority encoder 9008 encode the vector into a non-zero binary value to identify a matching memory string in the 2D (search) engine_0 150.

[0211] Continuing this example, in response to multiple memory strings of 2D (Search) Engine_0 150 detecting a match, and a single memory string of 2D (Search) Engine_128K-2 158 detecting a match, the sensing amplifier 9007 provides a vector where the bit corresponding to 2D (Search) Engine_0 150 is 1, another bit corresponding to 2D (Search) Engine_128K-2 158 is 1, and all other bits are 0. In response, the page buffer, cache, and priority encoder 9008 encodes the vector into a non-zero binary value to identify the memory string of 2D (Search) Engine_128K-2 158 with the highest priority match.

[0212] In some applications, a single controller launches multiple 2D (search) engine blocks to search multiple blocks in parallel. For example, multiple SSL inputs are launched in the same search operation to search multiple blocks during the same search operation.

[0213] For example, the controller activates string selection lines _511 and _510 in the same search operation to search two blocks in parallel across 128,000 2D (search) engines (2D (search) engine_0 150, ..., 2D (search) engine_128K-2 158 and 2D (search) engine_128K-1 159). Therefore, the controller enables the 3D engine 9000 to search 2 × 128,000 blocks in parallel. Alternatively, the controller activates any two SSL inputs in the same search operation to search any two blocks in parallel. In other instances, the controller activates any 4, 6, 8, 32, 64, 128, 256, or 512 SSL inputs in the same search operation to search multiple corresponding blocks in parallel. For example, the controller activates all 512 SSL inputs in the same search operation. Therefore, the controller enables the 3D engine 9000 to search 512 blocks simultaneously, containing 512 × 128,000 memory strings. Optionally, the controller responds to a control register that specifies whether and to what extent multiple blocks are searched in parallel.

[0214] The following is an explanation of the 3D (search) engine coding.

[0215] The search, comparison, and / or sorting performed by the 3D (search) engine are based on the selected feature encoding (used to store features in the 3D (search) engine's memory string) and the selected search encoding (used for the search performed through the memory string). The feature encoding and search encoding are selected in combination because the matching performed by the memory string is done within the encoding selected for feature storage.

[0216] The instance encoding of the 3D (search) engine used for storing features and / or performing searches includes multi-level thermometer encoding, such as that applicable to MLC, TLC, QLC and / or any type of multi-bit NAND encoding, enabling the memory device to represent more than two mutually exclusive states.

[0217] The following is an explanation of the multi-level thermometer coding for 3D (search) engines.

[0218] In multi-level thermometer encoding, an N-bit binary value (feature or search) is encoded in a 2^N bit field. The encoding produces two consecutive fields. Each consecutive field consists of repeating 1s or 0s. Therefore, 2^N-1 is encoded with a leading 0 and all others 1s. The number of 1s equals the encoded value. In a special case, 0 is encoded as all zeros. Therefore, the most significant bit is always 0. Consequently, in some variations, the most significant bit is not implemented.

[0219] Figure 2A , Figure 2B , Figure 2C , Figure 2D and Figure 2E Together, they demonstrate an example of multi-level thermometer encoding using a 3D (search) engine employing multi-level cell (MLC) technology.

[0220] More specifically, Figure 2A This illustrates an example of a multi-level thermometer encoding using a 3D (search) engine with MLC technology. This encoding stores features with ten quantized values ​​from "0" to "9" and searches for features matching those values ​​from "0" to "9" within the stored features. Table 200A contains a first row with values ​​from "0" to "9", a second row with nine SLC digits for an example (single-level) SLC thermometer encoding, and a third row with three MLC digits for an example (multi-level) MLC thermometer encoding. Each digit in the MLC encoding is implemented using, for example, the corresponding MLC-based IMAS unit. In contrast, the implementation method using ten quantized values ​​for storage and searching requires nine SLC-based IMAS units and three MLC-based IMAS units.

[0221] Figure 2B It shows that according to Figure 2A The MLC encoding shown will search the input (e.g., Figure 1A The search input 9006 (in whole or in part) is mapped to the corresponding word line voltage pair (e.g., by...). Figure 1A Examples generated by the word line encoder 9005. Table 200B contains examples with search inputs from "0" to "3" (e.g., Figure 2A The first row contains the numbers of the MLC line, and the second and third rows contain the instance word line voltages (word line WL and word line WL') of the device pair in the IMAS cell. There are four word line voltages, namely voltages VH1 to VH4.

[0222] Figure 2C It shows that according to Figures 2A to 2B The stored characteristics (e.g., stored in) Figure 1A The table shows an instance mapping between the floating gate transistor pairs of the IMAS cells in the memory string 9030 and the corresponding threshold voltage pairs of the floating gate transistor pairs. Table 200C contains stored features (e.g., 0 to 3) with stored characteristics from "0" to "3". Figure 2A The first row contains the numbers of the MLC rows, and the second and third rows contain the instance threshold voltages (floating gate transistor FG and floating gate transistor FG') for storing pairs of floating gate transistors. There are four threshold voltages, from voltage Vt1 to voltage Vt4, corresponding to an instance of MLC technology.

[0223] Figure 2D It shows that according to Figures 2A to 2CThe table lists the instance threshold voltage (after stored features), word line voltage (search input), and overdrive amount. Table 200D shows specific word lines and threshold voltages, along with their associated overdrive amounts. Overdrive amount represents the similarity between the search input and the stored features. A larger overdrive amount indicates greater similarity, and a smaller overdrive amount indicates less similarity. Due to operation within the saturation current region, overdrive amounts higher than "3X" (e.g., "4X", "5X", and "6X") monotonically increase and become similar to each other. An example of "6X" overdrive is overdrive amount 6_OD 206, where the word line voltage of voltage VH4 overdrives voltage Vt1 by a relative factor of 6. An example of "3X" overdrive is overdrive amount 3_OD 203A, where the word line voltage of voltage VH4 overdrives voltage Vt4 by a relative factor of 3. Another example of "3X" overdrive is overdrive quantity 3_OD 203B, where the word line voltage of voltage VH1 overdrives voltage Vt1 with a relative factor of 3. An example of "2X" overdrive is overdrive quantity 2_OD202, where the word line voltage of voltage VH1 overdrives voltage Vt2 with a relative factor of 2. An example of "1X" overdrive is overdrive quantity 1_OD 201, where the word line voltage of voltage VH1 overdrives voltage Vt3 with a relative factor of 1.

[0224] Figure 2E It shows that according to Figures 2A to 2D The current capacity of an instance IMAS cell is based on the search input and stored features. Table 200E is organized in two dimensions, with columns corresponding to search input 202 and rows corresponding to stored features 201. Each item in Table 200E indicates the current capacity of the IMAS cell when it is configured (e.g., by programming a pair of threshold voltages) to store a specific data value (e.g., one of data "0" to "3") and searched by applying a pair of word line voltages (e.g., one of value "0" to "3"). Each item in the table indicates the programmed threshold voltage and applied word line voltage of each IMAS cell and its devices, the overdrive of each device in the IMAS cell, and the final overdrive of the IMAS cell. Since the devices in each IMAS cell are connected in series, the lowest of the two overdrive values ​​determines the final overdrive of the IMAS cell.

[0225] The following are some specific examples. The word line voltage applied to the IMAS cell corresponding to the value "0" and storing data "3" will cause a 6X overdrive in the lower device of the corresponding IMAS cell (e.g., as...). Figure 2D The overdrive amount 6_OD206 shown. The word line voltage corresponding to the value "0" and applied to the IMAS cell storing data "0" will cause a 3X overdrive in the lower device of the corresponding IMAS cell (e.g., as shown). Figure 2DThe overdrive amount shown is 3_OD 203A. The word line voltage corresponding to the value "0" and applied to the IMAS cell storing data "0" will cause a 3X overdrive in the upper device of the corresponding IMAS cell (e.g., as shown). Figure 2D The overdrive amount shown is 3_OD 203B. The word line voltage corresponding to the value "0" and applied to the IMAS cell storing data "1" will cause a 2X overdrive in the upper device of the corresponding IMAS cell (e.g., as shown). Figure 2D The overdrive amount 2_OD 202 is shown. The word line voltage corresponding to the value "0" and applied to the IMAS cell storing data "2" will cause a 1X overdrive in the upper device of the corresponding IMAS cell (e.g., as shown). Figure 2D The overdrive value 1_OD 201 is shown. Other specific examples of the final overdrive value are shown in Table 200E.

[0226] Therefore, the IMAS unit, compatible with multi-level thermometer encoding using a 3D (search) engine employing multi-level cell (MLC) technology, has a pair of cascaded floating-gate memory devices. Each memory device can operate on one of four threshold voltages (e.g., voltages VT1 to VT4). The pair of threshold voltages on which the floating-gate memory devices operate collectively represents one of four different states, each state representing a single digit in the stored feature value. Each floating-gate memory device responds to a word line, which can operate in pairs corresponding to the floating-gate memory device pairs of the IMAS unit. Each word line can be controlled by one of a plurality of control voltages, including four feature search control voltages (voltages VH1 to VH4). The word lines correspond to and operate in pairs with the floating-gate memory device pairs of the IMAS unit. The pair of control voltages controlling the word line collectively represents one of four different states, each state sequentially representing a digit in the searched feature value.

[0227] Figure 3 It shows Figure 1A and Figure 1B In some scenarios, MLC-based 2D (search) engines _0 300 (e.g., Figure 1B The implementation method and / or usage examples of Engine_0 150 are described. Multiple word lines are drawn and identified using the aforementioned "WL (word line)," "<layer number>," and "<block number>" scheme, as shown in the diagram next to WL126_0. 2D (search) Engine_0 300 contains 512 memory strings. For clarity, four memory strings (memory string 0 330, memory string 1 331, memory string 510 338, and memory string 511 339) are shown. The floating gate transistors of each memory string are arranged and operated in pairs, such as corresponding to... Figure 2CThe floating gate transistors FG and FG'. Examples of these pairs are IMAS data cells 320-324. Word lines are arranged and operated in pairs, such as those corresponding to... Figure 2B The word lines WL and WL' are defined. Each even-numbered layer word line is connected to the control gate of one of a pair of floating-gate transistors. For example, the word lines WL0_0, WL0_1, ..., WL0_510 and WL0_511 of layer 0 are coupled to the corresponding one in the pair, and the word lines WL2_0, ..., WL2_511 of layer 2 are coupled in the same way, up to the word lines WL126_0, ..., WL126_511 of layer 126. Furthermore, each odd-numbered layer word line is coupled to the control gate of the other floating-gate transistor in the pair. For example, the word lines WL1_0, WL1_1, ..., WL1_510 and WL1_511 of layer 1 are coupled to the other floating-gate transistor in the pair to which the word lines WL0_0, WL0_1, ..., WL0_510 and WL0_511 of layer 0 are coupled. Each memory string has two terminals, one for bit line coupling and one for common source line coupling. In a specific example, the "upper" terminal of memory string 511 339 is coupled to bit line 340 at the source / drain of the control transistor controlled by string select line SSL511; the "lower" terminal of string select line 511 339 is coupled to common source line 350 at the source / drain of the control transistor controlled by ground select line GSL511.

[0228] Figure 3 A specific example of the 2D (search) engine's use is also illustrated. Each memory string can be used to store one or more features. Therefore, if each memory string stores one feature, the 512 memory strings of the 2D (search) engine _0 300 can be used together to store up to 512 features. Four example features are illustrated as feature 0 "15" 310, feature 1 "8" 331, feature 8 "3" 318, and feature 9 "0" 319. Each feature consists of five digits and can be stored using five IMAS units, with each digit corresponding to one IMAS unit. Therefore, each pair of floating-gate transistors can be used to store a single digit of one of the features. There are 64 pairs of floating-gate transistors in each memory string. Therefore, each memory string can be used to store features with up to 64 digits, or any number of features with up to 64 digits.

[0229] Each memory string can be used to compare the features stored therein with a search input provided via word lines coupled to the memory string. Each floating-gate transistor in the memory string responds to the bit line voltage according to the feature number it stores (e.g., a threshold voltage configured by programming the floating-gate transistor). For example, a pair of floating-gate transistors operating in pairs indicates a match with the search input provided to the pair of floating-gate transistors via a match-finding impedance (e.g., a relatively low impedance). This pairing indicates a lack of match with a match-not-finding impedance (e.g., a relatively high impedance). Therefore, throughout the memory string, in response to all floating-gate transistors storing feature number pairs that match the multi-bit search input provided via the corresponding word line pair, the entire memory string indicates the corresponding memory string match-finding impedance. In response to not all pairs matching, the entire memory string indicates the corresponding memory string impedance greater than the match-finding impedance. In response to no matching pair, the entire memory string indicates the corresponding match-not-finding impedance. Between the extreme cases of all digit matches and no digit matches, the memory string indicates the corresponding memory string impedance, which monotonically decreases (increases) as the number of digit-for-digit matched stored characteristic digits increases (increases) relative to the applied word line input. String current 360 represents the current flow in the memory string based on the indicated memory string impedance.

[0230] For example, memory string 0 330 is coupled to bit line _0 340 via start string select line SSL0 and to common source line 350 via start ground select line GSL0. Feature 0 "15" 310 stored in memory string 0 330 is programmed with all "3" digits, and each of the IMAS data units 320-324 has one digit.

[0231] Consider the first and second operating scenarios relevant to this example, where all word line pairs in memory string 0 330 uncoupled to feature 0 "15" 310 indicate "pass," for example, voltage Vpass, and therefore only feature 0 "15" 310 affects the impedance of memory string 0 330. In the first operating scenario, all word line pairs of feature 0 "15" 310 (word lines WL0_0, WL1_0, ..., WL9_0) coupled to memory string 0 330 indicate a search for the number "3." In response, all floating gate transistor pairs of feature 0 "15" 310 indicate a found matching impedance. Therefore, memory string 0 330 as a whole indicates an impedance equal to the memory string found matching impedance. Sensing amplifier 398 senses this impedance as the memory string found impedance and indicates via sensing output 399 that a match exists between the word line pairs and feature 0 "15" 310.

[0232] In the second operating configuration, word line pairs coupled to IMAS data cells 320 (word lines WL1_0 and WL0_0) indicate a search for the digit "1", while the remaining word line pairs coupled to memory string 0 330 (word lines WL1_0, WL1_0, ..., WL8_0, WL9_0) indicate a search for the digit "3". In response, all floating gate transistor pairs of feature 0 "15" 310 (except for the pairings in IMAS data cells 320) indicate a found matching impedance. The pairings in IMAS data cells 320 indicate a not found matching impedance (because there is a mismatch between the word line search input and the stored feature digit). Therefore, the overall impedance indicated by memory string 0 330 is greater than the memory string found matching impedance. Sensing amplifier 398 senses the greater impedance than the memory string found matching impedance and indicates a mismatch between the word line pair and feature 0 "15" 310 via sensing output 399.

[0233] Sensing amplifier 398 performs sensing and generates sensing output 399, for example, by detecting a voltage change on bit line 340 that is greater than (or less than) a predetermined sensing threshold during a sensing time interval. In some variations, the voltage change is caused by memory string 0 330 discharging a pre-charge value on bit line 0 340 according to an indicated memory string impedance. In response to a first operating condition, where the impedance is greater than the memory string found matching impedance, bit line 340 discharges via memory string 0 330 more slowly compared to a second operating condition, where the impedance is equal to the memory string found matching impedance. The sensing threshold and / or sensing time interval are set to distinguish between found matching impedance and unfound matching impedance based on sensing speed (e.g., engine bandwidth and / or latency) and noise immunity (e.g., engine resilience).

[0234] For the first or second operational scenario, continue Figure 1A , Figure 1B and Figure 1C The content of the sensing output 399, along with the corresponding sensing amplifier information of other 2D engines, is provided to the page buffer, cache, and priority encoder 9008. The page buffer, cache, and priority encoder 9008 buffers, caches, and / or prioritizes the sensing output 399 throughout the description of the 2D engine's sensing output.

[0235] Figure 4 Examples of using a 3D (search) engine with Multi-Level Cell (MLC) technology are shown, such as... Figure 3 2D (search) engine_0 300.

[0236] like Figure 4As shown, the 2D (search) engine _0 300 provides sixteen values ​​from "0" to "15" and has 501 memory strings (e.g., corresponding to string selection lines SSL0, ..., SSL500). Ten word line inputs (five pairs) correspond to each feature (e.g., word lines WL0_block, ..., WL9_block). Each of the five MLC basic IMAS cells has ten series transistors to store each feature. Unselected word lines are driven by the voltage Vpass. In a 96-layer implementation, at least four databases can be stored, each using ten word lines (e.g., ten layers). High similarity between the search input and the stored features results in high string current. Low similarity between the search input and the stored features results in low string current. Bit line page buffers collect all string current from feature 1 to feature 501. Searches are performed across multiple databases (e.g., four databases), for example, by applying searches from the first database to a first subset of word lines (e.g., word lines WL0_block, ..., WL9_block, as shown in arrow database 1 feature 1 411 and arrow database 1 feature 501 451), and by applying voltage Vpass to other word lines and collecting search results. Searches are further performed, for example, by applying searches from the second database to a second subset of word lines (e.g., word lines WL10_block, ..., WL19_block), and so on up to the last set of word lines (e.g., word lines WL80_block, ..., WL89_block, as shown in arrow database 4 feature 1 419 and arrow database 4 feature 501 459).

[0237] Figure 5A , Figure 5B , Figure 5C , Figure 5D and Figure 5E Together, they demonstrate an example of multi-stage thermometer encoding using a 3D (search) engine employing three-level cell (TLC) technology.

[0238] More specifically, Figure 5AThis illustrates an example of a multi-level thermometer encoding using a 3D (search) engine employing TLC technology. This encoding stores features with fifteen quantized values ​​from "0" to "14" and searches for features matching values ​​from "0" to "14" within the stored features. Table 500A contains a first row with values ​​from "0" to "15", a second row of an example (single-level) SLC thermometer encoding with sixteen SLC digits, a third row of an example (multi-level) MLC thermometer encoding with five MLC digits, and a fourth row of an example (third-level) TLC thermometer encoding with two TLC digits. Each digit in the TLC encoding is implemented using, for example, a corresponding TLC-based IMAS unit. In contrast, the implementation method using sixteen quantized values ​​for storage and searching requires sixteen SLC-based IMAS units and five MLC-based IMAS units, while the implementation method using fifteen quantized values ​​for storage and searching requires two TLC-based IMAS units.

[0239] Figure 5B It shows that according to Figure 5A The example shown is the search input (e.g., Figure 1A The search input 9006 (in whole or in part) is mapped to the corresponding word line voltage pair (e.g., by...). Figure 1A Examples generated by the word line encoder 9005. Table 500B contains examples of search inputs with values ​​from "0" to "7" (e.g., ...). Figure 5A The first row of the TLC line numbers, and the second and third rows of the example word line voltages (word line WL and word line WL') for the device pairs in the IMAS cell. There are eight word line voltages, from voltage VH1 to voltage VH7.

[0240] Figure 5C It shows that according to Figures 5A to 5B The stored characteristics (e.g., stored in) Figure 1A The table shows an instance mapping between the floating gate transistor pairs of the IMAS cells in the memory string 9030 and the corresponding threshold voltage pairs of the floating gate transistor pairs. Table 500C contains stored features (e.g., 0 to 7) with stored characteristics from "0" to "7". Figure 5A The first row contains the numbers of the TLC rows, and the second and third rows contain the instance threshold voltages (floating gate transistor FG and floating gate transistor FG') for storing pairs of floating gate transistors. There are eight threshold voltages, from voltage Vt1 to voltage Vt8, corresponding to an instance of TLC technology.

[0241] Figure 5D It shows that according to Figures 5A to 5C The example threshold voltage (after storage features), word line voltage (search input), and overdrive amount are shown in Table 500D. Table 500D represents specific word lines and threshold voltages, along with their associated overdrive amounts. Figure 5DAs shown, due to operation within the saturation current region, overdrive values ​​higher than "3X" (e.g., "4X", "5X", etc., up to "14X") monotonically increase and become similar to each other. An example of "14X" overdrive is overdrive 14_OD 514, where the word line voltage of voltage VH8 overdrives voltage Vt1 by a relative factor of 14. An example of "7X" overdrive is overdrive 7_OD 507A, where the word line voltage of voltage VH4 overdrives voltage Vt8 by a relative factor of 7. Another example of "7X" overdrive is overdrive 7_OD 507B, where the word line voltage of voltage VH1 overdrives voltage Vt1 by a relative factor of 7. An example of "3X" overdrive is overdrive 3_OD 503, where the word line voltage of voltage VH1 overdrives voltage Vt5 by a relative factor of 3. An example of "1X" overdrive is overdrive quantity 1_OD501, where the word line voltage of voltage VH1 is overdriven voltage Vt7 by a relative factor of 1.

[0242] Figure 5E It shows that according to Figures 5A to 5D The current capacity of an instance IMAS cell is based on the search input and stored features. Table 500E is organized in two dimensions, with columns corresponding to search input 552 and rows corresponding to stored features 551. Each item in Table 500E indicates the current capacity of the IMAS cell when it is configured (e.g., by programming a pair of threshold voltages) to store a specific data value (e.g., one of data "0" to "7") and searched by applying a pair of word line voltages (e.g., one of the values ​​"0" to "7"). Each item in the table indicates the programmed threshold voltage and applied word line voltage of the individual IMAS cell and its devices, the overdrive of each device in the IMAS cell, and the final overdrive of the IMAS cell. Since the devices in each IMAS cell are connected in series, the lowest of the two overdrive values ​​determines the final overdrive of the IMAS cell.

[0243] Figure 6 It shows Figure 1A and Figure 1B In some scenarios, TLC-based 2D (search) engines _0 600 (e.g., Figure 1B The implementation method and / or usage examples of Engine_0 150 are described. Multiple word lines are drawn and identified using the aforementioned "WL (word line)," "<layer number>," and "<block number>" scheme, as shown in the diagram next to WL126_0. The 2D (search) engine_0 600 contains 512 memory strings. For clarity, four memory strings (memory string 0 630, memory string 1 631, memory string 510 638, and memory string 511 639) are shown. The floating gate transistors of each memory string are arranged and operated in pairs, such as corresponding to... Figure 5CThe floating gate transistors FG and FG'. Examples of these pairs are IMAS data cells 620-621. Word lines are arranged and operated in pairs, such as those corresponding to... Figure 5B The word lines WL and WL' are defined. Each even-numbered layer word line is connected to the control gate of one of a pair of floating-gate transistors. For example, the word lines WL0_0, WL0_1, ..., WL0_510 and WL0_511 of layer 0 are coupled to the corresponding one in the pair, and the word lines WL2_0, ..., WL2_511 of layer 2 are coupled in the same way, up to the word lines WL126_0, ..., WL126_511 of layer 126. Furthermore, each odd-numbered layer word line is coupled to the control gate of the other floating-gate transistor in the pair. For example, the word lines WL1_0, WL1_1, ..., WL1_510 and WL1_511 of layer 1 are coupled to the other floating-gate transistor in the pair to which the word lines WL0_0, WL0_1, ..., WL0_510 and WL0_511 of layer 0 are coupled. Each memory string has two terminals, one for bit line coupling and one for common source line coupling. In a specific example, the "upper" terminal of memory string 511 639 is coupled to bit line 640 at the source / drain of the control transistor controlled by string select line SSL511; the "lower" terminal of string select line 511 639 is coupled to common source line 650 at the source / drain of the control transistor controlled by ground select line GSL511.

[0244] Figure 6 A specific example of the 2D (search) engine's use is also illustrated. Each memory string can be used to store one or more features. Therefore, if each memory string stores one feature, the 512 memory strings of the 2D (search) engine _0 600 can be used together to store up to 512 features. Four example features are illustrated as feature 0 "15" 610, feature 1 "8" 631, feature 8 "3" 618, and feature 9 "0" 619. Each feature consists of two numbers and can be stored using two IMAS units, with each number corresponding to one IMAS unit. Therefore, each pair of floating-gate transistors can be used to store a single number of one of the features. There are 64 pairs of floating-gate transistors in each memory string. Therefore, each memory string can be used to store features with up to 64 numbers, or any number of features with up to 64 numbers.

[0245] Each memory string can be used to compare the features stored therein with a search input provided via word lines coupled to the memory string. Each floating-gate transistor in the memory string responds to the bit line voltage according to the feature number it stores (e.g., a threshold voltage configured by programming the floating-gate transistor). For example, a pair of floating-gate transistors operating in pairs indicates a match with the search input provided to the pair of floating-gate transistors via a match-finding impedance (e.g., a relatively low impedance). This pairing indicates a lack of match with a match-not-finding impedance (e.g., a relatively high impedance). Thus, throughout the memory string, in response to all floating-gate transistors storing feature number pairs that match the multi-bit search input provided via the corresponding word line pair, the entire memory string indicates the corresponding memory string match-finding impedance. In response to not all pairs matching, the entire memory string indicates the corresponding memory string impedance greater than the match-finding impedance. In response to no matching pair, the entire memory string indicates the corresponding match-not-finding impedance. Between the extreme cases of all digit matches and no digit matches, the memory string indicates the corresponding memory string impedance, which monotonically decreases (increases) with each digit-for-digit matched stored feature, compared to the applied word line input. String current 660 represents the current flow in the memory string based on the indicated memory string impedance.

[0246] For example, memory string 0 630 is coupled to bit line _0 640 via start string select line SSL0 and to common source line 650 via start ground select line GSL0. Feature 0 "15" 610 stored in memory string 0 630 is programmed with all "3" numbers, and each of the IMAS data units 620-621 has one number.

[0247] Consider the first and second operating scenarios relevant to this example, where all word line pairs in memory string 0 630 uncoupled to feature 0 "15" 610 indicate "pass," for example, voltage Vpass, and therefore only feature 0 "15" 610 affects the impedance of memory string 0 630. In the first operating scenario, all word line pairs of feature 0 "15" 610 (word lines WL0_0, WL1_0, ..., WL9_0) coupled to memory string 0 630 indicate a search for the number "3." In response, all floating gate transistor pairs of feature 0 "15" 610 indicate a found matching impedance. Therefore, memory string 0 630 as a whole indicates an impedance equal to the memory string found matching impedance. Sensing amplifier 698 senses this impedance as the memory string found impedance and indicates via sensing output 699 that a match exists between the word line pairs and feature 0 "15" 610.

[0248] In the second operation, the word line pairs coupled to IMAS data unit 620 (word lines WL7_0 and WL6_0) indicate a search for the number "1", while the word line pairs coupled to IMAS data unit 621 (word lines WL9_0 and WL8_0) indicate a search for the number "3". In response, the floating gate transistor pair of IMAS data unit 620 indicates no matching impedance found (because there is a mismatch between the word line search input and the stored feature number). The floating gate transistor pair of IMAS data unit 621 also indicates no matching impedance found (because there is a mismatch between the word line search input and the stored feature number). Therefore, the overall impedance indicated by memory string 0 630 is greater than the memory string matching impedance found. The sense amplifier 698 senses the impedance being greater than the memory string matching impedance found and indicates a mismatch between the word line pair and feature 0 "15" 610 via the sense output 699.

[0249] Sensing amplifier 698 performs sensing and generates sensing output 699, for example, by detecting a voltage change on bit line 640 that is greater than (or less than) a predetermined sensing threshold during a sensing time interval. In some variations, the voltage change is caused by memory string 0 630 discharging a pre-charge value on bit line 640 according to an indicated memory string impedance. In response to a first operating condition, where the impedance is greater than the memory string found matching impedance, bit line 640 discharges via memory string 0 630 more slowly compared to a second operating condition, where the impedance is equal to the memory string found matching impedance. The sensing threshold and / or sensing time interval are set to distinguish between found matching impedance and unfounded matching impedance based on sensing speed (e.g., engine bandwidth and / or latency) and noise immunity (e.g., engine resilience).

[0250] For the first or second operational scenario, continue Figure 1A , Figure 1B and Figure 1C The content of the sensing output 699, along with the corresponding sensing amplifier information of other 2D engines, is provided to the page buffer, cache, and priority encoder 9008. The page buffer, cache, and priority encoder 9008 buffers, caches, and / or prioritizes the sensing output 699 throughout the description of the 2D engine's sensing output.

[0251] Figure 7 Examples of using a 3D (search) engine with third-order cell (TLC) technology are shown, such as... Figure 6 2D (search) engine_0 600.

[0252] like Figure 7As shown, the 2D (search) engine _0 600 provides fifteen values, from "0" to "14", with 501 memory strings (e.g., string selection lines SSL0, ..., SSL500). Four word line inputs (two pairs) correspond to each feature (e.g., word lines WL0_block, ..., WL3_block). Each of the two TLC basic IMAS cells has four series transistors to store each feature. Unselected word lines are driven by the voltage Vpass. In one implementation with 96 layers, at least 24 databases can be stored, each database using four word lines (e.g., four layers). Figure 4 Similarly, a high similarity between the search input and the stored features results in a high serial current. A low similarity between the search input and the stored features results in a low serial current. The bit-line page buffer collects all serial currents from feature 1 to feature 501. Searches are performed between multiple databases (e.g., four databases), for example, by applying a search from the first database to a first subset of word lines (e.g., word lines WL0_block, ..., WL3_block, as shown in arrow database 1 feature 1 711 and arrow database 1 feature 501 751), and by applying the voltage Vpass to the other word lines and collecting the search results. Searches are further performed, for example, by applying a search from the second database to a second subset of word lines (e.g., word lines WL4_block, ..., WL7_block), and so on to the last set of word lines (e.g., word lines WL92_block, ..., WL95_block, as shown in arrow database 24 feature 1 719 and arrow database 24 feature 501 759).

[0253] The operation of the 3D (search) engine is explained below.

[0254] Figure 8 Demonstrates 3D (search) engines (such as Figure 1AThe process flow of an instance of the 3D engine (9000) is as follows: Engine Flow 800. The flow begins with feature selection and search encoding 801. In some use cases, the same encoding is used for both features and searches, such as multi-level thermometer encoding for multi-bit NAND cells (e.g., MLC, TLC, and / or QLC). The flow then proceeds to programmed features 802. The features to be searched are programmed according to the selected feature encoding. The flow then proceeds to encoded search 803. The search is encoded according to the selected search encoding. In some applications, the search is performed based on one or more parameters (selectively including masking and / or range information). The flow then proceeds to driving word lines 804. The word lines are driven according to the search encoding. The flow then proceeds to sensing bit lines 805. Sensing of the bit lines is performed by a sense amplifier. The flow then proceeds to priority encoding pairing 806. Matching instructions provided by the sense amplifier are processed to determine priority matching information (e.g., by...). Figure 1A The page buffer, cache, and priority encoder 9008 are executed. The process then continues to provide the result 807. The result is provided to, for example, a host agent (e.g., as...). Figure 1A The output matches result 9009. The process then selectively continues to encode the next search (encoded search 803).

[0255] The description of the 3D (search) engine device and equipment is as follows.

[0256] Figure 9 An example 3D engine device is shown, including example 3D engine apparatuses, namely 3D engine apparatus 940 and 3D engine apparatus 950.

[0257] The 3D engine device 940 includes instances of one or more 3D engine devices, which are shown as a single device (3D engine device 950) and device interface 941 for clarity.

[0258] 3D engine device 950 includes 3D engine 9000 (e.g., such as...) Figures 1A to 1C (As shown and described). The 3D engine device 950 also includes a controller 951, an engine interface 953, and a simulation source 954. Conceptually, the elements of the 3D engine device 950 and / or the 3D engine equipment 940 (other than the 3D engine 9000) are used to provide the 3D engine 9000 with features 9001 and searches 9002 from the host, and to return results 9099 to the host.

[0259] The controller 951 provides overall control over the operation of the various hardware circuit blocks of the 3D engine device 950. For example, the controller 951 coordinates the operation of the engine interface 953 with the 3D engine 9000. In another example, the controller 951 coordinates the operation of the simulation source 954 based on configuration information. In yet another example, the controller 951 selectively coordinates feature and / or search coding and feature programming, as instructed by the engine interface 953 and applicable to the 3D engine 9000. In still other examples, the controller 951 can perform various configurations and... Figure 8 Operations 801 to 807 are any one or more related operations.

[0260] Engine interface 953 can be used to connect an agent external to 3D engine device 950 (e.g., a host connected via device interface 941 and host / bus coupling 942) to use 3D engine 9000. Its intended use is to receive instructions and data, and to return feature-related status and / or search codes, feature programming, and / or search requests.

[0261] The analog source 954 can generate and / or provide one or more analog outputs to memory arrays, bit line circuits, sense amplifier circuits, and / or word line circuits, such as 3D (search) engine memory arrays. The analog outputs include zero or more voltage and / or current sources (such as reference sources), for example generated by one or more bias circuits.

[0262] Operationally, the host provides instructions, such as for selecting features and / or searching codes, via host / bus coupling 942 and device interface 941. Device interface 941 then provides instructions to engine interface 953, and these instructions are processed by 3D engine 9000 according to instructions from controller 951. Other examples of similar processed instructions include feature programming based on the selected feature code and performing a search based on the selected search code. Status or processed instructions and search results are returned to the host via host / bus coupling 942 and device interface 941, as provided by controller 951 and / or 3D engine 9000 via engine interface 953. In some variations of the 3D engine device 950, controller 951 can operate one or more 2D (search) engines of 3D engine 9000 in parallel.

[0263] In operation, a host computer outside the 3D engine device 940 provides feature information to the 3D engine unit 950 so that it can be programmed into the 3D engine 9000. Subsequently, the host computer provides one or more search parameters to the 3D engine device 940.

[0264] Although Figure 9The diagram illustrates the use of 3D Engine 9000 in 3D Engine Device 950, which in turn is used in 3D Engine Equipment 940, but other uses are possible. For example, various components (e.g., integrated circuits, system-on-a-chip, and / or packaged chips) may contain one or more 3D engine components that are the same as, substantially similar to, or based on 3D Engine 9000.

[0265] Depending on the usage requirements, other partitions of the components shown in the diagram, couplings between components, component capabilities and / or capacities, and additional components are conceivable.

[0266] All or any part of the 3D engine device 940 or 3D engine apparatus 950 can be implemented as all or any part of a system-on-a-chip (SOC).

[0267] The 3D (search) engine system is described below.

[0268] Figure 10 An example hardware system with a 3D (search) engine, namely the 3D engine system 1000, is shown. The system comprises multiple hardware blocks, including a Central Processing Unit (CPU) 1010, a Graphics Processing Unit (GPU) 1020, Randomly Accessible Read / Write Memory (RAM) 1030, and a 3D engine device 940 (such as...). Figure 9 As shown), Solid State Disk (SSD) 1050, Hard Disk Drive (HDD) 1060 and Input / Output (I / O) 1070, these components are coupled through the bus / interface 1080 of the hardware block.

[0269] The CPU 1010 includes one or more processing units, such as any combination of hardware units capable of executing programmable instructions. Examples of the CPU 1010 include microprocessors, Complex Instruction Set Computing (CISC) microprocessors, Reduced Instruction Set Computing (RISC) microprocessors, Very Long Instruction Word (VLIW) microprocessors, network processors, signal processors, AI processors, and one or more special-purpose processing devices, such as Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), and Digital Signal Processors (DSPs).

[0270] The GPU 1020 includes one or more processing units, such as any combination of units capable of performing accelerated processing on a specific program, which is a relatively highly parallel program, such as graphics processing, signal processing, and / or AI processing.

[0271] RAM 1030 includes one or more storage elements for storing a greater number of instructions and / or data than the CPU 1010 and / or GPU 1020. RAM 1030 may be implemented via, for example, volatile memory elements such as dynamic random access memory (DRAM) and / or static random access memory (SRAM).

[0272] The SSD 1050 contains one or more storage elements, such as flash-based storage elements, for storing instructions and / or data. Compared to the HDD 1060, these storage elements can be selectively accessed with reduced latency.

[0273] The HDD 1060 includes one or more storage elements, such as rotating-based magnetic and / or optical non-volatile storage elements (e.g., disks), for storing instructions and / or data, the number of which may be selectively greater than the number that the SSD 1050 can store.

[0274] I / O 1070 includes components for connecting any combination of CPU 1010, GPU 1020, RAM 1030, 3D engine device 940, SSD 1050, and / or HDD 1060 to components external to the 3D engine system 1000. Examples of external components include mass storage devices, local and wide area networks (such as the Internet), human-machine interface components (such as a keyboard, mouse, and / or monitor), and other components that provide capabilities to expand and / or enhance the 3D engine system 1000 not provided by it. I / O 1070 may include one or more serial and / or parallel communication channels, and optional protocol conversion and / or adaptation capabilities to facilitate communication between the coupled components.

[0275] The bus / interface 1080 enables communication with its coupled components (e.g., CPU 1010, GPU 1020, RAM 1030, 3D engine device 940, SSD 1050, HDD 1060, and / or I / O 1070). The bus / interface 1080 may include one or more serial and / or parallel communication channels, as well as optional protocol conversion and / or adaptation capabilities to facilitate communication between its coupled components.

[0276] Depending on the usage requirements, other divisions of the components shown in the diagram, couplings between components, component performance and / or capacity, and additional components are conceivable.

[0277] In some cases, the 3D engine device 940 can reduce the processing load (e.g., on the CPU 1010 and / or GPU 1020) and / or reduce traffic on the bus / interface 1080 by performing processing locally.

[0278] For example, using multi-level thermometer encoding to achieve approximate matching allows comparisons between large AI datasets to be performed entirely within the 3D engine device 940 as features are programmed. In another instance, multi-level thermometer encoding can optionally be used in conjunction with multi-bit NAND memory, allowing the sorting of large datasets to be performed entirely within the 3D engine device 940 as features are programmed.

[0279] All or any part of the 3D Engine System 1000 can be implemented as all or any part of a System-on-a-Chip (SOC).

[0280] The following is an explanation of the multi-bit NAND multi-level thermometer encoding.

[0281] Instance multi-level thermometer encoding for storage and retrieval in multi-bit NAND feature memory can be described as a series of state transitions, such as the lowest representable value to the highest representable value that can be represented by instance multi-level thermometer encoding. Each state transition represents a specific value. Each state is represented by one or more numbers with their respective values.

[0282] Figure 11A , Figure 11B and Figure 11C Examples of multi-level thermometer encoding are shown, used for storage and searching in a multi-bit NAND feature memory to represent a series of corresponding state transitions. In the examples, each number is stored in a corresponding IMAS cell, which has two serially connected memory devices, each capable of representing one of a plurality of mutually exclusive states quantizable as a corresponding value.

[0283] Figure 11A This example illustrates a multi-level thermometer encoding that stores and searches the feature memory of an IMAS cell based on an MLC, acting as a series of state transitions. The example multi-level thermometer encoding uses three numbers implemented in three corresponding IMAS cells to represent ten values ​​(integers from "0" to "9"). Please refer to... Figures 2A to 2E , Figure 3 and Figure 4 This will provide an example of the implementation and operation of multi-stage thermometer encoding to understand the basics of MLC.

[0284] Figure 11B This example illustrates a multi-level thermometer encoding as a series of state transitions, where the feature memory of a TLC-based IMAS cell stores and searches features. The example multi-level thermometer encoding uses three numbers implemented in three corresponding IMAS cells to represent 22 values ​​(integers from "0" to "21"). Please refer to... Figures 5A to 5E , Figure 6 and Figure 7 This section introduces the implementation and operation of multi-stage thermometer encoding, a basic example of TLC (Thermostat) technology.

[0285] Figure 11C An example of a multi-stage thermometer encoding, which is a series of state transitions, is shown for the feature memory storage and search of an IMAS cell based on a QLC. The example multi-stage thermometer encoding uses two numbers implemented in two corresponding IMAS cells to represent 31 values ​​(integers from "0" to "30"). The memory device of the IMAS cell can operate at one of 16 threshold voltages (e.g., voltages Vt1 to Vt16). The word line pairs provided to the memory device are controlled to represent one of the 16 search input values.

[0286] The following is an explanation of additional information about the 3D (search) engine.

[0287] Examples of memory technologies applicable to memory arrays for 2D and / or 3D (search) engines described in this invention include floating gates, discrete gates, silicon-oxide-nitride-oxide-silicon (SONOS), floating-point, dynamic random access read / write memory (DRAM), DRAM-like memories (e.g., dual-transistor zero-capacitance (2T0C)), ferroelectric field-effect transistors (FeFETs), and any memory technology compatible with searching via word lines and bit lines. Example SONOS memory technology (sometimes called charge-trapping memory) uses an insulating layer (e.g., silicon nitride) with traps to trap and retain charge injected from the channel. Example floating-point memory technology conceptually replaces the floating gate with floating silicon nanodots, or embeds floating silicon nanodots within a polysilicon gate. Example 2T0C memory technology uses the parasitic capacitance of the read transistor to store charge, rather than a precise storage capacitor. Example FeFET memory technology uses permanent electric field polarization of a ferroelectric material embedded between the gate and the source-gate conductive region to store information. Instance memory structures for memory arrays suitable for 3D (search) engines include 2D structures (e.g., 2D flash memory structures) and 3D structures (e.g., 3D flash memory structures). Instance array architectures for memory arrays suitable for 3D (search) engines include NOR / OR type array architectures and AND / NAND type array architectures.

[0288] It should be understood that the foregoing presents implementation methods, variations, embodiments, and examples in a predictable manner, and not in a limiting sense. Distinguishing modifications and combinations that fall within the spirit and scope of the invention are foreseeable.

Claims

1. An arithmetic system, comprising: a memory, comprising: a plurality of memory strings, each memory string coupled to a bit line and a source line, the bit line coupled to a sense amplifier, and the each memory string including a plurality of series devices, each series device having and responsive to a configuration state and a corresponding control input, the configuration state being one of three or more mutually exclusive state values; and a plurality of word lines, each word line coupled to a corresponding one of the plurality of corresponding control inputs of the plurality of series devices; and a search encoder to receive a search and drive the plurality of word lines according to a search code, wherein each memory string is to couple the match line and the source line via an impedance responsive to an amount of match between the plurality of configuration states of the memory string and the plurality of corresponding control inputs of the plurality of series devices, and the sense amplifier is to generate a corresponding indication of the amount of match, the corresponding indication indicated by the impedance.

2. The arithmetic system of claim 1, wherein the search code comprises a multi-order thermometer search code.

3. The arithmetic system of claim 2, wherein the multi-order thermometer search code uses a plurality of digits, each digit having a corresponding digit value, the corresponding digit value being one of N mutually exclusive digit values, and the plurality of digits being N mutually exclusive state values, where N is an integer greater than 2.

4. The arithmetic system of claim 2, wherein the plurality of word lines operate in pairs according to the multi-order thermometer search code, and the plurality of configuration states are managed in pairs according to a multi-order thermometer feature code.

5. The arithmetic system of claim 1, wherein responsive to the impedance being a match- found impedance, the corresponding indication of the amount of match indicated by the impedance is a match-found indication.

6. The arithmetic system of claim 1, wherein the plurality of series devices comprises a plurality of series floating gate transistors, each configuration state corresponding to a corresponding threshold voltage, the plurality of series floating gate transistors to operate according to the corresponding threshold voltage, and each corresponding control input coupled to a corresponding gate of one or more of the plurality of series floating gate transistors.

7. An arithmetic method, comprising: receiving a search request, wherein the search request is encoded according to a thermometer code, the thermometer code having a plurality of search digits, and the plurality of search digits to represent one of more than two distinct values; performing a decision responsive to the search request, the decision comprising: determining whether a memory array having a plurality of in-memory approximate search cells has stored a feature corresponding to the search request in a subset of the plurality of in-memory approximate search cells, each in-memory approximate search cell of the subset to store a corresponding digit of the stored feature, and each corresponding digit to represent a corresponding one of more than two distinct values; and indicating a result of the decision.

8. The arithmetic method of claim 7, wherein each in-memory approximate search cell comprises a plurality of floating gate transistors connected in series, each floating gate transistor to operate according to more than two distinct threshold voltages, and the decision comprises: applying a plurality of word line voltages to a plurality of control gates of the plurality of floating gate transistors according to the more than two distinct threshold voltages.

9. The arithmetic method of claim 7, wherein the search request is an encoded search request, and the arithmetic method further comprises: receiving an unencoded search request and generating the encoded search request according to the unencoded search request.

10. The method of claim 7, wherein the result indicative of the determination comprises: indicative of one of: a. a match between the search request and the stored feature matching the search request; and b. a mismatch between the search request and any of the features stored in the memory array.

11. The method of claim 10, wherein the result indicative of the determination comprises: indicative of an approximate match between the search request and the stored feature matching the search request.

12. The method of claim 7, wherein the plurality of in-memory approximate search units correspond to at least one of a multi-level cell flash technology and a triple-level cell flash technology.

13. A computing system comprising: an interface circuit to cause a host agent to provide a search and receive one or more results of the search; a plurality of memory strings, each memory string receiving a corresponding set of a plurality of word lines having a plurality of voltages determinable in response to the search, and the plurality of voltages selected from more than three word line voltage values; a plurality of sense amplifiers, each sense amplifier coupled to a corresponding one of the plurality of memory strings; and a priority encoder circuit to receive a plurality of match indications from the plurality of sense amplifiers, wherein the plurality of sense amplifiers are to perform a plurality of determinations for a plurality of pairings between feature information stored in the plurality of memory strings coupled to the plurality of sense amplifiers and the plurality of word lines received by the plurality of memory strings coupled to the plurality of sense amplifiers to determine an absence of a match and a presence of at least one match, and wherein the priority encoder circuit is to indicate at least a portion of the one or more results as a highest priority match among any matches identified by the plurality of sense amplifiers based on the plurality of determinations of the plurality of sense amplifiers.

14. The computing system of claim 13, further comprising a multi-level thermometer search encoder to determine the plurality of word line voltages in response to the search.

15. The computing system of claim 13, further comprising the host agent.

16. The computing system of claim 13, wherein the priority encoder circuit is to indicate at least another portion of the one or more results as a second highest priority match among any matches identified by the plurality of sense amplifiers based on the plurality of determinations of the plurality of sense amplifiers.

17. The computing system of claim 13, further comprising a multi-level thermometer feature encoder, wherein the feature information is stored in the plurality of memory strings by configuring threshold voltages of a plurality of floating gate transistors of the plurality of memory strings according to a plurality of encoding results of the multi-level thermometer feature encoder.

18. The computing system of claim 13, wherein a feature encoding is to encode at least a portion of the feature information and a search encoding is to encode at least a portion of the search. ​ 19. The computing system of claim 18, wherein the characteristic code is a multi-order thermometer code compatible with the plurality of memory strings operating according to a plurality of threshold voltages set according to more than two threshold voltages.

20. The computing system of claim 13, wherein the computing system is part of a single chip system.

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