A circuit board welding defect detection method and system based on image processing

Abstract

The present application belongs to the technical field of image processing, and particularly relates to a circuit board welding defect detection method and system based on image processing. The method first performs multi-domain fusion enhancement processing on the circuit board image to obtain an enhanced feature image; then inputs the enhanced feature image into a convolutional neural network, and uses a spatial channel polarity attention module arranged after a deep feature map of the network to extract enhanced defect features; next, uses the enhanced defect features to decode and output the position, confidence and category of the prediction frame; finally, updates the network parameters through a total loss function composed of a positioning loss, a confidence loss and a classification loss, the positioning loss function is improved twice, a direction deviation factor is introduced, and the aspect ratio penalty term is corrected by using a defect morphology knowledge base, thereby improving the accuracy of the circuit board welding area defect detection.

Description

Technical Field

[0001] This invention belongs to the field of image processing technology, specifically relating to a method and system for detecting soldering defects on circuit boards based on image processing. Background Technology

[0002] Printed circuit boards (PCBs), as the core carrier of modern electronic products, directly affect the overall performance and reliability of the product through their soldering quality. Therefore, efficient and accurate detection of soldering defects on PCBs is crucial for reducing product defect rates and improving production quality. Currently, the mainstream inspection methods in the industry include traditional manual inspection and automated inspection based on machine vision. However, both manual inspection, which relies on subjective judgment, and machine vision inspection, which uses traditional image processing algorithms, are highly sensitive to issues such as changes in lighting, background noise, and the diversity of defect morphologies. In practical applications, these methods generally suffer from high rates of missed detections and false detections, making it difficult to meet the increasingly sophisticated production requirements.

[0003] To improve detection accuracy, deep learning object detection technology based on convolutional neural networks has been introduced into this field. However, the application effect of this technology is still limited by complex industrial environments. For example, PCB boards themselves have reflective properties, and coupled with complex lighting environments, the acquired welding images often suffer from low contrast, blurred key details, and uneven lighting. These low-quality images directly weaken the feature extraction effect of deep learning models. In addition, welding defects are usually small in size and varied in shape, and their effective features are easily submerged in the complex background texture of the circuit board, posing a significant challenge to the model's recognition and localization. At the algorithm level, mainstream detection models generally adopt a series of loss functions based on intersection-union ratio (IoU), such as GIoU, DIoU, and CIoU loss. Among them, CIoU loss improves the stability of regression to a certain extent by comprehensively considering the overlap area between the predicted box and the ground truth box, the distance between the center points, and the consistency of the aspect ratio.

[0004] In summary, existing deep learning-based circuit board soldering defect detection technologies still suffer from significant errors. Firstly, poor imaging conditions result in low-quality images, fundamentally limiting the performance ceiling of deep learning models. Furthermore, the minute and diverse morphological features of soldering defects make them difficult to extract effectively in complex backgrounds. Secondly, current mainstream algorithms, such as the CIoU loss function, have inherent flaws: firstly, they fail to effectively reflect the offset direction of the predicted bounding box relative to the ground truth bounding box, affecting regression efficiency; secondly, their aspect ratio penalty term does not consider the relatively fixed morphological features and aspect ratio ranges of different types of soldering defects, ignoring the morphological characteristics of the defects and thus affecting the accuracy of defect localization, preventing a breakthrough in overall detection performance. Summary of the Invention

[0005] Therefore, the purpose of this invention is to propose a circuit board soldering defect detection method and system based on image processing, so as to solve the technical problem of low detection accuracy of existing circuit board soldering defect detection methods.

[0006] To address the above problems, the present invention provides a technical solution for a circuit board soldering defect detection method based on image processing: A circuit board soldering defect detection method based on image processing includes the following steps: S1, perform multi-domain fusion enhancement on the acquired circuit board soldering area image, including: S11, Generate a fusion weight map based on the pixel gradient map; S12 uses wavelet transform to decompose the circuit board soldering area image into high-frequency components and low-frequency components, and performs local contrast stretching on the high-frequency components and logarithmic grayscale transformation on the low-frequency components. S13, the processed components are weighted and fused according to the fusion weight map to obtain an enhanced feature image; S2, input the enhanced feature image into the convolutional neural network to generate a deep feature map of the network; use the spatial channel polarity attention module set after the deep feature map of the network to extract the enhanced defect features; S3, using the enhanced defect features for decoding, outputting the location, confidence level, and category of the defect prediction box; S4, calculate the total loss function composed of the weighted sum of localization loss, confidence loss and classification loss, and update the network parameters accordingly; the localization loss is an improved perfect intersection-union ratio loss, in which the angle between the diagonal vectors of the predicted box and the bounding rectangle of the ground truth box is used as the direction deviation factor in the center point distance penalty term, and the corresponding aspect ratio bias coefficient is called from the preset defect morphology knowledge base to correct the aspect ratio consistency penalty term according to the defect category of the ground truth box.

[0007] Furthermore, in step S11, the method for generating the fused weight map includes: The Sobel operator is used to calculate the gradients in the horizontal and vertical directions of the circuit board solder area image, and the two are combined into a gradient magnitude map. A Gaussian filter is applied to the gradient magnitude map using a fixed-size window to generate a smooth pixel gradient map. The pixel values ​​of the smoothed pixel gradient map are linearly normalized to map their values ​​to the range of 0 to 1, thus obtaining the final fused weight map.

[0008] Furthermore, the processing procedure in step S12 includes: The image of the circuit board soldering area was decomposed into a single-layer discrete wavelet using Haar wavelet to obtain a low-frequency approximation component and three high-frequency detail components. For the three high-frequency components, within a neighborhood centered on each pixel, according to the formula... To perform localized contrast stretching, in the formula... The input pixel value represents the high-frequency component. To output pixel values, and The mean and standard deviation of the pixels in the neighborhood are . This is the gain coefficient; For the low-frequency component, according to the formula Performing a logarithmic grayscale transformation, in the formula, The input pixel values ​​are low-frequency components. These are the transformed pixel values.

[0009] Furthermore, in step S13, the method for obtaining the enhanced feature image includes: Wavelet decomposition was performed on the unprocessed circuit board soldering area image to obtain the original high-frequency and low-frequency components. The fusion weight map is downsampled to match its size with that of the wavelet components. Using the fusion weight map after downsampling, the enhanced high-frequency and low-frequency components are weighted and combined one by one with the corresponding original high-frequency and low-frequency components. In the smooth region, the enhanced components are used more, while the original components are retained more in the region with drastic gradient changes. The enhanced feature image is obtained by performing inverse wavelet transform on all components after weighted combination.

[0010] Furthermore, the spatial channel polarity attention module generates and applies spatial and channel attention weights based on the received deep feature map of the network by analyzing the positive and negative polarity masks of each channel and the channel mean.

[0011] Furthermore, the method for generating and applying spatial and channel attention weights by the spatial channel polarity attention module includes: Calculate the average value of the input feature map along the channel dimension to obtain a mean feature map; By comparing the pixel values ​​of the input feature map and the mean feature map, positive polarity masks and negative polarity masks are generated respectively. The positive polarity mask is recorded as 1 when the pixel value in the input feature map is greater than the corresponding pixel value in the mean feature map, and 0 otherwise. The negative polarity mask is recorded as 1 when the pixel value in the input feature map is less than or equal to the corresponding pixel value in the mean feature map, and 0 otherwise. The positive and negative polarity masks are multiplied element-wise with the input feature map to obtain positive and negative polarity features. Global average pooling and global max pooling are then performed on the positive and negative polarity features respectively. The resulting four feature vectors are concatenated and passed through a convolutional layer and activation function to generate spatial attention weights. Spatial attention weights are multiplied by the input feature map to obtain spatial features; global average pooling and global max pooling are performed on the spatial features, and the results are input into a multilayer perceptron to generate channel attention weights; the channel attention weights are multiplied by the spatial features to obtain the output of the spatial channel polarity attention module.

[0012] Furthermore, the kernel size of the convolutional layer is 7×7, and the activation function is the Sigmoid activation function.

[0013] Furthermore, the use of the angle between the diagonal vectors of the predicted bounding box and the ground truth bounding box as the direction deviation factor in the center point distance penalty term includes: Obtain the coordinates of the center point of the predicted bounding box and the center point of the ground truth bounding box; Obtain the coordinates of the top-left and bottom-right vertex of the smallest bounding rectangle that can simultaneously contain both the predicted bounding box and the ground truth bounding box; Starting from the top left corner of the minimum bounding rectangle, construct two vectors pointing to the center point of the predicted bounding box and the center point of the ground truth bounding box, respectively. Calculate the cosine of the angle between the two vectors as the direction deviation factor, and use it as a direction penalty term to add to the center point distance penalty term.

[0014] Furthermore, the method of correcting the aspect ratio consistency penalty term by calling the corresponding aspect ratio offset coefficient from the preset defect morphology knowledge base according to the defect category of the real bounding box includes: A defect morphology knowledge base implemented with a hash table is pre-built. In the defect morphology knowledge base, the key is the defect category and the value is the corresponding aspect ratio importance weight floating-point value. When calculating the loss function, extract the defect category label of the current ground truth bounding box; Using the defect category label as a key, the corresponding aspect ratio offset coefficient is retrieved from the defect morphology knowledge base; The original aspect ratio consistency penalty term is multiplied by the retrieved aspect ratio bias coefficient to obtain the corrected aspect ratio consistency penalty term.

[0015] The technical solution of the circuit board welding defect detection system based on image processing provided by this invention is as follows: A circuit board welding defect detection system based on image processing includes a processor and a memory. The memory stores a computer program. When the processor runs the computer program, it implements one of the above-mentioned technical solutions for circuit board welding defect detection based on image processing.

[0016] The beneficial effects of this invention are as follows: This invention enhances the overall contrast and detail of circuit board soldering area images through multi-domain fusion enhancement. This is achieved by combining local contrast stretching of high-frequency components with logarithmic grayscale transformation of low-frequency components, highlighting the blurred defect features caused by uneven lighting or reflections. Simultaneously, the spatial channel polarity attention module guides the network model to concentrate computational resources on defect areas, suppressing interference from complex background textures on the circuit board and enhancing the ability to represent the features of minute and complex defects. Furthermore, the improved localization loss function utilizes a direction bias factor in the penalty term, providing a clear optimization direction for the regression of the predicted bounding box and accelerating model convergence. The aspect ratio penalty is corrected using a defect morphology knowledge base, ensuring the shape of the predicted bounding box conforms to the inherent characteristics of specific defect categories, thus improving the accuracy of defect detection. Attached Figure Description

[0017] Figure 1 This is a flowchart of the steps in the circuit board soldering defect detection method based on image processing of the present invention; Figure 2 This is a structural block diagram of the circuit board welding defect detection system based on image processing according to the present invention. Detailed Implementation

[0018] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0019] Specific embodiments of the circuit board soldering defect detection method based on image processing provided by the present invention: like Figure 1 As shown, the present invention proposes a circuit board soldering defect detection method based on image processing, which includes the following steps: S1, perform multi-domain fusion enhancement on the acquired circuit board soldering area image, including: S11, Generate a fusion weight map based on the pixel gradient map; S12 uses wavelet transform to decompose the circuit board soldering area image into high-frequency components and low-frequency components, and performs local contrast stretching on the high-frequency components and logarithmic grayscale transformation on the low-frequency components. S13, the processed components are weighted and fused according to the fusion weight map to obtain an enhanced feature image.

[0020] In step S11, the method for generating the fused weight map includes: The Sobel operator is used to calculate the gradients in the horizontal and vertical directions of the circuit board solder area image, and the two are combined into a gradient magnitude map. A Gaussian filter is applied to the gradient magnitude map using a fixed-size window to generate a smooth pixel gradient map. The pixel values ​​of the smoothed pixel gradient map are linearly normalized to map their values ​​to the range of 0 to 1, thus obtaining the final fused weight map.

[0021] Specifically, a 3x3 Sobel horizontal operator and a vertical operator are convolved with the circuit board soldering area image respectively to obtain the image of each pixel. gradient of direction and gradient of direction Through calculation The square of and The square root of the sum of the squares of the elements is used to synthesize a gradient magnitude map G. A 5x5 Gaussian filter is then used to convolve the gradient magnitude map. This filtering process replaces the original value of a pixel with the weighted average of the surrounding 25 pixels. The weights are determined by a Gaussian function, with pixels closer to the center point receiving a larger weight. The resulting smooth pixel gradient map reflects the regions in the image, rather than isolated noise points.

[0022] The smoothed pixel gradient map is linearly normalized to generate a fusion weight map that can be used for weighted fusion. The minimum value is found by iterating through all pixels in the map. and maximum value For each pixel value in the image , apply formula Perform the conversion. This is set to a minimum value to ensure the denominator is not zero. After this step, all pixel values ​​are mapped to a closed interval of 0-1, forming a fused weight map. Values ​​close to 1 indicate gradient regions, and values ​​close to 0 indicate smooth regions.

[0023] The processing procedure for step S12 is as follows: The image of the circuit board soldering area was decomposed into a single-layer discrete wavelet using Haar wavelet to obtain a low-frequency approximation component and three high-frequency detail components. For the three high-frequency components, within a neighborhood centered on each pixel, according to the formula... To perform localized contrast stretching, in the formula... The input pixel value represents the high-frequency component. To output pixel values, and The mean and standard deviation of the pixels in the neighborhood are . This is the gain coefficient; For the low-frequency component, according to the formula Performing a logarithmic grayscale transformation, in the formula, The input pixel values ​​are low-frequency components. These are the transformed pixel values.

[0024] More specifically, the circuit board soldering area image is processed through a low-pass filter and a high-pass filter, first row-wise and then column-wise, decomposing the image into four sub-images, each one-quarter the size of the original image. These four sub-images represent low-frequency components indicating image contours and background information, and high-frequency components representing details in the horizontal, vertical, and diagonal directions, respectively. Further, local contrast enhancement is performed on each pixel within the three high-frequency components. For a pixel in a given high-frequency component, a 7x7 pixel neighborhood is taken, and the mean and standard deviation of the 49 surrounding pixels are calculated. The output pixel value is then calculated using the formula above with a preset gain coefficient. This process amplifies the difference between the pixel value and its local mean, thereby enhancing the edge and texture details of the image. For example, a pixel far from the neighborhood mean will have its difference amplified by a factor of 1.5, making details stand out.

[0025] A logarithmic grayscale transformation is performed on the low-frequency components that contain the main energy and grayscale distribution of the image. This transformation compresses the grayscale range of high-brightness areas while stretching the grayscale range of low-brightness areas, thereby improving the contrast and visible details in the dark areas of the image.

[0026] In step S13, the method for obtaining the enhanced feature image includes: Wavelet decomposition was performed on the unprocessed circuit board soldering area image to obtain the original high-frequency and low-frequency components. The fusion weight map is downsampled to match its size with that of the wavelet components. Using the fusion weight map after downsampling, the enhanced high-frequency and low-frequency components are weighted and combined one by one with the corresponding original high-frequency and low-frequency components. In the smooth region, the enhanced components are used more, while the original components are retained more in the region with drastic gradient changes. The enhanced feature image is obtained by performing inverse wavelet transform on all components after weighted combination.

[0027] More specifically, the original image is enhanced by wavelet decomposition and high- and low-frequency enhancement to obtain a set of processed high-frequency components. and low frequency components Performing the same wavelet decomposition on the original image without any enhancement yields a set of original high-frequency components. and low frequency components The two components are completely corresponding in size and type. Meanwhile, the fusion weight map previously generated based on pixel gradients, which has the same size as the original image, needs to be adjusted to match the size of the wavelet components. Since the size of each component after single-layer wavelet decomposition is half that of the original image, the resolution of the fusion weight map needs to be reduced, for example, by downsampling using bilinear interpolation or neighborhood averaging, to make its width and height completely consistent with the width and height of the wavelet components. Let the downsampled fusion weight map be W; for low-frequency components, the new low-frequency component after fusion... Each pixel value in the formula is calculated using... The calculation yields the result. Similarly, the same operation is performed for each high-frequency component, i.e. Because the weights are close to 1 in the gradient region and close to 0 in the smooth region, this formula ensures that more of the original components are preserved in the edge and texture regions of the image. and This prevents details from becoming blurred; while in smooth areas, enhanced components are used more often. and To effectively suppress noise and enhance contrast, the operation is performed independently on all four components. The resulting four new components are then fused. , , , As input, an inverse discrete wavelet transform is performed, and the waves are recombined into an enhanced feature image.

[0028] S2, input the enhanced feature image into the convolutional neural network to generate a deep feature map of the network; use the spatial channel polarity attention module set after the deep feature map of the network to extract the enhanced defect features.

[0029] In this step, the enhanced feature image is input as the backbone network ResNet50, and the deep feature map of the network is obtained from the output of the fourth residual block. The spatial channel polarity attention module, based on the received deep network feature map, generates and applies spatial and channel attention weights by analyzing the positive and negative polarity masks of each channel and the channel mean. The specific process is as follows: Calculate the average value of the input feature map along the channel dimension to obtain a mean feature map; By comparing the pixel values ​​of the input feature map and the mean feature map, positive and negative polarity masks are generated respectively. The positive polarity mask is recorded as 1 when the pixel value in the input feature map is greater than the corresponding pixel value in the mean feature map, and 0 otherwise. The negative polarity mask is recorded as 1 when the pixel value in the input feature map is less than or equal to the corresponding pixel value in the mean feature map, and 0 otherwise. The positive and negative polarity masks are multiplied element-wise with the input feature map to obtain positive and negative polarity features. Global average pooling and global max pooling are then performed on the positive and negative polarity features respectively. The resulting four feature vectors are concatenated and passed through a convolutional layer and activation function to generate spatial attention weights. Spatial attention weights are multiplied by the input feature map to obtain spatial features; global average pooling and global max pooling are performed on the spatial features, and the results are input into a multilayer perceptron to generate channel attention weights; the channel attention weights are multiplied by the spatial features to obtain the output of the spatial channel polarity attention module.

[0030] In the above processing, the kernel size of the convolutional layer is 7×7, the activation function is the sigmoid activation function, and the multilayer perceptron consists of two fully connected layers.

[0031] S3, using the enhanced defect features for decoding, outputting the location, confidence level, and category of the defect prediction box.

[0032] Specifically, enhanced defect features are input into the detection head, such as those from the YOLO series. The detection head predicts the offsets, confidence scores, and class probabilities of multiple bounding boxes for each grid cell on feature maps at different scales. By applying the predicted offsets to preset anchor boxes, the center coordinates, width, and height of candidate predicted boxes are decoded. Candidate boxes with lower scores are filtered out, and non-maximum suppression (NMS) is applied to the remaining predicted boxes to eliminate redundant detection boxes for the same target. The box with the highest confidence score is retained as the defect prediction box for output.

[0033] S4, calculate the total loss function composed of the weighted sum of localization loss, confidence loss and classification loss, and update the network parameters accordingly; the localization loss is an improved perfect intersection-union ratio loss, in which the angle between the diagonal vectors of the predicted box and the bounding rectangle of the ground truth box is used as the direction deviation factor in the center point distance penalty term, and the corresponding aspect ratio bias coefficient is called from the preset defect morphology knowledge base to correct the aspect ratio consistency penalty term according to the defect category of the ground truth box.

[0034] Specifically, in this step, the angle between the diagonal vectors of the predicted bounding box and the ground truth bounding box's diagonal rectangle is used as the orientation deviation factor in the center point distance penalty term, including: Obtain the coordinates of the center point of the predicted bounding box and the center point of the ground truth bounding box; Obtain the coordinates of the top-left and bottom-right vertex of the smallest bounding rectangle that can simultaneously contain both the predicted bounding box and the ground truth bounding box; Starting from the top left corner of the minimum bounding rectangle, construct two vectors pointing to the center point of the predicted bounding box and the center point of the ground truth bounding box, respectively. Calculate the cosine of the angle between the two vectors as the direction deviation factor, and use it as a direction penalty term to add to the center point distance penalty term.

[0035] The cosine value calculated in the above process reflects the consistency of the directions of the two center points; the closer the value is to 1, the more consistent the directions. Subtracting the calculated cosine value from 1 yields a direction penalty term, which is then added to the original center point distance loss. This ensures that the loss function penalizes not only predictions with greater distances but also predictions with larger directional deviations.

[0036] In step S4, the method for correcting the aspect ratio consistency penalty term by calling the corresponding aspect ratio offset coefficient from the preset defect morphology knowledge base according to the defect category of the real bounding box includes: A defect morphology knowledge base implemented with a hash table is pre-built. In the defect morphology knowledge base, the key is the defect category and the value is the corresponding aspect ratio importance weight floating-point value. When calculating the loss function, extract the defect category label of the current ground truth bounding box; Using the defect category label as a key, the corresponding aspect ratio offset coefficient is retrieved from the defect morphology knowledge base; The original aspect ratio consistency penalty term is multiplied by the retrieved aspect ratio bias coefficient to obtain the corrected aspect ratio consistency penalty term.

[0037] The defect morphology knowledge base is defined before model training begins. In this embodiment, the defect morphology knowledge base is a set of key-value pairs. The keys are the category names of the defects, such as short circuit, open circuit, solder ball, etc., and the values ​​are floating-point numbers representing the sensitivity of that type of defect to aspect ratio. During model training, when calculating the loss between a predicted bounding box and a ground truth bounding box, the category label of the ground truth bounding box is read. For example, the currently processed ground truth bounding box is labeled as an open circuit, and this category label is used as a query key. Using the open circuit label as the key, a search is performed in the preset defect morphology knowledge base, and the corresponding value is found to be 3, i.e., the aspect ratio bias coefficient is 3. The aspect ratio consistency penalty between the predicted and ground truth bounding boxes is calculated using conventional methods. The original aspect ratio consistency penalty is multiplied by the retrieved bias coefficient 3.0 to obtain the corrected aspect ratio consistency penalty. This means that for open circuit defects, if the aspect ratio of the predicted bounding box does not match that of the ground truth bounding box, the resulting loss will be amplified three times.

[0038] Specific embodiments of the circuit board soldering defect detection system based on image processing provided by the present invention: like Figure 2 As shown, the circuit board welding defect detection system based on image processing includes a processor and a memory. The memory stores a computer program. When the computer program is run by the processor, it can implement the circuit board welding defect detection method based on image processing in the above embodiments.

[0039] The circuit board welding defect detection system based on image processing also includes other components well known to those skilled in the art, such as communication buses and communication interfaces. Their settings and functions are known in the art and will not be described in detail here.

[0040] In this invention, the aforementioned memory can be any tangible medium containing or storing a program that can be used or combined with an instruction execution system, apparatus, or device. For example, a computer-readable storage medium can be any suitable magnetic or magneto-optical storage medium, such as Resistive Random Access Memory (RRAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Enhanced Dynamic Random Access Memory (EDRAM), High-Bandwidth Memory (HBM), Hybrid Memory Cube (HMC), etc., or any other medium that can be used to store desired information and can be accessed by an application, module, or both. Any such computer storage medium can be part of a device or accessible to or connected to a device. Any application or module described in this invention can be implemented by computer-readable / executable instructions stored or otherwise maintained on such a computer-readable medium.

[0041] While various embodiments of the invention have been shown and described in this specification, it will be apparent to those skilled in the art that such embodiments are provided by way of example only. Many modifications, alterations, and alternatives will occur to those skilled in the art without departing from the spirit and essence of the invention.

Claims

1. A method for detecting soldering defects on circuit boards based on image processing, characterized in that, Includes the following steps: S1, perform multi-domain fusion enhancement on the acquired circuit board soldering area image, including: S11, Generate a fusion weight map based on the pixel gradient map; S12 uses wavelet transform to decompose the circuit board soldering area image into high-frequency components and low-frequency components, and performs local contrast stretching on the high-frequency components and logarithmic grayscale transformation on the low-frequency components. S13, the processed components are weighted and fused according to the fusion weight map to obtain an enhanced feature image; S2, input the enhanced feature image into a convolutional neural network to generate a deep feature map of the network; use the spatial channel polarity attention module set after the deep feature map of the network to extract the enhanced defect features; The method for generating and applying spatial and channel attention weights in the spatial channel polarity attention module includes: calculating the average value of the input feature map along the channel dimension to obtain a mean feature map; generating positive and negative polarity masks by comparing the pixel values ​​of the input feature map and the mean feature map, where the positive polarity mask is set to 1 when the pixel value in the input feature map is greater than the corresponding pixel value in the mean feature map, and 0 otherwise; the negative polarity mask is set to 1 when the pixel value in the input feature map is less than or equal to the corresponding pixel value in the mean feature map, and 0 otherwise; and then applying the positive and negative polarity masks... The polarity mask is multiplied element-wise with the input feature map to obtain positive and negative polarity features. Global average pooling and global max pooling are performed on the positive and negative polarity features respectively. The resulting four feature vectors are concatenated and passed through a convolutional layer and activation function to generate spatial attention weights. The spatial attention weights are multiplied with the input feature map to obtain spatial features. Global average pooling and global max pooling are performed on the spatial features, and the results are input into a multilayer perceptron to generate channel attention weights. The channel attention weights are multiplied with the spatial features to obtain the output of the spatial channel polarity attention module. S3, using the enhanced defect features for decoding, outputting the location, confidence level, and category of the defect prediction box; S4, calculate the total loss function composed of the weighted sum of localization loss, confidence loss and classification loss, and update the network parameters accordingly; the localization loss is an improved perfect intersection-union ratio loss, in which the angle between the diagonal vectors of the predicted box and the bounding rectangle of the ground truth box is used as the direction deviation factor in the center point distance penalty term, and the corresponding aspect ratio bias coefficient is called from the preset defect morphology knowledge base to correct the aspect ratio consistency penalty term according to the defect category of the ground truth box.

2. The method for detecting soldering defects in circuit boards based on image processing according to claim 1, characterized in that, In step S11, the method for generating the fused weight map includes: The Sobel operator is used to calculate the gradients in the horizontal and vertical directions of the circuit board solder area image, and the two are combined into a gradient magnitude map. A Gaussian filter is applied to the gradient magnitude map using a fixed-size window to generate a smooth pixel gradient map. The pixel values ​​of the smoothed pixel gradient map are linearly normalized to map their values ​​to the range of 0 to 1, thus obtaining the final fused weight map.

3. The method for detecting soldering defects in circuit boards based on image processing according to claim 1, characterized in that, The processing procedure in step S12 includes: The image of the circuit board soldering area was decomposed into a single-layer discrete wavelet using Haar wavelet to obtain a low-frequency approximation component and three high-frequency detail components. For the three high-frequency components, within a neighborhood centered on each pixel, according to the formula... To perform localized contrast stretching, in the formula... The input pixel value represents the high-frequency component. To output pixel values, and The mean and standard deviation of the pixels in the neighborhood are . This is the gain coefficient; For the low-frequency component, according to the formula Performing a logarithmic grayscale transformation, in the formula, The input pixel values ​​are low-frequency components. These are the transformed pixel values.

4. The method for detecting soldering defects in circuit boards based on image processing according to claim 1, characterized in that, In step S13, the method for obtaining the enhanced feature image includes: Wavelet decomposition was performed on the unprocessed circuit board soldering area image to obtain the original high-frequency and low-frequency components. The fusion weight map is downsampled to match its size with that of the wavelet components. Using the fusion weight map after downsampling, the enhanced high-frequency and low-frequency components are weighted and combined one by one with the corresponding original high-frequency and low-frequency components. In the smooth region, the enhanced components are used more, while the original components are retained more in the region with drastic gradient changes. The enhanced feature image is obtained by performing inverse wavelet transform on all components after weighted combination.

5. The method for detecting soldering defects in circuit boards based on image processing according to claim 1, characterized in that, The spatial channel polarity attention module is based on the received deep feature map of the network. It generates and applies spatial and channel attention weights by analyzing the positive and negative polarity masks of each channel and the channel mean.

6. The method for detecting soldering defects in circuit boards based on image processing according to claim 5, characterized in that, The kernel size of the convolutional layer is 7×7, and the activation function is the Sigmoid activation function.

7. The method for detecting soldering defects in circuit boards based on image processing according to claim 1, characterized in that, The method of using the angle between the diagonal vectors of the predicted bounding box and the ground truth bounding box as the direction deviation factor in the center point distance penalty term includes: Obtain the coordinates of the center point of the predicted bounding box and the center point of the ground truth bounding box; Obtain the coordinates of the top-left and bottom-right vertex of the smallest bounding rectangle that can simultaneously contain both the predicted bounding box and the ground truth bounding box; Starting from the top left corner of the minimum bounding rectangle, construct two vectors pointing to the center point of the predicted bounding box and the center point of the ground truth bounding box, respectively. Calculate the cosine of the angle between the two vectors as the direction deviation factor, and use it as a direction penalty term to add to the center point distance penalty term.

8. The method for detecting soldering defects in circuit boards based on image processing according to claim 1, characterized in that, The method of correcting the aspect ratio consistency penalty term by calling the corresponding aspect ratio offset coefficient from the preset defect morphology knowledge base according to the defect category of the real frame includes: A defect morphology knowledge base implemented with a hash table is pre-built. In the defect morphology knowledge base, the key is the defect category and the value is the corresponding aspect ratio importance weight floating-point value. When calculating the loss function, extract the defect category label of the current ground truth bounding box; Using the defect category label as a key, the corresponding aspect ratio offset coefficient is retrieved from the defect morphology knowledge base; The original aspect ratio consistency penalty term is multiplied by the retrieved aspect ratio bias coefficient to obtain the corrected aspect ratio consistency penalty term.

9. A circuit board soldering defect detection system based on image processing, characterized in that, It includes a processor and a memory, the memory storing a computer program, which, when run by the processor, implements the image processing-based circuit board welding defect detection method according to any one of claims 1-8.

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