A bridgeless PFC circuit and vehicle charger

Abstract

A bridgeless PFC circuit and a vehicle charger, which relates to AC-DC power conversion technology, comprising: a surge protection module connected between an AC port and a PFC bus, the surge protection module comprising a bypass diode and an impedance control unit connected in series; a bridgeless PFC power main circuit module comprising: a first inductor, a first NMOS tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube and a bus capacitor; when working in a forward charging mode, the impedance control unit is configured to allow the surge current to pass through the loop formed by the bypass diode, the bus capacitor and the power tube to absorb the surge energy, so as to realize forward surge protection; when the circuit works in an inverter mode, the impedance control unit is configured to limit the impact current generated when the capacitive load is connected, so as to avoid damage to the power tube by the impact current. The technical scheme of the application achieves the effect of improving the reliability of the circuit.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of AC-DC power conversion, and in particular to a bridgeless PFC circuit and an on-board charger. BACKGROUND

[0002] With the popularization of the V2L (vehicle-to-load) function of electric vehicles, on-board chargers (OBC) are developing towards bidirectional and efficient energy conversion. Among them, the bidirectional bridgeless PFC circuit becomes the core topology to realize this function due to its high efficiency. However, this circuit faces an inherent architectural contradiction when working bidirectionally. In the forward charging mode, the circuit needs to have the ability to resist lightning surges from the grid side, which requires designing an effective surge energy absorption path between the AC port and the DC bus. In the reverse inverter mode, the circuit needs to withstand the instantaneous impact current generated by the repeated sudden increase of the external capacitive load (such as various electronic devices), otherwise the inverter power tube is easily damaged due to excessive current stress. In related technologies, it is difficult to meet the needs of the above two working conditions at the same time. If the surge protection is emphasized, the risk of short circuit during inversion will be increased; if the inversion reliability is emphasized, the forward protection performance is often sacrificed. This problem of "trade-off" in bidirectional work restricts the reliability and adaptability of the on-board power system under complex working conditions. SUMMARY

[0003] In order to overcome the above technical problems, the present application provides a bridgeless PFC circuit and an on-board charger.

[0004] In a first aspect, the present application provides a bridgeless PFC circuit, comprising: a bridgeless PFC power main loop module and a surge protection module, wherein the surge protection module is connected between an AC port and a PFC bus, the surge protection module comprises a bypass diode and an impedance control unit, and the impedance control unit is connected in series with the bypass diode; the bridgeless PFC power main loop module comprises: a first inductor, a first NMOS tube, a second NMOS tube, a third NMOS tube, a fourth NMOS tube, and a bus capacitor, wherein a first end of the first inductor is electrically connected with a first AC terminal, a second end of the first inductor is electrically connected with a source electrode of the first NMOS tube, a drain electrode of the first NMOS tube is electrically connected with a positive bus, a source electrode of the first NMOS tube is electrically connected with a drain electrode of the second NMOS tube, and a source electrode of the second NMOS tube is electrically connected with a bus ground; a source electrode of the third NMOS tube is electrically connected with a drain electrode of the fourth NMOS tube, a drain electrode of the third NMOS tube is electrically connected with the positive bus, a source electrode of the fourth NMOS tube is electrically connected with the bus ground, and the source electrode of the third NMOS tube is also electrically connected with a second AC terminal; the positive bus and the bus ground are respectively electrically connected with a positive electrode of a battery and a negative electrode of the battery; the AC port comprises the first AC terminal and the second AC terminal; the PFC bus comprises the positive bus and the bus ground; when the bridgeless PFC circuit works in a forward charging mode, the impedance control unit is configured to allow a surge current to pass through a loop formed by the bypass diode, the bus capacitor, and the third NMOS tube or the fourth NMOS tube to absorb surge energy, so as to achieve forward surge protection; the bus capacitor is connected between the positive bus and the bus ground; when the bridgeless PFC circuit works in an inverter mode, the impedance control unit is configured to limit an impact current generated at a moment when a capacitive load is connected, so as to avoid damage to the third NMOS tube and the fourth NMOS tube caused by the impact current, wherein the capacitive load is a load connected with the AC port in the inverter mode.

[0005] By adopting the above technical solution, in the forward charging mode, the impedance control unit of the surge protection module allows the surge current to pass through the loop formed by the bypass diode, the bus capacitor, and the third NMOS tube or the fourth NMOS tube to absorb the surge energy, so as to achieve the forward surge protection; in the inverter mode, the impedance control unit limits the impact current generated at the moment when the capacitive load is connected, so as to avoid damage to the third NMOS tube and the fourth NMOS tube caused by the impact current, thereby solving the problem of "trade-off" in the bidirectional operation, and improving the reliability and adaptability of the vehicle-mounted power supply system under complex working conditions.

[0006] Optionally, the bypass diode comprises a first diode and a second diode, and the impedance control unit comprises one of: a switching device, wherein when the bridgeless PFC circuit works in the forward charging mode, the switching device is in a conducting state, and when the bridgeless PFC circuit works in the inverter mode, the switching device is in an off state; and a current-limiting resistor.

[0007] By adopting the technical scheme, the bypass diode is divided into a first diode and a second diode, the impedance control unit adopts a switching device or a current-limiting resistor, and in the forward charging mode, the switching device is turned on or the current-limiting resistor is used, so that the inrush current passes through the loop formed by the bypass diode, the bus capacitor and the third NMOS tube or the fourth NMOS tube to absorb the inrush energy, and forward surge protection is realized; in the inverter mode, the switching device is turned off or the current-limiting resistor is used to limit the impact current generated when the capacitive load is connected, so as to avoid damage to the third NMOS tube and the fourth NMOS tube caused by the impact current.

[0008] Optionally, the switching device includes a fifth NMOS tube and a sixth NMOS tube, wherein the drain of the fifth NMOS tube is electrically connected with the first alternating current end, the source of the fifth NMOS tube is electrically connected with the positive electrode of the first diode, and the negative electrode of the first diode is electrically connected with the positive bus; the negative electrode of the second diode is electrically connected with the first alternating current end, the positive electrode of the second diode is electrically connected with the source of the sixth NMOS tube, and the drain of the sixth NMOS tube is electrically connected with the bus ground; when the bridgeless PFC circuit works in the forward charging mode, the fifth NMOS tube and the sixth NMOS tube are both in the on state, and when the bridgeless PFC circuit works in the inverter mode, the fifth NMOS tube and the sixth NMOS tube are both in the off state.

[0009] By adopting the technical scheme, in the forward charging mode, the fifth NMOS tube and the sixth NMOS tube are both turned on, the inrush current can pass through the loop formed by the bypass diode, the bus capacitor and the third NMOS tube or the fourth NMOS tube to absorb the inrush energy, and forward surge protection is realized; in the inverter mode, the fifth NMOS tube and the sixth NMOS tube are both turned off, so as to limit the impact current generated when the capacitive load is connected, and avoid damage to the third NMOS tube and the fourth NMOS tube caused by the impact current.

[0010] Optionally, the gate of the fifth NMOS tube and the gate of the sixth NMOS tube are both electrically connected with the controller, and the controller is configured to control the bridgeless PFC circuit to work in the forward charging mode or the inverter mode by detecting the connection state signal of the charging gun or the CAN bus instruction of the whole vehicle.

[0011] By adopting the technical scheme, the gate of the fifth NMOS tube and the gate of the sixth NMOS tube are both electrically connected with the controller, and the controller can accurately control the bridgeless PFC circuit to switch between the forward charging mode and the inverter mode by detecting the connection state signal of the charging gun or the CAN bus instruction of the whole vehicle, so as to realize flexible and accurate control of the bidirectional working mode.

[0012] Optionally, the gate of the fifth NMOS and the gate of the sixth NMOS are electrically connected to the controller, and when the controller detects that the bridgeless PFC circuit is currently operating in the forward charging mode, the controller outputs a high level to the gate of the fifth NMOS and the gate of the sixth NMOS; and when the controller detects that the bridgeless PFC circuit is currently operating in the inverter mode, the controller outputs a low level to the gate of the fifth NMOS and the gate of the sixth NMOS.

[0013] By using the above technical solution, when the bridgeless PFC circuit operates in the forward charging mode, the controller outputs a high level to the gate of the fifth NMOS and the gate of the sixth NMOS, at this time, the inrush current is allowed to pass through the loop formed by the bypass diode, the bus capacitor and the third NMOS or the fourth NMOS to absorb the inrush energy, thereby realizing the forward surge protection; when the bridgeless PFC circuit operates in the inverter mode, the controller outputs a low level to the gate of the fifth NMOS and the gate of the sixth NMOS, so that the bridgeless PFC circuit operates in the inverter mode, thereby limiting the impact current generated when the capacitive load is connected, and avoiding damage to the third NMOS and the fourth NMOS caused by the impact current.

[0014] Optionally, the controller is also electrically connected to the gate of the first NMOS, the gate of the second NMOS, the gate of the third NMOS and the gate of the fourth NMOS, and the controller is configured to perform the following operations: when the bridgeless PFC circuit operates in the forward charging mode, the third NMOS and the fourth NMOS are controlled by the controller according to the period of the alternating current, and the fourth NMOS is controlled to be continuously turned on and the third NMOS is controlled to be continuously turned off when the alternating current at the alternating current port is in the positive half cycle, thereby providing a loop for the alternating current; the third NMOS is controlled to be continuously turned on and the fourth NMOS is controlled to be continuously turned off when the alternating current is in the negative half cycle, thereby providing a loop for the alternating current; at the same time, the first NMOS and the second NMOS are controlled by the controller to be high-frequency boost controlled, and the first NMOS and the second NMOS are controlled to be high-frequency complementary switched in the entire alternating current period, so as to realize the boost of the alternating input voltage; when the bridgeless PFC circuit operates in the inverter mode, the fourth NMOS is controlled to be continuously turned on and the third NMOS is controlled to be continuously turned off in the positive half cycle of the desired output sine wave alternating current, thereby providing a path for the output current; the third NMOS is controlled to be continuously turned on and the fourth NMOS is controlled to be continuously turned off in the negative half cycle of the desired output sine wave alternating current, thereby providing a path for the output current; at the same time, the first NMOS and the second NMOS are controlled by the controller to be high-frequency inverter controlled, and the first NMOS and the second NMOS are controlled to be high-frequency complementary switched in the entire alternating current period, so as to chop and step down the direct current voltage on the PFC bus, and cooperate with the frequency-synchronous switching of the third NMOS and the fourth NMOS, thereby finally synthesizing a standard sine wave alternating current at the alternating current port and outputting the standard sine wave alternating current.

[0015] By adopting the technical scheme, in the forward charging mode, the third NMOS tube and the fourth NMOS tube are controlled synchronously at the power frequency to provide a loop for the alternating current, and the first NMOS tube and the second NMOS tube are controlled at high frequency to boost the alternating input voltage; in the inverter mode, the third NMOS tube and the fourth NMOS tube are controlled to provide a path for the output current, and the first NMOS tube and the second NMOS tube are controlled at high frequency to inverter, and are matched with the power frequency synchronous switching of the third NMOS tube and the fourth NMOS tube, so that a standard sine wave alternating current is synthesized at the alternating current port and is outputted outward.

[0016] Optionally, the current-limiting resistor device includes a first resistor and a second resistor, wherein the negative electrode of the first diode is electrically connected with the positive bus, the positive electrode of the first diode is electrically connected with the first alternating current port through the first resistor, the negative electrode of the second diode is electrically connected with the first alternating current port, and the positive electrode of the second diode is electrically connected with the bus ground through the second resistor.

[0017] By adopting the technical scheme, the current-limiting resistor device includes a first resistor and a second resistor, the positive electrode of the first diode is electrically connected with the first alternating current port through the first resistor, the negative electrode of the first diode is electrically connected with the positive bus, the negative electrode of the second diode is electrically connected with the first alternating current port, and the positive electrode of the second diode is electrically connected with the bus ground through the second resistor, so that the surge protection can be effectively realized in the forward charging mode, the impact current generated in the moment when the capacitive load is connected in the inverter mode is limited, the NMOS tube is prevented from being damaged, the problem of "trade-off" in the bidirectional operation is solved, and the reliability and adaptability of the vehicle-mounted power supply system under complex working conditions are improved.

[0018] Optionally, the resistance values of the first resistor and the second resistor satisfy the following condition: in the inverter mode, the peak value of the impact current is less than a preset current threshold.

[0019] By adopting the technical scheme, in the inverter mode of the bridgeless PFC circuit, the first resistor and the second resistor can limit the impact current generated in the moment when the capacitive load is connected, so that the peak value of the impact current is less than the preset current threshold, the third NMOS tube and the fourth NMOS tube are prevented from being damaged by the impact current, and in combination with the bypass diode of the surge protection module, the impedance control unit and the bridgeless PFC power main loop module, the surge current can pass through the loop formed by the bypass diode, the bus capacitor and the third NMOS tube or the fourth NMOS tube to absorb the surge energy in the forward charging mode, so that the forward surge protection is realized.

[0020] Optionally, the bridgeless PFC circuit further comprises a communication module connected between the controller and an external device, configured to receive a control instruction sent by the external device and transmit the control instruction to the controller, and the controller adjusts the working mode of the bridgeless PFC circuit according to the control instruction, and the working mode comprises the forward charging mode and the inverter mode.

[0021] By adopting the above technical solution, the bridgeless PFC circuit can receive the control instruction of the external device through the communication module and transmit the control instruction to the controller, so that the controller adjusts the forward charging mode and the inverter mode of the circuit according to the instruction, thereby enhancing the flexibility of the working mode adjustment of the circuit and the remote controllability.

[0022] In a second aspect, the application further provides a vehicle-mounted charger comprising the bridgeless PFC circuit of any one of the preceding aspects.

[0023] In summary, the one or more technical solutions provided in the application have at least the following technical effects or advantages:

[0024] 1. In the forward charging mode of the bridgeless PFC circuit, the impedance control unit of the surge protection module allows the surge current to absorb surge energy through the loop formed by the bypass diode, the bus capacitor and the third NMOS tube or the fourth NMOS tube, thereby realizing forward surge protection; in the inverter mode, the impedance control unit limits the impact current generated when the capacitive load is connected, thereby avoiding damage to the third NMOS tube and the fourth NMOS tube caused by the impact current, solving the problem of trade-off in bidirectional operation, and improving the reliability and adaptability of the vehicle-mounted power supply system under complex working conditions.

[0025] 2. The controller can accurately control the switching of the bridgeless PFC circuit between the forward charging mode and the inverter mode by detecting the connection state signal of the charging gun or the CAN bus instruction of the whole vehicle, thereby realizing flexible and accurate control of the bidirectional working mode. BRIEF DESCRIPTION OF DRAWINGS

[0026] Figure 1 is a simulation circuit diagram of a bridgeless PFC circuit in the related art;

[0027] Figure 2 is a simulation example diagram of a capacitive load in the related art;

[0028] Figure 3 is a framework diagram of a bridgeless PFC circuit provided in the application;

[0029] Figure 4 is an example diagram of a bridgeless PFC circuit provided in the application;

[0030] Figure 5 is another example diagram of a bridgeless PFC circuit provided in the application;

[0031] Figure 6 is a simulation circuit diagram of a bridgeless PFC circuit provided by the present application;

[0032] Figure 7 is a simulation result example diagram of a capacitive load loading provided by the present application;

[0033] Figure 8 is another simulation circuit diagram of a bridgeless PFC circuit provided by the present application;

[0034] Figure 9 is another simulation result example diagram of a capacitive load loading provided by the present application.

[0035] Legend: R1-first resistor, R2-second resistor, D1-first diode, D2-second diode, Q1-first NMOS tube, Q2-second NMOS tube, Q3-third NMOS tube, Q4-fourth NMOS tube, Q5-fifth NMOS tube, Q6-sixth NMOS tube, L1-first inductor, Cb-bus capacitor. DETAILED DESCRIPTION

[0036] In order for those skilled in the art to better understand the technical solutions in the specification, the technical solutions in the specification will be clearly and completely described below in conjunction with the drawings in the specification. Obviously, the described embodiments are only some of the embodiments of the present application, not all the embodiments.

[0037] In the description of the embodiments of the present application, the words such as "for example" or "for instance" are used to represent an example, illustration or description. Any embodiment or design scheme described as "for example" or "for instance" in the embodiments of the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the words such as "for example" or "for instance" are intended to present the relevant concept in a specific way.

[0038] In the description of the embodiments of the present application, the term "a plurality of" means two or more. In addition, the terms "first", "second" are used for description purposes only, and should not be interpreted as indicating or implying relative importance or implicitly indicating the indicated technical features. Therefore, the features defined with "first", "second" can be explicitly or implicitly included one or more features. The terms "include", "contain", "have" and their variants mean "include but are not limited to", unless otherwise specifically emphasized.

[0039] Figure 1 is a simulation circuit diagram of a bridgeless PFC circuit in the related art, Figure 2 is Figure 1 is a simulation example diagram of a capacitive load loading of the circuit shown in the inverter mode, Figure 1In the inverter operation, PFC_FAST_H, PFC_FAST_L, PFC_SLOW_L, and PFC_SLOW_H are the gate control signals for Qa, Qb, Qc, and Qd, respectively. Ci is used to simulate a capacitive load. During inverter operation, repeated applications of large capacitive loads will cause [a certain phenomenon / effect]. Figure 1 The short-circuit loop indicated by the arrow (Ci positive → power transistor Qd → diode Db → Ci negative) generates instantaneous short-circuit high current stress, thereby damaging the relevant power transistors. Figure 2 The lower half is a magnified view of a portion of the upper half, combined with... Figure 2 The simulation waveform shows that before the inverter switches from negative half-wave drive to positive half-wave drive, when the inverter output is connected to a 100uF capacitive load with a voltage of -100V, if the inverter continues to work, a short-circuit current of Io_ac≈476A will be generated. This is a current surge stress that the power transistor cannot withstand and will directly damage the power transistor.

[0040] The following is in conjunction with the appendix Figure 3 -Appendix Figure 9 The embodiments of this application will be described in detail.

[0041] This application provides a bridgeless PFC circuit, referencing... Figure 3 , Figure 3is a framework diagram of a bridgeless PFC circuit provided by the present application, the bridgeless PFC circuit comprising: a bridgeless PFC power main loop module and a surge protection module, wherein the surge protection module is connected between an AC port and a PFC bus, the surge protection module comprising a bypass diode and an impedance control unit, and the impedance control unit is connected in series with the bypass diode; the bridgeless PFC power main loop module comprising: a first inductor L1, a first NMOS tube Q1, a second NMOS tube Q2, a third NMOS tube Q3, a fourth NMOS tube Q4, and a bus capacitor Cb, wherein a first end of the first inductor L1 is electrically connected with a first AC end, a second end of the first inductor L1 is electrically connected with a source electrode of the first NMOS tube Q1, a drain electrode of the first NMOS tube Q1 is electrically connected with a positive bus, a source electrode of the first NMOS tube Q1 is electrically connected with a drain electrode of the second NMOS tube Q2, and a source electrode of the second NMOS tube Q2 is electrically connected with a bus ground; a source electrode of the third NMOS tube Q3 is electrically connected with a drain electrode of the fourth NMOS tube Q4, a drain electrode of the third NMOS tube Q3 is electrically connected with the positive bus, a source electrode of the fourth NMOS tube Q4 is electrically connected with the bus ground, and the source electrode of the third NMOS tube Q3 is also electrically connected with a second AC end; the positive bus and the bus ground are respectively electrically connected with a positive electrode of a battery and a negative electrode of the battery, the AC port comprises the first AC end and the second AC end, and the PFC bus comprises the positive bus and the bus ground; when the bridgeless PFC circuit works in a forward charging mode, the impedance control unit is configured to allow a surge current to pass through a loop formed by the bypass diode, the bus capacitor, and the third NMOS tube Q3 or the fourth NMOS tube Q4 to absorb surge energy, so as to realize forward surge protection, and the bus capacitor is connected between the positive bus and the bus ground; when the bridgeless PFC circuit works in an inverter mode, the impedance control unit is configured to limit an impact current generated at a moment when a capacitive load is connected, so as to avoid damage of the third NMOS tube Q3 and the fourth NMOS tube Q4 caused by the impact current, wherein the capacitive load is a load connected with the AC port in the inverter mode.

[0042] In the above embodiment, in the forward charging mode, the impedance control unit of the surge protection module allows the surge current to pass through the loop formed by the bypass diode, the bus capacitor, and the third NMOS tube Q3 or the fourth NMOS tube Q4 to absorb the surge energy, so as to realize the forward surge protection; in the inverter mode, the impedance control unit limits the impact current generated at the moment when the capacitive load is connected, so as to avoid the damage of the third NMOS tube Q3 and the fourth NMOS tube Q4 caused by the impact current, thereby solving the problem of "trade-off" in the bidirectional working, and improving the reliability and adaptability of the vehicle-mounted power supply system under complex working conditions.

[0043] The bridgeless PFC circuit of the embodiment realizes surge protection in forward working and impact current protection in inverter working through the cooperation of the surge protection module and the bridgeless PFC power main loop module. In the forward charging mode, when the lightning surge comes from the power grid side, the impedance control unit allows the surge current to pass through the loop formed by the bypass diode, the bus capacitor and the third NMOS tube Q3 or the fourth NMOS tube Q4, for example, the fourth NMOS tube Q4 in the positive half cycle and the third NMOS tube Q3 in the negative half cycle, and the surge energy is absorbed by the bus capacitor, thereby realizing the forward surge protection of the circuit. In the inverter mode, when the external capacitive load is connected (or the load is repeatedly added), an impact current is generated, and at this time, the impedance control unit limits the impact current so that it cannot be too large, thereby avoiding damage to the third NMOS tube Q3 and the fourth NMOS tube Q4 due to the too large impact current, and ensuring the normal working of the circuit in the inverter mode. In the forward charging mode, when the transient high-voltage surge (such as lightning) from the power grid invades from the AC port, the surge current will first pass through the surge protection module (i.e. the series connection of the bypass diode and the impedance control unit) to the bus capacitor of the DC bus, forming an energy absorption loop; the huge surge energy is bypassed and quickly absorbed by the bus capacitor, thereby protecting the switching tube in the PFC power main loop from being damaged by high-voltage impact. In the reverse inverter mode, when the external capacitive load is connected, a transient impact current may be generated, and at this time, the impedance control unit is configured to limit this impact current. It controls the impedance in the circuit so that the impact current will not be too large, thereby avoiding damage to the third NMOS tube Q3 and the fourth NMOS tube Q4 due to the too large current stress. This is to protect the power tube by limiting the current with impedance, and to ensure the stable working of the circuit in the inverter mode. In related technologies, it is difficult to simultaneously meet the surge protection and inverter reliability requirements in bidirectional working. If the surge protection is emphasized, the short circuit risk in inverter working will be increased; if the inverter reliability is optimized, the forward protection performance is often sacrificed. The bridgeless PFC circuit in the embodiment can effectively absorb the surge energy in the forward charging mode and protect the circuit from the impact of lightning surge, and can limit the impact current generated when the capacitive load is connected in the inverter mode and protect the power tube, thereby solving the problem of “trade-off” in bidirectional working in related technologies. In the forward charging mode, the lightning surge from the power grid side can be effectively resisted, and the circuit elements are protected from damage by the surge current; in the inverter mode, the power tube is protected from damage due to the impact current generated when the capacitive load is connected, thereby improving the reliability of the entire bridgeless PFC circuit in bidirectional working and enabling it to work stably under complex working conditions. Figure 3 The middle Vdc corresponds to the positive bus, GND corresponds to the bus ground, and AC1 and AC2 correspond to the first and second AC ends, respectively.

[0044] A very advanced and efficient topology in the field of power electronics, the totem-pole bridgeless PFC has a bidirectional control principle. In this topology, the four transistors are divided into two groups, playing different roles. Fast Leg: composed of the first NMOS transistor Q1 and the second NMOS transistor Q2, which work at a very high switching frequency (such as tens to hundreds of kHz), responsible for implementing voltage chopping, boosting or bucking, is the core of power factor correction and inverter waveform synthesis. Slow Leg: composed of the third NMOS transistor Q3 and the fourth NMOS transistor Q4, which only switch at the power frequency (50Hz or 60Hz) of alternating current, responsible for switching the current path in the positive and negative half cycles of alternating current, with very low switching loss.

[0045] In an optional embodiment, as shown in Figure 4 or Figure 5 The bypass diode includes a first diode D1 and a second diode D2, and the impedance control unit includes one of the following: a switching device, wherein when the bridgeless PFC circuit operates in the forward charging mode, the switching device is in the on state, and when the bridgeless PFC circuit operates in the inverter mode, the switching device is in the off state; a current-limiting resistor device.

[0046] In the above embodiment, the bypass diode is divided into a first diode D1 and a second diode D2, and the impedance control unit uses a switching device or a current-limiting resistor device. In the forward charging mode, the switching device is turned on or the current-limiting resistor device is used, so that the surge current passes through the bypass diode, the bus capacitor and the third NMOS transistor Q3 or the fourth NMOS transistor Q4 to form a loop to absorb the surge energy, achieving forward surge protection; in the inverter mode, the switching device is turned off or the current-limiting resistor device is used to limit the impact current generated when the capacitive load is connected, to avoid damage to the third NMOS transistor Q3 and the fourth NMOS transistor Q4 by the impact current.

[0047] When the impedance control unit is a switching device, the switching device is turned on in the forward charging mode to provide a low-impedance path for the inrush current, and the bypass diode and the bus capacitor cooperate to absorb the surge energy; in the inverter mode, the switching device is turned off to cut off the surge protection branch, avoiding the formation of excessive stress by the impact current of the capacitive load through the branch. When the impedance control unit is a current-limiting resistor device, in the forward charging mode, the resistance does not affect the effective discharge of the inrush current (the surge energy is mainly absorbed by the bus capacitor); in the inverter mode, the resistance directly limits the peak value of the impact current when the capacitive load is connected, protecting the third NMOS tube Q3 and the fourth NMOS tube Q4. In actual application, the controller can be used to actively control the on-off of the switching device. When in the forward charging mode, the controller can send a driving signal to the switching device (such as an NMOS tube or other switching tube) to turn on the switching device. At this time, the surge protection module provides a low-impedance path for the inrush current, and the surge energy can be smoothly discharged. When in the reverse inverter mode, the controller can send a turn-off signal to the switching device. At this time, the path is cut off or the impact current is limited to a safe range by the current-limiting resistor, thereby preventing large current (especially the impact current when the capacitive load is suddenly added) from flowing into the inverter side power tube through the path, and playing a protection role. In related technologies, the bidirectional bridgeless PFC circuit needs surge protection in the forward charging mode and needs to limit the impact current in the inverter mode, but it is difficult to meet both needs at the same time. The present embodiment solves this contradiction by configuring a bypass diode and an impedance control unit. In the forward charging mode, the bypass path is provided by the on of the switching device or the current-limiting resistor, which effectively absorbs the surge energy and protects the circuit; in the inverter mode, the impact current is limited by the off of the switching device or the current-limiting resistor, which protects the power tube. The present embodiment effectively absorbs the surge energy through the bypass diode and the impedance control unit, prevents damage to the circuit elements by the inrush current, limits the impact current through the impedance control unit to protect the power tube and avoid damage due to excessive current stress. The impedance control is realized by the switching device or the current-limiting resistor, which simplifies the circuit design and reduces the cost; two implementation methods are provided, which can select the appropriate impedance control unit according to the specific application scene, and improve the design flexibility.

[0048] In an alternative embodiment, as Figure 4As shown, the switch device includes a fifth NMOS tube Q5 and a sixth NMOS tube Q6, wherein the drain of the fifth NMOS tube Q5 is electrically connected with the first alternating current end, the source of the fifth NMOS tube Q5 is electrically connected with the anode of the first diode D1, and the cathode of the first diode D1 is electrically connected with the positive bus; the cathode of the second diode D2 is electrically connected with the first alternating current end, the anode of the second diode D2 is electrically connected with the source of the sixth NMOS tube Q6, and the drain of the sixth NMOS tube Q6 is electrically connected with the bus ground; when the bridgeless PFC circuit works in the forward charging mode, the fifth NMOS tube Q5 and the sixth NMOS tube Q6 are both in the on state, and when the bridgeless PFC circuit works in the inverter mode, the fifth NMOS tube Q5 and the sixth NMOS tube Q6 are both in the off state.

[0049] In the above embodiment, in the forward charging mode, the fifth NMOS tube Q5 and the sixth NMOS tube Q6 are both turned on, the inrush current can be absorbed through the bypass diode, the bus capacitor and the loop formed by the third NMOS tube Q3 or the fourth NMOS tube Q4 to absorb the surge energy, and the forward surge protection is realized; in the inverter mode, the fifth NMOS tube Q5 and the sixth NMOS tube Q6 are both turned off, the impact current generated when the capacitive load is connected can be limited, and the third NMOS tube Q3 and the fourth NMOS tube Q4 are prevented from being damaged by the impact current.

[0050] When the bridgeless PFC circuit works in the forward charging mode, the fifth NMOS tube Q5 and the sixth NMOS tube Q6 are both controlled to be in the on state (equivalent to a closed switch), and taking the positive half cycle surge as an example, when the positive polarity surge invades from the first alternating current end, the current flows through the path: the first alternating current end→the turned-on fifth NMOS tube Q5→the first diode D1→the positive bus→the bus capacitor Cb→the bus ground→the turned-on fourth NMOS tube Q4→the second alternating current end, the impedance of this path is very low, which provides a high-efficiency discharge channel for the surge energy, so that the surge energy can be quickly absorbed by the bus capacitor; the negative half cycle surge is similar. When the bridgeless PFC circuit works in the reverse inverter mode, the fifth NMOS tube Q5 and the sixth NMOS tube Q6 are both controlled to be in the off state, the surge protection branch is completely cut off, the impact current when the external capacitive load is suddenly connected is prevented from passing through the bypass diode-switch branch to form an abnormal path, the impact current is ensured to only flow through the bridgeless PFC main circuit and be constrained by the inherent characteristics of the main circuit, and the power tube current stress overload is prevented.

[0051] In an optional embodiment, the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6 are both electrically connected with the controller, and the controller is configured to control the bridgeless PFC circuit to work in the forward charging mode or the inverter mode by detecting the connection state signal of the charging gun or the CAN bus instruction of the whole vehicle.

[0052] In the above embodiment, the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6 are electrically connected with the controller. The controller can accurately control the switching of the bridgeless PFC circuit between the forward charging mode and the inverter mode by detecting the connection state signal of the charging gun or the CAN bus command of the whole vehicle, so as to realize flexible and accurate control of the bidirectional working mode.

[0053] The connection state signal of the charging gun is a physical layer signal. When the charging gun is inserted into the charging port of the vehicle, the connection confirmation contact will generate a high / low level signal. The CAN bus command of the whole vehicle is a network communication layer command. The vehicle gateway or the battery management system (BMS) will issue a command through the CAN bus to require entering the charging or discharging (V2L) mode according to the driver's setting or the vehicle state. When the controller confirms that the vehicle needs to perform grid charging (i.e. the forward charging mode) through any of the above signals, it will output a high level driving signal to the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6, so that they are turned on. At this time, the surge protection module is in a "low impedance standby" state. When the controller confirms that the vehicle needs to perform external discharging (i.e. the inverter mode), it will output a low level (or zero level) driving signal to the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6, so that they are turned off. At this time, the surge protection module is in a "high impedance blocking" state. The controller determines that the bridgeless PFC circuit needs to work in the forward charging mode by detecting the connection state signal of the charging gun or the CAN bus command of the whole vehicle. At this time, the controller sends a control signal to make the fifth NMOS tube Q5 and the sixth NMOS tube Q6 both in the on state, thereby providing a bypass path for the surge current and achieving surge protection. The controller determines that the bridgeless PFC circuit needs to work in the inverter mode by detecting the connection state signal of the charging gun or the CAN bus command of the whole vehicle. At this time, the controller sends a control signal to make the fifth NMOS tube Q5 and the sixth NMOS tube Q6 both in the off state, thereby blocking the bypass path and limiting the impact current generated by the capacitive load during access, protecting the power tube.

[0054] In an optional embodiment, the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6 are electrically connected with the controller. When the controller detects that the bridgeless PFC circuit is currently working in the forward charging mode, a high level is output to the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6. When the controller detects that the bridgeless PFC circuit is currently working in the inverter mode, a low level is output to the gate of the fifth NMOS tube Q5 and the gate of the sixth NMOS tube Q6.

[0055] In the above embodiment, when the bridgeless PFC circuit works in the forward charging mode, the controller outputs high level to the gates of the fifth NMOS Q5 and the sixth NMOS Q6, at this time, the inrush current is allowed to pass through the bypass diode, the bus capacitor and the loop formed by the third NMOS Q3 or the fourth NMOS Q4 to absorb the inrush energy, realizing the forward surge protection; when the bridgeless PFC circuit works in the inverter mode, the controller outputs low level to the gates of the fifth NMOS Q5 and the sixth NMOS Q6, so that the bridgeless PFC circuit works in the inverter mode, limiting the impact current generated in the moment of connecting the capacitive load, avoiding the damage of the third NMOS Q3 and the fourth NMOS Q4 by the impact current.

[0056] The controller directly controls the on and off states of the fifth NMOS Q5 and the sixth NMOS Q6 by outputting high level or low level to the gates of the fifth NMOS Q5 and the sixth NMOS Q6, so as to switch the working mode of the bridgeless PFC circuit. By precisely controlling the on and off states of the fifth NMOS Q5 and the sixth NMOS Q6 through the high and low level output by the controller, the bidirectional working condition is adapted. When in the forward charging mode, the controller outputs high level to the gates of the fifth NMOS Q5 and the sixth NMOS Q6, so that the two tubes are turned on, the surge protection branch forms a low resistance path, and the inrush current is absorbed through the NMOS-diode path to the bus capacitor; when in the inverter mode, the controller outputs low level, the fifth NMOS Q5 and the sixth NMOS Q6 are turned off, the surge protection branch is cut off, and the capacitive load impact current is prevented from damaging the main circuit power tube through the branch.

[0057] In an optional embodiment, the controller is also electrically connected with the gate of the first NMOS Q1, the gate of the second NMOS Q2, the gate of the third NMOS Q3 and the gate of the fourth NMOS Q4, Figure 5The controller is not shown in the above embodiment, and the controller is used to perform the following operations: when the bridgeless PFC circuit works in the forward charging mode, the third NMOS tube Q3 and the fourth NMOS tube Q4 are controlled according to the period of the alternating current, when the alternating current at the alternating current port is in the positive half cycle, the fourth NMOS tube Q4 is controlled to be continuously turned on, and the third NMOS tube Q3 is controlled to be continuously turned off, so as to provide a loop for the alternating current; when the alternating current is in the negative half cycle, the third NMOS tube Q3 is controlled to be continuously turned on, and the fourth NMOS tube Q4 is controlled to be continuously turned off, so as to provide a loop for the alternating current; at the same time, the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be high-frequency boost controlled, and the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be high-frequency complementary switching in the whole alternating current period, so as to realize the boost of the alternating input voltage; when the bridgeless PFC circuit works in the inverter mode, in the positive half cycle of the expected output sine wave alternating current, the fourth NMOS tube Q4 is controlled to be continuously turned on, and the third NMOS tube Q3 is controlled to be continuously turned off, so as to provide a path for the output current; in the negative half cycle of the expected output sine wave alternating current, the third NMOS tube Q3 is controlled to be continuously turned on, and the fourth NMOS tube Q4 is controlled to be continuously turned off, so as to provide a path for the output current; at the same time, the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be high-frequency inverter controlled, and the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be high-frequency complementary switching in the whole alternating current period, so as to chop and reduce the direct current voltage on the PFC bus, cooperate with the high-frequency synchronous switching of the third NMOS tube Q3 and the fourth NMOS tube Q4, and finally synthesize a standard sine wave alternating current at the alternating current port and output to the outside.

[0058] In the above embodiment, in the forward charging mode, the third NMOS tube Q3 and the fourth NMOS tube Q4 are controlled to provide a loop for the alternating current, and the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to realize the boost of the alternating input voltage; in the inverter mode, the third NMOS tube Q3 and the fourth NMOS tube Q4 are controlled to provide a path for the output current, and the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be high-frequency inverter controlled and cooperate with the high-frequency synchronous switching of the third NMOS tube Q3 and the fourth NMOS tube Q4, so as to synthesize a standard sine wave alternating current at the alternating current port and output to the outside.

[0059] When the bridgeless PFC circuit works in the forward charging mode, according to the period of the alternating current, the third NMOS tube Q3 and the fourth NMOS tube Q4 are controlled synchronously at the power frequency, for example, in the positive half cycle, the fourth NMOS tube Q4 is controlled to be continuously turned on, and the third NMOS tube Q3 is controlled to be continuously turned off, so as to provide a loop for the alternating current; in the negative half cycle, the third NMOS tube Q3 is controlled to be continuously turned on, and the fourth NMOS tube Q4 is controlled to be continuously turned off, so as to provide a loop for the alternating current; at the same time, the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be switched at high frequency, so as to realize the step-up of the alternating input voltage. When the bridgeless PFC circuit works in the inverter mode, in the positive half cycle of the expected output sine wave alternating current, the fourth NMOS tube Q4 is controlled to be continuously turned on, and the third NMOS tube Q3 is controlled to be continuously turned off, so as to provide a path for the output current; in the negative half cycle of the expected output sine wave alternating current, the third NMOS tube Q3 is controlled to be continuously turned on, and the fourth NMOS tube Q4 is controlled to be continuously turned off, so as to provide a path for the output current; at the same time, the first NMOS tube Q1 and the second NMOS tube Q2 are controlled to be switched at high frequency, so as to chop and step down the direct current voltage on the PFC bus, cooperate with the power frequency synchronous switching of the third NMOS tube Q3 and the fourth NMOS tube Q4, and finally synthesize a standard sine wave alternating current at the alternating current port and output outward. The bridgeless PFC power main circuit module part in the embodiment is similar to the bidirectional totem pole PFC circuit in the related art, and the bidirectional conversion technology in the related art is mature, which will not be described herein.

[0060] In an optional embodiment, as shown in FIG. 6, the current-limiting resistor device includes a first resistor R1 and a second resistor R2, wherein a negative electrode of a first diode D1 is electrically connected with the positive bus, a positive electrode of the first diode D1 is electrically connected with the first alternating current end through the first resistor R1, a negative electrode of a second diode D2 is electrically connected with the first alternating current end, and a positive electrode of the second diode D2 is electrically connected with the bus ground through the second resistor R2. Figure 5

[0061] In the above embodiment, the current-limiting resistor device includes the first resistor R1 and the second resistor R2, the positive electrode of the first diode D1 is electrically connected with the first alternating current end through the first resistor R1, the negative electrode of the first diode D1 is electrically connected with the positive bus, the negative electrode of the second diode D2 is electrically connected with the first alternating current end, and the positive electrode of the second diode D2 is electrically connected with the bus ground through the second resistor R2, which can effectively realize surge protection in the forward charging mode, limit the impact current in the moment of the capacitive load access in the inverter mode, avoid damage to the NMOS tube, solve the problem of "trade-off" in bidirectional operation, and improve the reliability and adaptability of the vehicle-mounted power supply system under complex working conditions.

[0062] ​When working in the forward charging mode, the grid-side surge current forms a path through the first AC terminal → the first resistor R1 → the first diode D1 → the positive bus → the bus capacitor Cb → the fourth NMOS Q4 → the second AC terminal, or forms a path through the second AC terminal → the third NMOS Q3 → the positive bus → the bus capacitor Cb → the second resistor R2 → the second diode D2 → the first AC terminal, and the resistors do not hinder the effective discharge of surge energy, and the bus capacitor can fully absorb the surge energy to achieve lightning surge protection. When working in the inverter mode, the impact current generated by the sudden addition of the external capacitive load will be directly limited by the first resistor R1 and the second resistor R2 if it attempts to flow through the diode-resistor branch, thereby avoiding damage to the third NMOS Q3 and the fourth NMOS Q4 caused by excessive impact current, while not affecting the normal inverter operation of the main circuit. The present embodiment does not require additional control logic, but only uses the hardware topology of resistors and diodes to simultaneously meet the requirements of forward surge protection and inverter impact suppression, thereby completely solving the core contradiction of "either this or that"; the resistors and diodes are mature passive devices with simple structure and strong anti-interference ability, and there is no risk of driving failure of switching devices, while reducing control complexity and hardware cost.

[0063] In an optional embodiment, the resistance values of the first resistor R1 and the second resistor R2 satisfy the following condition: in the inverter mode, the peak value of the impact current is less than a preset current threshold.

[0064] In the above embodiment, in the inverter mode of the bridgeless PFC circuit, the first resistor and the second resistor can limit the impact current generated when the capacitive load is connected, so that the peak value of the impact current is less than a preset current threshold, thereby avoiding damage to the third NMOS Q3 and the fourth NMOS Q4 caused by the impact current, and in combination with the bypass diode of the surge protection module, the impedance control unit, and the bridgeless PFC power main circuit module, the surge current can be allowed to pass through the circuit formed by the bypass diode, the bus capacitor Cb, the third NMOS Q3, or the fourth NMOS Q4 to absorb surge energy in the forward charging mode, thereby achieving forward surge protection.

[0065] According to the inrush current characteristics generated when the capacitive load is connected in the inverter mode, the resistance value needs to meet the condition that the peak value of the inrush current is less than a preset current threshold. The threshold is usually determined based on the maximum withstand current of the third NMOS tube Q3 and the fourth NMOS tube Q4, for example, the preset current threshold is 70 A (or 80 A, or other values). When the inrush current in the inverter mode tries to flow through the diode-resistor branch, the current limiting effect of the resistor can strictly control the peak value of the current within a safe range, which neither affects the effective discharge of the surge current during forward charging (the surge energy is mainly absorbed by the bus capacitor, and the voltage drop of the resistor can be ignored), nor can it accurately protect the power tube during inverter. In the reverse inverter mode, when the capacitive load is connected, the DC bus voltage (V_dc) will charge the load capacitor through a loop composed of the resistance (R), the parasitic parameters of the circuit and the load capacitance (such as Ci in Figure 5 The peak value of the inrush current (I_inrush) at this moment is mainly determined by the DC bus voltage and the total impedance in the loop. Since the impedance in the loop at this moment is mainly the first resistance or the second resistance (denoted as R_limit), the peak value of the inrush current can be approximately estimated as: I_inrush≈V_dc / R_limit. The preset current threshold is a key design target, which is usually set to the maximum pulse current that the most fragile element (such as the third NMOS tube Q3 and the fourth NMOS tube Q4) in the circuit can safely withstand. By explicitly defining that the resistance values of the first resistance R1 and the second resistance R2 must be such that the peak value of the inrush current is less than the preset current threshold, the present scheme can effectively suppress the instantaneous large current generated when the capacitive load is suddenly added, ensure that the current does not exceed the rated withstand capability of the power devices such as the NMOS tube on the inverter side, avoid device overcurrent burnout, and significantly improve the inverter reliability.

[0066] In an optional embodiment, the bridgeless PFC circuit further comprises a communication module connected between the controller and an external device, configured to receive a control instruction sent by the external device and transmit the control instruction to the controller, and the controller adjusts the working mode of the bridgeless PFC circuit according to the control instruction, and the working mode includes the forward charging mode and the inverter mode.

[0067] In the above embodiment, the bridgeless PFC circuit can receive the control instruction of the external device through the communication module and transmit it to the controller, so that the controller adjusts the forward charging mode and the inverter mode of the circuit according to the instruction, which enhances the flexibility and remote controllability of the working mode adjustment of the circuit.

[0068] The communication module connects the controller with external devices (such as a smartphone APP, a home energy management system, a charging station background system, etc.), receives mode switching instructions (forward charging / inversion) sent by the external devices, and transmits them to the controller; the controller adjusts the gate level (high / low level) of the fifth NMOS tube Q5 and the sixth NMOS tube Q6 according to the instructions, thereby switching the working mode of the circuit, and at the same time cooperatively controls the switching state of the first NMOS tube Q1 to the fourth NMOS tube Q4 to adapt to the energy conversion demand in the corresponding mode. Through the communication module, external instructions are accessed, supporting remote control, multi-device linkage and other intelligent scenarios, adapting to the intelligent development trend of electric vehicles (such as convenient operation of the V2L function by the user), and directly triggering mode switching by external instructions without relying on hardware plugging (such as a charging gun), supporting more complex working condition scheduling (such as timed charging, load priority control), and further improving the adaptability and user experience of the vehicle-mounted power supply system.

[0069] The application also provides a vehicle-mounted charger comprising the bridgeless PFC circuit of any one of the preceding.

[0070] The main function of an on-board charger is to convert AC power from the grid into DC power suitable for charging the electric vehicle's battery. It can also invert the DC power from the battery back into AC power to supply AC appliances. The bridgeless PFC circuit plays a power factor correction role. It controls the gates of each NMOS transistor through a controller to boost the AC input voltage and chop down the DC voltage on the PFC bus. For example, in forward charging mode, the controller performs power frequency synchronization control on the third NMOS transistor Q3 and the fourth NMOS transistor Q4 according to the AC current cycle, providing a circuit for the AC current. Simultaneously, it performs high-frequency boost control on the first NMOS transistor Q1 and the second NMOS transistor Q2 to boost the AC input voltage. In inverter mode, the controller similarly controls the third NMOS transistor Q3 and the fourth NMOS transistor Q4 to provide a path for the output current, and performs high-frequency inverter control on the first NMOS transistor Q1 and the second NMOS transistor Q2 to chop down the DC voltage on the PFC bus, ultimately synthesizing a standard sinusoidal AC current at the AC port and outputting it. The application of bridgeless PFC circuits facilitates bidirectional charging of on-board chargers, enabling vehicles to not only draw power from the grid but also invert DC power from the battery into AC power when needed, feeding back into household electricity or the grid. This improves the energy efficiency and expands the application scenarios of vehicles. Furthermore, the surge protection module in the bridgeless PFC circuit protects the on-board charger from grid surges in forward charging mode, enhancing circuit reliability. The inrush current limiting function of the bridgeless PFC circuit protects the on-board charger from capacitive load surges in inverter mode, further improving circuit reliability. By integrating bridgeless PFC circuits, on-board chargers can operate stably under complex operating conditions, improving overall reliability.

[0071] Figure 6 Is with Figure 4 The corresponding simulation circuit diagram, that is, the scheme using switching devices (such as the fifth NMOS transistor Q5 and the sixth NMOS transistor Q6), Figure 7 Is with Figure 6 Example diagram of simulation results recorded for the corresponding capacitive load. Figure 6 In the code, PFC_FAST_H, PFC_FAST_L, PFC_SLOW_L, and PFC_SLOW_H are the gate control signals for Q1, Q2, Q3, and Q4, respectively, while Sugre_ON_OFF is the signal controlling the gates of Q5 and Q6. Figure 6 Ci and Ri are used to simulate the capacitance and resistance of capacitive loads, such as Ci = 100uF, Ri = 20Ω. Resr is used to simulate the bus capacitance Cb (e.g., ...). Figure 6The internal resistance of the capacitor (e.g., 2200uF) is, for example, 20mΩ, Vout_ac is the output AC voltage obtained in the inverter mode, and Io_ac is the output current in the inverter mode. Figure 6 The right side of the middle is a signal source for circuit simulation, for example, V3 and VTRI1 are sine wave and triangle wave signals, respectively, and VSQ4 and VSQ5 are power frequency signals. Finally, in order to obtain the control signals for the gates of the NMOS transistors, such as PFC_FAST_H, PFC_FAST_L, PFC_SLOW_L, PFC_SLOW_H, and Sugre_ON_OFF, etc. Figure 6 MULT1 and LIM2 in the middle represent a multiplier and a limiter, respectively. Figure 7 The upper half of the middle corresponds to Sugre_ON_OFF being high, i.e., the forward surge protection path is turned on, and the inverter is loaded with 100uF / -100V capacitance. At this time, Io_ac≈476A. Figure 7 The lower half of the middle corresponds to Sugre_ON_OFF being low, i.e., the forward surge protection path is turned off, and the inverter is loaded with 100uF / -100V capacitance. At this time, Io_ac≈71A.

[0072] Figure 8 is the corresponding circuit simulation circuit diagram of Figure 5 The difference between Figure 8 and Figure 6 is that the fifth NMOS transistor Q5 and the sixth NMOS transistor Q6 are replaced by the first resistor R1 and the second resistor R2, respectively, such as R1=R2=20Ω. Figure 9 is the corresponding circuit simulation circuit diagram of Figure 8 The simulation result example diagram of the corresponding capacitance load is shown, the inverter is loaded with 100uF / -100V capacitance, and at this time, Io_ac≈69A.

[0073] and Figure 2 When a 100uF / -100V capacitance load is suddenly added to the circuit without a switching device and a current-limiting resistor, a peak impact current of about 476A can be generated. However, in the circuit with a switching device (such as the fifth NMOS transistor Q5 and the sixth NMOS transistor Q6) or a current-limiting resistor (such as the first resistor R1 and the second resistor R2), the sudden capacitance load current Io_ac under the same conditions can be limited to about 70A. This greatly reduces the current impact stress generated when the capacitance load is suddenly added, effectively protects the inverter power circuit, and enhances the reliability and load adaptability of the inverter working state, while retaining the surge protection function when the power supply is working forwardly.

[0074] Compared with the related art, the scheme of the embodiment of the application has at least the following technical effects: the current impact stress generated when a large sudden capacitive load is reduced, effectively protects the inverter power circuit, strengthens the reliability and load adaptability of the inverter working state, and at the same time retains the surge protection function when the power supply works in the forward direction.

[0075] The above-described are only exemplary embodiments of the present disclosure, and cannot limit the scope of the present disclosure. That is, any equivalent changes and modifications made in accordance with the teachings of the present disclosure are still within the scope of the present disclosure.

[0076] The present application is intended to cover any variations, uses, or adaptive changes of the present disclosure that follow the general principles of the present disclosure and include common knowledge or conventional technical means in the technical field not recorded in the present disclosure.

Claims

1. A bridgeless PFC circuit, characterized in that, include: Bridgeless PFC power main circuit module and surge protection module, among which, The surge protection module is connected between the AC port and the PFC bus. The surge protection module includes a bypass diode and an impedance control unit, and the impedance control unit is connected in series with the bypass diode. The bridgeless PFC power main circuit module includes: a first inductor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, a fourth NMOS transistor, and a bus capacitor. The first terminal of the first inductor is electrically connected to a first AC terminal, and the second terminal of the first inductor is electrically connected to the source of the first NMOS transistor. The drain of the first NMOS transistor is electrically connected to the positive bus, and the source of the first NMOS transistor is electrically connected to the drain of the second NMOS transistor. The source of the second NMOS transistor is electrically connected to the bus ground. The source of the third NMOS transistor is electrically connected to the drain of the fourth NMOS transistor, and the drain of the third NMOS transistor is electrically connected to the positive bus. The source of the fourth NMOS transistor is electrically connected to the bus ground, and the source of the third NMOS transistor is also electrically connected to a second AC terminal. The positive bus and the bus ground are respectively electrically connected to the positive terminal and the negative terminal of the battery. The AC port includes the first AC terminal and the second AC terminal. The PFC bus includes the positive bus and the bus ground. When the bridgeless PFC circuit operates in the forward charging mode, the impedance control unit is configured to allow surge current to absorb surge energy through the loop formed by the bypass diode, the bus capacitor and the third NMOS transistor or the fourth NMOS transistor to achieve forward surge protection. The bus capacitor is connected between the positive bus and the bus ground. When the bridgeless PFC circuit operates in inverter mode, the impedance control unit is configured to limit the inrush current generated when a capacitive load is connected, so as to avoid damage to the third NMOS transistor and the fourth NMOS transistor by the inrush current. The capacitive load is the load connected to the AC port in inverter mode. The bypass diode includes a first diode and a second diode, and the impedance control unit includes a switching device. When the bridgeless PFC circuit operates in the forward charging mode, the switching device is in the on state, and when the bridgeless PFC circuit operates in the inverter mode, the switching device is in the off state. The switching device includes a fifth NMOS transistor and a sixth NMOS transistor. The drain of the fifth NMOS transistor is electrically connected to the first AC terminal, the source of the fifth NMOS transistor is electrically connected to the anode of the first diode, and the cathode of the first diode is electrically connected to the positive bus. The cathode of the second diode is electrically connected to the first AC terminal, the anode of the second diode is electrically connected to the source of the sixth NMOS transistor, and the drain of the sixth NMOS transistor is electrically connected to the bus ground. When the bridgeless PFC circuit operates in the forward charging mode, both the fifth and sixth NMOS transistors are in the on state. When the bridgeless PFC circuit operates in the inverter mode, both the fifth and sixth NMOS transistors are in the off state.

2. The bridgeless PFC circuit according to claim 1, characterized in that, The gates of the fifth NMOS transistor and the sixth NMOS transistor are both electrically connected to the controller. The controller is configured to control the bridgeless PFC circuit to operate in the forward charging mode or the inverter mode by detecting the connection status signal of the charging gun or the vehicle CAN bus command.

3. The bridgeless PFC circuit according to claim 1, characterized in that, The gates of the fifth NMOS transistor and the sixth NMOS transistor are both electrically connected to the controller. When the controller detects that the bridgeless PFC circuit is currently operating in the forward charging mode, it outputs a high level to the gates of the fifth NMOS transistor and the sixth NMOS transistor; when the controller detects that the bridgeless PFC circuit is currently operating in the inverter mode, it outputs a low level to the gates of the fifth NMOS transistor and the sixth NMOS transistor.

4. The bridgeless PFC circuit according to claim 3, characterized in that, The controller is also electrically connected to the gates of the first NMOS transistor, the second NMOS transistor, the third NMOS transistor, and the fourth NMOS transistor, respectively. The controller is used to perform the following operations: When the bridgeless PFC circuit operates in the forward charging mode, the third NMOS transistor and the fourth NMOS transistor are controlled synchronously at the power frequency according to the AC current cycle. When the AC current at the AC port is in the positive half-cycle, the fourth NMOS transistor is controlled to be continuously turned on, and the third NMOS transistor is controlled to be continuously turned off, providing a loop for the AC current. When the AC current is in the negative half-cycle, the third NMOS transistor is controlled to be continuously turned on, and the fourth NMOS transistor is controlled to be continuously turned off, providing a loop for the AC current. At the same time, the first NMOS transistor and the second NMOS transistor are controlled to perform high-frequency complementary switching throughout the entire AC current cycle, so as to boost the AC input voltage. When the bridgeless PFC circuit operates in the inverter mode, during the positive half-cycle of the desired sinusoidal AC output, the fourth NMOS transistor is continuously turned on, and the third NMOS transistor is continuously turned off, providing a path for the output current. During the negative half-cycle of the desired sinusoidal AC output, the third NMOS transistor is continuously turned on, and the fourth NMOS transistor is continuously turned off, providing a path for the output current. Simultaneously, high-frequency inverter control is applied to the first and second NMOS transistors. Throughout the entire AC cycle, the first and second NMOS transistors are controlled to perform high-frequency complementary switching, chopping and reducing the DC voltage on the PFC bus. This, combined with the power frequency synchronous switching of the third and fourth NMOS transistors, ultimately synthesizes a standard sinusoidal AC output at the AC port.

5. The bridgeless PFC circuit according to claim 3, characterized in that, The bridgeless PFC circuit further includes a communication module, which is connected between the controller and an external device to receive control commands sent by the external device and transmit the control commands to the controller. The controller adjusts the operating mode of the bridgeless PFC circuit according to the control commands. The operating mode includes the forward charging mode and the inverter mode.

6. An on-board charger, characterized in that, Includes the bridgeless PFC circuit according to any one of claims 1 to 5.

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