Temperature sensor, chip and mobile terminal

Abstract

The invention provides a temperature sensor, a chip and a mobile terminal, and belongs to the technical field of temperature detection, the temperature sensor comprises a temperature acquisition structure, an analog-to-digital conversion structure and a filtering structure, and the temperature acquisition structure, the analog-to-digital conversion structure and the filtering structure are electrically connected in sequence; the temperature acquisition structure is used for acquiring temperature information of a to-be-measured structure and generating an analog signal containing the temperature information, the analog-to-digital conversion structure is used for converting the analog signal into a digital signal containing the temperature information, and the filtering structure is used for filtering the digital signal; a quantizer in the analog-to-digital conversion structure comprises a first-order passive integral structure, and the order of the filtering structure is larger than or equal to a first preset order and smaller than or equal to a second preset order, so that the oversampling rate of the analog-to-digital conversion structure is lower than a preset sampling rate. The problem that the temperature acquisition precision and the temperature acquisition speed cannot be considered at the same time in the prior art is solved, and the temperature acquisition speed is improved on the premise of ensuring the temperature acquisition precision and not increasing extra power consumption.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of temperature detection, and in particular to a temperature sensor, a chip and a mobile terminal. BACKGROUND

[0002] Temperature sensor chips are widely used in various types of devices due to their small area and ultra-low power consumption. By detecting the temperature of a to-be-detected structure in real time, the temperature information of the outside world is accurately collected, and the temperature information is quantized into a digital code stream by using an internally integrated analog-to-digital converter. Finally, the actual temperature information is converted through coding.

[0003] In order to achieve higher temperature collection accuracy, a temperature sensor generally uses a higher oversampling rate, that is, high-precision temperature sensors are mostly based on a very high oversampling rate. However, too high an oversampling rate will lengthen the temperature conversion time, and for application scenarios where the temperature changes very quickly, how to make the temperature collection accuracy higher while the temperature information is detected faster is a key problem to be solved. In order to reduce the temperature conversion time, most designs rely on a higher clock sampling rate, but a higher sampling rate will increase the power consumption of the temperature sensor, and a higher clock speed will also deteriorate the performance of the analog circuit, affecting the final temperature measurement accuracy. In summary, how to effectively improve the temperature conversion speed while ensuring the accuracy of the temperature sensor without additional power consumption is a core problem to be solved. Especially for products with small feature sizes, such as mobile terminal products such as mobile phones, the aforementioned core problem to be solved is more prominent. SUMMARY

[0004] The present application provides a temperature sensor, a chip and a mobile terminal to solve the problem that the temperature collection accuracy and the temperature collection speed cannot be considered in the prior art. Under the premise of ensuring the temperature collection accuracy and not increasing additional power consumption, the temperature collection speed is improved.

[0005] In a first aspect, the present application provides a temperature sensor, comprising: a temperature collection structure, an analog-to-digital conversion structure and a filtering structure, the temperature collection structure, the analog-to-digital conversion structure and the filtering structure being electrically connected in sequence; the temperature collection structure is configured to collect temperature information of a to-be-detected structure and generate an analog signal containing the temperature information, the analog-to-digital conversion structure is configured to convert the analog signal into a digital signal containing the temperature information, and the filtering structure is configured to perform filtering processing on the digital signal; the quantizer in the analog-to-digital conversion structure comprises a first-order passive integration structure, and the order of the filtering structure is greater than or equal to a first preset order and less than or equal to a second preset order, so that the oversampling rate of the analog-to-digital conversion structure is lower than a preset sampling rate.

[0006] According to the temperature sensor provided in the application, the quantizer further comprises a successive approximation type analog-digital converter, and the first-order passive integration structure is used for noise shaping of a weighted output result of the successive approximation type analog-digital converter.

[0007] According to the temperature sensor provided in the application, the first-order passive integration structure comprises two passive integration modules, and the successive approximation type analog-digital converter comprises an operational amplifier and two weighted branches, the positive input end and the negative input end of the operational amplifier are electrically connected with one of the weighted branches respectively, and the passive integration modules are arranged in one-to-one correspondence with the weighted branches.

[0008] According to the temperature sensor provided in the application, the passive integration module comprises a sampling capacitor, an integration capacitor, a first switch and a second switch. The operational amplifier connecting end of the weighted branch is electrically connected with the first end of the first switch, the first end of the sampling capacitor is electrically connected with the second end of the first switch and the first end of the second switch respectively, the first end of the integration capacitor is electrically connected with the second end of the second switch and the quantization accumulation input end of the operational amplifier respectively, and the second end of the sampling capacitor and the second end of the integration capacitor are connected with a preset voltage.

[0009] According to the temperature sensor provided in the application, the analog-digital conversion structure further comprises a front-end analog-digital converter, the input end of the front-end analog-digital converter is electrically connected with the temperature acquisition structure, the output end of the front-end analog-digital converter is electrically connected with the input end of the quantizer, and the front-end analog-digital converter comprises a first-order active integrator.

[0010] According to the temperature sensor provided in the application, the front-end analog-digital converter is an incremental accumulation type analog-digital converter.

[0011] According to the temperature sensor provided in the application, the filter structure is a third-order filter structure.

[0012] According to the temperature sensor provided in the application, the filter structure is a third-order cascade integration comb filter.

[0013] According to the temperature sensor provided in the application, the temperature acquisition structure comprises a bipolar junction transistor.

[0014] In the second aspect, the application further provides a chip comprising the temperature sensor according to the first aspect.

[0015] According to the chip provided in the application, the chip is a mobile terminal system on chip.

[0016] In a third aspect, the application further provides a mobile terminal comprising the chip according to the second aspect.

[0017] Embodiments of the present application aim at quantization speed problem, and innovatively propose a new quantization idea, that is, introducing a first-order passive integration structure into a quantizer in an analog-digital conversion structure, improving quantization precision of the analog-digital conversion structure by increasing the order of the quantizer in the analog-digital conversion structure, and cooperating with a filter structure of a preset order to suppress final quantization noise out of band. Thus, in advanced process design, the oversampling rate of the analog-digital conversion structure is effectively reduced under the premise of ensuring the temperature sensor temperature collection precision unchanged, the temperature collection time is greatly reduced, a more efficient design method is provided for high-speed temperature detection. In addition, the first-order passive integration structure can improve the order of the analog-digital conversion structure and the temperature collection speed by only a small circuit cost, and the requirement for hardware is reduced, the design complexity and power consumption are saved. At the same time, the order of the filter structure is greater than or equal to the first preset order and less than or equal to the second preset order, which can not only avoid the situation that the order of the filter structure is too high, has no contribution to the temperature collection precision, and reduces the temperature collection speed, but also avoid the situation that the order of the filter structure is too low and affects the temperature collection precision. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the technical solutions of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0019] Figure 1 is a circuit structure schematic diagram of a temperature sensor provided by the present application.

[0020] Figure 2 is a circuit structure schematic diagram of a quantizer in an analog-digital conversion structure provided by the present application.

[0021] Figure 3 is a refined circuit structure schematic diagram of a temperature sensor provided by the present application. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solutions and advantages of the present application more clear, the technical solutions of the present application will be described clearly and completely in the following with reference to the drawings in the present application. Obviously, the described embodiments are some embodiments of the present application, but not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0023] The following is combined Figures 1-3 This application describes the temperature sensor, chip, and mobile terminal provided. Figure 1 This is a schematic diagram of the circuit structure of a temperature sensor provided in this application. Figure 1 As shown, the temperature sensor includes a temperature acquisition structure 1, an analog-to-digital converter (ADC) structure 2, and a filtering structure 3, which are electrically connected in sequence. The temperature acquisition structure 1 acquires the temperature information of the structure under test and generates an analog signal containing the temperature information. The ADC structure 2 converts the analog signal into a digital signal containing the temperature information. The filtering structure 3 filters the digital signal. The quantizer 21 in the ADC structure 2 includes a first-order passive integrator structure. The order of the filtering structure 3 is greater than or equal to a first preset order and less than or equal to a second preset order, so that the oversampling rate of the ADC structure 2 is lower than the preset sampling rate.

[0024] Specifically, temperature acquisition structure 1 can directly contact the structure under test or acquire temperature information through non-contact means. Temperature acquisition structure 1 can convert physical temperature into a measurable analog signal. Analog-to-digital converter structure 2 is used to convert continuously changing analog signals into discrete digital signals. Since the analog signal contains temperature information, the converted digital signal also contains temperature information. Filtering structure 3 can be a digital filtering structure used to filter the digital signal, removing noise and interference signals. The output of temperature acquisition structure 1 is electrically connected to the input of analog-to-digital converter structure 2, and the output of analog-to-digital converter structure 2 is electrically connected to the input of filtering structure 3, forming a sequentially connected signal processing link to ensure the orderly transmission of temperature information from acquisition to conversion to filtering. Quantizer 21 is the core component of analog-to-digital converter structure 2, used to convert the continuous amplitude of the analog signal output by the front-end structure into discrete digital quantities. The first-order passive integrator structure is an integrator circuit that does not contain active devices such as operational amplifiers, but consists only of passive devices such as capacitors, and can perform first-order integration operations on the input signal.

[0025] Temperature acquisition structure 1 first senses the temperature change of the structure under test and converts it into a corresponding analog signal. This analog signal containing the temperature information of the structure under test is then transmitted to analog-to-digital converter (ADC) structure 2. In ADC structure 2, quantizer 21 processes the analog signal output from the front-end structure through a first-order passive integrator, converting the analog signal into a digital signal. The digital signal containing the temperature information of the structure under test enters filter structure 3. After filtering, a high-purity digital signal is obtained. Then, subsequent signal processing circuits or interface circuits can be used to process the filtered digital signal to deduce the temperature information of the structure under test. For example, temperature acquisition structure 1 outputs a voltage signal containing temperature information. This voltage signal is continuously oversampled through quantization by ADC structure 2, thereby converting the voltage signal into a digital bitstream. The digital bitstream is then accumulated to convert it into the final temperature information. The oversampling rate refers to the ratio of the sampling frequency to the signal bandwidth. Therefore, the more times the digital bitstream is accumulated, the higher the oversampling rate of ADC structure 2, and the higher the acquisition accuracy of the digital signal. When the acquisition accuracy of the digital signal reaches a certain level, the quantization error of the analog-to-digital conversion structure 2 will not cause any loss of temperature information.

[0026] Temperature sensor chips are widely used in various types of devices due to their small size and ultra-low power consumption. They accurately acquire external temperature information by real-time detection of the structure under test, and use an internally integrated analog-to-digital converter to quantize the temperature information into a digital code stream, which is then encoded and converted into actual temperature information.

[0027] To achieve higher temperature acquisition accuracy, temperature sensors typically employ higher oversampling rates. High-precision temperature sensors are largely built upon high oversampling rates, which enhance the noise suppression capabilities of analog-to-digital converters (ADCs). However, higher oversampling rates increase temperature conversion time. For applications with rapidly changing temperatures, achieving high temperature acquisition accuracy while simultaneously enabling faster temperature detection is a critical challenge. To reduce conversion time, most designs rely on higher clock sampling rates. However, higher sampling rates increase the power consumption of the temperature sensor, and higher clock speeds degrade the performance of analog circuits, affecting the final temperature measurement accuracy. Therefore, effectively improving temperature conversion speed without increasing power consumption while maintaining sensor accuracy is a crucial issue that needs to be addressed. This is especially true for products with small feature sizes, such as mobile devices like smartphones, where this critical challenge is even more pronounced.

[0028] To address the core problems that urgently need to be solved in the aforementioned prior art, the derivation process of the technical solution in this application is described in detail below: To improve the temperature sampling speed, the analysis first examines the positive correlation between the current flowing through the analog-to-digital converter (ADC) structure 2 and the sampling speed. A higher current results in a faster sampling speed, but this comes at the cost of increased power consumption. To improve temperature detection speed without increasing power consumption, a higher-order filter structure 3 can be used. This is because the temperature data output from the ADC structure 2 needs to be acquired quickly to rapidly provide the temperature information of the measured structure. Therefore, the filter structure 3 needs to quickly filter out the digital signal output from the ADC structure 2, requiring fewer iteration points to achieve the filtering function. Thus, using a higher-order filter structure 3 achieves a better speed improvement. The transition segments to be filtered in the waveform are steep, allowing for the removal of high-frequency noise while the flat segments containing useful information can be acquired with fewer iteration points, thereby improving the temperature acquisition speed.

[0029] However, a problem arises: simply increasing the order of filter structure 3 to improve temperature acquisition speed leads to limitations; once the order of filter structure 3 reaches a certain level, higher-order filter structures 3 cannot further improve temperature acquisition accuracy. To address this issue, we analyzed whether the order could be introduced into analog-to-digital converter structure 2, making it a higher-order system to improve temperature acquisition speed. Increasing the order of analog-to-digital converter structure 2 could be achieved by adding an integrator containing active components such as operational amplifiers, but this would complicate the analog circuit design and increase the power consumption of analog-to-digital converter structure 2.

[0030] Further analysis addresses the technical problem of increased complexity and power consumption due to the introduction of a new active integrator, exploring whether the order of the analog-to-digital converter (ADC) structure 2 can be increased at a lower cost. Therefore, this embodiment does not increase the order of the ADC structure 2 by adding an active integrator. Instead, the order is introduced into the quantizer 21 within the ADC structure 2. Increasing the order of the quantizer 21 increases the overall order of the ADC structure 2, and a first-order passive integrator structure can replace the active integrator that requires an operational amplifier. Thus, while achieving the same function, it solves the technical problem of increased complexity in analog circuit design and increased power consumption in the ADC structure, resulting in lower cost and power consumption, smaller area increase, and facilitating the miniaturization of the temperature sensor.

[0031] In summary, the logical reasoning behind the technical solution of this application reveals that increasing the order of the filter structure 3 reaches a bottleneck where further improvement in accuracy becomes difficult. Therefore, increasing the order of the analog-to-digital converter (ADC) structure 2 is proposed. However, simply adding an active integrator composed of operational amplifiers incurs significant costs, area requirements, and power consumption. Further analysis suggests that the order of the ADC structure 2 can be increased by adding a simple passive integrator structure to the quantizer 21. After increasing the order of the ADC structure 2, noise is effectively suppressed, resulting in a higher proportion of useful information transmitted to the filter structure 3. This allows for data filtering with fewer iterations and a lower-order filter structure 3, enabling the acquisition of temperature-information-rich data. Ultimately, by using a passive integrator structure to increase the order of the quantizer 21 in the ADC structure 2, combined with a lower-order filter structure 3, the temperature acquisition speed is significantly improved while maintaining accuracy and low power consumption.

[0032] Therefore, this application proposes an innovative quantization approach to address the quantization speed issue. A first-order passive integrator structure is introduced into the quantizer 21 of the analog-to-digital converter (ADC) structure 2. By increasing the order of the quantizer 21, the quantization accuracy of the ADC structure 2 is improved. Simultaneously, a filter structure 3 with a preset order suppresses the final quantization noise out of band. This effectively reduces the oversampling rate of the ADC structure 2 in advanced process design while maintaining the temperature sensor's acquisition accuracy, significantly reducing the temperature acquisition conversion time and providing a more efficient design method for high-speed temperature detection. Furthermore, compared to traditional active integrators, the quantizer 21 in this application introduces a first-order passive integrator structure, eliminating the need for an active integrator and avoiding its complex timing. The order of the ADC structure 2 can be increased with minimal circuit overhead, thereby improving temperature acquisition speed. This also reduces hardware requirements, saving design complexity and power consumption, with almost no loss in power consumption, area, or temperature acquisition accuracy. This makes it suitable for applications with high real-time temperature acquisition requirements.

[0033] Furthermore, by setting the order of the filter structure 3 to be greater than or equal to the first preset order and less than or equal to the second preset order, as described in the aforementioned embodiments, it is possible to avoid the filter structure 3 having an excessively high order, which would not contribute to the temperature acquisition accuracy but would instead reduce the temperature acquisition speed, and also to avoid the filter structure 3 having an excessively low order, which would affect the temperature acquisition accuracy. It should be noted that the specific values ​​of the first preset order and the second preset order are not limited in this application embodiment, and can be specifically set according to the temperature acquisition accuracy and temperature acquisition speed requirements of the temperature sensor.

[0034] Figure 2This is a schematic diagram of the circuit structure of the quantizer in an analog-to-digital converter structure provided in this application. Combined with... Figure 1 and Figure 2 In some embodiments, the quantizer 21 further includes a successive approximation analog-to-digital converter 211, and a first-order passive integral structure is used to perform noise shaping on the weighted output of the successive approximation analog-to-digital converter 211.

[0035] Specifically, the Successive Approximation Register Analog-to-Digital Converter (SARADC) in quantizer 21 approximates and determines the digital representation of the input signal by successively comparing the input signal with the reference voltage. SARADC 211 can approximate the input analog voltage using a binary search method. The weighted output result refers to the sum of the output signals generated by each binary bit in SARADC 211 according to its weight. A first-order passive integrator is connected to the output of SARADC 211, receiving its weighted output result. The first-order passive integrator performs integration on the weighted output result, achieving noise shaping of the weighted output result. The integration process transfers high-frequency noise energy to a higher frequency band. Therefore, a noise-shaping successive approximation analog-to-digital converter (NS-SARADC) is formed by using a first-order passive integrator structure and a successive approximation analog-to-digital converter 211. The first-order passive integrator structure is used to filter and shape the noise of the weighted output result of the successive approximation analog-to-digital converter 211, transferring the noise energy from within the effective bandwidth of the temperature acquisition signal to outside the bandwidth, thereby improving the signal-to-noise ratio of the temperature acquisition signal.

[0036] Therefore, this application implements a first-order passive integral structure to perform noise shaping on the weighted output of the successive approximation analog-to-digital converter 211. This transfers noise energy from within the effective bandwidth of the temperature acquisition signal to outside the bandwidth, thereby improving the signal-to-noise ratio and conversion accuracy of the temperature acquisition signal. This allows the temperature sensor to accurately acquire temperature information even in complex electromagnetic environments, expanding the application range of the temperature sensor. Furthermore, the first-order passive integral structure enables the quantizer 21 to form a successive approximation analog-to-digital converter with noise shaping. This architecture has a first-order loop to increase the order of the quantizer 21, which in turn increases the order of the analog-to-digital conversion structure 2. This allows the order of the filter structure 3 to be appropriately reduced to achieve the same temperature acquisition accuracy, thereby reducing the oversampling rate of the analog-to-digital conversion structure 2 and increasing the temperature acquisition speed. In addition, the hardware implementation of the first-order passive integral structure is simple, requiring no additional active components and avoiding complex timing, which helps reduce the power consumption and cost of the temperature sensor.

[0037] In some embodiments, combined with Figure 1 and Figure 2 The first-order passive integrator structure includes two passive integrator modules 212. The successive approximation analog-to-digital converter 211 includes an operational amplifier 213 and two weighting branches 200. The positive input terminal 1+ and the negative input terminal 1- of the operational amplifier 213 are electrically connected to one of the weighting branches 200. The passive integrator modules 212 are configured in a one-to-one correspondence with the weighting branches 200. The passive integrator module 212 includes a sampling capacitor CS, an integrating capacitor CINT, a first switch K1, and a second switch K2. The operational amplifier connection terminal of the weighting branch 200 is electrically connected to the first terminal of the first switch K1. The first terminal of the sampling capacitor CS is electrically connected to the second terminal of the first switch K1 and the first terminal of the second switch K2. The first terminal of the integrating capacitor CINT is electrically connected to the second terminal of the second switch K2 and the quantization and accumulation input terminal of the operational amplifier 213. The second terminals of the sampling capacitor CS and the integrating capacitor CINT are connected to a preset voltage, such as, but not limited to, ground voltage.

[0038] Specifically, since the upper and lower weighted branches 200 and the upper and lower passive integration modules 212 are symmetrically configured, this section only uses... Figure 2 The above-middle weighted branch 200 and the passive integration module 212 are used as examples for explanation. The operational amplifier connection terminal of the weighted branch 200, i.e., the positive input terminal 1+ of the operational amplifier 213, is electrically connected to the left side of the first switch K1. The lower end of the sampling capacitor CS is electrically connected to the right side of the first switch K1 and the left side of the second switch K2, respectively. The lower end of the integration capacitor CINT is electrically connected to the right side of the second switch K2 and the quantization accumulation positive input terminal 2+ of the operational amplifier 213, respectively. The upper end of the sampling capacitor CS and the upper end of the integration capacitor CINT are connected to, for example, a ground voltage.

[0039] Specifically, the successive approximation analog-to-digital converter 211 approximates the input analog voltage step by step using a binary search method. It includes a sample-and-hold circuit, a digital-to-analog converter, a comparator, and a successive approximation register. The sample-and-hold circuit includes, for example: Figure 2 The weighted branch 200 shown includes multiple capacitor arrays arranged in binary weights, and also includes an operational amplifier 213. A sample-and-hold circuit is used to acquire the output signal of the front-end circuit as its input signal. In this embodiment, the input signal of the sample-and-hold circuit is the residual error signal output by the front-end analog-to-digital converter 22, i.e., the residual signal. The digital-to-analog converter generates a comparison voltage based on the output of the successive approximation register. A comparator compares the analog voltage output by the sample-and-hold circuit with the comparison voltage output by the digital-to-analog converter, controlling its output high and low levels to determine the value of the current bit. The analog voltage output by the sample-and-hold circuit is... Figure 2 The output voltage of the operational amplifier 213.

[0040] The successive approximation register is used to control the conversion process, determining the digital output bit by bit from the most significant bit to the least significant bit. The timing of each module can be coordinated using clock and control logic. Specifically, the value of each bit can be determined sequentially starting from the most significant bit, requiring a total of N clock cycles. Taking an 8-bit successive approximation analog-to-digital converter 211 as an example, after 8 comparisons, the 8-bit digital code in the successive approximation register is the final output. Each comparison halves the input voltage range, i.e., a binary search process. It should be noted that the specific structure and working principle of the successive approximation analog-to-digital converter 211 are well-known to those skilled in the art and will not be elaborated upon here.

[0041] Weighted branch 200 corresponds to the branch containing the weighted capacitor array. One weighted branch 200 is formed by the weighted capacitor array positioned at the positive input terminal 1+ of operational amplifier 213, and the other is formed by the weighted capacitor array positioned at the input terminal 1- of operational amplifier 213. These two weighted branches 200 are used to acquire the positive and negative residual signals, respectively. A first-order passive integrator structure is used to perform noise shaping on the weighted output of the successive approximation analog-to-digital converter 211. The weighted output is the sum of the output signals generated by each binary bit according to its weight, which is also the output signal at the electrical connection point between the weighted capacitor array and the positive input terminal 1+ or the negative input terminal 1- of operational amplifier 213.

[0042] correspond Figure 2 The upper weighted branch 200, corresponding to the integrating capacitor CINT set at the positive input terminal 1+ of operational amplifier 213, is electrically connected to the quantization and accumulation positive input terminal 2+ of operational amplifier 213. Figure 2 The lower weighting branch 200, corresponding to the integration capacitor CINT set at the negative input terminal 1 of operational amplifier 213, is electrically connected to the quantization accumulation negative input terminal 2 of operational amplifier 213. The weighted output result VP received at the positive input terminal 1+ of operational amplifier 213 is accumulated with VRESP received at the positive input terminal 2+ of operational amplifier 213, and the weighted output result VN received at the negative input terminal 1- of operational amplifier 213 is accumulated with VRESN received at the negative input terminal 2- of operational amplifier 213. After being amplified by the operational amplifier, the result is output to the comparator described in the aforementioned embodiment and compared with the aforementioned comparison voltage to achieve successive approximation of the residual signal.

[0043] Specifically, the first switch K1 and the second switch K2 are switched on and off according to a preset timing control signal. At time N-1, the first switch K1 can be closed and the second switch K2 opened. The equivalent capacitance of the weighted capacitor array and the sampling capacitor CS are divided, and the remaining quantization residual of the weighted capacitor is transferred to the sampling capacitor CS and recorded. After the sampling capacitor CS acquires the residual at time N-1, at time N, the first switch K1 is opened and the second switch K2 is closed. The charge stored on the sampling capacitor CS, i.e., the residual, is transferred to the integrating capacitor CINT. The integrating capacitor CINT performs integration on the residual and transmits the integration results VRESP and VRESN to the corresponding quantization accumulation input of the operational amplifier 213. This part of the integrated residual participates in the next quantization process.

[0044] Compared to successive approximation analog-to-digital converter architectures, noise-shaping successive approximation analog-to-digital converters increase... Figure 2 The passive integration module 212 in the successive approximation analog-to-digital converter 211 leaves the final quantized residual on the upper plate of the weighted capacitors in the weighted capacitor array during the successive approximation calculation process. The sampling capacitor CS in the first-order passive integration structure is responsible for sampling the voltage residual. After sampling, the charge is transferred to the integration capacitor CINT to achieve first-order passive integration. The integrated voltages VRESP and VRESN are amplified by the operational amplifier 213 and then participate in the next quantization process. Therefore, this application implements a first-order passive integration structure to perform noise shaping on the weighted output result of the successive approximation analog-to-digital converter 211. While improving the signal-to-noise ratio and conversion accuracy of the temperature acquisition signal, the first-order passive integration structure enables the quantizer 21 to form a successive approximation analog-to-digital converter with noise shaping. This architecture has a first-order loop to increase the order of the quantizer 21, thereby increasing the order of the analog-to-digital conversion structure 2, thus achieving the same temperature acquisition accuracy but with a higher temperature acquisition speed.

[0045] In some embodiments, combined with Figure 1 and Figure 2 The analog-to-digital conversion structure 2 also includes a front-end analog-to-digital converter 22. The input terminal of the front-end analog-to-digital converter 22 is electrically connected to the temperature acquisition structure 1, and the output terminal of the front-end analog-to-digital converter 22 is electrically connected to the input terminal of the quantizer 21. The front-end analog-to-digital converter 22 includes a first-order active integrator.

[0046] Specifically, the front-end analog-to-digital converter 22 is an analog-to-digital conversion circuit located before the quantizer 21 in the analog-to-digital conversion structure 2, used to perform preliminary conversion and processing on the analog signal output from the temperature acquisition structure 1. The front-end analog-to-digital converter 22 includes a first-order active integrator. This first-order active integrator achieves precise integration through an operational amplifier and an RC feedback network (i.e., a resistor-capacitor feedback network), offering advantages such as low output impedance, high linearity, and flexible reset control. The analog temperature signal output from the temperature acquisition structure 1 first enters the front-end analog-to-digital converter 22. In the front-end analog-to-digital converter 22, the first-order active integrator performs integration on the analog signal, achieving preliminary smoothing and filtering to generate a coarse quantization result, pushing the quantization error to higher frequencies. The subsequent quantizer 21 further refines and processes the output result of the front-end analog-to-digital converter 22, that is, it further integrates the residual error signal output by the front-end analog-to-digital converter 22, using the SAR logic described in the aforementioned embodiment to successively approximate the integrated signal.

[0047] By adding a front-end analog-to-digital converter 22 containing a first-order active integrator to the analog-to-digital conversion structure 2, the analog signal output from the temperature acquisition structure 1 can be preprocessed, effectively removing high-frequency noise and interference from the signal, and improving the accuracy and reliability of the subsequent quantization processing by the quantizer 21. The preliminary conversion by the front-end analog-to-digital converter 22 can reduce the workload of the quantizer 21 and improve the conversion speed of the entire analog-to-digital conversion structure 2.

[0048] This embodiment utilizes a front-end analog-to-digital converter 22 composed of a first-order active integrator, along with a quantizer 21 containing a first-order passive integrator structure, to realize a second-order analog-to-digital converter structure. This increases the order of the analog-to-digital converter structure 2, thereby improving its quantization accuracy. Simultaneously, a filter structure 3 of a preset order suppresses the final quantization noise out of band. Thus, in advanced process design, while maintaining the temperature sensor's temperature acquisition accuracy, the oversampling rate of the analog-to-digital converter structure 2 is effectively reduced, significantly decreasing the temperature acquisition conversion time and providing a more efficient design method for high-speed temperature detection. Furthermore, compared to traditional analog-to-digital converter structures composed of two-order active integrators, the analog-to-digital converter structure 2 used in this embodiment does not involve two-order complex timing and does not require two active integrators. It improves temperature acquisition speed with minimal circuit overhead, offering almost no loss in power consumption, area, or temperature acquisition accuracy, making it suitable for applications with high real-time temperature acquisition requirements.

[0049] Furthermore, the noise-shaping quantizer 21 forms the subsequent stage circuit of the front-end analog-to-digital converter 22. The error information introduced by noise shaping is suppressed by the negative feedback loop of the entire analog-to-digital converter structure 2. That is, the coupling value of the error information introduced by noise shaping to the input of the analog-to-digital converter structure 2 needs to be divided by the amplification gain of the first-order active integrator in the front-end analog-to-digital converter 22, and can be removed by the negative feedback structure formed by the entire analog-to-digital converter structure 2. Therefore, embedding a noise-shaping SARADC in the subsequent stage of the front-end analog-to-digital converter 22 can effectively avoid the introduction of the noise-shaping SARADC, i.e., the quantizer 21, from affecting the original information of the temperature acquisition signal, thereby avoiding affecting the temperature acquisition accuracy, while ensuring temperature acquisition accuracy and improving temperature acquisition speed.

[0050] In some embodiments, combined with Figure 1 and Figure 2 The front-end analog-to-digital converter 22 is an incremental-accumulator analog-to-digital converter.

[0051] Specifically, the incremental accumulator analog-to-digital converter (ADC) is a discrete-time SDADC (Sigma-Delta Analog-to-Digital Converter), which achieves high-precision analog-to-digital conversion by performing multiple integrations and comparisons on the input signal. The incremental accumulator ADC serves as the front-end ADC 22, with its input terminal electrically connected to the temperature acquisition structure 1 and its output terminal electrically connected to the input terminal of the quantizer 21. This ensures that the analog signal output from the temperature acquisition structure 1 can undergo high-precision conversion by the incremental accumulator ADC before entering the quantizer 21 for further processing.

[0052] The incremental accumulator analog-to-digital converter (ADC) operates primarily through three stages: integration, comparison, and feedback. In the integration stage, the ADC integrates the input analog signal containing temperature information multiple times, accumulating signal energy. In the comparison stage, the operational amplifier in the first-order active integrator compares the integrated signal with a reference voltage, generating a comparison result. In the feedback stage, a feedback signal is generated based on the comparison result, adjusting the input of the first-order active integrator to achieve a gradual approximation of the input signal. Through multiple iterations of these three stages, the incremental accumulator ADC achieves high-precision analog-to-digital conversion and outputs the converted digital signal to the quantizer 21. It should be noted that the specific working principle of the incremental accumulator ADC is well-known to those skilled in the art and will not be elaborated upon here.

[0053] Therefore, this embodiment of the application uses an incremental accumulator analog-to-digital converter (ADC) as the front-end ADC 22, which can significantly improve the ADC accuracy of the temperature sensor. The incremental accumulator ADC, through multiple integrations and comparisons, can effectively suppress noise and interference, achieving high conversion resolution, enabling the temperature sensor to detect minute temperature changes. This makes it suitable for applications requiring high measurement accuracy. Simultaneously, the incremental accumulator ADC has low input signal bandwidth requirements, allowing for good matching with the temperature acquisition structure 1, further improving the overall performance of the temperature sensor.

[0054] In some embodiments, combined with Figure 1 and Figure 2 Filter structure 3 is a third-order filter structure.

[0055] Specifically, the third-order filter structure is a filter structure with three poles, capable of performing third-order filtering on the input signal. The input terminal of the third-order filter structure is electrically connected to the output terminal of the analog-to-digital converter structure 2, receiving the digital signal after analog-to-digital conversion and filtering it. The third-order filter structure uses three cascaded filter units to progressively filter the input digital signal, with each filter unit attenuating noise within a specific frequency range. The three filter units work together to achieve a steeper amplitude-frequency response than lower-order filters. By rationally designing the parameters of each filter unit, high-frequency noise in the temperature acquisition signal can be effectively filtered out while retaining the effective components of the temperature acquisition signal.

[0056] This embodiment employs a third-order filter structure as the filter structure 3 of the temperature sensor, which significantly improves the temperature sensor's ability to suppress high-frequency noise, ensuring a purer and more stable filtered output signal. Compared to lower-order filter structures, the third-order filter structure has a steeper transition band at the same cutoff frequency, enabling better separation of signal and noise. This allows the temperature sensor to maintain high measurement accuracy even in complex electromagnetic environments, improving its reliability and stability.

[0057] Furthermore, referring to the above description of the derivation process of the technical solution of this application, the order of the filter structure 3 is not necessarily better the higher it is; the order of the filter structure 3 needs to be set in conjunction with the order of the analog-to-digital conversion structure 2. For example, for a first-order analog-to-digital conversion structure, a second-order filter structure is used to form a first matching structure based on temperature detection accuracy requirements. If the order of the filter structure 3 is further increased, there is no benefit to the temperature acquisition accuracy. To achieve a higher benefit, this embodiment of the application increases the order of the analog-to-digital conversion structure 2 by increasing the order of the quantizer 21. For the improved second-order analog-to-digital conversion structure, a third-order filter structure is used to form a second matching structure based on temperature detection accuracy requirements. For both the first and second matching structures, the final filtered temperature acquisition data is, for example, 13-bit data. However, the benefit lies in the fact that the first matching structure requires more iteration points to achieve filtering, for example, but not limited to, 2048 iteration points. This results in a need for more samples to achieve the required temperature detection accuracy. To achieve the same temperature detection accuracy, the second matching structure could, for example, but not limited to, require only 512 iteration points to implement filtering, thereby reducing the oversampling rate of the analog-to-digital conversion structure 2, for example, but not limited to reducing the oversampling rate of the analog-to-digital conversion structure 2 to one-quarter of its original value, while increasing the temperature acquisition speed by four times.

[0058] Therefore, in this embodiment, the filter structure 3 is set as a third-order filter structure, which is matched with the second-order analog-to-digital converter structure 2. This can avoid the filter structure 3 being too high in order, which would not contribute to the temperature acquisition accuracy and would reduce the temperature acquisition speed. It can also avoid the filter structure 3 being too low in order, which would affect the temperature acquisition accuracy. This greatly improves the temperature acquisition accuracy of the temperature sensor and meets the temperature acquisition accuracy requirements of the temperature sensor. At the same time, it reduces the oversampling rate of the analog-to-digital converter structure 2 and improves the temperature acquisition speed of the temperature sensor.

[0059] In some embodiments, combined with Figure 1 and Figure 2 Filter structure 3 is a three-stage cascaded comb filter.

[0060] Specifically, the three-stage cascaded integrator-comb filter is a digital filter composed of three integrators and a comb filter cascaded together. The input terminal of the three-stage cascaded integrator-comb filter is electrically connected to the output terminal of the analog-to-digital converter structure 2, and the output terminal is connected to subsequent signal processing circuits or interface circuits. The three-stage cascaded integrator-comb filter includes an integration stage and a comb filtering stage. In the integration stage, the three integrators sequentially integrate the input digital signal, accumulating signal energy and smoothing noise simultaneously. Subsequently, in the comb filtering stage, the comb filter processes the integrated signal, removing DC components and low-frequency noise from the signal through differential operations.

[0061] Therefore, this embodiment employs a three-stage cascaded integrator-comb filter as the filter structure 3. The cascaded arrangement of the three integrators increases the order of the filter structure 3, enhancing its noise suppression capability. The comb filter also effectively eliminates redundant information introduced during integration, achieving high filtering performance while reducing hardware complexity and power consumption. Compared to traditional FIR (Finite Impulse Response Filter) or IIR (Infinite Impulse Response Filter), the three-stage cascaded integrator-comb filter has a simpler structure and lower computational complexity. Simultaneously, its third-order structure provides sufficient filtering depth to effectively suppress various noises in the temperature acquisition signal, ensuring the accuracy and stability of the temperature sensor's output signal. Furthermore, the linear phase characteristic of the three-stage cascaded integrator-comb filter prevents phase distortion in the filtered signal, guaranteeing the accuracy of temperature measurement.

[0062] Figure 3 This is a detailed circuit structure diagram of a temperature sensor provided in this application. Combined with... Figures 1 to 3 Temperature acquisition structure 1 includes a bipolar junction transistor.

[0063] Specifically, the base-emitter voltage VBE of the BJT (Bipolar Junction Transistor) changes with temperature. The BJT, as the core component of temperature acquisition structure 1, has its base, emitter, and collector connected through an appropriate bias circuit to form a temperature-sensitive circuit. The emitter of the BJT is electrically connected to the input terminal of the analog-to-digital converter structure 2, converting the sensed temperature change into a corresponding electrical signal and transmitting it to the analog-to-digital converter structure 2. For example... Figure 3 As shown, temperature information is parasitic on the bipolar junction transistor Q1 and converted into a voltage signal VBE. This voltage signal VBE is continuously oversampled through quantization by the subsequent analog-to-digital converter structure 2, thereby converting the voltage signal VBE into a digital code stream. The digital code stream is then accumulated to convert into the final temperature information. It should be noted that the specific circuit implementation structure of the aforementioned bias circuit is not limited in this embodiment. Figure 3 The unboxed portion is an example circuit of the aforementioned bias circuit, and the working principle of the bias circuit is well known to those skilled in the art, so it will not be described in detail here.

[0064] Currently, high-precision temperature sensors generally use CMOS (Complementary Metal-Oxide-Semiconductor) or resistors as temperature sensing devices. Resistor-based temperature sensors first sample temperature information parasitically across a resistor, then convert the temperature information into voltage information, then convert the voltage into a linear time related to temperature, and finally quantize the temperature information using a time-to-digital converter. Resistor-based temperature sensors have a simpler architecture and smaller area, but their temperature linearity depends entirely on the linearity of the resistor, making them highly dependent on the manufacturing process. Therefore, resistor-based temperature sensors have extremely high requirements for the type of resistor selected. At advanced process nodes, such as when device feature sizes are small, the limited range of resistor types makes resistor-based temperature sensors unsuitable for the temperature measurement needs of advanced processes. CMOS-based temperature sensors utilize MOSFETs operating in the subthreshold region as temperature sensing devices, reflecting temperature information in the change of the MOSFET's threshold voltage. However, the linearity of the MOSFET's threshold voltage (vth) change is limited, especially at high temperatures where linearity drops sharply. Furthermore, subthreshold MOSFETs are easily affected by process doping and the manufacturing environment, thus limiting the application scenarios for MOSFET-based temperature sensors.

[0065] This application embodiment uses a bipolar junction transistor (BJT) for temperature acquisition, effectively solving the technical problems associated with resistors and MOSFETs as temperature sensing devices. It is suitable for advanced process devices with small feature sizes and has a wide range of applications. Using a BJT as the core component of the temperature acquisition structure 1 offers advantages such as high sensitivity, good linearity, and strong stability. The base-emitter voltage of the BJT exhibits a good linear relationship with temperature, enabling the temperature acquisition structure 1 to achieve high-precision temperature measurement. Furthermore, the BJT has a wide temperature measurement range, meeting the needs of different application scenarios.

[0066] This application also provides a chip including a temperature sensor as described in the above embodiments, and therefore has the beneficial effects described in the above embodiments, which will not be repeated here.

[0067] Specifically, the temperature sensor, as a functional module of the chip, is integrated inside the chip. The various components of the temperature sensor—temperature acquisition structure 1, analog-to-digital conversion structure 2, and filtering structure 3—are electrically connected to other circuit modules within the chip via internal wiring, forming a complete chip system. The temperature signal output by the temperature sensor can be read and processed by the chip's internal control unit for temperature monitoring. Specifically, this involves real-time monitoring of the chip temperature and dynamic adjustment of operating parameters based on temperature changes, such as reducing the operating frequency or shutting down certain functional modules. It can also be used for overheat protection to prevent chip damage due to excessive heat. Furthermore, integrating the temperature sensor avoids the layout difficulties and signal interference problems associated with external temperature sensors, improving the chip's integration and performance.

[0068] For example, the chip is a system-on-a-chip for a mobile terminal.

[0069] Specifically, the embodiments of this application can be applied to various types of products across many industries. First, in the industrial sector, many industrial equipment are highly sensitive to fluctuations in ambient temperature during production, requiring temperature sensors to reliably detect temperature and ensure stable production line operation. Second, in consumer electronics such as mobile phones, temperature sensors need to monitor the temperature of temperature-sensitive core modules within the chip, controlling the on / off state of fans to prevent overheating. Third, in the medical field, some temperature-sensitive medical devices also require regular inspection to extend their lifespan. Fourth, in home applications, household appliances such as refrigerators, ovens, and air conditioners are now equipped with temperature sensors, primarily for detection and temperature display.

[0070] Mobile terminals, such as smartphones, are designed using advanced processes. Due to their smaller process sizes, these processes introduce greater random mismatch issues, leading to random deviations in the sensing accuracy of temperature sensors. Temperature sensors are also widely used in large-scale equipment such as medical devices, base stations, refrigerators, and racing cars. However, the temperature sensors in these devices are typically designed with large-scale processes, so their temperature accuracy is not limited by random mismatches but is more affected by the linearity of the device itself.

[0071] Therefore, the high-precision, high-speed temperature sensor provided in this application embodiment is more suitable for mobile terminals such as mobile phones, for example, it can be applied in the SOC (System-on-Chip) chip of a mobile phone. By real-time detection of the temperature of temperature-sensitive devices or modules in the mobile phone SOC chip, such as the CPU (Central Processing Unit), GPU (Graphics Processing Unit), and AI (Artificial Intelligence) module, the sensor accurately collects external temperature information and uses an internally integrated analog-to-digital converter to quantize the temperature information into a digital code stream, which is then encoded and converted into actual temperature information. The processed temperature result can be transmitted to the control terminal. The mobile phone control terminal analyzes the temperature and accurately adjusts the current mobile phone temperature, effectively avoiding the problem of performance degradation due to overheating, while also extending the life of the mobile phone battery and enhancing the user experience.

[0072] This application also provides a mobile terminal, including the chip described in the above embodiments, that is, including the temperature sensor described in the above embodiments, and therefore possesses the beneficial effects described in the above embodiments, which will not be repeated here. Exemplarily, the mobile terminal may be, but is not limited to, a mobile phone, tablet computer, laptop computer, etc.

[0073] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A temperature sensor, characterized in that, include: The system includes a temperature acquisition structure, an analog-to-digital conversion structure, and a filtering structure, wherein the temperature acquisition structure, the analog-to-digital conversion structure, and the filtering structure are electrically connected in sequence. The temperature acquisition structure is used to acquire temperature information of the structure under test and generate an analog signal containing the temperature information; the analog-to-digital conversion structure is used to convert the analog signal into a digital signal containing the temperature information; and the filtering structure is used to filter the digital signal. The quantizer in the analog-to-digital conversion structure includes a first-order passive integral structure, and the order of the filter structure is greater than or equal to a first preset order and less than or equal to a second preset order, so that the oversampling rate of the analog-to-digital conversion structure is lower than the preset sampling rate.

2. The temperature sensor according to claim 1, characterized in that, The quantizer also includes a successive approximation analog-to-digital converter, and the first-order passive integral structure is used to perform noise shaping on the weighted output of the successive approximation analog-to-digital converter.

3. The temperature sensor according to claim 2, characterized in that, The first-order passive integrator structure includes two passive integrator modules. The successive approximation analog-to-digital converter includes an operational amplifier and two weighted branches. The positive and negative input terminals of the operational amplifier are electrically connected to one of the weighted branches, and the passive integrator modules are configured to correspond one-to-one with the weighted branches.

4. The temperature sensor according to claim 3, characterized in that, The passive integration module includes a sampling capacitor, an integration capacitor, a first switch, and a second switch. The operational amplifier connection terminal of the weighted branch is electrically connected to the first terminal of the first switch. The first terminal of the sampling capacitor is electrically connected to the second terminal of the first switch and the first terminal of the second switch, respectively. The first terminal of the integrating capacitor is electrically connected to the second terminal of the second switch and the quantization and accumulation input terminal of the operational amplifier, respectively. The second terminals of the sampling capacitor and the second terminals of the integrating capacitor are connected to a preset voltage.

5. The temperature sensor according to any one of claims 1-4, characterized in that, The analog-to-digital conversion structure also includes a front-end analog-to-digital converter, the input of which is electrically connected to the temperature acquisition structure, and the output of which is electrically connected to the input of the quantizer. The front-end analog-to-digital converter includes a first-order active integrator.

6. The temperature sensor according to claim 5, characterized in that, The front-end analog-to-digital converter is an incremental-accumulator analog-to-digital converter.

7. The temperature sensor according to claim 5, characterized in that, The filtering structure is a third-order filtering structure.

8. The temperature sensor according to claim 7, characterized in that, The filtering structure is a three-stage tandem integrator comb filter.

9. The temperature sensor according to any one of claims 1-4, characterized in that, The temperature acquisition structure includes a bipolar junction transistor.

10. A chip, characterized in that, Including the temperature sensor as described in any one of claims 1-9.

11. The chip according to claim 10, characterized in that, The chip is a system-on-a-chip for mobile terminals.

12. A mobile terminal, characterized in that, Includes the chip as described in claim 10 or 11.

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