A large-current passive equalization battery management device based on FPC-CCS
The FPC-CCS high-current passive equalization battery management device, employing distributed resistor circuits and MOSFET switching circuits, improves equalization current and heat dissipation efficiency, solving the speed and thermal management problems in traditional passive equalization technology, and is suitable for the rapid equalization requirements of high-capacity battery packs.
Patent Information
- Application Number
- CN202511271149.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-05
- Publication Date
- 2026-08-25
- Estimated Expiration
- 2045-09-05
AI Technical Summary
Existing passive balancing technology has low balancing current, slow balancing speed, and serious heat dissipation problems, which leads to local temperature rise in the battery pack, posing safety hazards, and is difficult to adapt to the space constraints of thin and light battery packs.
A high-current passive equalization battery management device based on FPC-CCS is adopted. It achieves a 10A level equalization current through distributed resistor circuit and MOSFET switching circuit. Combined with a wide copper foil serpentine resistor network and flexible insulating film, the heat dissipation area is increased, and the equalization control chip is placed on the main control PCB to avoid thermal interference.
It achieves highly efficient battery balancing, with balancing speed increased by more than 10 times and temperature rise controlled at ≤40℃. It solves the space and thermal reliability bottlenecks of traditional solutions, providing a low-cost, mass-producible solution for high-capacity batteries.
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Figure CN121332808B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a high-current passive equalization battery management device based on FPC-CCS, belonging to the technical field of power battery or energy storage battery management system. Background Technology
[0002] Passive balancing technology is commonly used in power battery management systems (BMS).
[0003] The principle of passive balancing technology is that when the battery pack is charging, if the voltage of a certain cell is detected to be too high, the BMS control switch closes, so that the cell and the parallel resistor form a discharge circuit. The discharge circuit consumes electrical energy through the resistor to reduce the voltage of the cell. The excess energy of the cell is released as heat, which buys more charging time for other cells. This reduces the difference between the cells in the battery pack, making the voltage of each cell close to the same, thus ensuring the overall safety and lifespan of the battery pack.
[0004] Existing passive balancing technology has certain drawbacks. The balancing current is relatively small, usually less than 1A, which results in a slow balancing speed. This is especially true when the battery pack has a large capacity or is severely unbalanced, requiring a longer time to reach equilibrium. In addition, existing passive balancing technology has serious heat dissipation problems. Resistance heating causes local temperature increases in the battery pack, posing a safety hazard to heat-sensitive power batteries.
[0005] In existing technologies, a separate BMU slave control PCB board is set up in the BMS system, and parallel resistors are placed on the BMU board for independent energy dissipation. This design structure makes the balancing resistor and switch too concentrated. To prevent overheating, the balancing current is usually small (tens to hundreds of milliamps), resulting in a slow balancing speed. A reasonable heat dissipation scheme needs to be designed to dissipate the heat generated by the resistors and prevent local overheating from affecting battery life or safety.
[0006] Therefore, existing technologies have shortcomings and need to be improved and perfected. Summary of the Invention
[0007] To address the shortcomings of the prior art, the present invention aims to provide a high-current passive equalization battery management device based on FPC-CCS. According to an embodiment of the present invention, the first solution is provided as follows: a high-current passive equalization battery management device based on FPC-CCS, comprising an FPC integrated layer disposed on one side of the battery pack terminal post, the FPC integrated layer comprising two flexible insulating films and at least two signal acquisition units disposed between the flexible insulating films, each signal acquisition unit comprising a signal acquisition circuit, an FPC nickel sheet and a switching circuit, each signal acquisition circuit being connected to one or a group of high-current equalization circuits; The positive or negative terminal of each individual cell is connected to the signal acquisition circuit through the FPC nickel sheet. When the voltage acquired by the signal acquisition circuit exceeds the preset threshold, the switching circuit connects the high current equalization circuit connected in parallel to the individual cell to dissipate energy. The high-current equalization circuit and the flexible insulating films on both sides are independently arranged on one or both sides of the single cell. The high-current balancing circuit includes a distributed resistor circuit so that the distributed resistor circuit itself acts as a parallel resistor for energy dissipation of individual battery cells.
[0008] The switching circuit is connected to an external equalization control chip via a high-speed communication interface. The equalization control chip is located on the main control PCB, which is far away from the high-current equalization circuit.
[0009] Furthermore, the signal acquisition unit also includes an NTC sensor, and multiple signal acquisition units are connected to an endplate connector located at one end of the FPC integration layer.
[0010] Furthermore, the distributed resistance circuit is a wide copper foil trace or a heating film trace, and the distributed resistance circuit is either integrally connected to the signal acquisition circuit or separately connected. The heating film trace is a printed resistive film circuit on a flexible insulating substrate.
[0011] Furthermore, each signal acquisition circuit is connected to two high-current equalization circuits, and the two high-current equalization circuits and the flexible insulating films on both sides of them are independently arranged on both sides of the single cell.
[0012] Two high-current balancing circuits and the flexible insulating films on both sides are integrated into independent fins. The fins are integrally connected to the FPC integration layer and arranged on both sides of the single cell.
[0013] Furthermore, the two high-current balancing circuits and their flexible insulating films arranged on both sides of the individual battery cell can be folded and attached to both sides of the individual battery cell.
[0014] Furthermore, a heat dissipation system is provided at the bottom of the battery pack, and the high-current balancing circuits that are attached to both sides of the individual battery cells after folding extend towards the heat dissipation system.
[0015] Furthermore, a highly thermally conductive insulating adhesive layer is provided on the outer side of the flexible insulating film facing the individual battery cell of the high-current balancing circuit, and the flexible insulating film can be adhered to the outer side of the individual battery cell through the highly thermally conductive insulating adhesive layer.
[0016] Furthermore, the two high-current balancing circuits are identical and share half of the current output by the FPC nickel sheet.
[0017] Furthermore, the equalization control chip monitors the voltage acquired by the acquisition circuit and sends a switching signal to the switching circuit when the voltage exceeds a preset threshold.
[0018] Furthermore, the switching circuit is a MOSFET switching circuit.
[0019] Compared with the prior art, the unique advantages of the technical solution provided in this application are as follows: First, this solution increases the passive balancing current from <1A in the traditional solution to 10A, with a single cell balancing power of up to 32W and a balancing speed that is more than 10 times faster. This can meet the fast balancing requirements of high-capacity battery packs. The distributed resistor circuit can be set as a double-sided parallel serpentine resistor network to distribute the 10A total current evenly to both sides of the single cell, 5A on each side. Combined with 1.5mm wide copper foil traces, this ensures current carrying capacity and path balance, avoiding local overload. Secondly, the heat dissipation area of the wide copper foil serpentine resistor network is increased several times, which can control the maximum temperature rise to ≤40℃, solving the problem of insulation failure or material aging caused by local high temperature of traditional centralized resistors. The equalization control chip is placed on the main control PCB and connected to FPC-CCS through a high-speed communication interface, avoiding thermal interference of resistor heating to the chip and improving the stability of system parameters. Secondly, this solution integrates the discrete power resistors that are independently set on the BMU in the existing technology onto the FPC-CCS for the first time. It highly integrates a complete equalization circuit, including a distributed resistor network, a MOSFET switch array and voltage / temperature acquisition lines, within a limited space. This solves the technical problem that discrete high-power resistors occupy a lot of space and are difficult to adapt to thin and light battery packs.
[0020] Secondly, the high-current balancing circuit and flexible insulating film can be independently folded. In addition to increasing the heat dissipation area, the folded high-current balancing circuit can be pasted on both sides of the individual cell, which not only makes reasonable use of the limited space, but also combines with the heat dissipation structure of the individual cell itself to further improve the heat dissipation efficiency of the high-current balancing circuit.
[0021] This invention, through a highly integrated high-current balancing circuit, improves the efficiency of passive balancing while solving the space limitations and thermal reliability bottlenecks of traditional solutions, providing a low-cost, mass-producible balancing solution for high-capacity power batteries. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0023] in: Figure 1This is a schematic diagram of the FPC integrated layer of a high-current passive equalization battery management device deployed on one side of the battery pack terminal post in one embodiment; Figure 2 This is a schematic diagram of the folded flaps of the FPC integrated layer of a high-current passive equalization battery management device in one embodiment, attached to both sides of a single battery cell.
[0024] Figure label: 10-FPC integrated layer; 11-FPC nickel sheet; 111-NTC sensor; 12-aluminum busbar; 13-end board connector; 14-wing; 141-distributed resistor circuit; 15-MOSFET switch; 20-single battery cell. Detailed Implementation
[0025] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0026] Example 1 For a 13-cell 280Ah power battery pack with a single cell voltage of 3.2V and a total capacity of 32kWh, the traditional passive balancing scheme of BMS (Battery Management System) has a balancing current of <1A and requires more than 6 hours to complete balancing. The passive balancing circuit usually uses a separate BMU (Battery Module Unit) with parallel resistors. The resistors are discrete high-power resistors. This passive balancing scheme occupies a lot of space and the local temperature rise of the resistors exceeds 80℃. The traditional scheme cannot be integrated on FPC-CCS (Flexible Circuit Board Battery Connection System).
[0027] This embodiment provides an integrated design system for FPC-CCS, which realizes a 10A equalization circuit and ≤40℃ temperature rise control, and is particularly suitable for the space requirements of thin battery packs.
[0028] Specifically, the high-current passive equalization battery management device based on FPC-CCS in this embodiment, such as... Figure 1As shown, the battery pack includes an FPC integrated layer 10 disposed on one side of the battery terminal. The FPC integrated layer 10 uses a conventional two-layer flexible polyimide insulating film. A signal acquisition unit is arranged between the two flexible insulating films. Specifically, the signal acquisition unit includes a signal acquisition circuit, a high-current equalization circuit, a switching circuit, and other circuit mechanisms. The signal acquisition unit also includes an FPC nickel sheet 11, which is connected to the aluminum busbar 12 on the cell terminal of the individual battery cell 20 by laser welding. Voltage signals are acquired through the FPC nickel sheet 11. An NTC sensor 111 can also be integrated on the FPC nickel sheet 11 to acquire temperature signals. Multiple signal acquisition units are connected to an end plate connector 13 located at one end of the FPC integrated layer 10.
[0029] The switching circuit uses one MOSFET switch 15. One MOSFET switch 15 is connected in parallel to control the on and off of the equalization circuits on both sides. That is, each high current equalization circuit supports a maximum current of 10A. The current is controlled by one MOSFET switch 15 to be split to the first shunt branch and the second shunt branch. The current of the first shunt branch and the second shunt branch can be 5A respectively.
[0030] In this embodiment, as Figure 2 As shown, the high-current balancing circuit includes a first shunt branch and a second shunt branch. The first shunt branch and the flexible insulating film are integrated into a wing 14 integral with the FPC integrated layer 10. The second shunt branch and the flexible insulating film are integrated into another wing 14 integral with the FPC integrated layer 10. The two wing 14s are arranged on both sides of the single cell 20 or on both sides of the battery pack. The first and second shunt branches include a distributed resistor circuit 141. The distributed resistor circuit 141 is configured with 1oz wide copper foil traces and designed with a serpentine network structure to increase the length of the distributed resistor circuit 141. Compared with traditional discrete resistors, the wide copper foil traces of the serpentine network structure significantly improve the resistance power and heat dissipation area.
[0031] The signal acquisition circuit monitors the voltage of each cell in real time. When the voltage of a cell exceeds a preset threshold (e.g., 3.65V), a signal is sent to the switching circuit. The MOSFET switch 15 closes to activate the equalization function. The cells discharge through a double-sided serpentine resistor network structure, with a current of 5A on each side and a total equalization current of 10A. During the equalization process, the NTC sensor 111 monitors the cell temperature. If the temperature rise exceeds 40℃, the control IC reduces the duty cycle through a PWM signal, limiting the current to 8A. When the voltage deviation of all cells is ≤20mV, the switching circuit is disconnected, and the equalization is completed.
[0032] By using FPC copper foil directly as the balancing resistor to replace traditional discrete resistors, the structure itself becomes the function. A serpentine topology disperses heat, and thermally conductive materials enhance heat conduction, overcoming the bottleneck of high current and high temperature inherent in passive balancing. The FPC can be folded and fitted to both sides of the battery cell, adapting to various cell shapes such as cylindrical and prismatic cells, offering superior compatibility compared to rigid PCB solutions. This embodiment, through the above design, addresses the shortcomings of traditional passive balancing technology while achieving a triple breakthrough in high current, low power consumption, and high integration, providing a low-cost, long-life balancing solution for high-capacity power battery systems.
[0033] Furthermore, existing battery packs typically have a heat dissipation system at the bottom. In this embodiment, the individual cell 20 has folded fins 14 on both sides. When the fins 14 are attached to the side of the individual cell 20, the high current balancing circuit extends towards the heat dissipation system. Therefore, the heat dissipation effect of the high current balancing circuit on the side closer to the heat dissipation system is better.
[0034] In a preferred embodiment, the serpentine network structure is configured as a non-uniform structure, that is, the smaller the line width or the narrower the spacing of the wide copper foil traces on the bottom side (the side closer to the heat dissipation system) of the serpentine network structure, the greater the local resistance and the higher the heat generation. Since this part of the wide copper foil traces is closer to the heat dissipation system, the overall heat dissipation effect of this non-uniform structure is better.
[0035] The technical solution provided in this application uniquely increases the passive balancing current from <1A in traditional solutions to 10A, achieving a balancing power of up to 32W for a single cell 20 and increasing the balancing speed by more than 10 times. This meets the rapid balancing requirements of high-capacity battery packs. The distributed resistor circuit 141 can be configured as a dual-side parallel serpentine resistor network, evenly distributing the 10A total current to both sides of the single cell 20, with 5A on each side. Combined with 1.5mm wide copper foil traces, this ensures current carrying capacity and path balance, avoiding local overload. The wide copper foil serpentine resistor network increases the heat dissipation area several times, controlling the maximum temperature rise to ≤40℃, solving the problems of traditional centralized... Localized high temperatures in resistors can lead to insulation failure or material aging. By placing the equalization control chip on the main control PCB and connecting it to the FPC-CCS via a high-speed communication interface, thermal interference from resistor heating is avoided, improving system parameter stability. This solution integrates discrete power resistors, previously independently mounted on the BMU, onto the FPC-CCS for the first time. Within a limited space, a complete equalization circuit is highly integrated, including a distributed resistor network, MOSFET switch array, and voltage / temperature acquisition lines. This solves the technical challenge of large space requirements and difficulty in adapting discrete high-power resistors to thin and light battery packs. The high-current equalization circuit and flexible insulating film are independently foldable. Besides increasing the heat dissipation area, the folded high-current equalization circuit can be attached to both sides of the individual battery cell 20, making efficient use of limited space and further enhancing the heat dissipation efficiency of the high-current equalization circuit by combining it with the heat dissipation structure of the individual battery cell 20. This invention, through a highly integrated high-current equalization circuit solution, improves passive equalization efficiency while solving the space limitations and thermal reliability bottlenecks of traditional solutions, providing a low-cost, mass-producible equalization solution for high-capacity power batteries.
[0036] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification. The above embodiments only illustrate several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of this application's patent. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of this application, and these all fall within the protection scope of this application.
[0037] It should be noted that when an element is referred to as being "fixed to" or "set on" another component, it can be directly or indirectly set on the other component; when a component is referred to as being "connected to" another component, it can be directly or indirectly connected to the other component. It should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.
[0038] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" or "several" means two or more, unless otherwise explicitly specified.
[0039] It should be noted that the structures, proportions, sizes, etc., shown in the accompanying drawings are only for the purpose of assisting those skilled in the art in understanding and reading the content disclosed in the specification, and are not intended to limit the conditions under which this application can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportions, or adjustments to the size should still fall within the scope of the technical content disclosed in this application, provided that they do not affect the effects and purposes that this application can produce.
Claims
1. A high-current passive equalization battery management device based on FPC-CCS, characterized in that, It includes an FPC integrated layer disposed on one side of the battery pack terminal post. The FPC integrated layer includes two flexible insulating films and multiple signal acquisition units arranged between the two flexible insulating films. Each signal acquisition unit corresponds to each individual cell of the battery pack. Each signal acquisition unit includes a signal acquisition circuit, a high current equalization circuit, an FPC nickel sheet, and a switching circuit. The high-current balancing circuit includes a first shunt branch and a second shunt branch. Both the first and second shunt branches include distributed resistor circuits, which themselves serve as parallel balancing resistors for energy dissipation in individual cells. The distributed resistor circuits are configured as wide copper foil traces in a serpentine network structure. The first shunt branch and the flexible insulating films on both sides are integrated into a wing that is integral with the FPC integrated layer. The second shunt branch and the flexible insulating films on both sides are integrated into another wing that is integral with the FPC integrated layer. The two wings are independently foldable. After folding, the two wings are respectively attached to both sides of the individual cell, thereby distributing the total balancing current evenly to both sides of the individual cell. A heat dissipation system is provided at the bottom of the battery pack. After folding, the two wings attached to both sides of the individual cell extend towards the heat dissipation system. The serpentine network structure is configured as a non-uniform structure. The line width or spacing of the wide copper foil traces on the side of the serpentine network structure closer to the heat dissipation system is smaller. Each individual cell's positive or negative terminal is connected to the signal acquisition circuit via an FPC nickel sheet. The signal acquisition circuit is connected to the first and second shunt branches. When the voltage of an individual cell acquired by the signal acquisition circuit exceeds a preset threshold, the switch circuit closes to activate the equalization function, connecting the two distributed resistor circuits connected in parallel to the individual cell, allowing the energy of the individual cell to dissipate through the two distributed resistor circuits.
2. The high-current passive equalization battery management device based on FPC-CCS according to claim 1, characterized in that, An NTC sensor is integrated on the FPC nickel sheet to collect the temperature signal of the individual battery cell; multiple signal acquisition units are connected to the end plate connector located at one end of the FPC integration layer.
3. The high-current passive equalization battery management device based on FPC-CCS according to claim 1, characterized in that, The distributed resistor circuit can be integrated with the signal acquisition circuit or connected separately.
4. The high-current passive equalization battery management device based on FPC-CCS according to claim 1, characterized in that, A highly thermally conductive insulating adhesive layer is provided on the outside of the flexible insulating film facing the individual battery cell. The flexible insulating film is adhered to the outside of the individual battery cell through the highly thermally conductive insulating adhesive layer.
5. The high-current passive equalization battery management device based on FPC-CCS according to claim 1, characterized in that, The equalization control chip is connected to the FPC-CCS through a high-speed communication interface. The equalization control chip monitors the voltage of individual cells acquired by the signal acquisition circuit and sends a closing signal to the switching circuit when the voltage of an individual cell exceeds a preset threshold.
6. The high-current passive equalization battery management device based on FPC-CCS according to claim 5, characterized in that, The switching circuit is a MOSFET switching circuit.
Citation Information
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