Display device

Abstract

A display device includes: a substrate including a display area and a non-display area; a plurality of sub-pixels disposed in the display area and arranged in a first direction and a second direction; a first sensing line and a second sensing line disposed in the display area; and first and second wirings disposed in the non-display area, extending in the first direction, and electrically connected to the first and second sensing lines, respectively; a gate control line disposed in the non-display area and extending in a second direction; a ground line disposed in the non-display area and extending in a first direction; and a shielding pattern connected to the ground line, in which the shielding pattern overlaps the first wiring and the gate control line, and is disposed between the first wiring and the gate control line in the thickness direction.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0092332, filed in Korea on July 12, 2024, the entire contents of which are expressly incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices, and more particularly, to display devices having a minimized bezel area. Background Technology

[0004] With the advancement of the information society, the demand for different types of display devices has increased, and flat panel display devices (FPDs) such as liquid crystal display devices (LCDs) and organic light-emitting diode display devices (OLEDs) have been developed and applied in various fields.

[0005] Flat panel displays can be widely used in mobile electronic devices such as smartphones, computer monitors, or televisions. The display panel of each flat panel display device can be modularized and commercialized using tools such as various housings or covers. Summary of the Invention

[0006] The display panel of a flat panel display device may include a display area for displaying images and a non-display area surrounding the display area. A housing or cover on the front of the display device may cover the non-display area. Here, a portion of the housing or cover covering the non-display area may be a bezel area of ​​the product.

[0007] The border area is the area where no image is displayed. The border area increases the size of the product and degrades its appearance.

[0008] Therefore, embodiments of this disclosure relate to display devices that substantially eliminate one or more problems caused by limitations and disadvantages of related technologies.

[0009] One aspect of this disclosure is providing a display device with a minimized border area.

[0010] Another aspect of this disclosure is to provide a display device that can reduce production power consumption and achieve low power consumption by improving efficiency.

[0011] Additional features and aspects will be set forth in the description which follows, and will become partly apparent from the description, or may be learned by practice of the inventive concept provided herein. Other features and aspects of the inventive concept may be realized and obtained by means of structures particularly pointed out in the written description, or structures from which they may be derived, the claims thereof, and the accompanying drawings.

[0012] To achieve these and other aspects of the inventive concept, as embodied and broadly described herein, a display device includes: a substrate comprising a display area and a non-display area; a plurality of sub-pixels disposed in the display area and arranged in a first direction and a second direction; a first sensing line and a second sensing line disposed in the display area; a first wiring and a second wiring disposed in the non-display area, extending in the first direction and respectively electrically connected to the first sensing line and the second sensing line; a gate control line disposed in the non-display area and extending in the second direction; a ground line disposed in the non-display area and extending in the first direction; and a shielding pattern connected to the ground line, wherein the shielding pattern overlaps with the first wiring and the gate control line and is disposed between the first wiring and the gate control line in the thickness direction.

[0013] It should be understood that both the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0014] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the specification, serve to explain the principles of the disclosure. In the drawings:

[0015] Figure 1 This is a schematic plan view of a display device according to an embodiment of the present disclosure;

[0016] Figure 2 The implementation methods based on this disclosure are... Figure 1 A cross-sectional view of the display device corresponding to line I-I';

[0017] Figure 3 The implementation methods based on this disclosure are... Figure 1 A schematic enlarged plan view of the display device corresponding to area E1;

[0018] Figure 4 The implementation methods based on this disclosure are... Figure 3 A schematic enlarged plan view of the display device corresponding to area E2;

[0019] Figure 5 yes Figure 4 A cross-sectional view of line II-II';

[0020] Figure 6 yes Figure 4 A cross-sectional view of line III-III';

[0021] Figure 7 This is a schematic plan view of a display device applied to a vehicle according to an embodiment of the present disclosure; and

[0022] Figure 8 This is a schematic cross-sectional view of a display device applied to a vehicle according to an embodiment of the present disclosure. Detailed Implementation

[0023] The advantages and features of this disclosure, as well as the methods for implementing them, will become clear from the following detailed description of the embodiments with reference to the accompanying drawings. However, this disclosure can be implemented in many different forms and should not be construed as limited to the embodiments set forth herein. The embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art.

[0024] The shapes, dimensions, ratios, angles, numbers, etc., disclosed in the accompanying drawings for describing embodiments of this disclosure are illustrative, and therefore this disclosure is not limited to what is shown. Throughout this disclosure, the same reference numerals refer to the same parts. Furthermore, in the following description of this disclosure, detailed descriptions of known related technologies will be omitted or briefly discussed when it is determined that such detailed descriptions unnecessarily obscure the key points of this disclosure.

[0025] When using terms such as “including,” “having,” “comprising,” etc., as mentioned in this disclosure, additional parts may be added, unless the term “only” is used herein. Furthermore, when a part is referred to as singular, the plural is included unless otherwise stated.

[0026] When analyzing components, the error range is interpreted as included, even when there is no explicit description.

[0027] When describing positional relationships, for example, when describing the positional relationship between two parts / layers as "above", "on", "above", "below", "below", "next to", etc., one or more other parts / layers may be positioned between the two parts / layers unless "closely to" or "directly" is used with them.

[0028] When describing temporal relationships, such as describing temporal precedence as "after", "following", "next", "before", etc., discontinuous or out-of-order situations may also be included unless "immediately" or "directly" is used.

[0029] Although the terms first, second, etc., are used to describe various components, these components are not substantially limited by these terms. These terms are only used to distinguish one component from another and may not specify any order or sequence. Therefore, within the technical spirit of this disclosure, the first component described below can be substantially the second component.

[0030] Features of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, various interlocks and drives are technically possible, and each of the embodiments may be implemented independently of each other or together in a related relationship.

[0031] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0032] Figure 1 This is a schematic plan view of a display device according to an embodiment of the present disclosure.

[0033] exist Figure 1 In this embodiment of the present disclosure, the display device may include a display panel 10 and a driving unit 20.

[0034] The display panel 10 may include a display area DA for displaying an image and a non-display area NDA disposed on at least one side of the display area DA. For example, the non-display area NDA may surround the display area DA.

[0035] Multiple sub-pixels SP can be disposed in the display area DA, and the multiple sub-pixels SP are arranged in a first direction X and a second direction Y. Each sub-pixel SP may include a light-emitting diode and at least one thin-film transistor.

[0036] Each subpixel SP can display one color, and subpixels SP displaying different colors can constitute a pixel. For example, a pixel can contain three subpixels, and these three subpixels SP can be a red subpixel, a green subpixel, and a blue subpixel.

[0037] Although not shown in the figure, a plurality of first signal lines extending in the first direction X and a plurality of second signal lines extending in the second direction Y can be provided in the display area DA, and the plurality of first signal lines and the plurality of second signal lines can be electrically connected to the thin film transistor and / or light-emitting diode of each sub-pixel SP.

[0038] Additionally, although not shown in the figure, a first link line and a second link line, respectively electrically connected to the first signal line and the second signal line, can be provided in the non-display area NDA, and more specifically, in the non-display area NDA between the display area DA and the driving unit 20.

[0039] The driving unit 20 can be disposed on one side of the display panel 10, for example, on the lower side of the display panel in the background of the figure, and can include a source printed circuit board 22 and at least one flexible printed circuit 24.

[0040] The flexible printed circuit 24 can be disposed between the display panel 10 and the source printed circuit board 22, and the flexible printed circuit 24 can be attached to the non-display area NDA of the display panel 10.

[0041] The flexible printed circuit 24 may include a base film formed of a flexible material and a driver integrated circuit chip (driver IC chip) mounted on the base film. The flexible printed circuit 24 can generate data signals for displaying images and transmit the data signals to the display panel 10.

[0042] In embodiments of this disclosure, the flexible printed circuit 24 may be a chip-on-film (COF) type. However, embodiments of this disclosure are not limited thereto. In other embodiments, the flexible printed circuit 24 may be a chip-on-glass (COG) type or a tape-on-package (TCP) type.

[0043] Furthermore, in embodiments of this disclosure, three flexible printed circuits 24 may be provided, but embodiments of this disclosure are not limited to this. The number of flexible printed circuits 24 can vary.

[0044] The source printed circuit board 22 may include circuitry for controlling the driver IC chip. For example, the source printed circuit board 22 may include a timing controller that receives image signals and multiple timing signals from an external system, generates multiple control signals, and transmits the generated control signals to the driver IC chip.

[0045] Additionally, the source printed circuit board 22 may include a touch driving circuit for detecting touch.

[0046] Meanwhile, although not shown in the figure, a first sensing line extending substantially in a first direction and a second sensing line extending substantially in a second direction can be provided in the display area DA of the display panel 10.

[0047] For example, the first sensing line may include a receiver electrode, and the second sensing line may include a transmitter electrode. However, embodiments of this disclosure are not limited thereto. In other embodiments, the first sensing line may include a transmitter electrode, and the second sensing line may include a receiver electrode.

[0048] The first and second sensing lines can intersect each other to form a sensing capacitor. The capacitance of the sensing capacitor can change due to user input, and touch input can be detected by the amount of change in capacitance.

[0049] A first wiring RL1 and a second wiring can be provided in the non-display area NDA between the display area DA and the driving unit 20, respectively electrically connected to the first sensing line and the second sensing line.

[0050] Incidentally, since the signal connected to the first wiring RL1, which includes the first sensing line of the receiver electrode, may be sensitive to ambient signals, the signal of the first wiring RL1 may couple with signals from other lines or may be interfered with by signals from other lines. Therefore, ghosting defects may occur, where a touch is recognized in an area outside the actual touch location, or touch sensitivity may be reduced. That is, signals from other lines may act as noise to the signal of the first wiring RL1.

[0051] Therefore, in the display device according to the embodiments of the present disclosure, by setting the ground line GND in the non-display area NDA between the display area DA and the driving unit 20, and setting the first wiring RL1 between the portions of the ground line GND, it is possible to prevent the signal of the first wiring RL1 from being interfered with or coupled to the signal adjacent to it.

[0052] In this configuration, the ground line GND can form a closed loop corresponding to each flexible printed circuit 24, and adjacent closed loops can be connected to each other corresponding to the source printed circuit board 22. Therefore, the ground line GND can be configured to form a large closed loop, such that multiple closed loops can be connected to each other corresponding to a source printed circuit board 22.

[0053] Furthermore, in the display device according to the embodiments of the present disclosure, a gate control line GCL can be provided in the display area DA and the non-display area NDA, which will be described in detail later.

[0054] Therefore, the display device according to the embodiments of the present disclosure can be provided with a sensor portion including a first sensing line and a second sensing line in the display panel 10, thereby detecting the user's touch input and performing the corresponding operation.

[0055] Reference Figure 2 The cross-sectional configuration of a display device according to an embodiment of the present disclosure is described.

[0056] Figure 2 This is a cross-sectional view of a display device according to an embodiment of the present disclosure. Figure 2 Corresponding to Figure 1 The line I-I' is shown, and a cross section of a sub-pixel SP is also shown.

[0057] like Figure 2 As shown, the display panel 10 of the display device according to an embodiment of the present disclosure may include a display portion 100 and a sensor portion 200 above the display portion 100.

[0058] The display portion 100 may include a thin-film transistor TR and a light-emitting diode De on the substrate 110. The sensor portion 200 may include a bridge electrode 220 and a sensor electrode 240 constituting a sensor. In addition, the display portion 100 may also include a storage capacitor Cst.

[0059] Specifically, the substrate 110 of the display portion 100 can be formed of a transparent insulating material, and can be, for example, a glass substrate or a plastic substrate. Polyimide can be used for the plastic substrate, and the plastic substrate can have a stacked structure including at least one polyimide layer and at least one inorganic layer. However, embodiments of this disclosure are not limited thereto.

[0060] A light-shielding pattern 112 can be formed above the substrate 110, and the light-shielding pattern 112 is in direct contact with the substrate 110. The light-shielding pattern 112 can be formed of a conductive material such as metal. The light-shielding pattern 112 can be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and alloys thereof. For example, the light-shielding pattern 112 can have a single-layer structure or a multi-layer structure.

[0061] A barrier layer may also be provided between the substrate 110 and the light-shielding pattern 112. The barrier layer may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be formed as a single layer or multiple layers.

[0062] A buffer layer 120 may be provided above the light-shielding pattern 112. The buffer layer 120 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be formed as a single layer or multiple layers.

[0063] A semiconductor layer 122 can be disposed above the buffer layer 120. The semiconductor layer 122 can overlap with the light-shielding pattern 112, and the light-shielding pattern 112 can block light incident on the semiconductor layer 122 and reduce or prevent the semiconductor layer 122 from deteriorating due to light.

[0064] Semiconductor layer 122 may include a channel region at its center and source and drain regions on either side of the channel region. Semiconductor layer 122 may be formed of an oxide semiconductor material. Alternatively, semiconductor layer 122 may be formed of polysilicon. In this case, the two ends of semiconductor layer 122 may be doped with impurities.

[0065] A gate insulating layer 130 may be disposed above the semiconductor layer 122. The gate insulating layer 130 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be formed as a single layer or multiple layers.

[0066] A gate electrode 132 and a first capacitor electrode 134 can be disposed above the gate insulating layer 130.

[0067] The gate electrode 132 may overlap with the semiconductor layer 122 and may be configured to correspond to the central portion of the semiconductor layer 122. Therefore, the gate electrode 132 may overlap with the light-shielding pattern 112.

[0068] The first capacitor electrode 134 may be spaced apart from the gate electrode 132. The first capacitor electrode 134 may also be spaced apart from the light-shielding pattern 112. However, embodiments of this disclosure are not limited thereto. In other embodiments, the first capacitor electrode 134 may be in direct contact with and electrically connected to the gate electrode 132.

[0069] The gate electrode 132 and the first capacitor electrode 134 can be formed of a conductive material such as a metal. The gate electrode 132 and the first capacitor electrode 134 can be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and alloys thereof. The gate electrode 132 and the first capacitor electrode 134 can have a single-layer structure or a multi-layer structure.

[0070] A first interlayer insulating layer 140 may be disposed above the gate electrode 132 and the first capacitor electrode 134. The first interlayer insulating layer 140 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be formed as a single layer or multiple layers.

[0071] A second capacitor electrode 142 can be disposed above the first interlayer insulating layer 140. The second capacitor electrode 142 can overlap with the first capacitor electrode 134 to form a storage capacitor Cst.

[0072] The second capacitor electrode 142 can be formed of a conductive material such as a metal. The second capacitor electrode 142 can be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and alloys thereof. For example, the second capacitor electrode 142 can have a single-layer structure or a multi-layer structure.

[0073] A second interlayer insulating layer 150 may be disposed above the second capacitor electrode 142. The second interlayer insulating layer 150 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be formed as a single layer or multiple layers.

[0074] A source electrode 152 and a drain electrode 154 may be disposed above the second interlayer insulating layer 150. The source electrode 152 and the drain electrode 154 may be spaced apart from each other, with the gate electrode 132 located between them, and the source electrode 152 and the drain electrode 154 may contact the two ends of the semiconductor layer 122 through contact holes disposed in the first interlayer insulating layer 140, the second interlayer insulating layer 150, and the gate insulating layer 130.

[0075] In addition, the source electrode 152 can contact the light-shielding pattern 112 through contact holes provided in the first interlayer insulating layer 140, the second interlayer insulating layer 150, the gate insulating layer 130, and the buffer layer 120.

[0076] The source electrode 152 and the drain electrode 154 can be formed from one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and their alloys. The source electrode 152 and the drain electrode 154 can have a single-layer structure or a multi-layer structure.

[0077] The source electrode 152, drain electrode 154, semiconductor layer 122, and gate electrode 132 can form a thin film transistor TR.

[0078] Meanwhile, one of the first interlayer insulating layer 140 and the second interlayer insulating layer 150 can be omitted, and in this case, the second capacitor electrode 142 can be made of the same material as the source electrode 152 and the drain electrode 154 and disposed on the same layer as the source electrode 152 and the drain electrode 154.

[0079] A first planarization layer 160 may be disposed above the source electrode 152 and the drain electrode 154. The first planarization layer 160 can eliminate step differences caused by the underlying layer and can have a substantially flat top surface. The first planarization layer 160 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photoacrylic).

[0080] A connecting electrode 162 can be disposed above the first planarization layer 160. The connecting electrode 162 can contact the drain electrode 154 through contact holes disposed in the first planarization layer 160.

[0081] The connection electrode 162 may overlap with the thin-film transistor TR and the storage capacitor Cst. However, embodiments of this disclosure are not limited thereto. In other embodiments, the connection electrode 162 may overlap with a portion of the thin-film transistor TR and be spaced apart from the storage capacitor Cst.

[0082] The connecting electrode 162 can be formed of a conductive material such as a metal. The connecting electrode 162 can be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and alloys thereof. For example, the connecting electrode 162 can have a single-layer structure or a multi-layer structure.

[0083] A second planarization layer 170 may be disposed above the connecting electrode 162. The second planarization layer 170 can eliminate step differences caused by the underlying layer and can have a substantially flat top surface. The second planarization layer 170 may be formed of an organic insulating material such as a photosensitive acrylic polymer (photoacrylic).

[0084] Next, a first electrode 172 can be disposed above the second planarization layer 170, and the first electrode 172 can be formed of a conductive material with a relatively high work function. The first electrode 172 can contact the connecting electrode 162 through contact holes provided in the second planarization layer 170. Therefore, the first electrode 172 can be electrically connected to the drain electrode 154 through the connecting electrode 162.

[0085] Alternatively, the connecting electrode 162 and the second planarization layer 170 can be omitted. In this case, the first electrode 172 can be in direct contact with the drain electrode 154.

[0086] For example, the first electrode 172 may comprise a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO), or may comprise titanium (Ti). However, embodiments of this disclosure are not limited thereto.

[0087] Simultaneously, the first electrode 172 can have a multilayer structure comprising a material with relatively high reflectivity. For example, the first electrode 172 can be formed into a structure with relatively high reflectivity, such as a three-layer structure of titanium, aluminum, and titanium (Ti / Al / Ti), a three-layer structure of indium tin oxide, aluminum, and indium tin oxide (ITO / Al / ITO), a three-layer structure of indium tin oxide, silver, and indium tin oxide (ITO / Ag / ITO), or a three-layer structure of indium tin oxide, silver alloy, and indium tin oxide (ITO / Ag alloy / ITO). Here, the silver alloy can be a silver-palladium-copper (APC) alloy.

[0088] An organic insulating material dam 180 can be provided above the first electrode 172. The dam 180 can overlap with and cover the edge of the first electrode 172. The dam 180 can expose the central portion of the first electrode 172.

[0089] A light-emitting layer 182 can be disposed above the first electrode 172 exposed by the embankment 180. The light-emitting layer 182 can emit red, green and blue light.

[0090] The light-emitting layer 182 may include at least one hole auxiliary layer, at least one light-emitting material layer and at least one electron auxiliary layer constituting a light-emitting unit.

[0091] The luminescent material layer may include one of red, green, and blue luminescent materials. The luminescent material may be an organic luminescent material such as a phosphorescent or fluorescent compound, or an inorganic luminescent material such as a quantum dot.

[0092] The hole auxiliary layer may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL). The electron auxiliary layer may include at least one of an electron injection layer (EIL) and an electron transport layer (ETL).

[0093] As shown, the light-emitting layer 182 may be disposed only above the first electrode 172 exposed by the embankment 180. However, embodiments of this disclosure are not limited thereto. In other embodiments, some of the light-emitting layers 182 (e.g., light-emitting material layers) may be disposed only above the first electrode 172, and hole-assisted layers and electron-assisted layers may be disposed substantially over the entire substrate 110.

[0094] Alternatively, in other embodiments, the light-emitting layer 182 may emit white light and may be disposed on the top and side surfaces of the embankment 180, such that the light-emitting layer 182 may be disposed over substantially the entire substrate 110. In this case, the light-emitting layer 182 may include a plurality of light-emitting units that emit light of different colors and are stacked. Each stack may include at least one hole-assisted layer, at least one light-emitting material layer, and at least one electron-assisted layer.

[0095] For example, the light-emitting layer 182 may have a stacked structure in which two or more light-emitting units that emit light of different colors are stacked, and a charge generation layer (CGL) may be disposed between the two or more light-emitting units.

[0096] A second electrode 190 made of a conductive material with a relatively low work function can be disposed above the light-emitting layer 182. The second electrode 190 can be disposed above substantially the entire substrate 110.

[0097] The second electrode 190 may be formed of aluminum (Al), magnesium (Mg), silver (Ag), or an alloy thereof. In this case, the second electrode 190 may have a relatively thin thickness, allowing light from the light-emitting layer 182 to be transmitted through it. For example, the second electrode 190 may have a thickness of approximately 5 nm to approximately 10 nm, but embodiments of this disclosure are not limited thereto.

[0098] Alternatively, the second electrode 190 may be formed of a transparent conductive material such as indium gallium oxide (IGO) or IZO.

[0099] The first electrode 172, the light-emitting layer 182, and the second electrode 190 can constitute a light-emitting diode (LED). Here, the first electrode 172 can be used as the anode, and the second electrode 190 can be used as the cathode. However, the embodiments of this disclosure are not limited thereto. In other embodiments, the first electrode 172 can be used as the cathode, and the second electrode 190 can be used as the anode.

[0100] An encapsulation layer 192 may be disposed above the second electrode 190, and the encapsulation layer 192 is disposed substantially over the entire substrate 110. The encapsulation layer 192 can protect the light-emitting diode De from external moisture or oxygen. The encapsulation layer 192 may include at least one inorganic layer and at least one organic layer. Here, the organic layer may be a layer covering particles generated during the manufacturing process.

[0101] Simultaneously, although not shown in the figure, a capping layer can be disposed between the second electrode 190 and the encapsulation layer 192. The capping layer can be formed of an insulating material with a relatively high refractive index. The wavelength of light traveling along the capping layer can be amplified by surface plasmon resonance. Therefore, the intensity of the peak can be increased, thereby improving the light efficiency in the display device. For example, the capping layer can be formed as a single layer of organic or inorganic layers, or it can be formed as a stacked organic / inorganic layer.

[0102] Next, a first sensor insulating layer 210 can be disposed above the encapsulation layer 192. The first sensor insulating layer 210 can be a sensor buffer layer of the sensor portion 200. The first sensor insulating layer 210 can be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and can be formed as a single layer or multiple layers.

[0103] A bridge electrode 220 can be disposed above the first sensor insulating layer 210. The bridge electrode 220 can overlap with the dam 180 and be spaced apart from the light-emitting diode De.

[0104] The bridge electrode 220 can be formed of a conductive material such as a metal. The bridge electrode 220 can be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and their alloys. For example, the bridge electrode 220 can have a single-layer structure or a multi-layer structure.

[0105] A second sensor insulating layer 230 can be disposed above the bridge electrode 220. The second sensor insulating layer 230 can be an interlayer insulating layer for sensors. The second sensor insulating layer 230 can be formed of an organic insulating material such as a photosensitive acrylic polymer (photoacrylic).

[0106] Multiple sensor electrodes 240 can be disposed above the second sensor insulating layer 230. The multiple sensor electrodes 240 can selectively contact the bridge electrode 220 through contact holes provided in the second sensor insulating layer 230.

[0107] Therefore, multiple sensor electrodes 240 can be selectively connected to each other via bridge electrodes 220 in the first direction X and / or the second direction Y, thereby forming a first sensing line extending substantially in the first direction X and a second sensing line extending substantially in the second direction Y.

[0108] That is, each of the first sensing line and the second sensing line may include a bridge electrode 220 and a sensor electrode 240.

[0109] The sensor electrode 240 can be formed of a conductive material such as a metal. The sensor electrode 240 can be formed of one or more of the following: aluminum (Al), copper (Cu), molybdenum (Mo), titanium (Ti), chromium (Cr), nickel (Ni), tungsten (W), and their alloys. For example, the sensor electrode 240 can have a single-layer structure or a multi-layer structure.

[0110] A third sensor insulating layer 250 may be disposed above the sensor electrode 240. The third sensor insulating layer 250 may be a sensor passivation layer. The third sensor insulating layer 250 may be formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx), or silicon oxynitride (SiON), and may be formed as a single layer or multiple layers.

[0111] Additionally, although not shown in the figure, a protective layer can be provided above the third sensor insulating layer 250. The protective layer can be formed of an organic insulating material.

[0112] However, the implementation of this disclosure is not limited thereto. In other embodiments, one of the third sensor insulating layer 250 and the protective layer may be omitted.

[0113] Therefore, by providing a sensor portion 200 above the display portion 100, the display device according to the embodiments of the present disclosure can detect the user's touch input and perform the corresponding operation.

[0114] At the same time, refer to again Figure 1 The display device according to embodiments of the present disclosure may include a gate control line (GCL).

[0115] The gate control line GCL can be disposed in the non-display area NDA and connected to the flexible printed circuit 24. The gate control line GCL can also extend and be disposed in the display area DA. In this case, the gate control line GCL can be disposed on each of the two ends of the flexible printed circuit board 24 and is symmetrical about the left and right sides in response to the flexible printed circuit board 24.

[0116] The gate control line (GCL) can transmit gate control signals from the source printed circuit board 22 to the display area DA. For example, the gate control signal may include timing signals such as clock, constant voltage, etc.

[0117] Additionally, although not shown in the figures, the display device according to embodiments of this disclosure may include a gate driving circuit disposed in the display device DA. The gate driving circuit may be disposed between and / or within adjacent sub-pixels SP.

[0118] The gate drive circuit of the display area DA can be connected to the gate control line GCL and receive the gate control signal. The gate drive circuit can use the gate control signal to generate a gate signal and transmit the generated gate signal to each sub-pixel SP.

[0119] The gate drive circuit located in the display area DA can be of the active internal gate (GIA) type.

[0120] Therefore, in the display device according to the embodiments of the present disclosure, since the gate driving circuit is provided in the display area DA and not formed in the non-display area NDA, the area of ​​the non-display area NDA can be reduced.

[0121] Therefore, in a display device according to an embodiment of the present disclosure, the border area can be minimized, and the area of ​​the display area DA can be increased compared to the same size.

[0122] Incidentally, in the display device according to embodiments of this disclosure, the gate control line GCL may cross and overlap with at least one first wiring RL1. As described above, since the signal of the first wiring RL1 is sensitive to surrounding signals, the signal of the first wiring RL1 may be affected by the gate control signal of the gate control line GCL, thus potentially degrading the touch sensing characteristics. That is, touch performance may be degraded.

[0123] Therefore, in a display device according to an embodiment of this disclosure, a shielding pattern can be provided in the thickness direction between the gate control line GCL and the first wiring RL1 to prevent a reduction in touch sensitivity characteristics. This will be referred to... Figures 3 to 6 Detailed description.

[0124] Figure 3 and Figure 4 This is a schematic enlarged plan view of a display device according to an embodiment of the present disclosure, and Figure 5 and Figure 6 This is a cross-sectional view of a display device according to an embodiment of the present disclosure. Figure 3 It is magnification Figure 1 The view of region E1, Figure 4 It is magnification Figure 3 The view of region E2, Figure 5 yes Figure 4 The cross-sectional view of line II-II', and Figure 6 yes Figure 4 The cross-sectional view of line III-III'.

[0125] like Figures 3 to 6 As shown, in the non-display area NDA of the display device according to an embodiment of the present disclosure, the first horizontal power line 156, the second horizontal power line 157, the plurality of horizontal gate control lines 158, the plurality of first wirings RL1, the plurality of second wirings RL2 and the ground line GND can be configured to extend substantially in the first direction X, and the plurality of first vertical power lines 166, the plurality of second vertical power lines 167 and the plurality of vertical gate control lines 168 are configured to extend substantially in the second direction Y.

[0126] The ground wire GND may include a first ground wire GD1 and a second ground wire GD2 that extend in a first direction X and are spaced apart from each other in a second direction Y. The two ends of the first ground wire GD1 may be connected to the corresponding ends of the second ground wire GD2 to form a closed loop.

[0127] The first wiring RL1 can be set in the second direction Y between the first ground line GD1 and the second ground line GD2, and the second wiring RL2 can be set between the ground line GND and the display area DA.

[0128] Each of the first wiring RL1, the second wiring RL2, the first ground wire GD1, and the second ground wire GD2 can have a dual wiring structure, including bottom and top wires disposed on different layers. That is, the first wiring RL1 may include multiple first bottom wirings 222 and multiple first top wirings 242. The second wiring RL2 may include multiple second bottom wirings 223 and multiple second top wirings 243. The first ground wire GD1 may include a first bottom ground wire 224 and a first top ground wire 244. The second ground wire GD2 may include a second bottom ground wire 225 and a second top ground wire 245.

[0129] Additionally, a shielding pattern 226 may be provided in the second direction Y between the first ground line GD1 and the second ground line GD2. The shielding pattern 226 may overlap with a plurality of vertical gate control lines 168 and at least one first wiring RL1. The shielding pattern 226 may be formed of the same material as the first ground line 224 and the second ground line 225, and may be formed on the same layer as the first ground line 224 and the second ground line 225. The shielding pattern 226 may be connected to the first ground line 224 and the second ground line 225 to form a single unit.

[0130] Specifically, a buffer layer 120, a gate insulating layer 130, a first interlayer insulating layer 140, and a second interlayer insulating layer 150 can be sequentially disposed above the substrate 110. A first horizontal power line 156, a second horizontal power line 157, and a plurality of horizontal gate control lines 158 can be disposed above the second interlayer insulating layer 150.

[0131] The first horizontal power line 156, the second horizontal power line 157, and the horizontal gate control line 158 may extend in a first direction X and be spaced apart from each other in a second direction Y. Here, the second horizontal power line 157 may be disposed between the first horizontal power line 156 and the horizontal gate control line 158.

[0132] The first horizontal power line 156, the second horizontal power line 157, and the horizontal gate control line 158 can be set in relation to... Figure 2 It is disposed above the same layer as the source electrode 152 and the drain electrode 154, that is, above the second interlayer insulating layer 150, and can be formed of the same material as the source electrode 152 and the drain electrode 154.

[0133] For example, the first horizontal power line 156 can transmit a low-potential voltage, and the second horizontal power line 157 can transmit a high-potential voltage. However, embodiments of this disclosure are not limited thereto.

[0134] Next, a first planarization layer 160 can be disposed above the first horizontal power line 156, the second horizontal power line 157, and the horizontal gate control line 158. The first vertical power line 166, the second vertical power line 167, and a plurality of vertical gate control lines 168 can be disposed above the first planarization layer 160.

[0135] The first vertical electric field line 166, the second vertical electric field line 167, and the plurality of vertical gate control lines 168 may extend in the second direction Y and may be spaced apart from each other in the first direction X.

[0136] Each of the first vertical electric field line 166 and the second vertical electric field line 167 may be provided in multiples, extending in the second direction Y and spaced apart from each other in the first direction X. The ends of the first vertical electric field line 166 may be connected to each other and formed as one, and the ends of the second vertical electric field line 167 may be connected to each other and formed as one. The first vertical electric field line 166 and the second vertical electric field line 167 may overlap with the first horizontal electric field line 156 and the second horizontal electric field line 157.

[0137] The first vertical electric field line 166 and the second vertical electric field line 167 can contact the first horizontal electric field line 156 through contact holes provided in the first planarization layer 160.

[0138] However, the implementation of this disclosure is not limited thereto. In other embodiments, the first vertical electric field line 166 may contact the first horizontal electric field line 156, and the second vertical electric field line 167 may contact the second horizontal electric field line 157.

[0139] Multiple vertical gate control lines 168 may be disposed in the first direction X between the first vertical electric field line 166 and the second vertical electric field line 167. The multiple vertical gate control lines 168 may extend in the second direction Y and be spaced apart from each other in the first direction X. The multiple vertical gate control lines 168 may intersect and overlap with the first horizontal electric field line 156 and the second horizontal electric field line 157.

[0140] At least some of the multiple vertical gate control lines 168 may have different lengths. Each of the multiple vertical gate control lines 168 may correspond one-to-one with a multiple horizontal gate control line 158. The multiple vertical gate control lines 168 may contact the multiple horizontal gate control lines 158 respectively through contact holes provided in the first planarization layer 160.

[0141] The first vertical electric field line 166, the second vertical electric field line 167, and the vertical gate control line 168 can be set in relation to... Figure 2 It is disposed above the same layer as the connecting electrode 162, that is, above the first planarization layer 160, and can be formed of the same material as the connecting electrode 162.

[0142] A second planarization layer 170, a dam 180, and an encapsulation layer 192 may be sequentially disposed above the first vertical power line 166, the second vertical power line 167, and the vertical gate control line 168.

[0143] A first sensor insulating layer 210 can be disposed above the encapsulation layer 192. Multiple first lower wirings 222, multiple second lower wirings 223, a first lower ground wire 224, a second lower ground wire 225, and a shielding pattern 226 can be disposed above the first sensor insulating layer 210.

[0144] Each of the first lower wirings 222 may include a horizontal portion 222a extending in the first direction X and a vertical portion 222b extending in the second direction Y.

[0145] The horizontal portion 222a of the first lower wiring 222 may overlap with the first horizontal power line 156 and may be spaced apart from the second horizontal power line 157 and the horizontal gate control line 158. Additionally, the horizontal portion 222a of the first lower wiring 222 may be spaced apart from the vertical gate control line 168 and the shielding pattern 226.

[0146] At least one horizontal portion 222a of the first lower wiring 222 can be separated to correspond to the vertical gate control line 168, and a shielding pattern 226 can be disposed between the separated portions of the horizontal portion 222a.

[0147] The vertical portion 222b of the first lower wiring 222 can be connected to the end of the corresponding horizontal portion 222a and extends toward the display area DA. The vertical portion 222b of the first lower wiring 222 can overlap with one of the first vertical power lines 166.

[0148] The second lower wiring 223 may extend in the first direction X and may be separated to correspond to the vertical portion 222b of the first lower wiring 222. The vertical portion 222b of the first lower wiring 222 may be disposed between the separated portions of the second lower wiring 223. The second lower wiring 223 may be spaced apart from the vertical portion 222b of the first lower wiring 222.

[0149] The second lower wiring 223 may cross and overlap with some of the first vertical power line 166, the second vertical power line 167, and the vertical gate control line 168.

[0150] The first ground wire 224 may extend in the first direction X and overlap with the first horizontal power line 156.

[0151] The second ground wire 225 may extend in the first direction X and overlap with the second horizontal power line 157. The second ground wire 225 may be separated to correspond to the vertical portion 222b of the first ground wire 222. The vertical portion 222b of the first ground wire 222 may be disposed between the separated portions of the second ground wire 225, and the second ground wire 225 may be spaced apart from the vertical portion 222b of the first ground wire 222.

[0152] The shielding pattern 226 can be disposed between the first ground wire 224 and the second ground wire 225 in the second direction Y. The shielding pattern 226 can be connected to the first ground wire 224 and the second ground wire 225 and formed as a whole.

[0153] The shielding pattern 226 may overlap with a plurality of vertical gate control lines 168 between the first ground line 224 and the second ground line 225, and may be spaced apart from the first vertical power line 166 and the second vertical power line 167.

[0154] Additionally, the shielding pattern 226 may partially overlap with the first horizontal power line 156 and the second horizontal power line 157.

[0155] The first lower wiring 222, the second lower wiring 223, the first lower ground wire 224, the second lower ground wire 225, and the shielding pattern 226 can be set in relation to... Figure 2 The bridge electrode 220 is disposed on the same layer as the bridge electrode 220, that is, on the first sensor insulating layer 210. The first lower wiring 222, the second lower wiring 223, the first lower ground wire 224, the second lower ground wire 225 and the shielding pattern 226 can be formed of the same material as the bridge electrode 220.

[0156] Next, the second sensor insulating layer 230 can be disposed above the first lower wiring 222, the second lower wiring 223, the first lower ground wire 224, the second lower ground wire 225, and the shielding pattern 226. The first upper wiring 242, the second upper wiring 243, the first upper ground wire 244, and the second upper ground wire 245 can be disposed above the second sensor insulating layer 230.

[0157] The first upper wiring 242 can extend in the first direction X and overlap with the first lower wiring 222. The first upper wiring 242 can contact the first lower wiring 222 through contact holes provided in the second sensor insulating layer 230.

[0158] Additionally, at least one first upper wiring 242 may intersect and overlap with a plurality of vertical gate control lines 168 and a shielding pattern 226. Here, the shielding pattern 226 may be disposed between the first upper wiring 242 and the plurality of vertical gate control lines 168 in the thickness direction (i.e., a third direction perpendicular to the first direction X and the second direction Y).

[0159] The second upper wiring 243 can extend in the first direction X and overlap with the second lower wiring 223. The second upper wiring 243 can contact the second lower wiring 223 through contact holes provided in the second sensor insulating layer 230.

[0160] The second upper wiring 243 may overlap with the vertical portion 222b of the first lower wiring 222, and also overlap with the first vertical power line 166 and the second vertical power line 167. Additionally, the second upper wiring 243 may overlap with at least one vertical gate control line 168.

[0161] The first upper ground wire 244 can extend in the first direction X and overlap with the first lower ground wire 224. The first upper ground wire 244 can contact the first lower ground wire 224 through a contact hole provided in the second sensor insulating layer 230.

[0162] The first ground line 244 may intersect and overlap with the first vertical power line 166, the second vertical power line 167, and a plurality of vertical gate control lines 168.

[0163] The second upper ground wire 245 can extend in the first direction X and overlap with the second lower ground wire 225. The second upper ground wire 245 can contact the second lower ground wire 225 through a contact hole provided in the second sensor insulating layer 230.

[0164] The second ground line 245 may intersect and overlap with the first vertical power line 166, the second vertical power line 167, and the plurality of vertical gate control lines 168. In addition, the second ground line 245 may overlap with the vertical portion 222b of the first lower wiring 222.

[0165] The first upper wiring 242, the second upper wiring 243, the first upper ground wire 244, and the second upper ground wire 245 can be set in relation to... Figure 2 It is disposed above the same layer as the sensor electrode 240, that is, above the second sensor insulating layer 230, and can be formed of the same material as the sensor electrode 240.

[0166] Here, the first upper wiring 242, the second upper wiring 243, the first upper ground wire 244, and the second upper ground wire 245 may each have a width wider than the first lower wiring 222, the second lower wiring 223, the first lower ground wire 224, and the second lower ground wire 225. However, the embodiments of this disclosure are not limited thereto. In other embodiments, the first upper wiring 242, the second upper wiring 243, the first upper ground wire 244, and the second upper ground wire 245 may each have a width narrower than the first lower wiring 222, the second lower wiring 223, the first lower ground wire 224, and the second lower ground wire 225. Additionally, in other embodiments, the first upper wiring 242, the second upper wiring 243, the first upper ground wire 244, and the second upper ground wire 245 may each have the same width as the first lower wiring 222, the second lower wiring 223, the first lower ground wire 224, and the second lower ground wire 225.

[0167] Next, a third sensor insulating layer 250 can be provided above the first upper wiring 242, the second upper wiring 243, the first upper ground wire 244, and the second upper ground wire 245.

[0168] Therefore, in the display device according to the embodiments of the present disclosure, the shielding pattern 226 connected to the first ground line GD1 and the second ground line GD2 can be provided between the first wiring RL1 and the vertical gate control line 168 that intersect and overlap each other, so as to prevent the touch sensing characteristics from being reduced due to the gate control signal.

[0169] The shielding pattern 226 can be formed of the same material as the bridge electrode 220 and on the same layer as the bridge electrode 220, thereby preventing a reduction in touch sensing characteristics without increasing the number of manufacturing processes.

[0170] The display device according to embodiments of this disclosure can be applied to vehicles. (See also...) Figure 7 and Figure 8 This disclosure describes a display device applied to a vehicle according to an embodiment of the present disclosure.

[0171] Figure 7 This is a schematic plan view of a display device applied to a vehicle according to an embodiment of the present disclosure. Aside from the size and subpixel configuration, Figure 7 The display device can have the same Figures 1 to 6 The configuration of the display device is basically the same. With Figures 1 to 6 Identical parts may be indicated by the same or similar reference numerals, and the description of identical parts may be shortened or omitted.

[0172] exist Figure 7 In this embodiment of the present disclosure, the display device may include a display panel 10 and a driving unit 20.

[0173] The display panel 10 may include a display area DA and a non-display area NDA. The display area DA may include a first area, a second area, and a third area A1, A2, and A3 arranged sequentially in the first direction X, and the second area A2 may be located between the first area A1 and the third area A3.

[0174] The first zone, A1, can correspond to the trunk and provide information such as driving speed, RPM, engine temperature, and fuel level. The second zone, A2, can correspond to the central information display (CID) and provide various convenient functions such as audio, video, navigation, air conditioning, and Bluetooth. The third zone, A3, can correspond to the passenger-side display (CDD) and provide entertainment functions and / or seat information for the passenger in the front passenger seat.

[0175] Additionally, in a display device according to an embodiment of the present disclosure, each of the first region A1 and the third region A3 may include a side mirror SM.

[0176] The driving unit 20 may include at least one flexible printed circuit 24 and at least one source printed circuit board 22 corresponding to each of the first region A1, the second region A2 and the third region A3.

[0177] For example, the drive unit 20 may include four source printed circuit boards 22 and ten flexible printed circuits 24. However, embodiments of this disclosure are not limited thereto. In other embodiments, the number of source printed circuit boards 22 and flexible printed circuits 24 may vary.

[0178] The source printed circuit board 22 may include a touch driving circuit corresponding to each of the first region A1, the second region A2, and the third region A3. That is, three touch driving circuits may be provided in the source printed circuit board 22 corresponding to the first region A1, the second region A2, and the third region A3, respectively.

[0179] In this case, the ground line GND can form a closed loop corresponding to each of the first region A1, the second region A2, and the third region A3. Additionally, the ground line GND can form a closed loop corresponding to each flexible printed circuit 24.

[0180] Meanwhile, as described above, the first wiring RL1 can be disposed in the closed loop of the ground line GND, and the gate control line GCL can cross and overlap with the first wiring RL1. Here, a shielding pattern 226 connected to the ground line GND can be disposed between the first wiring RL1 and the gate control line GCL. At least two shielding patterns 226 can be disposed to correspond to each flexible printed circuit 24.

[0181] Reference Figure 8This disclosure describes a cross-sectional configuration of a display device applied to a vehicle according to an embodiment of the present disclosure.

[0182] Figure 8 This is a schematic cross-sectional view of a display device applied to a vehicle according to an embodiment of the present disclosure. Figure 8 Essentially, a sub-pixel SP is shown. Besides the lens, Figure 8 The display device can have the same Figure 2 The configuration of the display device is basically the same. With Figure 2 Identical parts may be indicated by the same or similar reference numerals, and the description of identical parts may be shortened or omitted.

[0183] like Figure 8 As shown, the display panel 10 of the display device according to an embodiment of the present disclosure may include a display portion 100 and a light control portion 300 above the display portion 100.

[0184] The optical control section 300 may include a bridge electrode 320, a sensor electrode 340, and a lens 360. The bridge electrode 320 and the sensor electrode 340 may be selectively connected to form a sensor.

[0185] Specifically, a first sensor insulating layer 310 of the light control section 300 may be disposed above the encapsulation layer 192 of the display section 100, and a bridge electrode 320 may be disposed above the first sensor insulating layer 310.

[0186] A second sensor insulating layer 330 can be disposed above the bridge electrode 320, and a sensor electrode 340 can be disposed above the second sensor insulating layer 330. The sensor electrode 340 can selectively contact the bridge electrode 320 through contact holes provided in the second sensor insulating layer 330.

[0187] A third sensor insulating layer 350 can be disposed above the sensor electrode 340, and a lens 360 can be disposed above the third sensor insulating layer 350.

[0188] Lens 360 can be configured to correspond to a light-emitting diode De. Lens 360 can allow light emitted from the light-emitting diode De to be output to the outside in a specific direction, thereby limiting the viewing angle. Lens 360 can be a hemispherical lens (e.g., a dome lens) or a semi-cylindrical lens.

[0189] Next, a protective layer 370 can be provided above the lens 360 to protect the lens 360. The protective layer 370 can be formed of an organic insulating material and can have a substantially flat top surface. The refractive index of the protective layer 370 can be less than the refractive index of the lens 360. However, embodiments of this disclosure are not limited thereto.

[0190] The protective layer 370 may be formed of organic insulating materials such as photosensitive acrylic polymers (photoacrylic), benzocyclobutene (BCB), polyimide (PI) or polyamide (PA), but the embodiments of this disclosure are not limited thereto.

[0191] Meanwhile, although not shown in the figure, a polarizing plate can be disposed above the protective layer 370. The polarizing plate may include a linear polarizing layer and a delay layer. The polarizing plate can change the polarization state of external light incident on the display panel 10, thereby preventing external light from being reflected in the display panel 10 and then output to the outside.

[0192] In a display device according to an embodiment of the present disclosure, by setting the lens 360 to correspond to the light-emitting diode De, light can be focused by the lens 360 and output to the outside in a specific direction, thereby limiting the viewing angle.

[0193] The display device of this disclosure can include a gate driving circuit in the display area, thereby reducing the area of ​​the non-display area and minimizing the bezel area. Compared to the same size, this display device of the present disclosure can increase the area of ​​the display area. Therefore, efficiency can be improved, thereby reducing production power consumption and achieving low power consumption.

[0194] Furthermore, by providing a sensor portion above the display portion of the display panel, the display device of this disclosure can be used as an output device for displaying images, and simultaneously as an input device for receiving user commands by touching a specific portion of the displayed image.

[0195] Furthermore, the wiring in the non-display area that connects to the sensing line of the sensor section of the display area can be placed in a closed loop of the ground line to prevent signal interference or coupling.

[0196] Furthermore, by setting a shielding pattern between the gate control line and the wiring of the gate drive circuit connected to the display area, touch performance can be prevented from being degraded due to the gate control signal.

[0197] Furthermore, by providing a light control section above the display section, the display device of this disclosure can selectively limit the viewing angle.

[0198] It will be apparent to those skilled in the art that various modifications and variations can be made to the electroluminescent display device and the method of manufacturing the electroluminescent display device of this disclosure without departing from the technical concept or scope of this disclosure. Therefore, this disclosure is intended to cover modifications and variations thereof, provided they fall within the scope of the appended claims and their equivalents.

Claims

1. A display device, comprising: The substrate includes both the display area and the non-display area; Multiple sub-pixels are disposed in the display area and arranged in the first and second directions; The first and second sensing lines are disposed in the display area; as well as First wiring and second wiring are disposed in the non-display area, extend in the first direction, and are electrically connected to the first sensing line and the second sensing line, respectively. A gate control line disposed in the non-display area and extending in the second direction; A ground line disposed in the non-display area and extending in the first direction; as well as The shielding pattern connected to the ground wire, The shielding pattern overlaps with the first wiring and the gate control line, and is disposed between the first wiring and the gate control line in the thickness direction.

2. The display device according to claim 1, wherein, The ground wires include a first ground wire and a second ground wire spaced apart from each other in the second direction, and The shielding pattern is disposed between the first ground wire and the second ground wire in the second direction.

3. The display device according to claim 2, wherein, The first wiring is disposed between the first ground wire and the second ground wire in the second direction, and The second wiring is disposed in the second direction between the first ground wire and the second ground wire and the display area.

4. The display device according to claim 2, wherein, The shielding pattern is connected to the first ground wire and the second ground wire.

5. The display device according to claim 4, wherein, Each of the first ground wire and the second ground wire includes a lower ground wire and an upper ground wire, and The shielding pattern is formed of the same material as the grounding wire.

6. The display device according to claim 2, wherein, The two ends of the first ground wire are connected to the corresponding ends of the second ground wire, thereby forming a closed loop.

7. The display device according to claim 6, further comprising: Multiple flexible printed circuits connected to the non-display area; as well as The source printed circuit is connected to the plurality of flexible printed circuits. The closed loop is configured to correspond to each of the plurality of flexible printed circuits, and adjacent closed loops are connected to each other.

8. The display device according to claim 6, wherein, The first wiring is provided in the closed loop.

9. The display device according to claim 1, wherein, The first wiring includes a bottom wiring and a top wiring, and The lower wiring is spaced apart from the shielding pattern, and the upper wiring overlaps with the shielding pattern.

10. The display device according to claim 9, wherein, The lower wiring is formed of the same material as the shielding pattern and is formed on the same layer as the shielding pattern.

11. The display device according to claim 1, wherein, Each of the first sensing line and the second sensing line includes a bridge electrode and a sensor electrode connected to the bridge electrode.

12. The display device according to claim 11, wherein, The shielding pattern is formed of the same material as the bridge electrode and is formed on the same layer as the bridge electrode.

13. The display device according to claim 1, further comprising: Lens above the first sensing line and the second sensing line.

14. The display device according to claim 1, further comprising: A gate drive circuit is disposed in the display area and connected to the gate control line. The gate driving circuit receives a gate control signal from the gate control line, uses the gate control signal to generate a gate signal, and transmits the generated gate signal to each of the plurality of sub-pixels.

Images