Vehicle-gauge-level chip manufacturing method and chip packaging structure

Abstract

The invention relates to the technical field of chip manufacturing, and provides a vehicle gauge level chip manufacturing method and a chip packaging structure, and the method comprises the steps: S1, providing a core plate, a power module and a heat dissipation copper block; preparing a third wiring layer and a fourth wiring layer on the core board to form a first semi-finished board; processing a first through hole and a second through hole in the first semi-finished product plate; the power module is installed in the first through hole, and the heat dissipation copper block is installed in the second through hole; s2, the second wiring layer covers the upper end faces of the base copper block and the heat dissipation copper block; s3, the lower end face of the base copper block and the lower end face of the heat dissipation copper block are covered with the adhesive protection layer; s4, the base copper block and the fifth wiring layer are separated by the adhesive protective layer, and the heat dissipation copper block and the fifth wiring layer are separated by the adhesive protective layer; and S5, cutting off the fourth semi-finished product plate part on the outer side of the adhesive protective layer.

Description

Technical Field

[0001] This invention belongs to the technical field of chip manufacturing, and more specifically, relates to an automotive-grade chip manufacturing method and chip packaging structure. Background Technology

[0002] Modern chips are very common. To facilitate heat dissipation, heat sinks are typically installed and thermally connected to the chip. (See Chinese Invention Patent; Application No.: 2025113010705; Subject: A Packaging Method and Packaging Structure for Automotive-Grade Chips). A heat sink is located on one side (e.g., the bottom side) of the chip board, and the base copper block and heat sink on the chip board transfer heat to the heat sink. A third wiring layer, a second wiring layer, and a first wiring layer are located on the other side (e.g., the top side) for signal transmission (and / or heat transfer). Since the second and first wiring layers are typically processed sequentially by hot-pressing one side of the chip board during manufacturing, thermal expansion and contraction can easily cause the chip board to bend to one side.

[0003] For existing chip packaging and heat dissipation methods, please refer to the processing flow of the first to third wiring layers and the copper block in (Chinese Invention Patent; Application No.: 2025113010705; Subject: A Packaging Method and Packaging Structure for Automotive-Grade Chips). The first wiring layer corresponds to the first wiring layer in this application, the second wiring layer corresponds to the second wiring layer in this application, and the third wiring layer corresponds to the third wiring layer in this application.

[0004] For existing chip packaging and heat dissipation methods, please refer to the processing flow of the first to sixth wiring layers and the copper block in (Chinese Invention Patent; Application No.: 2025110705168; Subject Title: A Packaging Method and Packaging Structure for Automotive-Grade Chips). The first wiring layer corresponds to the first wiring layer in this application, the second wiring layer corresponds to the second wiring layer in this application, the third wiring layer corresponds to the third wiring layer in this application, the fourth wiring layer corresponds to the fourth wiring layer in this application, the fifth wiring layer corresponds to the fifth wiring layer in this application, and the sixth wiring layer corresponds to the sixth wiring layer in this application.

[0005] Existing chip packaging methods can be found in the L1 to L6 chip packaging methods used in (Chinese Invention Patent; Publication No.: CN118763009A; Subject Title: A Packaging Method and Packaging Structure for Automotive-Grade Chips; Publication Date: 2024.10.11). The L1 layer corresponds to the first wiring layer in this application, the L2 layer corresponds to the second wiring layer, the L3 layer corresponds to the third wiring layer, the L4 layer corresponds to the fourth wiring layer, the L5 layer corresponds to the fifth wiring layer, and the L6 layer corresponds to the sixth wiring layer.

[0006] Existing chip packaging methods can be found in the L1 to L6 chip packaging method used in (Chinese Invention Patent; Publication No.: CN115841959A; Subject Title: A Packaging Structure and Method for a High-Power Chip; Publication Date: 2023.03.24). Wherein, L1 corresponds to the first wiring layer in this application, L2 corresponds to the second wiring layer in this application, L3 corresponds to the third wiring layer in this application, L4 corresponds to the fourth wiring layer in this application, L5 corresponds to the fifth wiring layer in this application, and L6 corresponds to the sixth wiring layer in this application. Summary of the Invention

[0007] The purpose of this invention is to provide a method for manufacturing automotive-grade chips, so as to solve the technical problem in the prior art that the sequential manufacturing of multiple wiring layers on one side of the chip board can easily cause the chip board to bend.

[0008] To achieve the above objectives, the technical solution adopted by the present invention is: to provide a method for manufacturing automotive-grade chips, comprising:

[0009] S1: Provide a core board, a power module, and a heat dissipation copper block; prepare a third wiring layer and a fourth wiring layer on the core board to form a first semi-finished board; process a first through hole and a second through hole on the first semi-finished board; install the power module into the first through hole and the heat dissipation copper block into the second through hole; the power module includes: a chip and a base copper block, the chip being disposed on the base copper block;

[0010] S2: Prepare a second wiring layer to form a second semi-finished board; the second wiring layer covers the upper end face of the base copper block and the upper end face of the heat dissipation copper block;

[0011] S3: Provide an adhesive protective layer; cover the lower end face of the base copper block and the lower end face of the heat dissipation copper block with the adhesive protective layer;

[0012] S4: Prepare the fifth wiring layer to form the third semi-finished board; the adhesive protective layer separates the base copper block and the fifth wiring layer, and the adhesive protective layer separates the heat dissipation copper block and the fifth wiring layer;

[0013] S5: Prepare the first wiring layer and the sixth wiring layer to form the fourth semi-finished board; cut off the portion of the fourth semi-finished board located outside the adhesive protective layer so that the fifth wiring layer and the core board can be separated by mechanical peeling.

[0014] Further, S3 includes:

[0015] S31: Provide the adhesive protective layer; the adhesive protective layer includes: a protective film and an adhesive film; the protective film has a front surface and a rear surface disposed opposite to each other; the front surface has a protection zone; the adhesive film has an adhesive covering area and an adhesive fixing area;

[0016] S32: Cover the lower end face of the base copper block and the lower end face of the heat dissipation copper block with the protection zone, and fix the protective film on the core board;

[0017] S33: The adhesive covering area is pasted and covers the rear surface; the adhesive fixing area is located outside the edge of the protective film, and the adhesive fixing area is pasted and fixed on the core board.

[0018] Furthermore, in S32, "fixing the protective film onto the core board" includes:

[0019] A pin is provided; the protective film has a protrusion; the pin secures the protrusion to the core plate.

[0020] Furthermore, it also includes:

[0021] S34: Cut the protective film and the protrusion by ultraviolet laser.

[0022] Furthermore, the width of the adhesive fixing area is greater than or equal to 2mm.

[0023] Furthermore, the protective film on the outer side of the protected area has a first perforation;

[0024] The adhesive film has a second perforation; the second perforation communicates with the first perforation, and the edge of the second perforation is located inside the first perforation.

[0025] Furthermore, the protective film is a one-piece piece made of polyimide.

[0026] Furthermore, the adhesive film includes: a first film and a second film that are bonded together; the first film is a polyimide film and the second film is an acrylic adhesive layer.

[0027] Furthermore, S32, "covering the lower end face of the base copper block and the lower end face of the heat dissipation copper block with the protected area," includes:

[0028] S321: Etch the fourth wiring layer to make the area within 200μm of the edges of the first and second vias a copper-free area;

[0029] S322: The protection zone is attached to the core board in the copper-free area, and the protection zone covers the lower end face of the base copper block and the lower end face of the heat dissipation copper block.

[0030] The present invention also provides a chip packaging structure, including: a core board, a power module, a heat dissipation copper block, an adhesive protective layer, a first wiring layer, a second wiring layer, a third wiring layer, a fourth wiring layer, a fifth wiring layer and a sixth wiring layer;

[0031] The core board, the third wiring layer, and the fourth wiring layer form a first semi-finished board; a first through hole and a second through hole are processed on the first semi-finished board; the power module is installed in the first through hole, and the heat dissipation copper block is installed in the second through hole; the power module includes: a chip and a base copper block, and the chip is disposed on the base copper block;

[0032] The first semi-finished board and the second wiring layer form the second semi-finished board; the second wiring layer covers the upper surface of the base copper block and the upper surface of the heat dissipation copper block;

[0033] The adhesive protective layer covers the lower end face of the base copper block and the lower end face of the heat dissipation copper block;

[0034] The second semi-finished board and the fifth wiring layer form the third semi-finished board; the adhesive protective layer separates the base copper block and the fifth wiring layer, and the adhesive protective layer separates the heat dissipation copper block and the fifth wiring layer;

[0035] The third semi-finished board, the first wiring layer, and the sixth wiring layer form the fourth semi-finished board; the portion of the fourth semi-finished board outside the adhesive protective layer can be cut off so that the fifth wiring layer and the core board can be separated by mechanical peeling.

[0036] The beneficial effects of the automotive-grade chip manufacturing method provided by this invention are as follows: Compared with the prior art, the automotive-grade chip manufacturing method provided by this invention provides a core board, on which a third wiring layer and a fourth wiring layer are prepared; the core board, the third wiring layer, and the fourth wiring layer together constitute a first semi-finished board; a first through hole and a second through hole are processed on the first semi-finished board; a power module can be installed in the first through hole, and a heat sink copper block can be installed in the second through hole, making the installation of the power module and the heat sink copper block very convenient; the power module includes a chip and a base copper block, the chip is set on the base copper block, and both the base copper block and the heat sink copper block can dissipate heat; the second wiring layer is located on one side of the core board, and an adhesive protective layer is located on the other side of the core board; the first semi-finished board and the second wiring layer together constitute a second semi-finished board; the second wiring layer covers the upper end face of the base copper block and the upper end face of the heat sink copper block; the adhesive protective layer covers the lower end face of the base copper block and the lower end face of the heat sink copper block; after the adhesive protective layer covers the base copper block and the heat sink copper block, a fifth wiring layer is prepared; the second semi-finished board... The first and sixth wiring layers together form the third semi-finished board. An adhesive protective layer separates the base copper block and the fifth wiring layer, preventing the fifth wiring layer from adhering to the base copper block. The adhesive protective layer also separates the heat dissipation copper block and the fifth wiring layer, preventing the fifth wiring layer from adhering to the heat dissipation copper block. The first and sixth wiring layers are then prepared. The third semi-finished board, the first wiring layer, and the sixth wiring layer together form the fourth semi-finished board. Because the first and sixth wiring layers are prepared on both sides of the core board respectively, the stress from thermal expansion and contraction on both sides of the core board is more balanced, reducing the core board from bending to one side. The fourth semi-finished board is cut along the edge of the adhesive protective layer. Because the adhesive protective layer separates the base copper block and the fifth wiring layer, and the adhesive protective layer separates the heat dissipation copper block and the fifth wiring layer, the fifth wiring layer can be separated from the core board after the fourth semi-finished board is cut. After the adhesive protective layer is peeled off from the core board, the lower end faces of the base copper block and the heat dissipation copper block are exposed, allowing the external heat sink or external heat dissipation layer to directly contact and dissipate heat from the lower end faces of the base copper block and the heat dissipation copper block. Attached Figure Description

[0037] Figure 1 A schematic diagram of the core board, the third wiring layer, and the fourth wiring layer provided in an embodiment of the present invention;

[0038] Figure 2 A schematic diagram of the etching of the third and fourth wiring layers provided in an embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of the machining of the first through hole and the second through hole on the core board provided in an embodiment of the present invention;

[0040] Figure 4 A schematic diagram showing the first and second through holes sealed with tape according to an embodiment of the present invention;

[0041] Figure 5 A schematic diagram of the installation of the power module and the heat sink copper block provided for an embodiment of the present invention;

[0042] Figure 6 This is a schematic diagram of the formation of a second wiring layer provided in an embodiment of the present invention;

[0043] Figure 7 Provided for embodiments of the present invention Figure 6 A diagram illustrating the removal of tape from the substrate;

[0044] Figure 8 A schematic diagram of the protective film provided in an embodiment of the present invention;

[0045] Figure 9 This is a schematic diagram of a covering adhesive film provided in an embodiment of the present invention;

[0046] Figure 10 This is a schematic diagram of the formation of the fifth wiring layer provided in an embodiment of the present invention;

[0047] Figure 11 This is a schematic diagram of the formation of a first blind hole provided in an embodiment of the present invention;

[0048] Figure 12 A schematic diagram of electroplating inside the first blind hole is provided for an embodiment of the present invention;

[0049] Figure 13 This is a schematic diagram of the processing of the second wiring layer provided in an embodiment of the present invention;

[0050] Figure 14 A schematic diagram of the formation of the first wiring layer and the sixth wiring layer provided in an embodiment of the present invention;

[0051] Figure 15 This is a schematic diagram of the machining of the second blind hole provided in an embodiment of the present invention;

[0052] Figure 16 This is a schematic diagram of electroplating in the second blind hole provided in an embodiment of the present invention;

[0053] Figure 17 This is a schematic diagram of the processing of the first wiring layer provided in an embodiment of the present invention;

[0054] Figure 18 This is a schematic diagram of the processing of the solder resist layer provided in an embodiment of the present invention;

[0055] Figure 19 A schematic diagram illustrating the cutting and separation of the core board and the fifth wiring layer (and the sixth wiring layer) according to an embodiment of the present invention;

[0056] Figure 20This is a flowchart of a method for manufacturing automotive-grade chips according to an embodiment of the present invention.

[0057] The following are the labeling elements in the figure:

[0058] 1-Core board; 11-First through hole; 12-Second through hole; 2-Power module; 21-Chip; 22-Base copper block; 31-First wiring layer; 31a-L1 copper foil; 31b-L1 dielectric layer; 32-Second wiring layer; 32a-L2 copper foil; 32b-L2 dielectric layer; 33-Third wiring layer; 33a-L3 copper foil; 33b-L3 dielectric layer; 34-Fourth wiring layer; 34a-L4 copper foil; 34b-L4 dielectric layer; 35-Fifth wiring layer; 35a-L5 copper foil; 35b-L5 dielectric layer; 36-Sixth wiring layer; 36a-L6 copper foil; 36b-L6 dielectric layer; 4-Heat dissipation copper block; 5-Adhesive protective layer; 51-Protective film; 52-Adhesive film; 61-Tape; 62-First blind hole; 63-Second blind hole; 64-Solder resist layer. Detailed Implementation

[0059] It should be noted that the specific embodiments are only used to explain the present invention and are not intended to limit the present invention.

[0060] It should be noted that, in the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Here, A and B can be singular or plural, respectively.

[0061] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as "connected to" or "attached to" another component, it can be directly connected to or indirectly connected to that other component. When a component is referred to as "fixed to" or "set on" another component, it can be directly on or indirectly on that other component.

[0062] It should be noted that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention.

[0063] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature.

[0064] It should be noted that the term "multiple" means two or more, unless otherwise explicitly specified.

[0065] Please refer to the following: Figures 1 to 20 The present invention will now describe the automotive-grade chip manufacturing method provided. The automotive-grade chip manufacturing method includes: S1: providing a core board 1, a power module 2, and a heat sink copper block 4; preparing a third wiring layer 33 and a fourth wiring layer 34 on the core board 1 to form a first semi-finished board; processing a first through hole 11 and a second through hole 12 on the first semi-finished board; installing the power module 2 into the first through hole 11 and the heat sink copper block 4 into the second through hole 12; the power module 2 includes a chip 21 and a base copper block 22, the chip 21 being disposed on the base copper block 22; S2: preparing a second wiring layer 32 to form a second semi-finished board; the second wiring layer 32 covering the upper surface of the base copper block 22 and the heat sink copper block 4. S3: Provide an adhesive protective layer 5; cover the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 with the adhesive protective layer 5; S4: Prepare the fifth wiring layer 35 to form the third semi-finished board; the adhesive protective layer 5 separates the base copper block 22 and the fifth wiring layer 35, and the adhesive protective layer 5 separates the heat dissipation copper block 4 and the fifth wiring layer 35; S5: Prepare the first wiring layer 31 and the sixth wiring layer 36 to form the fourth semi-finished board; cut off the portion of the fourth semi-finished board located outside the adhesive protective layer 5 so that the fifth wiring layer 35 and the core board 1 can be separated by mechanical peeling.

[0066] Thus, a core board 1 is provided, on which a third wiring layer 33 and a fourth wiring layer 34 are fabricated; the core board 1, the third wiring layer 33, and the fourth wiring layer 34 together form a first semi-finished board; a first through hole 11 and a second through hole 12 are processed on the first semi-finished board; the power module 2 can be installed into the first through hole 11, and the heat sink copper block 4 can be installed into the second through hole 12, making the installation of the power module 2 and the heat sink copper block 4 very convenient; the power module 2 includes a chip 21 and a base copper block 22, the chip 21 is disposed on the base copper block 22, and both the base copper block 22 and the heat sink copper block 4 can dissipate heat; the second wiring layer 32 is located on the core board 1. On the other side, the adhesive protective layer 5 is located on the other side of the core board 1; the first semi-finished board and the second wiring layer 32 together form the second semi-finished board; the second wiring layer 32 covers the upper end face of the base copper block 22, and the second wiring layer 32 also covers the upper end face of the heat dissipation copper block 4; the adhesive protective layer 5 covers the lower end face of the base copper block 22, and the adhesive protective layer 5 also covers the lower end face of the heat dissipation copper block 4; after the adhesive protective layer 5 covers the base copper block 22 and the heat dissipation copper block 4, the fifth wiring layer 35 is then prepared; the second semi-finished board and the fifth wiring layer 35 together form the third semi-finished board; the adhesive protective layer 5 separates the base copper block 22 and the fifth wiring layer 35. Layer 35 prevents the fifth wiring layer 35 from adhering to the base copper block 22; the adhesive protective layer 5 separates the heat dissipation copper block 4 and the fifth wiring layer 35, preventing the fifth wiring layer 35 from adhering to the heat dissipation copper block 4; the first wiring layer 31 and the sixth wiring layer 36 are prepared; the third semi-finished board, the first wiring layer 31 and the sixth wiring layer 36 together form the fourth semi-finished board; since the first wiring layer 31 and the sixth wiring layer 36 are prepared on both sides of the core board 1 respectively, the stress of thermal expansion and contraction on both sides of the core board 1 is more balanced, reducing the bending of the core board 1 to one side; the fourth semi-finished board is cut along the edge of the adhesive protective layer 5, since the adhesive protective layer 5 separates the first wiring layer 31 and the sixth wiring layer 36; The base copper block 22 and the fifth wiring layer 35 are separated by an adhesive protective layer 5, which separates the heat dissipation copper block 4 and the fifth wiring layer 35. This allows the fifth wiring layer 35 to be separated from the core board 1 after the fourth semi-finished product is cut (in one embodiment, the adhesive protective layer 5 can be peeled off from the core board 1 along with the fifth wiring layer 35 under external force). After the adhesive protective layer 5 is peeled off from the core board 1, the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 can be exposed, allowing the external heat sink or external heat dissipation layer to directly contact the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 and dissipate heat to the outside.

[0067] In one embodiment, the base copper block 22 and the heat dissipation copper block 4 are thermally connected.

[0068] In one embodiment, the base copper block 22 and the heat dissipation copper block 4 are thermally connected through the second wiring layer 32.

[0069] In one embodiment, the third wiring layer 33 includes a copper layer. In one embodiment, the fourth wiring layer 34 includes a copper layer.

[0070] In one embodiment, the second wiring layer 32 is formed on the third wiring layer 33 by stacking a resin layer and copper foil together and heating them.

[0071] In one embodiment, the fifth wiring layer 35 is formed on the adhesive protective layer 5 and the fourth wiring layer 34 by heating a resin layer and copper foil stacked together.

[0072] In one embodiment, the first wiring layer 31 is formed on the second wiring layer 32 by stacking a resin layer and copper foil together and heating them.

[0073] In one embodiment, the sixth wiring layer 36 is formed on the fifth wiring layer 35 by stacking a resin layer and copper foil together and heating them.

[0074] In one embodiment, the fourth semi-finished board portion located outside the adhesive protective layer 5 is cut off using a cutting device.

[0075] In one embodiment, the base copper block 22 and the heat dissipation copper block 4 are thermally connected through the copper foil of the second wiring layer 32.

[0076] In one embodiment, the top of the base copper block 22 has a cavity, and the chip 21 is disposed in the cavity.

[0077] In one embodiment, the first wiring layer 31 is thermally connected to the base copper block 22 and the heat dissipation copper block 4, respectively.

[0078] In one embodiment, the second wiring layer 32 is thermally connected to the base copper block 22 and the heat dissipation copper block 4, respectively.

[0079] In one embodiment, the base copper block 22 and the heat dissipation copper block 4 are thermally connected by L1 copper foil 31a.

[0080] In one embodiment, the base copper block 22 and the heat dissipation copper block 4 are thermally connected by L2 copper foil 32a.

[0081] In one embodiment, "mechanical peeling" refers to peeling by hand. In another embodiment, "mechanical peeling" refers to peeling by a robotic arm, cylinder, or gripper.

[0082] In one embodiment, the following layers are included: a first wiring layer 31, an L1 copper foil 31a (i.e., the copper foil of the first wiring layer 31), an L1 dielectric layer 31b (i.e., the dielectric layer of the first wiring layer 31), a second wiring layer 32, an L2 copper foil 32a (i.e., the copper foil of the second wiring layer 32), an L2 dielectric layer 32b (i.e., the dielectric layer of the second wiring layer 32), a third wiring layer 33, an L3 copper foil 33a (i.e., the copper foil of the third wiring layer 33), an L3 dielectric layer 33b (i.e., the dielectric layer of the third wiring layer 33), a fourth wiring layer 34, and an L4 copper foil 34a (i.e., the copper foil of the fourth wiring layer 34). The L4 dielectric layer 34b (i.e., the dielectric layer of the fourth wiring layer 34), the fifth wiring layer 35, the L5 copper foil 35a (i.e., the copper foil of the fifth wiring layer 35), the L5 dielectric layer 35b (i.e., the dielectric layer of the fifth wiring layer 35), the sixth wiring layer 36, the L6 copper foil 36a (i.e., the copper foil of the sixth wiring layer 36), and the L6 dielectric layer 36b (i.e., the dielectric layer of the sixth wiring layer 36) can be found in: (Chinese Invention Patent; Publication No.: CN118763009A; Subject Title: A Packaging Method and Packaging Structure for Automotive-Grade Chips; Publication Date: 2024.10.11).

[0083] In one embodiment, chip 21 is either a MOSFET chip or an IGBT chip. MOSFET stands for "Metal-Oxide-Semiconductor Field-Effect Transistor"; IGBT stands for "Insulated Gate Bipolar Transistor".

[0084] Further, please refer to Figures 1 to 20As a specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, S3 includes: S31: providing an adhesive protective layer 5; the adhesive protective layer 5 includes: a protective film 51 and an adhesive film 52; the protective film 51 has a front surface and a rear surface disposed opposite to each other; the front surface has a protection zone; the adhesive film 52 has an adhesive covering area and an adhesive fixing area; S32: covering the lower end surface of the base copper block 22 and the lower end surface of the heat dissipation copper block 4 with the protection zone, and fixing the protective film 51 to the core board 1; S33: pasting the adhesive covering area and covering the rear surface; the adhesive fixing area is located outside the edge of the protective film 51, and the adhesive fixing area is pasted and fixed to the core board 1. Thus, the protective film 51 has a front surface and a rear surface; the front surface has a protection zone, which can cover the object to be protected when the protective film 51 needs to protect the object (such as the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4); the adhesive film 52 has an adhesive covering area, which can be adhered to and covered on the rear surface; the adhesive film 52 has an adhesive fixing area; when the adhesive covering area is adhered to and covers the rear surface, the adhesive fixing area is located on the outer side of the edge of the protective film 51, so that the adhesive fixing area can be adhered and fixed on the core board 1. After the adhesive fixing area is adhered to the core board 1, it can maintain the stability of the position of the adhesive film 52, thereby improving the tightness of the adhesion between the protection zone and the object to be protected.

[0085] In one embodiment, the adhesive film 52 is a film layer with adhesive coating on its surface.

[0086] In one embodiment, the adhesive covering area can cover part or all of the rear surface.

[0087] In one embodiment, the protective film 51 and the adhesive film 52 are both flexible films.

[0088] Further, please refer to Figures 1 to 20 As a specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, in step S32, "fixing the protective film 51 onto the core board 1" includes: providing a pin; the protective film 51 having a protrusion; and the pin fixing the protrusion onto the core board 1. Thus, fixing the protective film 51 onto the core board 1 by fixing the protrusion onto the core board 1 with a pin is very convenient.

[0089] Further, please refer to Figures 1 to 20 As a specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, it further includes: S34: cutting the protective film 51 and cutting off the protrusion using ultraviolet laser. Thus, cutting the protrusion using ultraviolet laser is very convenient.

[0090] Further, please refer to Figures 1 to 20In one specific embodiment of the automotive-grade chip manufacturing method provided by this invention, the width of the adhesive fixing area is greater than or equal to 2mm. This ensures that the adhesive fixing area adheres firmly to the external object.

[0091] Further, please refer to Figures 1 to 20 As a specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, the protective film 51 on the outer side of the protected area has a first perforation; the adhesive film 52 has a second perforation; the second perforation is connected to the first perforation, and the edge of the second perforation is located inside the first perforation. Thus, the protective film 51 on the outer side of the protected area has a first perforation, allowing gas between the protected area and the object to be protected to escape through the first perforation, improving the adhesion between the protected area and the object to be protected; the adhesive film 52 has a second perforation, which is connected to the first perforation, allowing airflow to pass through the first and second perforations sequentially and escape; the edge of the second perforation is located inside the first perforation, allowing the adhesive film 52 located inside the first perforation to be adhered to an external object, thus positioning the adhesive film 52 and the protective film 51 and improving the adhesion between the protected area and the object to be protected.

[0092] In one embodiment, in a projection plane parallel to the protective film 51, the edge of the second perforation is located inside the first perforation.

[0093] In one embodiment, the edges of the adhesive covering area, the adhesive fixing area, and the second perforation are all adhesive.

[0094] Further, please refer to Figures 1 to 20 In one specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, the protective film 51 is a monolithic piece made of polyimide. Thus, the polyimide is resistant to high temperatures and corrosion.

[0095] Further, please refer to Figures 1 to 20 In one specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, the adhesive film 52 includes: a first film and a second film bonded together; the first film is a polyimide film, and the second film is an acrylic adhesive layer. Thus, both the polyimide and the acrylic adhesive are resistant to high temperatures and corrosion.

[0096] Further, please refer to Figures 1 to 20As a specific embodiment of the automotive-grade chip manufacturing method provided by the present invention, S32, "covering the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 with the protection zone", includes: S321: etching the fourth wiring layer 34 to make the area within 200μm of the edges of the first through hole 11 and the second through hole 12 a copper-free area; S322: attaching the protection zone to the core board 1 within the copper-free area, and covering the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 with the protection zone. In this way, the protection zone avoids the fourth wiring layer 34, avoiding the influence of fixing or removing the protective film 51 on the fourth wiring layer 34.

[0097] Please see Figures 1 to 20The present invention also provides a chip 21 packaging structure, including: a core board 1, a power module 2, a heat dissipation copper block 4, an adhesive protective layer 5, a first wiring layer 31, a second wiring layer 32, a third wiring layer 33, a fourth wiring layer 34, a fifth wiring layer 35, and a sixth wiring layer 36; the core board 1, the third wiring layer 33, and the fourth wiring layer 34 form a first semi-finished board; a first through hole 11 and a second through hole 12 are processed on the first semi-finished board; the power module 2 is installed in the first through hole 11, and the heat dissipation copper block 4 is installed in the second through hole 12; the power module 2 includes: a chip 21 and a base copper block 22, the chip 21 being disposed on the base copper block 22; the first semi-finished board and the second wiring layer 36 form a first semi-finished board; the first wiring layer 11, the second wiring layer 32, the third wiring layer 33, the fourth wiring layer 34, the fifth wiring layer 35, and the sixth wiring layer 36; the core board 1, the third wiring layer 33, and the fourth wiring layer 34 form a first semi-finished board; the first through hole 11 and the second through hole 12 are processed on the first semi-finished board; the power module 2 is installed in the first through hole 11, and the heat dissipation copper block 4 is installed in the second through hole 12; the power module 2 includes: a chip 21 and a base copper block 22, the chip 21 being disposed on the base copper block 22; the first semi-finished board and the second wiring layer 36 form a first semi-finished board; the second wiring layer 31, the third wiring layer 32, the third wiring layer 33, the fourth wiring layer 34, the fifth wiring layer 35, and the sixth wiring layer 36 The wiring layer 32 forms the second semi-finished board; the second wiring layer 32 covers the upper end face of the base copper block 22 and the upper end face of the heat dissipation copper block 4; the adhesive protective layer 5 covers the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4; the second semi-finished board and the fifth wiring layer 35 form the third semi-finished board; the adhesive protective layer 5 separates the base copper block 22 and the fifth wiring layer 35, and the adhesive protective layer 5 separates the heat dissipation copper block 4 and the fifth wiring layer 35; the third semi-finished board, the first wiring layer 31 and the sixth wiring layer 36 form the fourth semi-finished board; the portion of the fourth semi-finished board outside the adhesive protective layer 5 can be cut off so that the fifth wiring layer 35 and the core board 1 can be separated by mechanical peeling.Thus, a core board 1 is provided, on which a third wiring layer 33 and a fourth wiring layer 34 are fabricated; the core board 1, the third wiring layer 33, and the fourth wiring layer 34 together form a first semi-finished board; a first through hole 11 and a second through hole 12 are processed on the first semi-finished board; the power module 2 can be installed into the first through hole 11, and the heat sink copper block 4 can be installed into the second through hole 12, making the installation of the power module 2 and the heat sink copper block 4 very convenient; the power module 2 includes a chip 21 and a base copper block 22, the chip 21 is disposed on the base copper block 22, and both the base copper block 22 and the heat sink copper block 4 can dissipate heat; the second wiring layer 32 is located on the core board 1. On the other side, the adhesive protective layer 5 is located on the other side of the core board 1; the first semi-finished board and the second wiring layer 32 together form the second semi-finished board; the second wiring layer 32 covers the upper end face of the base copper block 22, and the second wiring layer 32 also covers the upper end face of the heat dissipation copper block 4; the adhesive protective layer 5 covers the lower end face of the base copper block 22, and the adhesive protective layer 5 also covers the lower end face of the heat dissipation copper block 4; after the adhesive protective layer 5 covers the base copper block 22 and the heat dissipation copper block 4, the fifth wiring layer 35 is then prepared; the second semi-finished board and the fifth wiring layer 35 together form the third semi-finished board; the adhesive protective layer 5 separates the base copper block 22 and the fifth wiring layer 35. Layer 35 prevents the fifth wiring layer 35 from adhering to the base copper block 22; the adhesive protective layer 5 separates the heat dissipation copper block 4 and the fifth wiring layer 35, preventing the fifth wiring layer 35 from adhering to the heat dissipation copper block 4; the first wiring layer 31 and the sixth wiring layer 36 are prepared; the third semi-finished board, the first wiring layer 31 and the sixth wiring layer 36 together form the fourth semi-finished board; since the first wiring layer 31 and the sixth wiring layer 36 are prepared on both sides of the core board 1 respectively, the stress of thermal expansion and contraction on both sides of the core board 1 is more balanced, reducing the bending of the core board 1 to one side; the fourth semi-finished board is cut along the edge of the adhesive protective layer 5, since the adhesive protective layer 5 separates the first wiring layer 31 and the sixth wiring layer 36; The base copper block 22 and the fifth wiring layer 35 are separated by an adhesive protective layer 5, which separates the heat dissipation copper block 4 and the fifth wiring layer 35. This allows the fifth wiring layer 35 to be separated from the core board 1 after the fourth semi-finished product is cut (in one embodiment, the adhesive protective layer 5 can be peeled off from the core board 1 along with the fifth wiring layer 35 under external force). After the adhesive protective layer 5 is peeled off from the core board 1, the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 can be exposed, allowing the external heat sink or external heat dissipation layer to directly contact the lower end face of the base copper block 22 and the lower end face of the heat dissipation copper block 4 and dissipate heat to the outside.

[0098] In one embodiment, the process flow of an automotive-grade chip manufacturing method is as follows:

[0099] [Processing Step 1] Please refer to Figure 1 :

[0100] Prepare a double-sided copper-clad board (i.e., the first semi-finished board) with a copper thickness of 1.29 mm. The double-sided copper-clad board has a three-layer structure, including an upper third metal layer (third metal layer: third wiring layer 33), a lower fourth metal layer (fourth metal layer: fourth wiring layer 34), and a middle third dielectric layer (third dielectric layer: core board 1).

[0101] The double-sided copper-clad laminate has a φ3.2mm tool hole drilled in it. The tool hole is used for pin positioning in subsequent step 7.

[0102] [Processing Step 2] Please refer to Figure 2 :

[0103] In step 1, the inner layer pattern transfer is performed on the double-sided copper-clad laminate. Circuit patterns are etched on the third and fourth metal layers to form the third wiring layer 33 and the fourth wiring layer 34. The fourth wiring layer 34 is entirely etched into a copper-free area within the effective substrate unit area and within 200μm of the edge of the effective substrate unit (i.e., the copper-free area includes: the area where the first via 11 needs to be opened, the periphery of the first via 11, the area where the second via 12 needs to be opened, and the periphery of the second via 12).

[0104] [Processing Step 3] Please refer to [Step 3] Figure 3 :

[0105] The three-layer semi-finished board (i.e. the first semi-finished board) formed in step 2 is machined with through slots using an automatic optical alignment milling machine. Each embedded power module 2 and heat dissipation copper block 4 has a separate corresponding through slot (i.e. the first through hole 11 and the second through hole 12).

[0106] [Processing Step 4] Please refer to Figure 4 :

[0107] The three-layer semi-finished board formed in step 3 has its third wiring layer 33 and fourth wiring layer 34 treated with browning. High-temperature tape 61 is applied to the fourth wiring layer 34 with the adhesive side of the tape 61 facing the through groove. Therefore, the through groove of the board is transformed into a blind groove (blind groove: that is, a blind hole formed by sealing one end of the first through hole 11 with tape 61, and / or a blind hole formed by sealing one end of the second through hole 12 with tape 61).

[0108] In one embodiment, "browning treatment" in this application refers to a chemical roughening process performed on the copper surface during PCB manufacturing, also known as "browning" or "browning oxidation." Its main purpose is to significantly improve the mechanical interlocking force and chemical bonding strength between the subsequent adhesive film, semi-cured resin sheet, or dry film and the copper surface by generating a micron-sized brown oxide film or roughening layer on the copper surface, thereby ensuring that delamination or separation does not occur between layers during multilayer board lamination. In one embodiment, for example, in a specific oxidizing solution (common formulations include sodium hypochlorite / sulfite systems, sodium nitrite + hydrochloric acid systems, or iminophosphates, etc.), a trace oxidation reaction occurs on the copper surface, generating a layer of brownish copper oxide (Cu2O / CuO) and / or copper hydroxy compounds. Simultaneously, a small amount of copper selectively dissolves, forming a rough honeycomb or needle-like microstructure.

[0109] Please see Figure 5 :

[0110] The power module 2 and the heat sink copper block 4 are browned on the surface and then manually placed into the blind slot in step 3. The power module 2 and the heat sink copper block 4 are fixed with tape 61. Each smallest unit of the substrate contains 12 power modules 2 and 6 heat sink copper blocks 4 (in one embodiment, each power module 2 corresponds to a first through hole 11 and each heat sink copper block 4 corresponds to a second through hole 12).

[0111] [Processing Step 5] Please refer to [Step 5] Figure 6 :

[0112] The first lamination process (i.e., forming the second wiring layer 32): Two lamination sheets (prepreg sheets in this case) are placed on the third wiring layer 33 of the three-layer semi-finished board formed in step 3, followed by a copper foil, and then high-temperature lamination is performed to form a five-layer semi-finished board. During the high-temperature lamination process, the resin in the lamination sheets melts due to heat, flows in and fills the gap between the power module 2 and the blind slot wall, and then the resin cures, firmly embedding the power module 2 inside the core board 1.

[0113] [Processing Step 6] Please refer to [Step 6] Figure 7 :

[0114] Remove the high-temperature tape 61 from the fourth wiring layer 34 of the five-layer semi-finished board formed in step 5.

[0115] [Processing Step 7] Please refer to [Step 7] Figure 8 :

[0116] The five-layer semi-finished board formed in step 6 has a polyimide protective film (i.e., protective film 51) attached to the back. The protective film is fixed to the board surface with positioning pins and completely covers the effective substrate unit area.

[0117] [Processing Step 8] Please refer to [Step 8] Figure 9 :

[0118] The five-layer semi-finished board formed in step 7 is further covered with a whole sheet of adhesive film 52 (in one embodiment, the adhesive film 52 is a high-temperature adhesive tape). Then, UV laser cutting is performed on the adhesive film 52. Then, the excess high-temperature protective adhesive film 52 on the edge of the board manufacturing process is further peeled off. During the peeling of the adhesive film 52, the positioning pins are also taken away. The remaining high-temperature protective adhesive film 52 can cover the polyimide protective film area.

[0119] [Processing Step 9] Please refer to [Step 9] Figure 10 :

[0120] The second lamination process (i.e., forming the fifth wiring layer 35): two lamination sheets (pre-cured sheets in this case) are placed on the back of the five-layer structure semi-finished board formed in step 8, and then a copper foil is placed on top before high-temperature lamination to form a seven-layer structure semi-finished board.

[0121] [Processing Step 10] Please refer to [link / reference] Figure 11 :

[0122] The seven-layer semi-finished board formed in step 9 undergoes single-sided pattern transfer. The copper foil directly above the φ230μm area between the second wiring layer 32 and the chip 21, and between the second wiring layer 32 and the heat sink copper block 4, is etched away to form a φ230μm circular etched window. Then, a laser drilling machine is used to laser ablate the window to form a φ230μm first blind via 62.

[0123] [Step 11] Please refer to Figure 12 :

[0124] The seven-layer semi-finished board formed in step 10 is electroplated to fill the first blind hole 62 of φ230μm, forming a copper pillar of φ230μm. At the same time, the thickness of the second metal layer (i.e., L2 copper foil 32a) and the fifth metal layer (i.e., L5 copper foil 35a) is increased.

[0125] [Step 12] Please refer to Figure 13 :

[0126] The seven-layer semi-finished board formed in step 11 is subjected to pattern transfer, and circuits are etched on the second metal layer and the fifth metal layer to form the second wiring layer 32 and the fifth wiring layer 35.

[0127] [Step 13 of the process]:

[0128] The seven-layer semi-finished board formed in step 12 is browned through the browning line, browning the second wiring layer 32 and the fifth wiring layer 35.

[0129] [Processing Step 14] Please refer to [link / reference] Figure 14 :

[0130] The third lamination process (i.e., forming the first wiring layer 31 and the sixth wiring layer 36). Two lamination sheets (prepreg sheets in this case) are placed on the second wiring layer 32 and the fifth wiring layer 35 of the seven-layer semi-finished board formed in step 13, and then a copper foil is placed on each of them before high-temperature lamination to form an eleven-layer semi-finished board.

[0131] [Processing Step 15] Please refer to [Step 15] Figure 15 :

[0132] The eleven-layer semi-finished board formed in step 14 undergoes single-sided pattern transfer. The copper foil directly above the φ230μm copper pillar between the first wiring layer 31 and the second wiring layer 32 is etched away to form a φ230μm circular etched window. Then, a laser drilling machine is used to laser ablate the window to form a φ230μm second blind via 63.

[0133] [Processing Step 16] Please refer to [link / reference]. Figure 16 :

[0134] The eleven-layer semi-finished board formed in step 15 is electroplated to fill the second blind hole 63 of φ230μm, forming a copper pillar of φ230μm. At the same time, the thickness of the first metal layer (i.e., L1 copper foil 31a) and the sixth metal layer (i.e., L6 copper foil 36a) is increased.

[0135] [Processing Step 17] Please refer to [Step 17] Figure 17 :

[0136] The eleven-layer semi-finished board formed in step 16 is subjected to pattern transfer, and circuits are etched on the first metal layer and the sixth metal layer to form the first wiring layer 31 and the sixth wiring layer 36.

[0137] [Processing Step 18] Please refer to [Step 18] Figure 18 :

[0138] The eleven-layer semi-finished board formed in step 17 is sequentially subjected to solder mask silkscreen printing, solder mask exposure, solder mask development, and post-curing to form a solder mask layer 64 on the first wiring layer 31.

[0139] [Processing Step 19]:

[0140] The eleven-layer semi-finished plate formed in step 17 undergoes surface treatment, which in this case is immersion nickel-gold surface treatment.

[0141] [Processing Step 20] Please refer to [Step 20] Figure 19 :

[0142] The eleven-layer semi-finished board formed in step 18 is cut into shape using a milling machine to form a substrate with the smallest unit size. (Cut along the edge of the adhesive protective layer 5) After cutting, because the polyimide protective film has no bonding force with the copper block and the surrounding substrate, the polyimide protective film (i.e., protective film 51), adhesive film 52 (in one embodiment, adhesive film 52 is a high-temperature protective adhesive tape), fourth dielectric layer (i.e., L4 dielectric layer 34b), fifth wiring layer 35, fifth dielectric layer (i.e., L5 dielectric layer 35b), and sixth dielectric layer (i.e., L6 dielectric layer 36b) are naturally separated from the finished board. The fourth wiring layer 34, since it was originally only located on the edge of the board manufacturing process, does not appear in the finished substrate structure.

[0143] In one embodiment, the protective film 51 is a polyimide protective film.

[0144] In one embodiment, the protective film 51 has a thickness of 30 μm.

[0145] In one embodiment, before performing step 7, the protective film 51 needs to be UV laser cut. The specific cutting rule is that the cut protective film 51 is 1.5mm larger than the effective substrate unit on one side. The purpose of this design is to ensure that the protective film 51 can completely cover the effective substrate unit area and prevent the high-temperature protective adhesive tape from sticking to the effective substrate unit area (the adhesive layer of the high-temperature protective adhesive tape will be modified after the subsequent two high-temperature pressing processes. After the high-temperature adhesive tape is removed from the effective substrate unit after milling in step 20, there will be adhesive residue in the effective substrate unit area).

[0146] In one embodiment, regarding the pin:

[0147] The positioning pins are used to temporarily fix the polyimide protective film to the five-layer semi-finished board to prevent the polyimide protective film from shifting during the subsequent application of adhesive tape. The four φ3.2mm pin positioning holes on the polyimide protective film are located in the four corner areas. The four φ3.2mm pin positioning holes on the five-layer semi-finished board at the corresponding positions are processed in step 1. The design features of the positioning pins are as follows: (1) The pin diameter is 3.15mm and the height is 1.2mm (to ensure that it is slightly less than the thickness of the five-layer semi-finished board); (2) The pin has a cap with a length × width of 10 × 10mm and a thickness of 0.3mm; (3) The pin is made of stainless steel.

[0148] In one embodiment, regarding the adhesive film 52: the adhesive film 52 is a high-temperature protective adhesive tape. Wherein,

[0149] The total thickness of the adhesive film 52 is 50μm, consisting of a 35μm polyimide base film layer and a 15μm acrylic adhesive layer. The purpose of applying the adhesive film 52 is to fix the polyimide protective film to the back of the five-layer structure semi-finished board without the need for pins, while preventing the adhesive from the laminating sheet from overflowing between the polyimide protective film and the five-layer structure semi-finished board during the second lamination process in step 9.

[0150] In one embodiment, as in step 8, after the entire adhesive film 52 is applied to the back of the five-layer semi-finished board, UV laser cutting is further performed on the adhesive tape. The cutting rule is that the size of the adhesive tape is 3.5mm larger than the effective substrate unit on one side (that is, 2.0mm larger than the polyimide protective film on one side). At the same time, the polyimide protective film covered by the positioning pin is cut and separated from the main body of the protective film. In this way, when the excess adhesive film 52 on the edge of the board manufacturing process is further peeled off, the positioning pin is taken away with it and will not be left on the semi-finished board.

[0151] The above are merely preferred embodiments of the present invention. It should be noted that those skilled in the art can make several improvements and substitutions without departing from the technical principles of the present invention, and these improvements and substitutions should also be considered within the scope of protection of the present invention.

Claims

1. A method of automotive-grade chip manufacturing, the method comprising: Comprising: ​ S1: providing a core board, a power module and a heat dissipation copper block; preparing a third wiring layer and a fourth wiring layer on the core board to form a first semi-finished product board; processing a first through hole and a second through hole on the first semi-finished product board; mounting the power module into the first through hole and mounting the heat dissipation copper block into the second through hole; the power module comprises: a chip and a base copper block, and the chip is arranged on the base copper block; S2: preparing a second wiring layer to form a second semi-finished product board; the second wiring layer covers the upper end surface of the base copper block and the upper end surface of the heat dissipation copper block; S3: providing a pasting protective layer; the pasting protective layer covers the lower end surface of the base copper block and the lower end surface of the heat dissipation copper block; S4: preparing a fifth wiring layer to form a third semi-finished product board; the pasting protective layer separates the base copper block and the fifth wiring layer, and the pasting protective layer separates the heat dissipation copper block and the fifth wiring layer; S5: preparing a first wiring layer and a sixth wiring layer to form a fourth semi-finished product board; cutting off the part of the fourth semi-finished product board outside the pasting protective layer, so that the fifth wiring layer and the core board can be separated by mechanical peeling.

2. The automotive-grade chip manufacturing method of claim 1, wherein, The S3 comprises: S31: providing the pasting protective layer; the pasting protective layer comprises: a protective film and a pasting film; the protective film has oppositely arranged front and back surfaces; the front surface has a protective area; the pasting film has a pasting covering area and a pasting fixing area; S32: covering the lower end surface of the base copper block and the lower end surface of the heat dissipation copper block with the protective area, and fixing the protective film on the core board; S33: pasting and covering the pasting covering area on the back surface; the pasting fixing area is located outside the edge of the protective film, and the pasting fixing area is pasted and fixed on the core board.

3. The automotive-grade chip manufacturing method of claim 2, wherein, In the S32, "fixing the protective film on the core board" comprises: providing a pin; the protective film has a protrusion; the pin fixes the protrusion on the core board.

4. The automotive-grade chip manufacturing method of claim 3, wherein, Further comprising: S34: cutting the protective film by ultraviolet laser and cutting off the protrusion.

5. The automotive-grade chip manufacturing method of claim 2, wherein, The width of the pasting fixing area is greater than or equal to 2mm.

6. The car-grade chip manufacturing method of claim 2, wherein, The protective film outside the protective area has a first hollow hole; The pasting film has a second hollow hole; the second hollow hole communicates with the first hollow hole, and the edge of the second hollow hole is located inside the first hollow hole.

7. The car-grade chip manufacturing method of claim 2, wherein, The protective film is an integral piece made of polyimide.

8. The car-grade chip manufacturing method of claim 2, wherein, The pasting film comprises: a first film and a second film pasted with each other; the first film is a polyimide film, and the second film is an acrylic adhesive layer.

9. The car-grade chip manufacturing method of claim 2, wherein, In the S32, "covering the lower end surface of the base copper block and the lower end surface of the heat dissipation copper block with the protective area" comprises: S321: etching the fourth wiring layer to make the area within 200μm from the edge of the first through hole and the second through hole into a copper-free area; S322: pasting the protective area on the core board in the copper-free area, and covering the lower end surface of the base copper block and the lower end surface of the heat dissipation copper block with the protective area.

10. A chip package structure, characterized by Comprising: the core plate, the power module, the heat dissipation copper block, the adhesive protective layer, the first wiring layer, the second wiring layer, the third wiring layer, the fourth wiring layer, the fifth wiring layer and the sixth wiring layer; the core plate, the third wiring layer and the fourth wiring layer form a first semi-finished product plate; a first through hole and a second through hole are processed on the first semi-finished product plate; the power module is installed in the first through hole, and the heat dissipation copper block is installed in the second through hole; the power module comprises a chip and a base copper block, and the chip is arranged on the base copper block; the first semi-finished product plate and the second wiring layer form a second semi-finished product plate; the second wiring layer covers the upper end surface of the base copper block and the upper end surface of the heat dissipation copper block; the adhesive protective layer covers the lower end surface of the base copper block and the lower end surface of the heat dissipation copper block; the second semi-finished product plate and the fifth wiring layer form a third semi-finished product plate; the adhesive protective layer separates the base copper block and the fifth wiring layer, and the adhesive protective layer separates the heat dissipation copper block and the fifth wiring layer; the third semi-finished product plate, the first wiring layer and the sixth wiring layer form a fourth semi-finished product plate; the part of the fourth semi-finished product plate outside the adhesive protective layer can be cut off to realize the separation between the fifth wiring layer and the core plate by mechanical peeling.

Images