Response detection method and system of MEMS (Micro Electro Mechanical System) chip at wafer order and electronic equipment

Abstract

The invention provides a response detection method and system for an MEMS chip at a wafer order and electronic equipment, and relates to the technical field of manufacturing and testing of micro electro mechanical systems, and the method comprises the steps: obtaining a to-be-detected wafer provided with an MEMS chip, and fixing the to-be-detected wafer on a wafer table; the MEMS chip is electrically connected with the probe card; acquiring a first output signal value of the MEMS chip under a first detection temperature condition through the probe card; collecting a second output signal value of the MEMS chip under a second detection temperature condition through the probe card; and comparing the first output signal and the second output signal with a preset signal value, and determining the response condition of the MEMS chip based on a comparison result. According to the invention, rapid and batch response performance screening is carried out on the chip before packaging, so that the production cost is reduced, and the test efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of microelectromechanical systems (MEMS) manufacturing and testing technology, and in particular to a method, system, and electronic device for detecting the response of MEMS chips at the wafer level. Background Technology

[0002] Thermopile chips, as core infrared sensor devices that convert temperature into voltage signals, are widely used in non-contact temperature measurement, human presence detection, and home appliance control. Currently, the response performance testing of MEMS thermopile chips is usually performed after the chip is packaged. A common testing method is to package the chip inside a standard housing, use an external temperature source (such as a blackbody furnace or temperature control platform) to simulate the target temperature change, and then read the chip's output voltage and calculate its responsivity.

[0003] Although the above method can obtain a relatively accurate response curve, it has the following significant drawbacks: 1. Delayed testing phase: Testing must be performed after packaging is complete. Once abnormal chip response is detected, the chip cannot be reworked and reused, resulting in waste of raw materials and packaging processes.

[0004] 2. Low testing efficiency: Each test can only be performed on a single packaged chip, which cannot achieve large-scale parallel testing at the wafer level and is difficult to meet the needs of high-efficiency production lines.

[0005] 3. Complex testing equipment: It relies on large equipment such as high-precision blackbody furnaces or infrared sources. The testing equipment is bulky and expensive, and it is not easy to integrate with wafer probe stations, which limits its direct application on the production line.

[0006] 4. High production costs: Since the testing stage is located at the end of the manufacturing process, the packaging cost has already been incurred when defective products are screened out, resulting in a decrease in overall yield and an increase in production costs.

[0007] Therefore, a method, system, and electronic device for detecting the response of MEMS chips at the wafer level are proposed. Summary of the Invention

[0008] This specification provides a method, system, and electronic device for detecting the response of MEMS chips at the wafer level, so as to enable rapid and batch screening of chip response performance before packaging, thereby reducing production costs and improving testing efficiency.

[0009] This specification provides a method for detecting the response of a MEMS chip at the wafer level, including: Obtain the wafer to be tested, which is equipped with a MEMS chip, and fix it on the wafer stage; The MEMS chip is electrically connected to the probe card; The probe card is used to collect the first output signal value of the MEMS chip under the first detection temperature condition. The probe card is used to collect the second output signal value of the MEMS chip under the second detection temperature condition; The first output signal and the second output signal are compared with preset signal values ​​respectively, and the response of the MEMS chip is determined based on the comparison results.

[0010] Optionally, the first detection temperature condition includes: placing the MEMS chip in a first ambient temperature value through a constant temperature chamber, and controlling the MEMS chip to maintain a second ambient temperature value through a heating plate connected to the probe card; The second detection temperature conditions include: placing the MEMS chip in a third ambient temperature value through a constant temperature chamber, and controlling the MEMS chip to maintain a fourth ambient temperature value through a heating plate connected to the probe card.

[0011] Optionally, the first ambient temperature is 0℃, the second ambient temperature is 0℃±ΔT, where ΔT is a dynamically adjustable temperature difference; the third ambient temperature is 50℃, and the fourth ambient temperature is 50℃±ΔT.

[0012] Optional, also includes: The temperature distribution information set of the wafer to be tested is obtained by setting a multi-point temperature monitoring unit within a preset space range of the wafer stage or the probe card; Temperature compensation is performed on the first output signal value and the second output signal value based on the temperature distribution information set. Specifically: V1 ’ =V1 K t *[T(x,y) T ref ] Among them, V1 ’ V1 is the first output signal value after compensation, and K is the first output signal value. t Let T(x,y) be the temperature difference response drift coefficient, and T(x,y) be the temperature distribution information set. ref For reference temperature; V2 ’ =V2 K t *[T(x,y) T ref ] Among them, V2 ’ V2 is the first output signal value after compensation, and K is the first output signal value. t Let T(x,y) be the temperature difference response drift coefficient, and T(x,y) be the temperature distribution information set.ref This is a reference temperature.

[0013] Optionally, the step of comparing the first output signal and the second output signal with preset signal values ​​respectively, and determining the response of the MEMS chip based on the comparison results, includes: When 0 < V1 ≤ V th1 And 0 < V2 ≤ V th2 The MEMS chip was determined to be responding normally. Otherwise, the MEMS chip is deemed to be responding abnormally; Where V1 is the first output signal value, V2 is the second output signal value, and V th1 V is the preset signal value corresponding to the first ambient temperature value. th2 This is the preset signal value corresponding to the third ambient temperature value.

[0014] Optional, also includes: Obtain the wafer to be tested, which is equipped with multiple MEMS chips, and fix it on the wafer stage; By simultaneously performing batch response detection on multiple MEMS chips using a multi-channel probe card and a heating plate array, the response status of multiple MEMS chips can be determined.

[0015] This specification provides a response detection system for MEMS chips at the wafer level, including: A wafer stage is used to hold a wafer to be inspected. A probe card is used to electrically connect to the MEMS chip on the wafer to be tested in order to collect electrical signals; A constant temperature chamber is used to provide a controllable constant temperature environment for the MEMS chip; A heating plate is positioned directly above the MEMS chip for heating the MEMS chip.

[0016] Optionally, the heating plate is a micro-film heating element, the area of ​​the heating plate is larger than the sensitive area of ​​the MEMS chip, and the surface of the heating plate is provided with a black coating to improve the infrared absorption rate.

[0017] This specification also provides an electronic device, wherein the electronic device includes: A processor; and a memory storing computer-executable instructions, which, when executed, cause the processor to perform any of the methods described above.

[0018] This specification also provides a computer-readable storage medium that stores one or more programs that, when executed by a processor, implement any of the methods described above.

[0019] This invention utilizes two-point testing under dual isothermal environments, combined with zero-point benchmark verification, to effectively identify chips with abnormal sensitivity and zero-point drift, improving the reliability and consistency of testing. Response testing can be completed at the wafer stage, avoiding subsequent packaging. Combining a multi-channel probe card and heating plate array enables wafer-level parallel batch testing, resulting in an order-of-magnitude improvement in testing efficiency. By promptly screening out defective chips before packaging, unnecessary packaging and material cost waste is avoided, effectively improving overall yield and reducing overall production costs. The use of a PID precision temperature-controlled isothermal chamber, a blackened heating plate, and a gold-plated probe card ensures the uniformity and stability of the temperature field and electrical signal acquisition during testing. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram illustrating the principle of a MEMS chip response detection method at the wafer level, provided in the embodiments of this specification. Figure 2 A schematic diagram of the structure of a MEMS chip response detection system at the wafer level, provided as an embodiment of this specification; Figure 3 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this specification; Figure 4 This is a schematic diagram of a computer-readable medium provided for embodiments of this specification.

[0022] The attached diagram shows: 110, wafer stage; 120, probe card; 130, heating element; 140, wafer to be tested. Detailed Implementation

[0023] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0024] The following is in conjunction with the appendix Figure 1-4Exemplary embodiments of the invention will be described more fully here. However, exemplary embodiments can be implemented in many forms and should not be construed as limiting the invention to the embodiments set forth herein. Rather, these exemplary embodiments are provided to make the invention more comprehensive and complete, and to facilitate a full communication of the inventive concept to those skilled in the art. The same reference numerals in the figures denote the same or similar elements, components, or parts, and therefore repeated descriptions of them are omitted.

[0025] Subject to the technical concept of this invention, the features, structures, characteristics or other details described in a particular embodiment may be combined in one or more other embodiments in a suitable manner.

[0026] In the description of specific embodiments, the features, structures, characteristics, or other details described in this invention are intended to enable those skilled in the art to fully understand the embodiments. However, it is not excluded that those skilled in the art can practice the technical solutions of this invention without one or more of the specific features, structures, characteristics, or other details.

[0027] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0028] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0029] The terms “and / or” or “and / or” include all combinations of any one or more of the listed items.

[0030] Figure 1 This is a schematic diagram illustrating the principle of a response detection method for a MEMS chip at the wafer level, provided in an embodiment of this specification. The method may include: S110: Obtain the wafer to be tested equipped with a MEMS chip and fix it on the wafer stage; In the specific embodiments described in this specification, after the wafer manufacturing process is completed, the entire wafer containing multiple unpackaged MEMS chips is transferred to the wafer stage of the wafer probe station and reliably fixed by vacuum adsorption or other mechanical means.

[0031] S120: The MEMS chip is electrically connected to the probe card; In the specific implementation of this specification, a precision positioning system drives the probe card to descend, causing the probe tip on it to form a stable, low-resistance electrical contact with the input / output pins of the target MEMS chip, thereby establishing a signal path.

[0032] S130: Acquire the first output signal value of the MEMS chip under the first detection temperature condition using the probe card; S140: Acquire the second output signal value of the MEMS chip under the second detection temperature condition using the probe card; Optionally, the first detection temperature condition includes: placing the MEMS chip in a first ambient temperature value through a constant temperature chamber, and controlling the MEMS chip to maintain a second ambient temperature value through a heating plate connected to the probe card; The second detection temperature conditions include: placing the MEMS chip in a third ambient temperature value through a constant temperature chamber, and controlling the MEMS chip to maintain a fourth ambient temperature value through a heating plate connected to the probe card.

[0033] Optionally, the first ambient temperature is 0℃, the second ambient temperature is 0℃±ΔT, where ΔT is a dynamically adjustable temperature difference; the third ambient temperature is 50℃, and the fourth ambient temperature is 50℃±ΔT.

[0034] In the specific implementation of this specification, the constant temperature chamber is activated, and its internal ambient temperature is precisely controlled and stabilized at a first ambient temperature value, such as 0°C. Simultaneously, a miniature heating plate located directly above the target MEMS chip is activated, and its surface temperature is precisely controlled and stabilized at a second ambient temperature value, such as (0°C + ΔT), using a temperature controller. Here, ΔT is a dynamically adjustable temperature difference, for example, 10°C, the specific value of which can be adjusted according to the sensitivity of the chip under test and the testing requirements. Once both the ambient temperature of the constant temperature chamber and the temperature of the heating plate reach the set values ​​and stabilize, the output voltage of the MEMS chip at this time is read and recorded using the connected probe card and data acquisition system; this is the first output signal value V1. In this state, the chip's sensitive area senses the temperature difference ΔT between the heating plate and the environment, and theoretically should output a voltage signal proportional to ΔT.

[0035] Adjust the settings of the incubator to precisely control and stabilize its internal ambient temperature at a third ambient temperature value, such as 50℃. Simultaneously, control the temperature of the micro-heating plate to stabilize it at a fourth ambient temperature value, such as (50℃ + ΔT). During this process, the value of ΔT should ideally remain consistent with the first step to ensure consistent test conditions. After the temperature stabilizes again, use a probe card and data acquisition system to read and record the output voltage of the MEMS chip at this point; this is the second output signal value V2.

[0036] S150: Compare the first output signal and the second output signal with a preset signal value respectively, and determine the response of the MEMS chip based on the comparison result.

[0037] Optionally, S150 includes: When 0 < V1 ≤ V th1 and 0 < V2 ≤ V th2 , it is determined that the MEMS chip responds normally; Otherwise, it is determined that the MEMS chip responds abnormally; where V1 is the value of the first output signal, V2 is the value of the second output signal, V<00者00019>is the preset signal value corresponding to the first ambient temperature value, V th2 is the preset signal value corresponding to the third ambient temperature value.

[0038] In the specific embodiments of this specification, when the conditions 0 < V1 ≤ Vth1 and 0 < V2 ≤ Vth2 are satisfied simultaneously, it is determined that the MEMS chip responds normally. Among them, Vth1 is the preset maximum response threshold corresponding to the first ambient temperature (0 °C), and Vth2 is the preset maximum response threshold corresponding to the third ambient temperature (50 °C). These thresholds are preset based on the design sensitivity of the chip, the ΔT value, and a large amount of test data of qualified chips. If V1 or V2 does not meet the above conditions (for example, V1 or V2 is zero, negative, or exceeds the maximum threshold), it is determined that the MEMS chip responds abnormally. For example, an output of zero may mean that the chip is open; a negative output may mean that the polarity of the thermopile is incorrect or the connection is reversed; an output far exceeding the threshold may mean that the sensitivity is abnormally high or there is a short circuit. Through the above "double temperature point" test, the present invention not only examines the basic response ability of the chip at different ambient temperatures, but also indirectly verifies its zero point characteristics (when the ambient temperature is the same as the temperature of the heating plate, the theoretical output should be zero), so as to effectively identify various failure modes such as abnormal sensitivity and zero point drift.

[0039] Optionally, it further includes: Obtain the temperature distribution information set of the wafer to be detected through a multi-point temperature monitoring unit set within a preset space range of the wafer stage or the probe card; Perform temperature compensation on the first output signal value and the second output signal value based on the temperature distribution information set. Specifically: V1 ’ = V1 K t * [T(x, y) T ref where V1 ’ ​V1 is the first output signal value after compensation, and K is the first output signal value. t Let T(x,y) be the temperature difference response drift coefficient, and T(x,y) be the temperature distribution information set. ref For reference temperature; V2 ’ =V2 K t *[T(x,y) T ref ] Among them, V2 ’ V2 is the first output signal value after compensation, and K is the first output signal value. t Let T(x,y) be the temperature difference response drift coefficient, and T(x,y) be the temperature distribution information set. ref This is a reference temperature.

[0040] In the specific embodiments described in this specification, multiple high-precision temperature sensors (such as platinum resistance thermometers or thermocouples) are deployed within the wafer stage or within a preset space of the probe card (e.g., the four corners of the probe card frame) to form a multi-point temperature monitoring unit. During testing, these sensors perform distributed synchronous acquisition of the real-time temperature of the wafer during the heating process, thereby obtaining a data set reflecting the instantaneous temperature field state of the wafer surface, i.e., a temperature distribution information set. After receiving data from multiple temperature sensors, the data acquisition system constructs a continuous two-dimensional temperature distribution model T(x,y) of the entire wafer surface based on these discrete measurement points using spatial interpolation algorithms (such as bilinear interpolation or Kriging interpolation). This model enables the system to calculate the estimated local ambient temperature T(x,y) of any chip based on its coordinate position (x,y) on the wafer. To establish a fair comparison benchmark for all chips, the system sets a unified reference temperature Tref. This Tref can be the temperature of the wafer center point or the average temperature of all monitoring points. For each chip under test on the wafer, after obtaining its original first output signal value V1 and second output signal value V2, it is not used directly for judgment, but temperature compensation correction is performed first.

[0041] Optional, also includes: Obtain the wafer to be tested, which is equipped with multiple MEMS chips, and fix it on the wafer stage; By simultaneously performing batch response detection on multiple MEMS chips using a multi-channel probe card and a heating plate array, the response status of multiple MEMS chips can be determined.

[0042] In the specific embodiments described in this specification, a wafer to be tested, containing multiple MEMS chips, is acquired. A multi-channel probe card is used, with probes arranged in a matrix, capable of simultaneously establishing electrical connections with the pins of dozens or even hundreds of MEMS chips on the wafer. A heating plate array, consisting of multiple independent micro-heating plates, is used, each aligned vertically with one chip under test, allowing for simultaneous application of the same temperature stimulus to all target chips. The data acquisition system also possesses multi-channel synchronous acquisition capabilities. The system can process the V1 and V2 signals acquired from all channels in parallel and automatically and quickly output the "pass" or "abnormal" judgment result for each chip, while simultaneously marking it on the wafer map. Through the collaborative work of the multi-channel probe card and the heating plate array, wafer-level parallel batch testing is achieved, improving efficiency by several orders of magnitude compared to traditional single-chip post-packaging testing.

[0043] Figure 2 This specification provides a schematic diagram of the structure of a MEMS chip response detection system at the wafer level, which may include: Wafer stage 110 is used to fix the wafer 140 to be inspected; The probe card 120 is used to electrically connect to the MEMS chip on the wafer 140 to be tested in order to acquire electrical signals. A constant temperature chamber is used to provide a controllable constant temperature environment for the MEMS chip; A heating plate 130 is positioned directly above the MEMS chip for heating the MEMS chip.

[0044] Optionally, the heating plate 130 is a micro-film heating element, the area of ​​the heating plate 130 is larger than the sensitive area of ​​the MEMS chip, and the surface of the heating plate 130 is provided with a black coating to improve the infrared absorption rate.

[0045] Optionally, the probe card 120 includes a gold-plated probe tip.

[0046] In the specific embodiments described in this specification, the wafer stage 110 is used to fix the wafer 140 to be tested by means of vacuum adsorption or other methods. The probe card 120 preferably has gold-plated probe tips to reduce contact resistance and improve the stability and accuracy of signal acquisition. For batch testing, a multi-channel matrix arrangement structure is adopted. The temperature control chamber is used to provide a high-precision, high-stability controllable temperature environment for the MEMS chip. Preferably, the temperature control chamber uses a PID (proportional-integral-derivative) precision temperature control algorithm to control internal temperature fluctuations within ±0.1℃. Furthermore, its inner wall preferably uses a low-reflection coating to minimize the interference of internal wall heat radiation on MEMS chip measurements. The heating plate 130 is positioned directly above the MEMS chip. Preferably, the heating plate 130 is a micro-thin-film heating element with an area slightly larger than the sensitive area of ​​the MEMS chip to ensure uniform heating of the sensitive area. Its surface is coated with a blackening coating (such as high-emissivity black paint or a special film) to improve the absorption rate of infrared radiation, thereby more accurately simulating real thermal radiation targets and reducing measurement errors caused by reflection.

[0047] Optionally, the probe card 120 is a temperature drift suppression probe card, comprising: The homogenized conductive path uses a unified coating system for its signal acquisition channel; An isothermal stable structure with a thermally conductive coating on the probe card 120 substrate in the non-heated area; Integrated temperature monitoring points are deployed at key locations on the probe card 120 for real-time temperature monitoring.

[0048] In the specific embodiments described in this specification, to address the problem of parasitic thermoelectric potential arising from dissimilar metal connections, a homogenized plating treatment is applied to the entire signal acquisition channel from the probe tip 120 to the signal output interface. Specifically, a uniform, highly conductive plating system (e.g., a high-purity gold layer is applied to all surfaces along the current flow path, including the probe tip 120, internal wires, and contact pads) is used. By minimizing the connection points between different metal materials, the conditions for the Seebeck effect are fundamentally weakened, significantly reducing the inherent thermoelectric potential shift caused by the thermal gradient of the probe card 120 itself.

[0049] To reduce temperature differences between different areas of the probe card 120 (especially between different signal channels), a high thermal conductivity coating or thin film, such as an aluminum nitride ceramic coating or a high thermal conductivity graphene composite material, is coated or attached over a large area onto the probe card 120 substrate (e.g., a ceramic or composite substrate) in the non-heated areas. This thermally conductive coating acts as a local "thermal balancer," rapidly transferring heat from high-temperature points to low-temperature points, thus promoting a more uniform temperature distribution across the entire probe card 120 signal area. When the local ambient temperature of all probes is consistent, the resulting thermal drift also tends to be consistent, thereby reducing output inconsistencies between channels and improving the comparison accuracy of multi-channel parallel testing.

[0050] To achieve real-time monitoring of the probe card 120's operating temperature and provide a data foundation for potential software compensation, miniature temperature sensors (such as patch digital temperature sensors or thin-film thermocouples) are integrated as temperature monitoring points at key locations on the probe card 120 (e.g., signal channel convergence areas, probe areas near the wafer center, and edge areas). These monitoring points can transmit temperature data to the host computer in real time. Based on this data, the system can perform two operations: first, real-time monitoring and alarms, pausing testing and prompting for maintenance when an abnormal temperature or gradient exceeding a safety threshold is detected on the probe card 120; second, active temperature compensation, using the monitored temperature as an input parameter to further correct the acquired chip signals using software algorithms, thereby further improving the stability and accuracy of signal acquisition.

[0051] The temperature drift suppression probe card works synergistically across three dimensions: material path (homogenization), thermal management (isothermalization), and state sensing (monitoring points), constructing a comprehensive solution for suppressing temperature drift. Compared to methods that solely rely on post-processing software calibration, this design eliminates the main source of temperature drift at the physical structure level, offering advantages such as more stable suppression, no reliance on complex algorithms, and a relatively simple implementation structure. It effectively improves signal quality and test reliability in wafer-level MEMS testing, especially in high-precision, multi-channel parallel testing scenarios.

[0052] This invention utilizes two-point testing under dual isothermal environments, combined with zero-point benchmark verification, to effectively identify chips with abnormal sensitivity and zero-point drift, improving the reliability and consistency of testing. Response testing can be completed at the wafer stage, avoiding subsequent packaging. Combining a multi-channel probe card and heating plate array enables wafer-level parallel batch testing, resulting in an order-of-magnitude improvement in testing efficiency. By promptly screening out defective chips before packaging, unnecessary packaging and material cost waste is avoided, effectively improving overall yield and reducing overall production costs. The use of a PID precision temperature-controlled isothermal chamber, a blackened heating plate, and a gold-plated probe card ensures the uniformity and stability of the temperature field and electrical signal acquisition during testing.

[0053] The functions of the system in this embodiment have been described in the above method embodiments. Therefore, for any parts not detailed in this embodiment, please refer to the relevant descriptions in the foregoing embodiments, which will not be repeated here.

[0054] Based on the same inventive concept, embodiments of this specification also provide an electronic device.

[0055] The following describes embodiments of the electronic device of the present invention, which can be considered as specific implementations of the methods and apparatus embodiments of the present invention described above. Details described in the embodiments of the electronic device of the present invention should be considered as supplements to the methods or apparatus embodiments described above; details not disclosed in the embodiments of the electronic device of the present invention can be implemented with reference to the methods or apparatus embodiments described above.

[0056] Figure 3 This is a schematic diagram of an electronic device provided as an embodiment of this specification. Refer to the following... Figure 3 The electronic device 300 according to this embodiment of the present invention will be described. Figure 3 The electronic device 300 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of the present invention.

[0057] like Figure 3 As shown, the electronic device 300 is presented in the form of a general-purpose computing device. The components of the electronic device 300 may include, but are not limited to: at least one processing unit 310, at least one storage unit 320, a bus 330 connecting different system components (including storage unit 320 and processing unit 310), a display unit 340, etc.

[0058] The storage unit stores program code that can be executed by the processing unit 310, causing the processing unit 310 to perform the steps described in the processing method section of this specification according to various exemplary embodiments of the present invention. For example, the processing unit 310 can perform, for example... Figure 1 The steps are shown.

[0059] The storage unit 320 may include a readable medium in the form of a volatile storage unit, such as a random access memory unit (RAM) 3201 and / or a cache storage unit 3202, and may further include a read-only memory unit (ROM) 3203.

[0060] The storage unit 320 may also include a program / utility 3204 having a set (at least one) program module 3205, such program module 3205 including but not limited to: an operating system, one or more application programs, other program modules and program data, each or some combination of these examples may include an implementation of a network environment.

[0061] Bus 330 can represent one or more of several types of bus structures, including a memory cell bus or memory cell controller, a peripheral bus, a graphics acceleration port, a processing unit, or a local bus using any of the various bus structures.

[0062] Electronic device 300 can also communicate with one or more external devices 400 (e.g., keyboard, pointing device, Bluetooth device, etc.), and with one or more devices that enable viewers to interact with electronic device 300, and / or with any device that enables electronic device 300 to communicate with one or more other computing devices (e.g., router, modem, etc.). This communication can be performed via input / output (I / O) interface 350. Furthermore, electronic device 300 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 360. Network adapter 360 can communicate with other modules of electronic device 300 via bus 330. It should be understood that, although... Figure 3 As not shown, other hardware and / or software modules may be used in conjunction with electronic device 300, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0063] Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described in this invention can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this invention can be embodied in the form of a software product, which can be stored in a computer-readable storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, or network device, etc.) to execute the method described above according to this invention. When the computer program is executed by a data processing device, it enables the computer-readable medium to implement the method described above, i.e.: as... Figure 1 The method shown.

[0064] Figure 4 This is a schematic diagram of a computer-readable medium provided for embodiments of this specification.

[0065] accomplish Figure 1 The computer program of the method shown can be stored on one or more computer-readable media. A computer-readable medium can be a readable signal medium or a readable storage medium. A readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.

[0066] The computer-readable storage medium may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. The readable storage medium may also be any readable medium other than a readable storage medium, capable of transmitting, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0067] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the audience's computing device, partially on the audience's device, as a standalone software package, partially on the audience's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the audience's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0068] In summary, this invention can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that in practice, general-purpose data processing devices such as microprocessors or digital signal processors (DSPs) can be used to implement some or all of the functions of some or all of the components according to the embodiments of the invention. The invention can also be implemented as a device or apparatus program (e.g., a computer program and computer program product) for performing part or all of the methods described herein. Such programs implementing the invention can be stored on a computer-readable medium or can take the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0069] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the present invention is not inherently related to any specific computer, virtual device, or electronic device, and various general-purpose devices can also implement the present invention. The above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0070] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0071] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A method for response detection of a MEMS chip at wafer level, characterized in that, The method comprises: acquiring a wafer to be detected provided with a MEMS chip, and fixing the wafer to a wafer table; the MEMS chip is electrically connected with the probe card; collecting, by the probe card, a first output signal value of the MEMS chip under a first detection temperature condition; collecting, by the probe card, a second output signal value of the MEMS chip under a second detection temperature condition; comparing the first output signal and the second output signal with preset signal values respectively, and determining a response condition of the MEMS chip based on a comparison result. 2.The response detection method of the MEMS chip at wafer stage according to claim 1, wherein, The first detection temperature condition comprises: placing the MEMS chip in a first environmental temperature value by a thermostat, and controlling the MEMS chip to maintain at a second environmental temperature value by a heating plate connected with the probe card; The second detection temperature condition comprises: placing the MEMS chip in a third environmental temperature value by a thermostat, and controlling the MEMS chip to maintain at a fourth environmental temperature value by a heating plate connected with the probe card. 3.The response detection method of the MEMS chip at wafer stage according to claim 2, wherein, The first environmental temperature value is 0℃, the second environmental temperature value is 0℃±ΔT, wherein ΔT is a dynamically adjustable temperature difference value; the third environmental temperature value is 50℃, and the fourth environmental temperature value is 50℃±ΔT.

4. The method of claim 3, wherein the MEMS chip on wafer level response detection method is characterized by, The method further comprises: acquiring a temperature distribution information set of the wafer to be detected by a multi-point temperature monitoring unit arranged in a preset space range of the wafer table or the probe card; performing temperature compensation on the first output signal value and the second output signal value based on the temperature distribution information set, and specifically: V1 ’ =V1 K t *[T(x,y) T ref ] Wherein, V1 ’ is the first output signal value, V1 is the first output signal value, K t is the temperature difference response drift coefficient, T(x, y) is the temperature distribution information set, T ref is the reference temperature; V2 ’ =V2 K t *[T(x,y) T ref ] wherein V2 ’ is the compensated first output signal value, V2 is the first output signal value, K t is a temperature difference response drift coefficient, T(x,y) is a temperature distribution information set, T ref is a reference temperature. 5.The response detection method of the MEMS chip on wafer stage according to claim 3, wherein, the comparing the first output signal and the second output signal with preset signal values respectively, and determining a response condition of the MEMS chip based on a comparison result, comprises: when 0 < V1≤ V th1 and 0 < V2≤ V th2 , the MEMS chip is determined to respond normally; otherwise, determining that the MEMS chip responds abnormally; Wherein, V1 is the first output signal value, V2 is the second output signal value, V th1 is the preset signal value corresponding to the first ambient temperature value, V th2 is the preset signal value corresponding to the third ambient temperature value. 6.The response detection method of the MEMS chip at wafer stage according to claim 5, wherein, The method further comprises: acquiring a wafer to be detected provided with a plurality of MEMS chips, and fixing the wafer to a wafer table; performing batch response detection on the plurality of MEMS chips simultaneously by a multi-channel probe card and a heating plate array, and determining a response condition of the plurality of MEMS chips.

7. A response detection system of a MEMS chip at a wafer stage, characterized by, The method comprises: a wafer table (110) for fixing a wafer to be detected (140); a probe card (120) for electrically connecting with a MEMS chip on the wafer to be detected (140) to collect an electrical signal; a thermostat for providing a controllable constant temperature environment for the MEMS chip; a heating plate (130) arranged directly above the MEMS chip for heating the MEMS chip.

8. The MEMS chip on wafer stage response detection system of claim 6, wherein, The heating plate (130) is a micro thin film heating sheet, the area of the heating plate (130) is greater than the sensitive area of the MEMS chip, and the surface of the heating plate (130) is provided with a blackening coating to improve the infrared absorption rate.

9. An electronic device, comprising: The electronic device comprises: a processor; and a memory storing computer-executable instructions that, when executed, cause the processor to perform the method according to any one of claims 1-6.

10. A computer readable storage medium, wherein, The computer-readable storage medium stores one or more programs that, when executed by a processor, implement the method of any one of claims 1-6.

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