Client secure pass-through pcie device method, apparatus, device and medium

Abstract

This invention discloses a method, apparatus, device, and medium for secure direct access to PCIe devices by a client machine, belonging to the field of virtual machines. The method includes: adding a region setting for direct memory access to PCIe devices in the client machine's device tree file, adding a PCIe bus description node, referencing the region in the node, and removing the IOMMU and DMA consistency attributes of the node; adding a memory region description in the client machine's Jailhouse configuration file, defining the range of the memory address pool in the memory region, and adding a marker to the address pool; when adding a PCIe device to the client machine in the Jailhouse driver, obtaining the pointer address of the pci_dev device information structure through the configuration file, and using the pointer address to determine the IOMMU domain bound to the PCIe device; scanning all memory regions of the client machine with the PCIe device to be used, determining the memory address pool region using the marker, and establishing a mapping between the virtual address and physical address of the PCIe device in the memory address pool within the IOMMU domain.

Description

Technical Field

[0001] This invention relates to the field of virtual machine technology, and in particular to a method, apparatus, device, and medium for secure client pass-through to PCIe devices. Background Technology

[0002] Jailhouse is a lightweight virtualization platform typically used in embedded systems, especially in environments requiring high performance and low overhead. Jailhouse is designed to run a host operating system (usually Linux) and multiple virtualized, isolated guest domains (e.g., running RTOS or bare-metal applications). In virtualization scenarios, guests typically utilize device pass-through technology to access physical devices. Device pass-through is a technique that directly assigns physical hardware devices (such as GPUs, network cards, FPGAs, etc.) to the guest, bypassing the host operating system and hypervisor layer, giving the guest exclusive access to the device.

[0003] While Jailhouse supports passing PCIe devices based on intx interrupts to guest machines, this method lacks isolation and control over the device's memory access range and resource permissions. This could allow the guest to access the host or other guest machines' memory space without authorization, leading to security risks such as data leaks and system tampering. If an IOMMU (Input / Output Memory Management Unit) isolation scheme is used to improve security, the host system's IOMMU function needs to be disabled, and the initialization and management rights of the IOMMU need to be transferred to the Jailhouse hypervisor. Disabling the host IOMMU requires modifying the host device tree, which is an intrusive operation. Furthermore, after shutting down Jailhouse, the host system's PCIe devices remain in a state where DMA translation using the IOMMU is prohibited, making automatic recovery difficult. This approach is not only complex but also compromises system security. Summary of the Invention

[0004] This invention provides a method, apparatus, device, and medium for secure client pass-through to PCIe devices, to solve the technical problem of complex system configuration caused by client using device pass-through technology to securely pass through PCIe devices in the prior art.

[0005] In a first aspect, embodiments of the present invention provide a method for secure client pass-through to a PCIe device, comprising:

[0006] Add a locale setting for direct memory access of the PCIe device to the device tree file of the client machine to be used;

[0007] Add a PCIE bus description node to the device tree file of the client machine to be used with the PCIE device, and reference the set direct memory access area in the node, and remove the IOMMU attribute and DMA consistency attribute of the description node;

[0008] Add a direct memory access region description to the Jailhouse configuration file of the client machine to be used for the PCIe device, define the range of the memory address pool in the direct memory access region, and add a specific flag to the address pool;

[0009] When adding a PCIe device to a client in the Jailhouse driver, the pointer address of the pci_dev device information structure is obtained through the client configuration file, and the IOMMU field bound to the PCIe device is determined using the pointer address.

[0010] Scan all memory regions of the PCIe device client to be used, determine the memory address pool region using the specific marker, and establish the mapping between the PCIe device virtual address and physical address of the memory address pool in the IOMMU domain.

[0011] Secondly, embodiments of the present invention also provide a client secure pass-through device for PCIe devices, including...

[0012] Add a module to add locale settings for direct memory access of PCIe devices in the device tree file of the client machine to be used by the PCIe device;

[0013] The reference module is used to add a PCIE bus description node to the device tree file of the client to be used PCIE device, and to reference the direct memory access area set in the node, and remove the IOMMU attribute and DMA consistency attribute of the description node.

[0014] The definition module is used to add a direct memory access region description to the configuration file of the client Jailhouse of the PCIe device to be used, define the range of the memory address pool in the direct memory access region, and add a specific flag to the address pool;

[0015] The determination module is used to obtain the pointer address of the pci_dev device information structure from the client configuration file when adding a PCIe device to the client in the Jailhouse driver, and use the pointer address to determine the IOMMU field bound to the PCIe device;

[0016] The scanning module is used to scan all memory regions of the PCIe device client to be used, determine the memory address pool region using the specific marker, and establish the mapping between the PCIe device virtual address and physical address of the memory address pool in the IOMMU domain.

[0017] Thirdly, embodiments of the present invention also provide a device for secure client pass-through to PCIe, comprising:

[0018] include:

[0019] One or more processors;

[0020] Storage device for storing one or more programs.

[0021] When the one or more programs are executed by the one or more processors, the one or more processors implement the client secure pass-through PCIe device method as provided in any of the above embodiments.

[0022] Fourthly, embodiments of the present invention also provide a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform the client secure pass-through PCIe device method as provided in the above embodiments.

[0023] The present invention provides a method, apparatus, device, and medium for secure client pass-through to PCIe devices. This is achieved by adding a direct memory access (DMI) region setting for the PCIe device to the client's device tree file; adding a PCIe bus description node to the client's device tree file, referencing the DMI region within the node, and removing the IOMMU and DMA consistency attributes from the description node; adding a DMI region description to the client's Jailhouse configuration file, defining the range of the memory address pool within the DMI region, and adding a specific marker to the address pool; when adding a PCIe device to the client in the Jailhouse driver, obtaining the pointer address of the pci_dev device information structure from the client configuration file, and using the pointer address to determine the IOMMU domain bound to the PCIe device; scanning all memory regions of the client with the PCIe device, determining the memory address pool region using the specific marker, and establishing a mapping between the PCIe device's virtual address and physical address in the IOMMU domain. By modifying the device tree file and Jailhouse configuration file in the client, control of the PCIe device can be achieved at the virtual layer. Adding a memory address pool for DMA to the device tree file establishes an address mapping for the address pool within the IOMMU domain bound to the PCIe device on the host. This achieves efficient DMA operations while ensuring device isolation without transferring the IOMMU domain. Fine-grained control of DMA access is achieved through IOMMU hardware assistance, making it suitable for embedded or real-time systems requiring low latency and high throughput. Attached Figure Description

[0024] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0025] Figure 1 This is a flowchart illustrating the client secure pass-through method to a PCIe device provided in Embodiment 1 of the present invention;

[0026] Figure 2 This is a flowchart illustrating the client secure pass-through method to a PCIe device provided in Embodiment 2 of the present invention;

[0027] Figure 3 This is a schematic diagram of the client secure pass-through PCIE device provided in Embodiment 3 of the present invention;

[0028] Figure 4 This is a schematic diagram of the device provided in Embodiment 4 of the present invention. Detailed Implementation

[0029] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0030] Example 1

[0031] Figure 1 This is a flowchart of a client secure passthrough PCIe device method provided in Embodiment 1 of the present invention. This embodiment is applicable to configuring a client secure passthrough PCIe device in a Jailhouse virtual machine. This method can be executed by a client secure passthrough PCIe device device and integrated into the device, specifically including the following steps:

[0032] Step 110: Add the locale settings for PCIe device direct memory access to the device tree file of the client machine to be used with the PCIe device.

[0033] Direct Memory Access (DMA) allows various peripherals to directly access main memory without CPU intervention in data transfer, thus freeing up CPU computing power. It can solve the inefficiency problem caused by frequent CPU intervention in traditional I / O interrupt mode and improve the throughput of large data transfers. The guest device needs to have corresponding DMA settings configured for each peripheral, especially PCIe devices. For example, the device tree file of the guest device to be used can be used to add the corresponding DMA settings.

[0034] For example, this may include: adding reserved memory under the root node of the device tree of the client machine to be used by the PCIe device, and defining the address range of the reserved memory.

[0035] This can be achieved as follows: Add a reserved memory segment under the root node, where 0xa0000000 represents the position of the kernel's default contiguous memory allocation size from the end of the guestram region upwards. This prevents the kernel from using this memory segment and avoids conflicts. reserved-memory{

[0036] #address-cells= <1> ;

[0037] #size-cells= <1> ;

[0038] ranges;

[0039] dma_reserved:dma_reserved@a0000000{

[0040] reg = <0xa0000000 0x<2000000>;

[0041] no - map;

[0042] };

[0043] };

[0044] Step 120, add a PCIE bus description node to the device tree file of the client that will use the PCIE device, and reference the set direct memory access area in the node, and remove the IOMMU attribute and DMA coherency attribute of the description node.

[0045] By adding a PCIE bus description node to the device tree file of the client, the takeover and control of the PCIE device can be achieved. Correspondingly, add the direct memory access area set in the above steps to the attributes of the PCIE bus description node, so that the PCIE correspondingly uses the above direct memory access area. Removing the IOMMU attribute and DMA coherency attribute of the description node indicates that it is dma - inconsistent and does not use iommu, because the IOMMU has been managed by the host (Host), so the IOMMU cannot be initialized and explicitly used anymore. This reduces the potential security vulnerabilities and hardware conflict risks.

[0046] Exemplarily, it can include: copying the PCIE bus description node from the device tree file of the host to the device tree file of the client, and removing the dma - coherent attribute and iommu - map attribute in the description node.

[0047] Optionally, it can be implemented as follows:

[0048] PCIE@40000000{

[0049] compatible = "pci - host - ecam - generic";

[0050] device_type = "pci";

[0051] #address - cells = <0x03>;<​​​​​​​​​​msi-parent=;

[0056] bus-range=<0x000xff>;

[0057] interrupt-map-mask=<0x00 0x00 0x00 0x07>;

[0058] interrupt-map=<0x00 0x00 0x00 0x01 0x01 0x00 0x00 0x00 0x04 0x04 0x000x00 0x00 0x02 0x01 0x00 0x00 0x00 0x05 0x04 0x00 0x00 0x00 0x03 0x01 0x000x00 0x00 0x06 0x04 0x00 0x00 0x00 0x04 0x01 0x00 0x00 0x00 0x07 0x04>;

[0059] ranges=<0x1000000 0x00 0x00 0x00 0x50000000 0x00 0xf00000 0x20000000x00 0x58000000 0x00 0x58000000 0x00 0x28000000 0x3000000 0x10 0x00 0x10 0x000x10 0x00>;

[0060] / / iommu-map=<0x00 0x11 0x00 0x10000>;

[0061] / / dma-coherent;

[0062] memory-region=<&dma_reserved>;

[0063] status="okay";

[0064] };

[0065] Step 130: Add a direct memory access region description to the configuration file of the client Jailhouse of the PCIE device to be used, define the range of the memory address pool in the direct memory access region, and add a specific flag to the memory address pool.

[0066] Add a direct memory access zone description to the Jailhouse configuration file of the client machine to be used by the PCIe device. This enables high-speed and secure direct memory read and write by PCIe while ensuring isolation.

[0067] For example, defining the range of the memory address pool in the direct memory access region may include: defining the physical and virtual addresses of the memory address pool; and adding read / write, I / O memory characteristics, and DMA operation support flags to the memory in the address pool. Adding memory descriptions to the `mem_regions` section of the guest jailhouse configuration file is primarily for configuration purposes, enabling jailhouse to quickly locate overridden memory based on the flags when isolating guest PCIe devices. Here, `phys_start` represents the physical address, and `virt_start` represents the IPA. The `flags` definition should be a unique set of flags, distinguishing it from other `mem_regions`. The flags can be read / write, I / O memory characteristics, and DMA operation support flags.

[0068] Alternatively, it can be implemented in the following way:

[0069] {.phys_start=0xa0000000,

[0070] .virt_start=0xa0000000,

[0071] .size=0x2000000,

[0072] .flags=JAILHOUSE_MEM_READ|JAILHOUSE_MEM_WRITE|JAILHOUSE_MEM_IO|JAILHOUSE_MEM_DMA,

[0073] }

[0074] Step 140: When adding a PCIe device to a client in the Jailhouse driver, obtain the pointer address of the pci_dev device information structure through the client configuration file, and use the pointer address to determine the IOMMU field bound to the PCIe device.

[0075] The driver is declared in the Jailhouse configuration file, which adds a PCIe device to the client in the Jailhouse driver. The pointer address of the pci_dev device information structure can be obtained from the client's configuration file, and the IOMMU field bound to the PCIe device can be obtained from the pointer address.

[0076] For example, this could include: determining the bus device by using the bdf number in the PCIE resource description in the Jailhouse client configuration file, and finding the pointer address of the pci_dev structure via the slot; using the pointer to determine the corresponding IOMMU domain through the standard Linux interface iommu_get_domain_for_dev. Here, the bdf number can serve as a unique identifier for the PCIE device and locate the bus device where the bdf resides. Using the slot, specifically the Linux function pci_get_slot(bus,dev->bdf&0xff), the pointer address of the pci_dev structure is obtained, and this pointer can be used to find the IOMMU domain it is bound to through the standard Linux interface iommu_get_domain_for_dev.

[0077] Step 150: Scan all memory regions of the PCIe device client to be used, determine the memory address pool region using the specific marker, and establish the mapping between the PCIe device virtual address and physical address of the memory address pool in the IOMMU domain.

[0078] For example, the special markers set in the above steps can be used to locate the corresponding memory address pool region in memory. Since the physical address PA and virtual address IPA are already set in the memory address pool region, Iommu_map can be used to establish a mapping between the virtual address and physical address of the PCIe device in the IOMMU domain. Using the above method, IOMMU address translation can be utilized, and the PCIe device uses DMA to move data between the PCIe device's internal buffer and memory.

[0079] Using the above security configuration scheme, the client's use of the PCIe device is no different from that of a normal host. For example, when the PCIe device receives information, it can initiate a MemoryWriteTLP (transaction layer packet) via the PCIe bus. The TLP reaches the IOMMU, which verifies the transaction source and address validity through mapping configuration. After successful verification, the PCIe device stores the corresponding data in its internal buffer and uses DMA to move the TLP data from the device's internal buffer to the memory address. The received information is then processed. Correspondingly, the reverse process of the above method can be used to write and send data to the PCIe device.

[0080] This embodiment adds a direct memory access (DMI) region setting for the PCIe device to be used in the client's device tree file; adds a PCIe bus description node to the client's device tree file, referencing the DMI region in the node, and removing the IOMMU and DMA consistency attributes from the description node; adds a DMI region description to the client's Jailhouse configuration file, defining the range of the memory address pool within the DMI region, and adding a specific marker to the address pool; when adding a PCIe device to the client in the Jailhouse driver, the pointer address of the pci_dev device information structure is obtained from the client configuration file, and the IOMMU domain bound to the PCIe device is determined using the pointer address; all memory regions of the client with the PCIe device are scanned, and the memory address pool region is determined using the specific marker, establishing an address mapping between the IOMMU domain and the address pool. By modifying the device tree file and Jailhouse configuration file in the client, control of the PCIe device can be achieved at the virtual layer. Adding a DMA memory address pool to the device tree file establishes a mapping between the address pool and the IOMMU domain bound to the PCIe device in the host. Without transferring the IOMMU domain, efficient DMA operations are maintained while ensuring device isolation.

[0081] In a preferred embodiment of this example, when adding a PCIe device to the guest in the Jailhouse driver, obtaining the pointer address of the pci_dev device information structure through the guest configuration file and using the pointer address to determine the IOMMU domain bound to the PCIe device may further include: saving the driver name to which the PCIe device is bound to the host; correspondingly, the method may also include the following step: when shutting down the guest, rewriting the bdf to the sysfs virtual file system using the user-space program call_usermodehelper to bind the PCIe device to the host driver. The pci_dev structure is the core of all PCIe device-related operations in the Linux kernel, used to store and access information about the PCI device. The original driver name bound to the host can be found through this structure. Accordingly, after the guest finishes using the PCIe device, it needs to be returned to the host. Therefore, the previously saved driver name before the guest was started can be used to bind the bdf to the original driver on the host by calling the user-space program call_usermodehelper to call sh echo to write the bdf to / sys / bus / pci / drivers / [driver name] / bind. If the PCIe network card was originally driven by the IGBD driver, it will be bound back to the IGBD driver after the guest is shut down, allowing the host to continue using the device. Additionally, the address mappings previously established for the DMA domain of the guest PCIe device need to be canceled. This serves two purposes: firstly, it reduces the size of the mapping table within the IOMMU; secondly, it reclaims memory privileges, preventing confusion during subsequent guest creation and ensuring the host's memory safety. The PCIe device's BDF number is scanned to locate its bus device, and then the pointer to `pci_dev` is found through the slot. The IOMMU domain it is bound to is located, and the previously established mappings for the CMA memory address pool region and ITS address region are canceled using the Linux standard interface `iommu_unmap`. Finally, the DMA transfer of the PCIe device is disabled using the Linux standard interface `pci_clear_master`. Using this method, flexible switching of PCIe usage rights can be achieved without transferring the IOMMU domain.

[0082] Example 2

[0083] Figure 2This is a flowchart illustrating the client secure pass-through method for PCIe devices provided in Embodiment 2 of the present invention. This embodiment is an optimization based on the above embodiment, and the method may further include the following steps: setting the actual physical address and virtual address of the ITS memory region in the client configuration file, adding ITS memory tags to the set ITS memory regions and canceling the JAILHOUSE_MEM_ROOTSHARED configuration; creating a mapping relationship of ITS addresses for the IOMMU domain through iommu_map.

[0084] See Figure 2 The client secure pass-through method for PCIe devices includes:

[0085] Step 210: Add a PCIe device direct memory access region setting to the device tree file of the client machine to be used with the PCIe device; add a PCIe bus description node to the device tree file of the client machine to be used with the PCIe device, and reference the set direct memory access region in the node, and remove the IOMMU attribute and DMA consistency attribute of the description node.

[0086] Step 220: Add a direct memory access region description to the configuration file of the client Jailhouse of the PCIE device to be used, define the range of the memory address pool in the direct memory access region, and add a specific flag to the address pool.

[0087] Step 230: When adding a PCIe device to a client in the Jailhouse driver, obtain the pointer address of the pci_dev device information structure through the client configuration file, and use the pointer address to determine the IOMMU field bound to the PCIe device.

[0088] Step 240: Set the actual and virtual addresses of the ITS memory region in the client configuration file, add the ITS memory flags to the corresponding ITS memory regions, and cancel the JAILHOUSE_MEM_ROOTSHARED configuration.

[0089] The methods described in the above embodiments are applicable to intx interrupts, while for message interrupts (MSI / MSI-X), additional configuration is required. For example, in this embodiment, firstly, an ITS (InterruptTranslation Service) memory marker is added to the JAILHOUSE client configuration to indicate that the marked area is the memory region of the ITS. The ITS region in JAILHOUSEITS is then set and initialized to trap message interrupts to the client for processing. The JAILHOUSE_MEM_ROOTSHARED configuration is then disabled to prevent it from being occupied by the host.

[0090] Optionally, this can be configured using a Jailhouse hypervisor memory structure, which can take the following form:

[0091] {

[0092] .phys_start = 0x30820000,

[0093] .virt_start = 0x30820000,

[0094] .size = 0x20000,

[0095] .flags = JAILHOUSE_MEM_READ | JAILHOUSE_MEM_WRITE |

[0096] JAILHOUSE_MEM_ITS,

[0097] },

[0098] The above structure shows that virtual addresses and actual physical addresses are defined, and the same ITS flag as in the JAILHOUSE ITS configuration is set for this memory region.

[0099] Step 250: When adding a PCIe device to a client in the Jailhouse driver, obtain the pointer address of the pci_dev device information structure through the client configuration file, use the pointer address to determine the IOMMU domain bound to the PCIe device, scan all memory regions of the client to be used with the PCIe device, use the specific marker to determine the memory address pool region, and map the virtual address and physical address of the PCIe device in the memory address pool in the IOMMU domain.

[0100] Step 260: Create an ITS address mapping relationship for the IOMMU domain using iommu_map.

[0101] In the guest environment, interrupts are handled by msix messages. This requires creating a mapping between the IPA and PA of the ISM address for the bound IOMMU field using iommu_map. The starting location and size of the address are found by scanning the memory region to locate the ISM combination.

[0102] This embodiment adds the following steps: Setting the actual and virtual addresses of the ITS memory region in the client configuration file, adding ITS memory markers to the corresponding ITS memory regions, and disabling the JAILHOUSE_MEM_ROOTSHARED configuration; creating a mapping relationship for the ITS addresses for the IOMMU domain using iommu_map. This can be used for message interrupt scenarios. Find the address range of the ARM interrupt controller's ITS and create a mapping for that address range for the IOMMU domain to which the PCIE device belongs. When using the msix interrupt, bind it to the vfio-pci driver. Then, enable DMA transfer for the PCIE device through the standard Linux interface pci_set_master.

[0103] Example 3

[0104] Figure 3 This is a schematic diagram of the client secure pass-through PCIe device device provided in Embodiment 3 of the present invention. See also... Figure 3 The client secure pass-through PCIe device device includes:

[0105] Add module 310 to add locale settings for direct memory access of PCIe devices in the device tree file of the client machine to be used;

[0106] Reference module 320 is used to add a PCIE bus description node to the device tree file of the client machine to be used with the PCIE device, and to reference the direct memory access area set in the node, and to remove the IOMMU attribute and DMA consistency attribute of the description node.

[0107] Definition module 330 is used to add a direct memory access region description to the configuration file of the client Jailhouse of the PCIE device to be used, define the memory address pool range in the direct memory access region, and add a specific flag to the address pool;

[0108] The module 340 is used to determine the IOMMU domain bound to the PCIe device when adding a PCIe device to the client in the Jailhouse driver, by obtaining the pointer address of the pci_dev device information structure through the client configuration file and using the pointer address.

[0109] The scanning module 350 is used to scan all memory regions of the PCIe device client to be used, determine the memory address pool region using the specific marker, and establish the mapping between the PCIe device virtual address and physical address of the memory address pool in the IOMMU domain.

[0110] The client secure pass-through device for PCIe devices provided in this embodiment adds a direct memory access (DMI) region setting for the PCIe device to be used to the client's device tree file; adds a PCIe bus description node to the client's device tree file, referencing the set DMI region in the node, and removing the IOMMU and DMA consistency attributes from the description node; adds a DMI region description to the client's Jailhouse configuration file, defines the range of the memory address pool in the DMI region, and adds a specific marker to the address pool; when adding a PCIe device to the client in the Jailhouse driver, the pointer address of the pci_dev device information structure is obtained through the client configuration file, and the IOMMU domain bound to the PCIe device is determined using the pointer address; all memory regions of the client with the PCIe device are scanned, and the memory address pool region is determined using the specific marker; a mapping between the PCIe device's virtual address and physical address is established in the IOMMU domain. By modifying the device tree file and Jailhouse configuration file in the client, control of the PCIe device can be achieved at the virtual layer. By adding a memory address pool for DMA to the device tree file, a page table mapping between the device's virtual and physical addresses is established in the IOMMU domain bound to the PCIe device on the host. This achieves efficient DMA operations while ensuring device isolation without transferring the IOMMU domain.

[0111] Based on the above embodiments, the device further includes:

[0112] The ITS settings module is used to set the actual and virtual addresses of the ITS memory region in the client configuration file, add the ITS memory flag to the set ITS memory region, and cancel the JAILHOUSE_MEM_ROOTSHARED configuration.

[0113] The mapping relationship creation module is used to create mapping relationships for ITS addresses for the IOMMU domain through iommu_map.

[0114] Based on the above embodiments, the added module includes:

[0115] An add unit is used to add reserved memory under the root node of the device tree of the client machine to be used by the PCIe device, and to define the address range of the reserved memory.

[0116] Based on the above embodiments, the referencing module includes:

[0117] The copy unit is used to copy the PCIe bus description node from the host's device tree file to the client's device tree file, and remove the dma-coherent and iommu-map attributes from the description node.

[0118] Based on the above embodiments, the definition module includes:

[0119] A definition unit is used to define the physical and virtual addresses of the memory address pool;

[0120] The tag addition unit is used to add read-write, I / O memory characteristics, and DMA operation support tags to the memory address pool.

[0121] Based on the above embodiments, the determining module includes:

[0122] The bus device determination unit is used to determine the bus device by the bdf number in the PCIE resource description in the Jailhouse client configuration file, and to find the pointer address of the pci_dev structure by the slot.

[0123] The IOMMU domain determination unit is used to determine the corresponding IOMMU domain using the pointer through the standard interface iommu_get_domain_for_dev provided by Linux.

[0124] Based on the above embodiments, the device further includes:

[0125] The unbinding module is used to unbind PCIe devices from their corresponding drivers on the host. When using the intx interrupt, it binds the PCIe device to the Jailhouse-pci-stubdriver.

[0126] Based on the above embodiments, the device further includes:

[0127] The msix interrupt unbinding module is used to unbind PCIe devices from their corresponding drivers on the host. When using msix interrupts, it binds the PCIe device to the vfio-pci driver and enables DMA transfer of the PCIe device through pci_set_master provided by Linux.

[0128] Based on the above embodiments, the determining module further includes:

[0129] The storage unit is used to store the driver name that the PCIe device is bound to the host.

[0130] Accordingly, the device also includes:

[0131] The host driver binding module is used to bind PCIe devices to the host driver by rewriting the BDF file system to the sysfs virtual file system using the user-mode program call_usermodehelper.

[0132] The client secure pass-through PCIe device device provided in the embodiments of the present invention can execute the client secure pass-through PCIe device method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0133] Example 4

[0134] Figure 4 This is a schematic diagram of a client secure pass-through PCIe device provided in Embodiment 4 of the present invention. Figure 4 A block diagram of an exemplary device 12 suitable for implementing embodiments of the present invention is shown. Figure 4 The device 12 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of the present invention.

[0135] like Figure 4 As shown, device 12 is represented as a general-purpose computing device. Components of device 12 may include, but are not limited to: one or more processors or processing units 16, system memory 28, and a bus 18 connecting different system components (including system memory 28 and processing unit 16).

[0136] Bus 18 represents one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. For example, these architectures include, but are not limited to, the Industry Standard Architecture (ISA) bus, the Micro Channel Architecture (MAC) bus, the Enhanced ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnect (PCI) bus.

[0137] Device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by device 12, including volatile and non-volatile media, removable and non-removable media.

[0138] System memory 28 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 30 and / or cache memory 32. Device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 34 may be used to read and write non-removable, non-volatile magnetic media (… Figure 4 Not shown; usually referred to as a "hard drive"). Although Figure 4Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 18 via one or more data media interfaces. Memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of the present invention.

[0139] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in memory 28. Such program modules 42 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program modules 42 typically perform the functions and / or methods described in the embodiments of the present invention.

[0140] Device 12 can also communicate with one or more external devices 14 (e.g., keyboard, pointing device, display 24, etc.), and with one or more devices that enable a user to interact with device 12, and / or with any device that enables device 12 to communicate with one or more other computing devices (e.g., network card, modem, etc.). This communication can be performed via input / output (I / O) interface 22. Furthermore, device 12 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 20. As shown, network adapter 20 communicates with other modules of device 12 via bus 18. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with device 12, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0141] The processing unit 16 executes various functional applications and data processing by running programs stored in the system memory 28, such as implementing the client secure pass-through PCIE device method provided in the embodiments of the present invention.

[0142] Example 5

[0143] Embodiment 5 of the present invention also provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform the client secure pass-through PCIe device method as described in any of the above embodiments.

[0144] The computer storage medium of this invention can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. For example, a computer-readable storage medium can be, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0145] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0146] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including but not limited to wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0147] Computer program code for performing the operations of this invention can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0148] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A method for secure client-side pass-through to a PCIe device, characterized in that, include: Add a locale setting for direct memory access of the PCIe device to the device tree file of the client machine to be used; Add a PCIE bus description node to the device tree file of the client machine to be used with the PCIE device, and reference the set direct memory access area in the node, and remove the IOMMU attribute and DMA consistency attribute of the description node; Add a direct memory access region description to the Jailhouse configuration file of the client machine to be used for the PCIE device, define the memory address pool range in the direct memory access region, and add a specific flag to the memory address pool; When adding a PCIe device to a client in the Jailhouse driver, the pointer address of the pci_dev device information structure is obtained through the client configuration file, and the IOMMU field bound to the PCIe device is determined using the pointer address. Scan all memory regions of the client machine to be used by the PCIe device, determine the memory address pool region using the specific marker, and establish the mapping between the PCIe device virtual address and physical address of the memory address pool in the IOMMU domain; The step of adding a PCIe bus description node to the device tree file of the client machine to be used, referencing the set direct memory access region in the node, and removing the IOMMU attribute and DMA coherence attribute of the description node includes: Copy the PCIe bus description node from the host device tree file to the client device tree file, and remove the dma-coherent and iommu-map attributes from the description node.

2. The method according to claim 1, characterized in that, The method further includes: Define the physical and virtual addresses of the ITS memory regions in the client's configuration file, add ITS memory tags to the defined ITS memory regions, and uncheck the JAILHOUSE_MEM_ROOTSHARED configuration. The IOMMU domain is mapped using iommu_map to establish the ITS address mapping.

3. The method according to claim 1, characterized in that, Adding a locale setting for direct memory access to the PCIe device to the device tree file of the client machine to be used includes: Add reserved memory under the root node of the device tree of the client machine to be used by the PCIe device, and define the address range of the reserved memory.

4. The method according to claim 1, characterized in that, The step involves adding a direct memory access region description to the Jailhouse configuration file of the client machine to be used for the PCIe device, defining the range of the memory address pool within the direct memory access region, including: Define the physical and virtual addresses of the memory address pool; Add read / write, I / O memory features, and DMA operation support flags to the memory address pool.

5. The method according to claim 1, characterized in that, When adding a PCIe device to a client in the Jailhouse driver, the pointer address of the pci_dev device information structure is obtained through the client configuration file, and the IOMMU field bound to the PCIe device is determined using the pointer address, including: The bus device is determined by the bdf number in the PCIE resource description in the Jailhouse client configuration file, and the pointer address of the pci_dev device information structure is found by the slot. The corresponding IOMMU domain is determined using the pointer address through the standard Linux interface iommu_get_domain_for_dev.

6. The method according to claim 2, characterized in that, The method further includes: Unbind the PCIe device from the corresponding driver on the host, and bind the PCIe device to the Jailhouse-pci-sub driver when using the intx interrupt.

7. The method according to claim 5, characterized in that, The method further includes: Unbind the PCIe device from the corresponding driver on the host. When using the msix interrupt, bind the PCIe device to the vfio-pci driver and enable DMA transfer of the PCIe device through pci_set_master provided by Linux.

8. The method according to claim 1, characterized in that, When adding a PCIe device to a client in the Jailhouse driver, the method of obtaining the pointer address of the pci_dev device information structure from the client configuration file and using the pointer address to determine the IOMMU field bound to the PCIe device also includes: Save the driver name that the PCIe device is bound to the host; Accordingly, the method further includes: When the client is shut down, the BDF is rewritten to the sysfs virtual file system using the user-mode program call_usermodehelper, thus binding the PCIe device to the host driver.

9. A client secure pass-through device for PCIe equipment, characterized in that, include: Add a module to add locale settings for direct memory access of PCIe devices in the device tree file of the client machine to be used by the PCIe device; The reference module is used to add a PCIE bus description node to the device tree file of the client to be used PCIE device, and to reference the direct memory access area set in the node, and remove the IOMMU attribute and DMA consistency attribute of the description node. The definition module is used to add a direct memory access region description to the configuration file of the client Jailhouse of the PCIe device to be used, define the memory address pool range in the direct memory access region, and add a specific flag to the address pool; The determination module is used to obtain the pointer address of the pci_dev device information structure from the client configuration file when adding a PCIe device to the client in the Jailhouse driver, and use the pointer address to determine the IOMMU field bound to the PCIe device; The scanning module is used to scan all memory regions of the client machine to be used by the PCIe device, determine the memory address pool region using the specific marker, and establish the mapping between the virtual address and physical address of the PCIe device in the IOMMU domain. The reference module includes: The copy unit is used to copy the PCIe bus description node from the host's device tree file to the client's device tree file, and remove the dma-coherent and iommu-map attributes from the description node.

10. A device for secure client pass-through to PCIe, characterized in that, include: One or more processors; Storage device for storing one or more programs. When the one or more programs are executed by the one or more processors, the one or more processors implement the client secure pass-through PCIe device method as described in any one of claims 1-8.

11. A storage medium containing computer-executable instructions, characterized in that, The computer-executable instructions, when executed by a computer processor, are used to perform the client secure pass-through PCIe device method as described in any one of claims 1-8.

Images