Chip, control method and device

Abstract

The embodiment of the invention provides a chip, a control method and equipment, the chip comprises a plurality of subsystems, each subsystem comprises an event triggering unit, and the event triggering units of different subsystems are mutually connected. The first event triggering unit is used for monitoring the execution state of a first event in the first subsystem; and after the execution state of the first event meets a preset condition, determining a second subsystem for executing a second event, and sending an event triggering request to a second event triggering unit in the second subsystem. And the second event triggering unit is used for responding to the event triggering request and triggering a second event in the second subsystem. Through the technical scheme, the events among different subsystems of the multi-core chip can be triggered and controlled in sequence on the basis of a hardware mode, a processor does not need to participate, the real-time performance is higher, and the resource consumption of the processor is reduced.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of computer, and in particular, to a chip, a control method and a device. BACKGROUND

[0002] A multi-core chip includes a plurality of subsystems, and different subsystems can cooperate with each other to complete a set task. During the execution of the task, different subsystems usually need to follow a certain execution order, and therefore, the execution processes of different subsystems need to be coordinated and controlled. At present, the execution processes of different subsystems are mainly controlled by a CPU responding to an interruption. However, this implementation scheme needs the CPU to frequently intervene, which may reduce the overall performance of the system and cause response delay. SUMMARY

[0003] In view of this, embodiments of the present application provide a chip, a control method and a device to at least partially solve the above problems.

[0004] According to a first aspect of embodiments of the present application, a chip is provided, including: a plurality of subsystems, each subsystem including an event trigger unit, and the event trigger units of different subsystems being connected with each other; a first event trigger unit is configured to monitor an execution state of a first event in a first subsystem; after the execution state of the first event meets a preset condition, determine a second subsystem for executing a second event, and send an event trigger request to a second event trigger unit in the second subsystem; the first subsystem is any one of the plurality of subsystems, and the first event trigger unit is located in the first subsystem; the first event is any one of events executed in the first subsystem, and the execution order of the second event is after the first event; and the second event trigger unit is configured to trigger the second event in the second subsystem in response to the event trigger request.

[0005] According to a second aspect of embodiments of the present application, a control method is provided, applied to the chip of the first aspect, and the method includes: a first event trigger unit monitors an execution state of a first event in a first subsystem; after the execution state of the first event meets a preset condition, a second subsystem for executing a second event is determined, and an event trigger request is sent to a second event trigger unit in the second subsystem; the first subsystem is any one of the plurality of subsystems, and the first event trigger unit is located in the first subsystem; the first event is any one of events executed in the first subsystem, and the execution order of the second event is after the first event; the second event trigger unit triggers the second event in the second subsystem in response to the event trigger request.

[0006] According to a third aspect of the embodiments of the present application, an electronic device is provided, comprising the chip according to the first aspect.

[0007] In the above technical solution, the event trigger units can be arranged in different subsystems of the multi-core chip, and the event trigger units in different subsystems are connected with each other. Then, the event trigger unit in any subsystem can be used to monitor the execution state of the event in the subsystem, and send an event trigger request to the event trigger unit in another subsystem to trigger the other subsystem to continue to execute the subsequent event when the execution state of the event meets the preset condition.

[0008] Through the above technical solution, the triggering control of the events in different subsystems of the multi-core chip can be realized based on the hardware mode, without the participation of the processor, which is more real-time, reduces the consumption of the processor resources, and improves the overall performance of the system.

[0009] On this basis, the above technical solution can also realize the continuous and sequential triggering of multiple events to be executed between different subsystems, and since the above technical solution is based on the software mode to pre-configure the subsystems used to execute different events and the execution order of different events, when the application scenario or demand changes, only the software configuration needs to be changed, and the execution order of different events and the execution subject can be changed without changing the hardware level. The flexibility is higher, and it can better adapt to the needs of different application scenarios. BRIEF DESCRIPTION OF DRAWINGS

[0010] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments described in the embodiments of the present application, and other drawings can also be obtained by those skilled in the art based on these drawings.

[0011] Figure 1 The structural schematic diagram of the chip provided by the embodiments of the present application is shown in the figure; Figure 2 Another structural schematic diagram of the chip provided by the embodiments of the present application is shown in the figure; Figure 3 Another structural schematic diagram of the chip provided by the embodiments of the present application is shown in the figure; Figure 4 Another structural schematic diagram of the chip provided by the embodiments of the present application is shown in the figure; Figure 5 Another structural schematic diagram of the chip provided by the embodiments of the present application is shown in the figure; Figure 6 The timing schematic diagram of the function implementation process of the chip provided by the embodiments of the present application is shown in the figure; Figure 7 A flow chart of a control method provided by an embodiment of the present application; Figure 8 A structural schematic diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0012] In order to make personnel in the art better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application shall fall within the scope of protection of the present application.

[0013] The terms used in the embodiments of the present application are merely for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "an" and "the" used in the embodiments of the present application and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0014] In the following description, "some embodiments" are related to a subset of all possible embodiments, but it can be understood that "some embodiments" can be the same subset or different subsets of all possible embodiments, and can be combined with each other without conflict.

[0015] It should also be noted that the terms "first", "second", "third" in the embodiments of the present application are only used to distinguish similar objects, and do not represent a specific order of the objects. Understandably, "first", "second", "third" can be interchanged with a specific order or sequence as allowed, so that the embodiments of the present application described herein can be implemented in an order other than that illustrated or described herein.

[0016] In addition, the term "and / or" in the embodiments of the present application is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B can represent the existence of A alone, the existence of A and B together, and the existence of B alone. In addition, the character " / " in this paper generally represents that the front and rear associated objects are in an "or" relationship.

[0017] The embodiment of the present application can provide a chip, which is a multi-core chip, for example, a system on chip (SoC). The chip provided by the embodiment of the present application can realize trigger control of each to-be-executed event between different subsystems in the multi-core chip in a hardware manner, and can continuously trigger the to-be-executed events of different subsystems according to a set execution order. Based on the hardware trigger manner provided by the embodiment of the present application, the real-time performance of event triggering can be improved, a processor does not need to participate, system operation resources are saved, system power consumption and code density are reduced, and the overall performance of the system is improved.

[0018] Figure 1 A structural schematic diagram of the chip provided by the embodiment of the present application is given. As shown in the figure, Figure 1 the chip provided by the embodiment of the present application can include a plurality of subsystems, wherein each subsystem can include an event trigger unit, and the event trigger units in different subsystems can be connected to each other. Figure 1 An example in which the chip includes two subsystems is given, and it should be understood that in another implementation scenario, the chip can further include more subsystems, for example, a three-core system, a four-core system, and the like.

[0019] In the case where the chip includes more subsystems, the connection manner between the event trigger units in different subsystems can be various.

[0020] In a possible implementation manner, the event trigger units in each subsystem are sequentially connected to form a "linear" topology. Figure 2 Taking a four-core system as an example, a structural diagram of the chip in this connection manner is given. Based on the connection manner as shown in the figure, Figure 2 when two event trigger units that do not have a direct connection relationship communicate, the communication can be forwarded through the intermediate event trigger units. For example, when the event trigger unit 1 communicates with the event trigger unit 4, the communication can be forwarded through the event trigger unit 2 and the event trigger unit 3. This connection manner has simple wiring and low cost, however, when the number of subsystems is large, the communication efficiency between the event trigger units in different subsystems will be reduced, and when one of the subsystems is abnormal, the normal communication between other subsystems will be affected, and the reliability is low. Therefore, in an actual application scenario, when the number of subsystems in the chip is small, this connection manner can be used.

[0021] In another possible implementation manner, the connection manner between the event trigger units in each subsystem can also be a ring topology connection, a mesh topology connection, a star topology connection, a tree topology connection, a mixed topology connection, and the like. Different connection manners have different performance characteristics, and different connection manners can be flexibly selected according to the requirements of an actual scenario. Figure 3Taking a four-core system as an example, a structure diagram of the chip in a mesh topology connection mode is given. As shown in Figure 3 In this connection mode, the event trigger units in each subsystem can be directly connected with the event trigger units in other subsystems respectively, so that the event trigger units in each subsystem can realize direct communication, the communication efficiency is high, and when one of the subsystems fails, data forwarding can also be realized based on the event trigger units in other subsystems, the reliability is good, however, the wiring mode is relatively complex, and the cost is high. Therefore, in a scenario with high requirements for communication efficiency and reliability, this connection mode can be used.

[0022] In the embodiments of the present application, different subsystems in the chip can be used to execute different to-be-executed events in the chip, different to-be-executed events are associated with each other, and a specific execution order usually needs to be followed. By triggering each subsystem to execute each to-be-executed event in turn, the chip can realize control of the related functions of the electronic device, for example. The electronic device may, for example, be any device configured with the chip provided in the embodiments of the present application, or it may also be any device in communication connection with the device configured with the chip provided in the embodiments of the present application.

[0023] For example, the chip provided in the embodiments of the present application can be configured in a target electronic device, which may, for example, be a control device of a target motor. The target electronic device can be connected to the target motor, and the number of target motors may, for example, be one or more. Illustratively, the chip provided in the embodiments of the present application can be used to control each subsystem to execute each to-be-executed event in turn, so as to realize monitoring of the state of the target motor 1, and control the running process of the target motor 2 based on the state of the target motor 1. It should be understood that the above example is used to understand the embodiments of the present application, and should not be regarded as a limitation of the embodiments of the present application. The related functions of the chip provided in the embodiments of the present application can also enable the chip to realize other different control functions in other control scenarios.

[0024] The specific function implementation of the chip with the structure as shown in Figure 1 will be described below in conjunction with the relevant drawings.

[0025] In the embodiments of the present application, reference is made to Figure 1For any one of the subsystems in the chip, an event trigger unit in the subsystem can be used to monitor the execution state of a first event in the subsystem. For the convenience of description and understanding, in the following description, the any one of the subsystems is described as a first subsystem, and the event trigger unit in the any one of the subsystems is described as a first event trigger unit. The first event can be any one of the to-be-executed events in the first subsystem, and the first event has a correlation with the to-be-executed events in other subsystems, for example, the to-be-executed events in the other subsystems need to be executed after the first event. Specifically, the first event trigger unit can be used to receive an event execution state notification message sent by an execution unit of the first event in the first subsystem, and the first event trigger unit can monitor the execution state of the first event according to the event execution state notification message sent by the execution unit of the first event. The execution unit of the first event can be any one of the functional modules in the first subsystem, or can be any one of the peripherals in the first subsystem.

[0026] When the first event trigger unit monitors that the execution state of the first event meets a preset condition, a second subsystem for executing a second event can be determined, and an event trigger request can be sent to a second event trigger unit in the second subsystem. Specifically, the first event trigger unit can directly send the event trigger request to the second event trigger unit in the second subsystem, or the first event trigger unit can send the event trigger request to an event trigger unit in another subsystem, and the event trigger unit in the another subsystem can forward the event trigger request to the second event trigger unit in the second subsystem. The second subsystem is different from the first subsystem, and the second event can be a to-be-executed event executed by the second subsystem and having an execution sequence after the first event. The execution state of the first event meeting the preset condition can be, for example, that the execution progress of the first event reaches a preset progress (such as execution start, execution end, etc.), or that a parameter generated or collected in the execution process of the first event meets a preset value range, and the specific condition can be flexibly set according to the actual scene requirements.

[0027] In a specific implementation manner, the to-be-executed events corresponding to each of the subsystems in the chip and the execution sequence of each of the to-be-executed events can be pre-configured based on a software configuration manner. Then, the first event trigger unit can determine a to-be-executed event after the first event, that is, the second event, and a subsystem for executing the to-be-executed event, that is, the second subsystem, according to the pre-configuration information. Further, the first event trigger unit can send an event trigger request to the second event trigger unit in the second subsystem.

[0028] After receiving the event trigger request sent by the first event trigger unit, on one hand, the second event trigger unit can be configured to trigger the second event in the second subsystem in response to the event trigger request sent by the first event trigger unit. Specifically, in response to the event trigger request sent by the first event trigger unit, the second event trigger unit can send an event trigger request to an execution unit of the second event in the second subsystem, where the execution unit of the second event can be a related functional module in the second subsystem or a peripheral device in the second subsystem. The execution unit of the second event can be configured to execute the second event in response to the event trigger request. Further, when the execution state of the second event meets a preset condition, the execution unit of the second event can also send an event execution state notification message to the second event trigger unit. Further, similarly to the foregoing, the second event trigger unit can also determine a subsystem for executing a subsequent event and send an event trigger request to an event trigger unit in the subsystem, and the cycle continues until all the events to be executed are executed.

[0029] On the other hand, after receiving the event trigger request sent by the first event trigger unit, the second event trigger unit can also be configured to send an event response signal to the first event trigger unit, where the event response signal can be configured to indicate that the event trigger request has been received. That is, the signal interaction between the event trigger units in different subsystems can adopt a REQ / ACK handshake form. The first event trigger unit can send the event trigger request to the second event trigger unit by setting a first signal level value between the first event trigger unit and the second event trigger unit to be valid (e.g., pulled high). The second event trigger unit can send the event response signal to the first event trigger unit by setting a second signal level value between the first event trigger unit and the second event trigger unit to be valid (e.g., pulled high). Further, in response to the event response signal, the first event trigger unit is also configured to stop sending the event trigger request to the second event trigger unit. Specifically, the first event trigger unit can stop sending the event trigger request to the second event trigger unit by setting the first signal level value between the first event trigger unit and the second event trigger unit to be invalid (e.g., pulled low). In response to the first event trigger unit stopping sending the event trigger request, the second event trigger unit is also configured to stop sending the event response signal to the first event trigger unit. Specifically, the second event trigger unit can stop sending the event response signal to the first event trigger unit by setting the second signal level value between the first event trigger unit and the second event trigger unit to be invalid (e.g., pulled low).

[0030] In the above technical solution, event triggering units can be set in different subsystems of the multi-core chip, and the event triggering units in different subsystems can be interconnected. Then, the event triggering unit in any subsystem can be used to monitor the execution status of events within its own subsystem, and when the execution status of an event meets preset conditions, it can send an event triggering request to the event triggering units in other subsystems to trigger the other subsystems to continue executing subsequent events.

[0031] The above technical solution enables the triggering and control of events within different subsystems of a multi-core chip through hardware, without the need for processor involvement. This results in higher real-time performance, reduced consumption of processor resources, and improved overall system performance.

[0032] Building upon this, the aforementioned technical solution also enables the sequential triggering of multiple events to be executed across different subsystems. Furthermore, since this solution is based on software-pre-configured subsystems for executing different events and the execution order of those events, changes in application scenarios or requirements only require modifications to the software configuration to alter the execution order and the executing entity, without necessitating hardware-level modifications. This offers greater flexibility and better adaptability to the needs of diverse application scenarios.

[0033] Figure 4 This is a schematic diagram of another chip structure provided in an embodiment of this application. For example... Figure 4 As shown in the embodiments of this application, the event triggering units of different subsystems may include multiple sets of control signal lines. These multiple sets of control signal lines can be used to transmit event triggering requests and event response signals corresponding to different events. Each set of control signal lines may include a first control signal line and a second control signal line. The first control signal line can be used to transmit event triggering requests, and the second control signal line can be used to transmit event response signals.

[0034] Based on such Figure 4The chip shown in the structure, in the embodiment of the application, the event trigger request and the event response signal corresponding to the to-be-executed event transmitted by each group of control signal lines between different subsystems can be pre-configured by a software manner. That is, the event trigger request transmitted by different control signal lines is used to trigger different to-be-executed events, and the event response signal transmitted by different control signal lines is used to respond to different event trigger requests. The specific correspondence can be pre-configured by software. For example, it is assumed that two groups of control signal lines, including control signal line 1 and control signal line 2, are included between the first event trigger unit and the second event trigger unit. Then, control signal line 1 can be pre-configured to be used for the first event trigger unit to send event trigger request 1 to the second event trigger unit, and event trigger request 1 is used to trigger the second subsystem to execute event 1. Control signal line 2 is used for the first event trigger unit to send event trigger request 2 to the second event trigger unit, and event trigger request 2 is used to trigger the second subsystem to execute event 2.

[0035] Then, based on the above description, in the embodiment of the application, the first event trigger unit can be used to determine the target control signal line associated with the second event from the multiple groups of control signal lines between the first event trigger unit and the second event trigger unit. Further, the event trigger request is sent to the second event trigger unit in the second subsystem through the first control signal line in the target control signal line. Then, after receiving the event trigger request, the second event trigger unit can determine that the to-be-triggered event is the second event according to the control signal line used to carry the event trigger request, and then the second event trigger unit can trigger the second subsystem to execute the second event. In addition, the second event trigger unit can also be used to send an event response signal to the first event trigger unit through the second control signal line in the target control signal line in response to the event trigger request sent by the first event trigger unit.

[0036] In the above technical solution, one or more groups of control signal lines can be included between the event trigger units of different subsystems, and different control signal lines can be pre-configured by a software manner to transmit event trigger signals and event response signals corresponding to different events. Through the above technical solution, each subsystem can determine the subsequent to-be-executed event according to the signal line used to transmit the event trigger signal, without transmitting redundant data, and the transmission efficiency is higher. In addition, the software-based manner can support rapid changes based on demand changes, and the flexibility is higher.

[0037] Figure 5 Another structure diagram of the chip provided in the embodiment of the application is shown in FIG. 4. Figure 5 As shown in the figure, the chip further includes a processor in each of the different subsystems, and further includes a shared memory between the different subsystems. In addition, the event trigger units of the different subsystems can further include a data signal line, and the event trigger units of the different subsystems are further connected to an execution unit.

[0038] In the embodiments of the present application, the data signal line can be used to send the storage information of target data between the event trigger units of different subsystems. The target data can be used to execute the event requested by the event trigger request. For example, the target data can be used to indicate the specific manner of executing the event to be triggered. For example, the second subsystem can have three manners of executing the second event, and the target data can be used to indicate which of the three manners is used to execute the second event. Based on the target data, the first subsystem can specify the manner of executing the second event by the second subsystem when triggering the second subsystem to execute the second event. In the embodiments of the present application, the preset target data can be the same or different each time the first subsystem triggers the second subsystem to execute the second event, which can be flexibly set according to the actual scene requirements. In another implementation manner, the target data can also be used to indicate the number of times of executing the event to be triggered, the required parameters, etc., which can be set according to the actual scene requirements.

[0039] The storage information of the target data can include the address information of the target data in the shared memory and the length information of the target data. For example, the address information can include the start address and the offset address of the shared memory. Then, the receiver of the address information can calculate the absolute address of the target data in the shared memory according to the start address and the offset address of the shared memory. Alternatively, in the case where the start address of the shared memory is agreed in advance, the address information can include only the offset address, so as to save the data transmission resource.

[0040] The function implementation process of the chip with the structure as shown in Figure 5 will be described below.

[0041] Referring to Figure 6 , first, the first event trigger unit can send the event trigger request and the storage information of the target data to the second event trigger unit in the second subsystem.

[0042] Specifically, the first event trigger unit can be configured to monitor an execution state of the first event in the first subsystem. After the execution state of the first event meets a preset condition, the first event trigger unit can be configured to determine a target control signal line associated with the second event from a plurality of groups of control signal lines between the first event trigger unit and the second event trigger unit. Then, the first event trigger unit can be configured to send an event trigger request to the second event trigger unit in the second subsystem through a first control signal line in the target control signal line. In addition, the first event trigger unit can be configured to send storage information of target data to the second event trigger unit through a data signal line between the first event trigger unit and the second event trigger unit. The target data can be used for the second event to be executed by the second subsystem. The target data can be written into the shared memory by the first event trigger unit before the event trigger request is sent to the second event trigger unit. For example, the target data can be written into the shared memory during the execution of the first event, or the target data can be written into the shared memory after the execution state of the first event meets the preset condition. The storage information of the target data can include address information of the target data in the shared memory and length information of the target data. The address information and the length information of the target data in the shared memory can be transmitted in series based on the same data signal line, or can be transmitted in parallel based on different data signal lines.

[0043] In addition, on the one hand, the second event trigger unit can send an event response signal to the first event trigger unit, and on the other hand, the second event trigger unit can trigger the processor of the second subsystem to obtain the target data from the shared memory according to the storage information of the target data, and send the target data to the execution unit in the second subsystem.

[0044] Specifically, after receiving the event trigger request, as shown in Figure 6 , the second event trigger unit can be configured to send an event response signal to the first event trigger unit through a second control signal line in the target control signal line in response to the event trigger request sent by the first event trigger unit. In addition, the second event trigger unit can determine that the event to be triggered this time is the second event according to the control signal line used to carry the event trigger request, and then trigger the second subsystem to execute the second event. Specifically, as shown in Figure 6 , after receiving the storage information of the target data, the second event trigger unit can send the storage information of the target data to the processor in the second subsystem, and then trigger the processor of the second subsystem to obtain the target data from the shared memory according to the storage information of the target data, and send the target data to the execution unit of the second event. In addition, the execution unit of the second event can determine a specific way to execute the second event according to the target data, and execute the second event in the way. The execution unit of the second event can be, for example, a peripheral device or a related functional module in the second subsystem.

[0045] Further, the first event triggering unit is further configured to stop sending the event triggering request to the second event triggering unit in response to the event response signal. The second event triggering unit is further configured to stop sending the event response signal to the first event triggering unit in response to the first event triggering unit stopping sending the event triggering request.

[0046] In the above technical solution, the event triggering units of different subsystems can also transmit the storage information of the target data through the data signal line. Then, the subsystem for executing the to-be-triggered event can acquire the target data from the shared memory according to the storage information of the target data, and determine the specific manner of executing the to-be-triggered event according to the target data, and execute the to-be-triggered event in the manner. Through the above technical solution, the execution manner of different events of different subsystems in the multi-core chip can be controlled, and the flexibility and practicability of the solution are further improved.

[0047] Figure 7 A flowchart of the control method provided by the embodiments of the present application is given. The control method provided by the embodiments of the present application can be applied to the chip described in the above embodiments, as shown in the following figure. Figure 7 The control method provided by the embodiments of the present application can include the following steps. Step 501: The first event triggering unit monitors the execution state of the first event in the first subsystem.

[0048] Step 502: After the execution state of the first event meets the preset condition, the first event triggering unit determines the second subsystem for executing the second event, and sends an event triggering request to the second event triggering unit in the second subsystem.

[0049] Step 503: The second event triggering unit triggers the second event in the second subsystem in response to the event triggering request.

[0050] In a specific implementation manner, the above method further includes: the second event triggering unit sends an event response signal to the first event triggering unit in response to the event triggering request, and the event response signal is used to indicate that the event triggering request has been received.

[0051] In a specific implementation manner, the first event triggering unit sends the event triggering request to the second event triggering unit in the second subsystem includes: the first event triggering unit determines a target control signal line associated with the second event from the control signal line between the first event triggering unit and the second event triggering unit; and the first event triggering unit sends the event triggering request to the second event triggering unit in the second subsystem through a first control signal line in the target control signal line.

[0052] In a specific implementation, the second event triggering unit sends an event response signal to the first event triggering unit in response to the event triggering request, including: the second event triggering unit sends the event response signal to the first event triggering unit through the second control signal line in the target control signal line in response to the event triggering request.

[0053] In a specific implementation, the method further includes: the first event triggering unit stops sending the event triggering request to the second event triggering unit in response to the event response signal.

[0054] In a specific implementation, the method further includes: the second event triggering unit stops sending the event response signal to the first event triggering unit in response to the first event triggering unit stopping sending the event triggering request.

[0055] In a specific implementation, the method further includes: the first event triggering unit sends storage information of the target data to the second event triggering unit through a data signal line between the first event triggering unit and the second event triggering unit.

[0056] In a specific implementation, the method further includes: the second event triggering unit triggers the processor of the second sub-system to acquire the target data from the shared memory according to the storage information of the target data and sends the target data to the target execution unit in the second sub-system in response to receiving the storage information of the target data, and the target data is used for the target execution unit to execute the second event.

[0057] The specific method implementation has been described in detail in the foregoing chip embodiments, and for details, reference can be made to the foregoing embodiments, which will not be described herein.

[0058] In another embodiment of the present application, an electronic device can also be provided, which can be configured with the chip provided in the embodiments of the present application. The embodiments of the present application do not limit the specific form of the electronic device, which can be a mobile phone, a computer, a smart robot, a wearable device, etc.

[0059] Figure 8 A structural schematic diagram of an electronic device according to an embodiment of the present application is shown, which can be configured with the chip provided in the embodiments of the present application, and the chip can be used to execute the control method provided in the embodiments of the present application. The specific implementation of the electronic device is not limited in the embodiments of the present application.

[0060] As shown in Figure 8 The electronic device can include a processor 602, a communications interface 604, a memory 606, and a communications bus 608.

[0061] The processor 602, the communication interface 604, and the memory 606 can communicate with each other through a communication bus 608. The communication interface 604 is configured to communicate with other electronic devices or servers. The processor 602 is configured to execute the program 610, and can execute the related steps in the above method embodiments.

[0062] Specifically, the program 610 can include program codes including computer operation instructions.

[0063] The processor 602 can be a processor CPU, or an application specific integrated circuit ASIC, or one or more integrated circuits configured to implement the embodiments of the present application. The one or more processors of the smart device can be the same type of processors, such as one or more CPUs; or can be different types of processors, such as one or more CPUs and one or more ASICs.

[0064] The memory 606 is configured to store the program 610. The memory 606 can include a high-speed RAM memory, and can also include a non-volatile memory (non-volatile memory), for example, at least one disk memory.

[0065] The program 610 can be specifically used to enable the processor 602 to perform the following operations: in an optional implementation, the program 610 is also used to enable the processor 602 to perform the specific implementation of each step in the program 610. For details, refer to the corresponding description of the corresponding steps in the above method embodiments and in the system, which will not be described here. Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the device and the module described above can refer to the corresponding process description in the foregoing method embodiments, which will not be described here.

[0066] The embodiments of the present application also provide a computer program product, including computer instructions instructing a computing device to perform operations corresponding to any of the above method embodiments. It should be noted that, according to the needs of implementation, each component / step described in the embodiments of the present application can be split into more components / steps, or two or more components / steps or parts of the operation of the components / steps can be combined into new components / steps, to achieve the purpose of the embodiments of the present application.

[0067] ​The embodiments of the present application further provide a computer readable storage medium, and the method according to the embodiments of the present application can be implemented in hardware, firmware, or as software or computer code stored in a recording medium (such as CDROM, RAM, floppy disk, hard disk or magneto-optical disk) or computer code downloaded over a network and stored in a remote recording medium or non-transitory machine readable medium and stored in a local recording medium, so that the method described herein can be processed by such software on a recording medium using a general computer, a special processor or programmable or special hardware (such as ASIC or FPGA). It can be understood that the computer, processor, microprocessor controller or programmable hardware includes a storage component (for example, RAM, ROM, flash memory, etc.) that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, processor or hardware, the method described herein is implemented. In addition, when the general computer accesses the code for implementing the method shown herein, the execution of the code will convert the general computer into a special computer for executing the method shown herein.

[0068] Those skilled in the art can appreciate that the units and method steps of the examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware or a combination of computer software and electronic hardware. Whether the functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Professionals can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of the present application.

[0069] It should be noted that in the present application, the terms "comprise", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "comprises a" does not exclude the presence of another identical element in the process, method, article or device including the element.

[0070] In addition, it should be noted that the information related to the user (including but not limited to user equipment information, user personal information, etc.) and data (including but not limited to sample data for training the model, data for analysis, stored data, displayed data, etc.) involved in the embodiments of the present application are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of related data need to comply with relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation portal for user to choose authorization or refusal.

[0071] The above-mentioned sequence numbers of the embodiments of the present application are only for description, and do not represent advantages or disadvantages of the embodiments.

[0072] The methods disclosed in the several method embodiments provided by the present application can be combined arbitrarily without conflict to obtain new method embodiments.

[0073] The features disclosed in the several product embodiments provided by the present application can be combined arbitrarily without conflict to obtain new product embodiments.

[0074] The features disclosed in the several method or device embodiments provided by the present application can be combined arbitrarily without conflict to obtain new method embodiments or device embodiments.

[0075] The above-mentioned implementation manners are only for describing the embodiments of the present application, and not for limiting the embodiments of the present application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of the present application. Therefore, all equivalent technical solutions belong to the scope of the embodiments of the present application, and the patent protection scope of the embodiments of the present application should be defined by the claims.

Claims

1. A chip, characterized by The application relates to a system comprising a plurality of subsystems, each of which comprises an event trigger unit, and the event trigger units of different subsystems are connected to each other. A first event trigger unit is used for monitoring the execution state of a first event in a first subsystem, determining a second subsystem for executing a second event when the execution state of the first event meets preset conditions, and sending an event trigger request to a second event trigger unit in the second subsystem. The first subsystem is any one of the plurality of subsystems, and the first event trigger unit is located in the first subsystem. The first event is any one of events executed in the first subsystem, and the execution sequence of the second event is after the first event. The second event trigger unit is used for triggering the second event in the second subsystem in response to the event trigger request. The second event trigger unit is also used for sending an event response signal to the first event trigger unit in response to the event trigger request, and the event response signal is used for indicating that the event trigger request has been received.

2. The chip according to claim 1, characterized in that, The event trigger units of different subsystems comprise control signal lines; different control signal lines are used for transmitting event trigger requests and event response signals corresponding to different events.

3. The chip of claim 2, wherein, The control signal lines comprise a first control signal line and a second control signal line; the first control signal line is used for transmitting the event trigger request, and the second control signal line is used for transmitting the event response signal.

4. The chip of claim 3, wherein The first event trigger unit is specifically used for:

5. The chip of claim 4, wherein, Determining a target control signal line associated with the second event from the control signal line between the first event trigger unit and the second event trigger unit; Transmitting the event trigger request to the second event trigger unit in the second subsystem through the first control signal line in the target control signal line; The second event trigger unit is specifically used for: Transmitting the event response signal to the first event trigger unit through the second control signal line in the target control signal line in response to the event trigger request. The first event trigger unit is also used for:

6. The chip of claim 2, wherein Stopping transmitting the event trigger request to the second event trigger unit in response to the event response signal; The second event trigger unit is also used for: Stopping transmitting the event response signal to the first event trigger unit in response to the first event trigger unit stopping transmitting the event trigger request. The event trigger units of different subsystems also comprise data signal lines; and the first event trigger unit is also used for:

7. The chip according to claim 3 or 4, characterized in that, Transmitting storage information of target data to the second event trigger unit through the data signal line between the first event trigger unit and the second event trigger unit; the target data is used for executing the second event in the second subsystem; and the storage information of the target data comprises address information of the target data in a shared memory and length information of the target data. The second event trigger unit is also used for:

8. The chip of claim 7, wherein, ​ In response to receiving the storage information of the target data, a processor of the second sub-system is triggered to acquire the target data from the shared memory according to the storage information of the target data, and send the target data to a target execution unit in the second sub-system, the target data being used by the target execution unit to execute the second event.

9. A control method characterized by, The application is applied to the chip of any one of claims 1-8; the method comprises: A first event trigger unit monitors an execution state of a first event in a first sub-system; after the execution state of the first event meets a preset condition, a second sub-system used for executing a second event is determined, and an event trigger request is sent to a second event trigger unit in the second sub-system; the first sub-system is any one of the plurality of sub-systems, and the first event trigger unit is located in the first sub-system; the first event is any one of events executed in the first sub-system, and the execution sequence of the second event is after the first event; The second event trigger unit triggers the second event in the second sub-system in response to the event trigger request.

10. An electronic device, comprising: The application comprises: The chip of any one of claims 1-8.

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