Control method and control circuit of power factor correction circuit

Abstract

The invention discloses a control method and a control circuit of a power factor correction circuit. The control method of the power factor correction circuit comprises the following steps. Judging whether a recoverable protection action occurs or stops; accumulating a count value during the execution period of the recoverable protection action; when the recoverable protection action is stopped, a discharge current of an output capacitor of the power factor correction circuit is analyzed at least according to the count value. And updating an output voltage controller according to the discharge current.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a control method and a control circuit of an electronic component, and particularly relates to a control method and a control circuit of a power factor correction circuit. BACKGROUND

[0002] Power supply devices used in various electronic systems usually use 110V / 220V alternating current, but due to the non-linear characteristics of the rectifier, the output voltage (Vbus) and the input current are unstable, which can cause damage to electrical equipment, reduce power efficiency, and waste energy. Power factor correction circuits (PFC) can improve power conversion efficiency and reduce damage to public power supply networks and equipment. Therefore, power factor correction circuits have been widely used in electronic systems.

[0003] However, when the load changes, the output voltage of the power factor correction circuit often fluctuates severely and takes a long time to recover to stable state, which can cause serious damage to the electronic system. Researchers are working to find the cause and solution. SUMMARY

[0004] The present disclosure relates to a control method and a control circuit of an electronic component, and particularly relates to a control method and a control circuit of a power factor correction circuit.

[0005] According to an aspect of the present disclosure, a control method of a power factor correction (PFC) circuit is provided. The control method of the power factor correction circuit includes the following steps. It is determined whether a recoverability protection action occurs or stops. During the execution of the recoverability protection action, a count value is accumulated. When the recoverability protection action stops, at least according to the count value, a discharge current of an output capacitor of the power factor correction circuit is analyzed. An output voltage controller is updated according to the discharge current.

[0006] According to another aspect of the present disclosure, a control circuit of a power factor correction circuit is provided. The control circuit of the power factor correction circuit includes a protection judging unit, a counting unit, an analyzing unit and an updating unit. The protection judging unit is configured to judge whether a recoverable protection action is performed or stopped. The counting unit is configured to accumulate a counting value during the execution of the recoverable protection action. The analyzing unit is configured to analyze a discharging current of an output capacitor of the power factor correction circuit according to at least the counting value when the recoverable protection action is stopped. The updating unit is configured to update an output voltage controller according to the discharging current.

[0007] According to another aspect of the present disclosure, a control circuit of a power factor correction circuit is provided. The control circuit of the power factor correction circuit includes a protection judging unit, a counting unit, an analyzing unit and an updating unit. The protection judging unit is configured to judge whether a recoverable protection action is performed or stopped. The counting unit is configured to accumulate a counting value during the execution of the recoverable protection action. The analyzing unit is configured to analyze a discharging current of an output capacitor of the power factor correction circuit according to at least the counting value when the recoverable protection action is stopped. The updating unit is configured to update an output voltage controller according to the discharging current.

[0008] For better understanding of the above and other aspects of the present disclosure, examples are hereinafter described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1 A circuit diagram of a power factor correction (PFC) circuit according to an embodiment is shown.

[0010] Figure 2 An example of a load current change of a power factor correction circuit according to an embodiment of the present disclosure is shown.

[0011] Figure 3 An example of a load current change of a power factor correction circuit according to an embodiment of the present disclosure is shown.

[0012] Figure 4 A block diagram of a power factor correction circuit and a control circuit thereof according to an embodiment is shown.

[0013] Figure 5 A flowchart of a control method of a power factor correction circuit is shown.

[0014] Figure 6 A detailed flowchart of step S160 according to an embodiment of the present disclosure is shown.

[0015] Figure 7An example illustrates a case where the load current of the power factor correction circuit is changed from 10A to 1A under the control of the control circuit.

[0016] Figure 8 An example illustrates a case where the load current of the power factor correction circuit is changed from 15A to 1A under the control of the control circuit.

[0017] Wherein, the reference signs:

[0018] 100: control circuit

[0019] 110: protection determination unit

[0020] 120: current detection unit

[0021] 130: counting unit

[0022] 140: flag management unit

[0023] 160: analysis unit

[0024] 170: update unit

[0025] 900: power factor correction circuit

[0026] ACV1: power supply

[0027] C1: output capacitor

[0028] C11, C12, C13, C14, C21, C22, C23, C24, C31, C32, C33, C34, C41, C42, C43, C44: curve

[0029] C_bulk: output capacitor value

[0030] CT: count value

[0031] CTR: voltage controller

[0032] CY: switching period

[0033] FG: flag

[0034] Ibus: load current

[0035] I_Cdis: discharge current

[0036] I_L: inductance current

[0037] L1: inductance

[0038] LD1: load

[0039] PT: recoverability protection action

[0040] Q1, Q2, Q3, Q4: switching element

[0041] S110, S120, S130, S140, S150, S160, S161, S162, S163, S164, S170, S180: step

[0042] S_CTR: voltage controller signal

[0043] S_PWM: pulse width modulation signal

[0044] T11, T12, T21, T22, T23, T24, T31, T32, T41, T42: time point

[0045] TM: protection time length

[0046] Vbus: output voltage

[0047] ΔVbus: output voltage variation DETAILED DESCRIPTION

[0048] The technical terms in the present specification are in reference to the conventional terms in the technical field, and the interpretation of the terms in the present specification is in accordance with the description or definition in the present specification. Each of the embodiments of the present disclosure has one or more technical features. Those with ordinary knowledge in the technical field can selectively implement some or all of the technical features in any of the embodiments, or selectively combine some or all of the technical features in the embodiments, under the premise of possible implementation.

[0049] Please refer to Figure 1 , which illustrates a circuit diagram of a power factor correction circuit (PFC) 900 according to an embodiment. The power factor correction circuit 900 is, for example, but not limited to, a totem-pole PFC. The power factor correction circuit 900 includes a power source ACV1, an inductor L1, four switching elements Q1, Q2, Q3, Q4, an output capacitor C1, and a load LD1. The inductor L1 is connected in series to the power source ACV1. The switching element Q1 is connected in series to the switching element Q2, and the switching element Q3 is connected in series to the switching element Q4. One end of the inductor L1 is connected between the switching element Q1 and the switching element Q2, and one end of the power source ACV1 is connected between the switching element Q3 and the switching element Q4. The series-connected switching elements Q1 and Q2 are connected in parallel to the series-connected switching elements Q3 and Q4. The output capacitor C1 is connected in parallel to the series-connected switching elements Q3 and Q4. The load LD1 is connected in parallel to the output capacitor C1. There is an output voltage Vbus and an output current Ibus at the output end of the power factor correction circuit 900.

[0050] Referring to Figure 2 , an example of a load current Ibus change from 10A to 1A of the power factor correction circuit 900 of an embodiment of the present disclosure is illustrated. Curve C11 is a pulse width modulation curve, curve C12 is an output voltage controller control curve, curve C13 is a load current curve, and curve C14 is an output voltage curve.

[0051] At time point T11, the load current Ibus decreases from 10A to 1A. At this time, because the voltage controller signal S_CTR is not modulated in time, the output voltage Vbus will start to rise from an ideal voltage (for example, but not limited to, 400V) and even overshoot to a protection voltage (for example, but not limited to, 430V), which will trigger a recoverable protection action PT. The recoverable protection action PT is, for example, but not limited to, a cycle-by-cycle protection (CBC protection).

[0052] When the recoverable protection action PT occurs, the pulse width modulation signal S_PWM will be turned off, and the output voltage Vbus will gradually decrease.

[0053] At time point T12, when the output voltage Vbus decreases to the ideal voltage, the pulse width modulation signal S_PWM will be restarted. Because the voltage controller signal S_CTR is not modulated in time, the output voltage Vbus will rise again, which will result in poor voltage stabilization effect of the output voltage Vbus during the transient period.

[0054] Referring to Figure 3 , an example of a load current Ibus change from 15A to 1A of the power factor correction circuit 900 of an embodiment of the present disclosure is illustrated. Curve C21 is a pulse width modulation curve, curve C22 is an output voltage controller control curve, curve C23 is a load current curve, and curve C24 is an output voltage curve.

[0055] At time point T21, the load current Ibus decreases from 15A to 1A. At this time, because the voltage controller signal S_CTR is not modulated in time, the output voltage Vbus will start to rise from an ideal voltage (for example, but not limited to, 400V) and even overshoot to a protection voltage (for example, but not limited to, 430V), which will trigger a recoverable protection action PT.

[0056] When the recoverable protection action PT occurs, the pulse width modulation signal S_PWM will be turned off, and the output voltage Vbus will gradually decrease.

[0057] At time point T22, when the output voltage Vbus drops to the ideal voltage, the pulse width modulation signal S_PWM will restart. Since the output voltage controller signal S_CTR is not immediately and correctly modulated, the output voltage Vbus will rise again, which may trigger the recoverable protection action PT again at time point T23, so that the output voltage Vbus is not well regulated during the transient state.

[0058] At time point T24, when the output voltage Vbus drops to the ideal voltage, the pulse width modulation signal S_PWM will restart. Since the output voltage controller signal S_CTR is still not immediately and correctly modulated, the output voltage Vbus will rise again, which may trigger the recoverable protection action PT again at time point T23, so that the output voltage Vbus is not well regulated during the transient state.

[0059] The researchers found that the main reason for the poor regulation of the output voltage Vbus during the transient state is that the output voltage controller signal S_CTR is not immediately and correctly modulated. Therefore, the control method and control circuit 100 of the power factor correction circuit 900 are proposed. Please refer to Figure 4 and Figure 5 , Figure 4 a block diagram of the power factor correction circuit 900 and its control circuit 100 according to an embodiment is shown, Figure 5 a flowchart of the control method of the power factor correction circuit 900 is shown. The control circuit 100 includes a protection judgment unit 110, a current detection unit 120, a counting unit 130, a flag management unit 140, an analysis unit 160, and an updating unit 170. The control circuit 100 is, for example, a chip or firmware inside a digital signal processor. The protection judgment unit 110, the current detection unit 120, the counting unit 130, the flag management unit 140, the analysis unit 160, and the updating unit 170 are, for example, circuits or firmware. In this embodiment, the control circuit 100 can obtain the appropriate modulation amount of the output voltage controller signal S_CTR through analysis and processing procedures, so that the output voltage controller signal S_CTR can be immediately and correctly modulated, the fluctuation of the output voltage Vbus during the transient state is reduced, and the time for the output voltage Vbus to return to the steady state from the transient state is shortened.

[0060] As shown in Figure 5 , in step S110, the protection judgment unit 110 judges whether the recoverable protection action PT is triggered or stopped. If the recoverable protection action PT is triggered, go to step S120; if the recoverable protection action PT is stopped, go to step S150.

[0061] In step S120, the current detection unit 120 judges whether the inductor current I_L is reduced to 0. This step is used to confirm whether the switching element Q1 is completely turned off. If the inductor current I_L is reduced to 0, go to step S130.

[0062] In step S130, the counting unit 130 accumulates a count value CT during an execution period of the reversible protection action PT.

[0063] Next, in step S140, the flag management unit 140 sets a flag FG to a first preset value (e.g., "1"). Flag FG may be preset to a second preset value (e.g., "0"). Once flag FG is found to be the first preset value, it indicates that a reversible protection action PT has been performed and the protection duration TM has been obtained. In one embodiment, step S140 can be omitted and implemented using other process designs.

[0064] like Figure 5 As shown, when the reversible protection action PT stops, the process proceeds to step S150. In step S150, the flag management unit 140 determines whether the flag FG is the first preset value. If the flag is the first preset value, the process proceeds to step S160. Once the flag FG is found to be the first preset value, it indicates that the reversible protection action PT has just been executed and the protection time length TM has been obtained.

[0065] In step S160, the analysis unit 160 analyzes the discharge current I_Cdis of the output capacitor C1 of the power factor correction circuit 900. Please refer to... Figure 6 The diagram illustrates a detailed flowchart of step S160 according to an embodiment of the present disclosure. Step S160 includes steps S161 to S164. In step S161, the analysis unit 160 obtains the protection time length TM based on the product of the count value CT and all switching cycles CY of the pulse width modulation signal S_PWM. That is, the protection time length TM can be obtained according to the following formula (1).

[0066] Protection duration TM = Count value CT * Switching cycle CY……………(1)

[0067] Then, in step S162, the analysis unit 160 obtains the output voltage change ΔVbus of the reversible protection action PT.

[0068] Next, in step S163, the analysis unit 160 obtains the ratio of the output voltage change ΔVbus to the protection time length TM.

[0069] Then, in step S164, the analysis unit 160 obtains the discharge current I_Cdis based on the product of the output capacitance value C_bulk of the output capacitor C1 and the ratio. That is, the discharge current I_Cdis can be obtained according to the following formula (2).

[0070]

[0071] Next, inFigure 5 In step S170, the update unit 170 updates the output voltage controller CTR according to the discharge current I_Cdis. In this step, the integral term of the voltage controller signal S_CTR of the voltage controller CTR is directly set to the discharge current I_Cdis, so that the voltage controller signal S_CTR can be immediately and correctly regulated, reduce the fluctuation of the output voltage Vbus (shown in Figure 1 ) during the transient state, and shorten the time for the output voltage Vbus to return from the transient state to the steady state.

[0072] Then, in step S180, the flag management unit 140 sets the flag FG to a second preset value (for example, "0").

[0073] Please refer to Figure 7 , which illustrates the change of the load current Ibus of the power factor correction circuit 900 from 10A to 1A under the control of the control circuit 100 according to an embodiment of the present disclosure. Curve C31 is a pulse width modulation curve, curve C32 is an output voltage controller control curve, curve C33 is a load current curve, and curve C34 is an output voltage curve.

[0074] At time point T31, the load current Ibus decreases from 10A to 1A. At this time, because the voltage controller signal S_CTR is still being regulated, the output voltage Vbus will start to suddenly rise from the ideal voltage (for example, but not limited to, 400V), and even overshoot to a protection voltage (for example, but not limited to, 430V), which will trigger a recoverable protection action PT.

[0075] When the recoverable protection action PT occurs, the pulse width modulation signal S_PWM will be turned off, and the output voltage Vbus will gradually decrease.

[0076] At time point T32, when the output voltage Vbus decreases to the ideal voltage, the pulse width modulation signal S_PWM will be restarted. At this time, the control circuit 100 correctly regulates the voltage controller signal S_CTR, so that the output voltage Vbus will not rise again, effectively improving the voltage stabilization effect of the output voltage Vbus during the transient state.

[0077] Please refer to Figure 8 , which illustrates the change of the load current Ibus of the power factor correction circuit 900 from 15A to 1A under the control of the control circuit 100 according to an embodiment of the present disclosure. Curve C41 is a pulse width modulation curve, curve C42 is an output voltage controller control curve, curve C43 is a load current curve, and curve C44 is an output voltage curve.

[0078] At time point T41, the load current Ibus decreases from 15A to 1A. At this time, because the voltage controller signal S_CTR is still modulated, the output voltage Vbus will start to rise from the ideal voltage (for example, but not limited to, 400V) and even overshoot to a protection voltage (for example, but not limited to, 430V), which will trigger a recoverability protection action PT.

[0079] When the recoverability protection action PT occurs, the pulse width modulation signal S_PWM will be turned off, and the output voltage Vbus will gradually decrease.

[0080] At time point T42, when the output voltage Vbus decreases to the ideal voltage, the pulse width modulation signal S_PWM will be restarted. At this time, the control circuit 100 correctly modulates the voltage controller signal S_CTR, so that the output voltage Vbus will not rise again, effectively improving the voltage stabilization effect of the output voltage Vbus during the transient state.

[0081] According to the above-mentioned embodiments, the control method and the control circuit 100 of the power factor correction circuit 900 can obtain the appropriate modulation amount of the voltage controller signal S_CTR through analysis and processing procedures, to provide a control mechanism that quickly restores the output voltage Vbus of the power factor correction circuit to the steady state in response to instantaneous load changes, reduces the fluctuation of the output voltage Vbus during the transient state, and shortens the time for the output voltage Vbus to return to the steady state from the transient state.

[0082] The above disclosure provides different features for implementing some embodiments or examples of the present disclosure. The specific examples of the above-described components and configurations (such as the mentioned numerical values or names) are to simplify / suggest some embodiments of the present disclosure. Of course, such components and configurations are only examples and are not intended to be limiting. In addition, some embodiments of the present disclosure can refer to the same reference signs and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0083] In summary, although the present disclosure has been disclosed as above with examples, it is not intended to limit the present disclosure. Those skilled in the art without departing from the spirit and scope of the present disclosure can make various modifications and improvements. Therefore, the protection scope of the present disclosure shall be subject to the appended claims.

Claims

1. A control method of a power factor correction circuit, characterized by, The control method comprises: determining whether a recoverable protection action occurs or stops; accumulating a count value during execution of the recoverable protection action; analyzing a discharge current of an output capacitor of the power factor correction circuit according to at least the count value when the recoverable protection action stops; and updating an output voltage controller according to the discharge current.

2. The control method of the power factor correction circuit according to claim 1, characterized by, The recoverable protection action is a cycle-by-cycle protection action.

3. The control method of the power factor correction circuit according to claim 1, wherein, The control method further comprises: determining whether an inductor current decreases to 0; The count value of the recoverable protection action is accumulated from a time point when the inductor current decreases to 0.

4. The control method of the power factor correction circuit according to claim 1, wherein, After the protection time length is obtained, the control method further comprises: setting a flag to a first preset value; The step of analyzing the discharge current is performed when the recoverable protection action stops and the flag is the first preset value.

5. The control method of the power factor correction circuit according to claim 4, wherein After the step of updating the output voltage controller according to the discharge current, the control method further comprises: setting the flag to a second preset value.

6. The control method of the power factor correction circuit according to claim 1, wherein In the step of analyzing the discharge current of the output capacitor of the power factor correction circuit, obtaining a protection time length according to a product of the count value and a switching period of a pulse width modulation signal; obtaining an output voltage variation of the recoverable protection action; obtaining a ratio of the output voltage variation and the protection time length; and obtaining the discharge current according to a product of an output capacitance value of the output capacitor and the ratio. The control method comprises:

7. A control circuit for a power factor correction circuit, characterized by a protection determining unit configured to determine whether a recoverable protection action occurs or stops; a counting unit configured to accumulate a count value during execution of the recoverable protection action; an analyzing unit configured to analyze a discharge current of an output capacitor of the power factor correction circuit according to at least the count value when the recoverable protection action stops; and an updating unit configured to update an output voltage controller according to the discharge current. The recoverable protection action is a cycle-by-cycle protection action. The control method further comprises:

8. The control circuit of the power factor correction circuit as claimed in claim 7, characterized in that, a current detecting unit configured to detect whether an inductor current decreases to 0; 9. The control circuit of the power factor correction circuit as claimed in claim 7, characterized in that, The counting unit is configured to accumulate the count value from a time point when the inductor current decreases to 0. The control method further comprises: a flag managing unit configured to set a flag to a first preset value when the recoverable protection action occurs; 10. The control circuit for a power factor correction circuit of claim 7, wherein, The analyzing unit is configured to analyze the discharge current when the recoverable protection action stops and the flag is the first preset value. The flag managing unit is further configured to set the flag to a second preset value after the updating unit updates the output voltage controller according to the discharge current. The analyzing unit is configured to obtain a protection time length according to a product of the count value and a switching period of a pulse width modulation signal, and to obtain an output voltage variation of the recoverable protection action, and to calculate a ratio of the output voltage variation and the protection time length, and to obtain the discharge current according to a product of an output capacitance value of the output capacitor and the ratio.

11. The control circuit for a power factor correction circuit of claim 10, wherein, The control circuit is connected to the power factor correction circuit, and the control circuit is configured to execute a control method of the power factor correction circuit, and the control method comprises:

12. The control circuit of the power factor correction circuit of claim 7, wherein, ​ 13. A control circuit for a power factor correction circuit, characterized by ​ determining whether a recoverable protection action occurs or stops; accumulating a count value during execution of the recoverable protection action; analyzing a discharge current of an output capacitor of the power factor correction circuit according to at least the count value when the recoverable protection action stops; and updating an output voltage controller according to the discharge current.

14. The control circuit of the power factor correction circuit of claim 13, wherein, wherein the recoverable protection action is a cycle-by-cycle protection action.

15. The control circuit for a power factor correction circuit of claim 13, wherein, wherein the control method further comprises: determining whether an inductor current falls to 0; wherein the count value of the recoverable protection action is accumulated from a time point when the inductor current falls to 0.

16. The control circuit for a power factor correction circuit of claim 13, wherein, wherein after obtaining the protection time length, the control method further comprises: setting a flag to a first preset value; wherein the step of analyzing the discharge current is performed when the recoverable protection action stops and the flag is the first preset value.

17. The control circuit for a power factor correction circuit of claim 16, wherein, wherein after the step of updating the output voltage controller according to the discharge current, the control method further comprises: setting the flag to a second preset value.

18. The control circuit for a power factor correction circuit of claim 13, wherein, wherein the step of analyzing the discharge current of the output capacitor of the power factor correction circuit comprises: obtaining a protection time length according to a product of the count value and a switching period of a pulse width modulation signal; obtaining an output voltage variation of the recoverable protection action; obtaining a ratio of the output voltage variation and the protection time length; and obtaining the discharge current according to a product of an output capacitance value of the output capacitor and the ratio.

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