Power device with conduction voltage drop in positive temperature coefficient and manufacturing method thereof

Abstract

The invention discloses a power device with conduction voltage drop in a positive temperature coefficient and a manufacturing method thereof. The manufacturing method comprises the following steps: epitaxially growing a first N-type epitaxial layer on an N-type substrate; performing injection on the surface of the first N-type epitaxial layer to form a plurality of P-type reversal regions which are distributed at intervals; epitaxially growing a second N-type epitaxial layer on the first N-type epitaxial layer; and completing the subsequent manufacturing process of the device. According to the invention, a plurality of relatively thick p-type doped P-type reversal regions distributed at intervals are formed in the temperature coefficient reversal region, so that the positive temperature coefficient of the conduction voltage drop of the device can be improved, and the manufacturing cost of the device is reduced.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of power semiconductor devices, and particularly relates to a power device with positive temperature coefficient of on-state voltage drop and a manufacturing method thereof. BACKGROUND

[0002] For a bipolar device such as a fast recovery diode (FRD), the current is transported by both types of carriers (electrons and holes) when the device is on. A large number of minority carriers (e.g. electrons in the P region, holes in the N region) are injected into the semiconductor region. These minority carriers make the device have a very low forward voltage drop when it is on in the forward direction, which is an advantage.

[0003] However, the above power device usually has a negative temperature coefficient. If a device has a negative temperature coefficient (i.e. as the temperature rises, the forward voltage drop decreases), when the temperature of the device is slightly higher for some reason, its forward voltage drop will become lower, thereby causing it to share more current. More current will further raise its temperature, which in turn makes its voltage drop lower and its current larger, thereby forming a positive feedback, which may eventually cause the diode to burn out due to overheating. Therefore, it is necessary to reverse the negative temperature coefficient of the fast recovery diode, so that the fast recovery diode has a positive temperature coefficient or is close to zero temperature coefficient. A device with a positive temperature coefficient (i.e. as the temperature rises, the forward voltage drop rises) has self-current sharing capability when it is in parallel, and a device with a high temperature will automatically give up part of the current due to the rise in voltage drop, so that the current is transferred to a device with a lower temperature, thereby achieving stable current sharing.

[0004] However, for the above power device, the existing method has the problems of less obvious reversal of the temperature coefficient of the on-state voltage drop and high manufacturing cost when reversing the negative temperature coefficient. SUMMARY

[0005] In view of the above problems of the prior art, the present application aims to provide a power device with positive temperature coefficient of on-state voltage drop and a manufacturing method thereof.

[0006] To solve the above technical problems, the present application provides the following technical solutions. A manufacturing method of a power device with positive temperature coefficient of on-state voltage drop, comprising the following steps: S100, taking an N-type substrate; S200, epitaxially growing a first N-type epitaxial layer on the N-type substrate; S300, injecting a plurality of P-type reversal regions spaced apart on the surface of the first N-type epitaxial layer; the region where the plurality of P-type reversal regions are located forms a temperature coefficient reversal region; S400, epitaxially growing a second N-type epitaxial layer on the first N-type epitaxial layer; S500, completing a subsequent manufacturing process of the device.

[0007] Further, the method for forming the plurality of P-type reverse regions on the surface of the first N-type epitaxial layer comprises the following sub-steps: S310, coating photoresist on the surface of the first N-type epitaxial layer, and photoetching a pattern of the P-type reverse region; S320, performing P-type doping implantation on the first N-type epitaxial layer at positions where the temperature coefficient reverse region is expected to be formed, and the implanted regions are spaced apart; S330, removing the remaining photoresist on the surface of the first N-type epitaxial layer; S340, forming the P-type reverse region by annealing treatment on the implanted region of the P-type doping; S350, performing surface cleaning.

[0008] Further, the P-type doping implantation is performed by using boron ions.

[0009] Further, the doping concentration of the N-type substrate is 3E14atoms / cm 3 ~ 3E20atoms / cm 3 ; the doping concentration of the first N-type epitaxial layer and the second N-type epitaxial layer is 1E13atoms / cm 3 ~ 3E17atoms / cm 3 ; and the doping concentration of the P-type reverse region is 1E13atoms / cm 3 ~ 3E18atoms / cm 3 .

[0010] Further, the acceptor impurity concentration of the P-type reverse region is 1~1000 times of the donor impurity concentration of the first N-type epitaxial layer.

[0011] Further, the power device is an FRD device, and the subsequent manufacturing process of the device comprises the following sub-steps: S510, implanting to form a P-type anode region on the surface of the second N-type epitaxial layer; S520, thinning the N-type substrate, and the remaining N-type substrate forms an N-type cathode region.

[0012] Further, a region between the P-type anode region and the N-type cathode region forms an N-type drift region, and the distance between the temperature coefficient reverse region and the N-type cathode region is greater than or equal to 1 / 5 of the height of the N-type drift region, and less than or equal to 4 / 5 of the height of the N-type drift region.

[0013] Further, the width of the P-type reverse region is 0.2-10 μm, the interval between two adjacent P-type reverse regions is 1-40 μm, the length of the P-type reverse region is greater than or equal to its width, and the depth of the P-type reverse region is 0.1-100 μm.

[0014] Further, the P-type reverse region extends outward from the active region of the die at the projection area of the corresponding section of the P-type reverse region.

[0015] The power device with positive temperature coefficient of on-state voltage drop is manufactured by the method for manufacturing the power device with positive temperature coefficient of on-state voltage drop.

[0016] In the present application, the positive temperature coefficient of on-state voltage drop of the device can be improved by forming a plurality of P-type reverse regions with relatively high p-type doping at intervals in the temperature coefficient reverse region, and keeping a certain distance between the temperature coefficient reverse region and the N-type cathode region of the device; the doping concentration and depth of the temperature coefficient reverse region can be reduced under the same conditions, the number of layers and the area ratio of the temperature coefficient reverse region can be reduced, and the manufacturing cost of the device can be reduced. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and serve to explain the principles of the application, and do not limit the application in any way. In the drawings: Figure 1 The schematic diagram of the doping concentration of the FRD device with an additional p-type region in the cathode.

[0018] Figure 2 The schematic diagram of the doping concentration of the FRD device with a plurality of thin layers with high doping concentration in the n-type drift region.

[0019] Figure 3 The flow chart of the embodiment of the method for manufacturing the power device with positive temperature coefficient of on-state voltage drop.

[0020] Figure 4 The structural schematic diagram of the FRD device manufactured by the method of the embodiment.

[0021] Figure 5 The structural schematic diagram of the first N-type epitaxial layer grown by epitaxy on the N-type substrate.

[0022] Figure 6 The structural schematic diagram after the pattern of the P-type reverse region is photoetched on the surface of the first N-type epitaxial layer.

[0023] Figure 7 The structural schematic diagram after a plurality of P-type reverse regions are formed at intervals.

[0024] Figure 8 is a top view of the P-type reverse region.

[0025] Figure 9 is a schematic diagram of the structure after epitaxially growing a second N-type epitaxial layer.

[0026] Figure 10 is a schematic diagram of the structure after implantation to form a P-type anode region.

[0027] Figure 11 is a schematic diagram of the structure after thinning the N-type substrate.

[0028] Figure 12 is a schematic diagram of the doping concentration of the FRD device formed in this embodiment.

[0029] The description of the drawings is as follows: N-type cathode region-1; P-type anode region-2; N-type drift region-3; temperature coefficient reverse region-4; P-type reverse region-5; N-type reverse region-6; photoresist-7; N-type substrate-100; first N-type epitaxial layer-110; second N-type epitaxial layer-120. DETAILED DESCRIPTION

[0030] The embodiments of the present application will be described below through specific concrete examples, and the diagrams provided in the following examples only schematically illustrate the basic concept of the present application, and the following examples and features in the examples can be combined with each other without conflict.

[0031] It is very important for the on-state voltage drop (or on-state resistance) of a power device to present a positive temperature coefficient. If the on-state voltage drop of a device decreases with the increase of the temperature of the device, i.e., the on-state voltage drop of the device presents a negative temperature coefficient, it means that the same current will flow through the device at a lower voltage when the temperature rises. For a bipolar device such as an FRD and a gate-controlled device at a lower gate-source voltage (absolute value), a greater current will flow through the device when the voltage across the device remains unchanged. The general working junction temperature of a power device is not very low, and when the temperature rises under similar working conditions, the device will have a greater thermal power due to the negative temperature coefficient of the on-state voltage drop of the device. If the working of the device under similar working conditions continues, the temperature of the device will continue to rise until it exceeds the upper limit allowed by the junction temperature of the device and the device fails. Therefore, it is generally required that the on-state voltage drop of the device presents a positive temperature coefficient or a temperature coefficient close to zero.

[0032] For the gate-controlled device, the carrier concentration increases obviously due to the thermal excitation of intrinsic carriers when the temperature rises, the absolute value of VTH decreases, and the channel resistance decreases at a lower gate-source voltage (absolute value). The resistance of the p-type region and the n-type region increases due to the increase of carrier scattering. Therefore, when the gate-source voltage (absolute value) is low to a certain extent, the channel resistance accounts for a larger proportion, and the on-resistance and on-voltage drop of the gate-controlled device also exhibit a negative temperature coefficient. However, because the on-resistance of the device is large, the current flowing through the device is relatively small, and the voltage across the device is small, thermal runaway is generally not caused. However, if the device is not turned off quickly enough, there is a certain risk of thermal runaway. When the gate-source voltage (absolute value) exceeds a certain value, the proportion of channel resistance is low enough, and the on-resistance and on-voltage drop of the gate-controlled device often exhibit a positive temperature coefficient.

[0033] However, for devices that rely on the carrier injection-induced conductance modulation effect to greatly reduce the on-resistance, the increase in the thermal excitation of intrinsic carriers due to the temperature rise causes the corresponding carriers and their injection to also increase significantly, thereby causing the on-resistance of such devices to generally exhibit a negative temperature coefficient, increasing the risk of thermal runaway and the difficulty of application. Therefore, devices with positive temperature coefficients or near-zero temperature coefficients of on-resistance and on-voltage drop are more favored by application ends, and the technology that reverses the negative temperature coefficient of the on-resistance and on-voltage drop of the device to a positive temperature coefficient and its advantages and disadvantages are very important.

[0034] For the FRD device of the bipolar device, the common distribution of the carrier concentration in the depth direction of the device in the prior art is Figure 1 and Figure 2 . Figure 1 The structure shown in the on-voltage drop temperature coefficient reversal structure reverses the structure, the core of which is to make a p-type region on the cathode of the FRD device (in the direction from the anode to the cathode, the gradual increase of the n-type doping concentration causes the hole potential energy on the valence band to gradually increase in this direction, which also has a certain effect), so that the n-type region near the cathode is depleted to form a positive ion region, which blocks the holes among the carriers generated by thermal excitation from flowing towards the cathode by the electric field generated by the positive ion region. When the temperature rises, the carrier concentration generated by thermal excitation increases, the net recombination rate of non-equilibrium carriers increases, the minority carrier lifetime decreases, the depletion layer near the pn junction widens, the self-built electric field of the pn junction strengthens, and the blocking of the directional movement of the carriers generated by thermal excitation increases. When the blocking is greater than the increase of the diffusion current of the pn junction caused by the thermal excitation of intrinsic carriers, the on-voltage drop of the device exhibits a positive temperature coefficient.

[0035] Figure 1The disadvantage of the reverse structure is that the positive center which blocks the directional movement of the carriers generated by thermal excitation is too close to the cathode of the FRD device, and the N-type drift region 3 is still directly affected by the electric conduction modulation during the conduction of the FRD device. The resistance of the part of the region is still affected by the injection of the holes in the carriers generated by thermal excitation when the temperature rises, so that the reverse of the temperature coefficient of the on-voltage drop is not obvious or not enough.

[0036] Figure 2 The core of the on-voltage drop temperature coefficient reverse technology is to form a number of thin layers with high doping concentration in the n-type region, and to form a region with high hole potential on the positive center or valence band due to the diffusion of carriers, so as to block the flow of holes in the carriers generated by thermal excitation to the cathode. When the temperature rises, the concentration of the carriers generated by thermal excitation increases, so that the minority carrier lifetime decreases, the probability of recombination of the majority carrier increases, the positive center widens or the hole potential on the valence band increases, and the blockage of the directional movement of the carriers generated by thermal excitation increases. When the blockage is greater than the increase of the diffusion current of the pn junction caused by the thermal excitation of the intrinsic carriers, the on-voltage drop of the device shows a positive temperature coefficient.

[0037] Figure 2 The disadvantage of the reverse structure is that although there is a concentration difference between the temperature coefficient reverse region 4 and the surrounding region, compared with the pn junction structure, the charge density of the positive center which blocks the directional movement of the carriers generated by thermal excitation is still not high enough in the n-type region. Therefore, in order to make the temperature coefficient of the on-voltage drop of the device reverse obviously, it is still necessary to grow multiple temperature coefficient reverse regions 4 by epitaxy, which makes the wafer manufacturing cost higher. Figure 1

[0038] Of course, the same situation also exists for bipolar devices similar to FRD devices and gate-controlled devices with lower gate-source voltage (absolute value).

[0039] Please refer to Figure 3 and Figure 4 , Figure 3 is a flow chart of an embodiment of the method for manufacturing a power device with a positive temperature coefficient of on-voltage drop, Figure 4 is a structural schematic diagram of an FRD device formed by the method of the embodiment. The method for manufacturing a power device with a positive temperature coefficient of on-voltage drop of the embodiment includes the following steps: S100, take an N-type substrate 100. The doping concentration of the N-type substrate 100 is generally 3E14atoms / cm 3 ~ 3E20atoms / cm 3 .

[0040] S200, please refer to Figure 5 ​A first N-type epitaxial layer 110 is epitaxially grown on the N-type substrate 100. The doping concentration of the first N-type epitaxial layer 110 is generally 1E13 atoms / cm 3 ~ 3E17 atoms / cm 3 The doping concentration of the first N-type epitaxial layer 110 is less than that of the N-type substrate 100.

[0041] S300, a plurality of P-type reverse regions 5 are formed by implantation on the surface of the first N-type epitaxial layer 110. The area where the plurality of P-type reverse regions 5 are located forms a temperature coefficient reverse region 4. Specifically, the area between adjacent P-type reverse regions 5 can be defined as an N-type reverse region 6, and the area where the P-type reverse region 5 and the N-type reverse region 6 are located is the temperature coefficient reverse region 4.

[0042] The method of forming a plurality of P-type reverse regions 5 by implantation on the surface of the first N-type epitaxial layer 110 can include the following sub-steps: S310, referring to Figure 6 Photoresist 7 is coated on the surface of the first N-type epitaxial layer 110, and the pattern of the P-type reverse region 5 is photolithographed by exposure and development processes.

[0043] S320, P-type doping implantation is performed at the position where the temperature coefficient reverse region 4 is expected to be formed on the first N-type epitaxial layer 110, and the implanted regions are spaced apart. Of course, baking is generally performed before P-type doping implantation. Boron ions can be used for P-type doping implantation; of course, other acceptor impurity ions can also be used for P-type doping implantation.

[0044] S330, the remaining photoresist 7 on the surface of the first N-type epitaxial layer 110 is removed.

[0045] S340, referring to Figure 7 and Figure 8 The implanted P-type doping region forms a P-type reverse region 5 by annealing. The doping concentration of the P-type reverse region 5 is generally 1E13 atoms / cm 3 ~ 3E18 atoms / cm 3 The acceptor impurity concentration of the P-type reverse region 5 is generally 1-1000 times the donor impurity concentration of the first N-type epitaxial layer 110; preferably, the acceptor impurity concentration of the P-type reverse region 5 is 10-100 times the donor impurity concentration of the first N-type epitaxial layer 110.

[0046] The width d1 of the P-type reverse region 5 (i.e. the width of the P-type reverse region 5 in Figure 4 and Figure 8 x ​The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode. Figure 4 and Figure 8 The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode. x The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode.

[0047] The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode. Figure 4 The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode.

[0048] The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode. Figure 4 and Figure 8 The length L of the P-type reverse region 5 (i.e. the dimension of the P-type reverse region 5 in the y-axis direction) is generally greater than or equal to its width; preferably, the two ends of the P-Type reverse region 5 extend out of the projection area of the active region of the tube core in the cross section corresponding to the P-type reverse region 5. For FRD devices, the active region refers to the region that is subsequently doped p-type when forming the anode.

[0049] S350, surface cleaning of the device is performed to facilitate the next process.

[0050] S400, please refer to Figure 9 The second N-type epitaxial layer 120 is epitaxially grown on the first N-type epitaxial layer 110. The doping concentration of the second N-type epitaxial layer 120 is generally 1E13 atoms / cm 3 ~ 3E17 atoms / cm 3 . The doping concentration of the second N-type epitaxial layer 120 is less than that of the N-type substrate 100.

[0051] S500, the subsequent manufacturing process of the device is completed. For example, when the power device is an FRD device, the subsequent manufacturing process of the device can include the following sub-steps: S510, please refer to Figure 10 The P-type anode region 2 is formed by surface implantation on the second N-type epitaxial layer 120. The doping concentration of the P-type anode region 2 is generally 3E14 atoms / cm 3 ~ 3E20 atoms / cm 3 .

[0052] S520, please refer to Figure 11 The N-type substrate 100 is thinned by a back-thinning process, and the remaining N-type substrate 100 forms the N-type cathode region 1. The region between the P-type anode region 2 and the N-type cathode region 1 forms the N-type drift region 3, and the distance h2 between the temperature coefficient reverse region 4 and the N-type cathode region 1 (i.e. Figure 4The distance between the temperature coefficient reversal region 4 and the N-type cathode region 1 in the z-axis direction is generally greater than or equal to 1 / 5 of the height h3 of the N-type drift region 3 (i.e. Figure 4 The distance between the temperature coefficient reversal region 4 and the N-type cathode region 1 in the z-axis direction is generally greater than or equal to 1 / 5 of the height h3 of the N-type drift region 3 (i.e.

[0053] Of course, the power device can also be other bipolar devices similar to the FRD device or gate-controlled devices with lower gate-source voltage (absolute value). The subsequent manufacturing processes of different devices are also different, but the subsequent manufacturing processes of these devices are mature existing technologies, which will not be described here.

[0054] Please refer to Figure 12 , which is a schematic diagram of the doping concentration of the FRD device manufactured in this embodiment. Compared with the structure in Figure 1 , the positive centers that block the directional movement of holes among the carriers generated by thermal excitation in this embodiment are obviously far away from the cathode of the FRD device, and the area directly affected by the conductance modulation of the N-type drift region 3 during the conduction of the FRD device is obviously shortened. Therefore, the positive temperature coefficient of the on-state voltage drop of the device can be improved under the condition that the doping concentration and depth of the temperature coefficient reversal region 4 remain unchanged, or the doping concentration and depth of the temperature coefficient reversal region 4 can be significantly reduced under the condition that the positive temperature coefficient of the on-state voltage drop of the FRD device remains unchanged, or the area ratio of the temperature coefficient reversal region 4. Figure 2 Compared with the structure shown in , the light n-type region near the temperature coefficient reversal region 4 in this embodiment is replaced by a p-type region, and the difference in electron concentration with the adjacent n-type region is greater. Therefore, the light n-type region in the temperature coefficient reversal region 4 can have a higher positive center charge density (linear density in the depth direction) or a higher hole potential on the valence band, and thus the blocking effect on the directional movement of holes among the carriers generated by thermal excitation is greater. Therefore, the number of layers and the area ratio of the temperature coefficient reversal region 4 can be reduced, the positive temperature coefficient of the on-state voltage drop of the device can be improved under the condition that the manufacturing cost remains unchanged, or the manufacturing cost of the device wafer can be significantly reduced under the condition that the positive temperature coefficient of the on-state voltage drop of the device remains unchanged.

[0055] In this embodiment, by forming a plurality of P-type reversal regions 5 with relatively high p-type doping at intervals in the temperature coefficient reversal region 4, and maintaining a certain distance between the temperature coefficient reversal region 4 and the N-type cathode region 1 of the device, the positive temperature coefficient of the on-state voltage drop of the device can be improved. Under the same conditions, the doping concentration and depth of the temperature coefficient reversal region 4 can also be reduced, the number of layers and the area ratio of the temperature coefficient reversal region 4 can be reduced, and the manufacturing cost of the device wafer can be reduced.

[0056] The application also discloses a power device with positive temperature coefficient of on-state voltage drop, which can be manufactured by the power device with positive temperature coefficient of on-state voltage drop manufacturing method in any of the above embodiments. The power device with positive temperature coefficient of on-state voltage drop can improve the positive temperature coefficient of on-state voltage drop of the device, and has lower manufacturing cost.

[0057] The above embodiments only express the preferred embodiments of the application, which are described in detail, but cannot be understood as the limitation of the patent scope of the application. It should be pointed out that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the application, which all belong to the protection scope of the application. Therefore, the protection scope of the patent of the application should be subject to the appended claims.

Claims

1. A method of fabricating a power device with positive temperature coefficient of on-state voltage drop, comprising the steps of: The method comprises the following steps: ​ S100, taking an N-type substrate; S200, epitaxially growing a first N-type epitaxial layer on the N-type substrate; S300, implanting a plurality of P-type reverse regions on the surface of the first N-type epitaxial layer; the regions where the plurality of P-type reverse regions are located form a temperature coefficient reverse region; S400, epitaxially growing a second N-type epitaxial layer on the first N-type epitaxial layer; S500, completing subsequent manufacturing processes of the device.

2. The method for fabricating a power device with a positive temperature coefficient of conduction voltage drop as described in claim 1, characterized in that, The method for implanting a plurality of P-type reverse regions on the surface of the first N-type epitaxial layer comprises the following sub-steps: S310, coating photoresist on the surface of the first N-type epitaxial layer and photoetching a pattern of the P-type reverse regions; S320, implanting P-type doping at positions where the temperature coefficient reverse region is expected to be formed on the first N-type epitaxial layer, and the implanted regions are spaced apart; S330, removing the remaining photoresist on the surface of the first N-type epitaxial layer; S340, forming the P-type reverse regions by annealing treatment on the implanted P-type doping regions; S350, performing surface cleaning.

3. The method of claim 2, wherein: the step of forming the first and second conductive layers comprises forming the first and second conductive layers of a material having a positive temperature coefficient of resistance. The P-type doping implantation is performed by using boron ions.

4. The method of claim 1, wherein: the power device is a power MOSFET. The N-type substrate has a doping concentration of 3E14 atoms / cm 3 ~ 3E20 atoms / cm 3 ; the first and second N-type epitaxial layers have a doping concentration of 1E13 atoms / cm 3 ~ 3E17 atoms / cm 3 ; and the P-type inversion region has a doping concentration of 1E13 atoms / cm 3 ~ 3E18 atoms / cm 3 .

5. The method of claim 1, wherein: the step of forming the first and second conductive layers comprises forming the first and second conductive layers of a material having a positive temperature coefficient of resistance. The acceptor impurity concentration of the P-type reverse regions is 1-1000 times of the donor impurity concentration of the first N-type epitaxial layer.

6. The method for fabricating a power device with a positive temperature coefficient of conduction voltage drop as described in claim 1, characterized in that: The power device is an FRD device, and the subsequent manufacturing processes of the device comprise the following sub-steps: S510, implanting a P-type anode region on the surface of the second N-type epitaxial layer; S520, thinning the N-type substrate, and the remaining N-type substrate forms an N-type cathode region.

7. The method of claim 6, wherein: the step of forming the first and second conductive layers comprises forming the first and second conductive layers of a material having a positive temperature coefficient of resistance. The region between the P-type anode region and the N-type cathode region forms an N-type drift region, and the distance between the temperature coefficient reverse region and the N-type cathode region is greater than or equal to 1 / 5 of the height of the N-type drift region and less than or equal to 4 / 5 of the height of the N-type drift region.

8. The method according to any one of claims 1 to 7, wherein: the power device is a power device having a positive temperature coefficient of on-state voltage drop. The width of the P-type reverse region is 0.2-10 μm, the interval between two adjacent P-type reverse regions is 1-40 μm, the length of the P-type reverse region is greater than or equal to its width, and the depth of the P-type reverse region is 0.1-100 μm.

9. The method of claim 8, wherein: the step of forming the first and second conductive layers comprises forming the first and second conductive layers of a material having a positive temperature coefficient of resistance. The projections of the P-type reverse region on the corresponding cross sections of the die active region extend outward from both ends of the P-type reverse region.

10. A power device having a positive temperature coefficient of on-state voltage drop, characterized by: The power device with positive temperature coefficient of on-voltage is manufactured by using the manufacturing method of the power device with positive temperature coefficient of on-voltage according to any one of claims 1-9.

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