Solder ball arrangement structure and method in chip packaging substrate, chip and electronic equipment

Abstract

The embodiment of the invention discloses a solder ball arrangement structure and method in a chip packaging substrate, a chip and electronic equipment. In the solder ball arrangement structure in the chip packaging substrate, the chip packaging substrate comprises a grounding solder ball, a positive differential signal solder ball and a negative differential signal solder ball; the grounding solder ball is used for transmitting a grounding signal; the positive differential signal solder balls and the negative differential signal solder balls form differential pair signals for transmitting differential signals; in the chip packaging substrate, the solder balls adjacent to the positive differential signal solder balls are grounding solder balls or negative differential signal solder balls; the solder balls adjacent to the negative differential signal solder balls are grounding solder balls or positive differential signal solder balls. According to the chip packaging substrate, the solder balls are arranged in the mode that only the grounding solder balls or the differential signal solder balls with opposite signals are arranged beside the differential signal solder balls, a backflow path can be provided for the differential signals, crosstalk is reduced, and the signal quality is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip design, and in particular to a solder ball arrangement structure in a chip packaging substrate, a method, a chip and an electronic device. BACKGROUND

[0002] In chip packaging design, the number of fan-out signals is increasing, resulting in increasing size and number of solder balls in the entire chip packaging design. For example, the signals of a central processing unit (CPU) or a graphics processing unit (GPU) often reach several thousand. At the same time, the speed of the signals is also increasing, and the speed of many differential signals has reached tens of gigahertz (GHz) or even several tens of GHz.

[0003] In the prior art, a ground solder ball (GND) is provided for each pair of differential signals for the convenience of substrate wiring. Figure 1 is an exemplary schematic diagram of a solder ball arrangement structure in a chip packaging substrate provided in the prior art. As Figure 1 shown, a ground solder ball is added above each pair of differential line solder balls, but there is a large interference between the positive differential signal solder ball (D+) and the negative differential signal solder ball (D-), resulting in a low differential signal speed.

[0004] Therefore, there is an urgent need to provide a solder ball arrangement structure in a chip packaging substrate to improve the quality of differential signals. SUMMARY

[0005] The present application provides a solder ball arrangement structure in a chip packaging substrate, a method, a chip and an electronic device to provide a return path for differential signals, reduce crosstalk and improve signal quality.

[0006] According to an aspect of the present application, a solder ball arrangement structure in a chip packaging substrate is provided, the chip packaging substrate comprising a ground solder ball, a positive differential signal solder ball and a negative differential signal solder ball; wherein:

[0007] The ground solder ball is used to transmit a ground signal.

[0008] The positive differential signal solder ball and the negative differential signal solder ball constitute a differential pair signal for transmitting a differential signal.

[0009] In the chip packaging substrate, the adjacent solder ball of the positive differential signal solder ball is a ground solder ball or a negative differential signal solder ball; and the adjacent solder ball of the negative differential signal solder ball is a ground solder ball or a positive differential signal solder ball.

[0010] Optionally, when arranging the positive differential signal solder balls and the negative differential signal solder balls, adjacent differential signal solder balls form a "U" shaped signal arrangement mode.

[0011] The differential signal solder balls include positive differential signal solder balls and negative differential signal solder balls.

[0012] A ground solder ball is arranged outside adjacent differential signal solder balls.

[0013] Optionally, from the edge of the chip packaging substrate to the inside, every N layers form a solder ball arrangement structure group.

[0014] In each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and adjacent solder balls of the positive differential signal solder balls are ground solder balls or negative differential signal solder balls; adjacent solder balls of the negative differential signal solder balls are ground solder balls or positive differential signal solder balls.

[0015] In each solder ball arrangement structure group, the Nth layer is a ground solder ball; wherein N is a positive integer greater than or equal to 2.

[0016] Optionally, in each solder ball arrangement structure group, every M columns form a solder ball arrangement structure subgroup.

[0017] In each solder ball arrangement structure subgroup, there are M×(N-1) / 2 positive differential signal solder balls and M×(N-1) / 2 negative differential signal solder balls; wherein M is a positive integer greater than or equal to 2, and at least one of M and (N-1) is even.

[0018] In each solder ball arrangement structure subgroup, adjacent solder balls of the positive differential signal solder balls are negative differential signal solder balls, and adjacent solder balls of the negative differential signal solder balls are positive differential signal solder balls.

[0019] Each solder ball arrangement structure subgroup is arranged horizontally along the chip packaging substrate.

[0020] Optionally, a ground solder ball is arranged between each solder ball arrangement structure subgroup.

[0021] Optionally, N is 4 and M is 2.

[0022] In each solder ball arrangement structure subgroup, there are three positive differential signal solder balls and three negative differential signal solder balls.

[0023] The first positive differential signal solder ball and the first negative differential signal solder ball form a first pair of differential signals; the second positive differential signal solder ball and the second negative differential signal solder ball form a second pair of differential signals; and the third positive differential signal solder ball and the third negative differential signal solder ball form a third pair of differential signals.

[0024] Optionally, in the arrangement structure of the differential signal solder balls in the sub-group, the arrangement structure of the differential signal solder balls in each layer is as follows: the first layer is arranged from left to right as the second positive differential signal solder ball and the second negative differential signal solder ball, the second layer is arranged from left to right as the first negative differential signal solder ball and the third positive differential signal solder ball, and the third layer is arranged from left to right as the first positive differential signal solder ball and the third negative differential signal solder ball.

[0025] Optionally, in the arrangement of the solder balls adjacent to the edge of the chip packaging substrate, the ground solder ball arranged in the first layer is removed.

[0026] According to another aspect of the present application, a method for arranging solder balls in a chip packaging substrate is provided, the chip packaging substrate comprising ground solder balls, positive differential signal solder balls, and negative differential signal solder balls; the method comprising:

[0027] transmitting a ground signal through the ground solder balls;

[0028] transmitting a differential signal through the positive differential signal solder balls and the negative differential signal solder balls to form a differential pair signal;

[0029] in the chip packaging substrate, the adjacent solder ball of the positive differential signal solder ball is a ground solder ball or a negative differential signal solder ball; and the adjacent solder ball of the negative differential signal solder ball is a ground solder ball or a positive differential signal solder ball.

[0030] According to another aspect of the present application, a chip is provided, comprising a chip packaging substrate arranged with the arrangement structure of the solder balls in the chip packaging substrate provided by any of the embodiments of the present application.

[0031] According to another aspect of the present application, a mainboard is provided, comprising the chip provided by the embodiments of the present application.

[0032] According to another aspect of the present application, an electronic device is provided, comprising the chip or the mainboard provided by the embodiments of the present application.

[0033] In the technical solution of the embodiments of the present application, the chip packaging substrate comprises ground solder balls, positive differential signal solder balls, and negative differential signal solder balls; the ground solder balls are used to transmit a ground signal; the positive differential signal solder balls and the negative differential signal solder balls form a differential pair signal to transmit a differential signal; in the chip packaging substrate, the adjacent solder ball of the positive differential signal solder ball is a ground solder ball or a negative differential signal solder ball; and the adjacent solder ball of the negative differential signal solder ball is a ground solder ball or a positive differential signal solder ball. By arranging the solder balls in the chip packaging substrate as differential signal solder balls with only ground solder balls or opposite signal differential signal solder balls beside, the problem of crosstalk between differential signal pairs is solved, the return path for the differential signal is provided, the crosstalk is reduced, and the signal quality is improved.

[0034] It is to be understood that the details set forth herein do not limit the scope of the embodiments of the application to the specific embodiments described. The foregoing detailed description has set forth various embodiments of the devices and / or processes via the use of specific terminology. However, embodiments of the application are not necessarily limited to those described, but can be practiced with the BRIEF DESCRIPTION OF DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0036] Figure 1 is an exemplary schematic diagram of a solder ball arrangement structure in a chip packaging substrate provided in the prior art;

[0037] Figure 2 is a schematic diagram of a solder ball arrangement structure in a chip packaging substrate according to embodiment one of the present application;

[0038] Figure 3 is a schematic diagram of a solder ball arrangement structure in a chip packaging substrate according to embodiment two of the present application;

[0039] Figure 4 is a schematic diagram of a wire-out under the solder ball arrangement structure according to embodiment two of the present application;

[0040] Figure 5 is an enlarged schematic diagram of a wire-out under the solder ball arrangement structure according to embodiment two of the present application;

[0041] Figure 6 is a schematic diagram of a chip structure according to embodiment three of the present application;

[0042] Figure 7 is a schematic diagram of a mainboard structure according to the present application;

[0043] Figure 8 is a schematic diagram of an electronic device structure according to the present application. DETAILED DESCRIPTION

[0044] In order to make the technical personnel in the art better understand the present application scheme, the following will combine the drawings in the embodiments of the present application, and the technical solutions in the embodiments of the present application will be described clearly and completely. Obviously, the described embodiments are only some embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor should belong to the scope of protection of the present application.

[0045] It is to be understood that the terminology "first", "second" and the like used in the specification and the claims of the application as well as the foregoing drawings is merely intended to distinguish between similar objects and not necessarily for describing a particular sequential order. It is to be understood that the use of such terms can be interchanged in suitable instances so that the embodiments of the application described herein can be carried out in other sequences than the one illustrated or described herein. Furthermore, the terms "comprising", "including", "containing", and any variations thereof, are intended to cover a non-exclusive inclusion such that a process, method, system, product, or apparatus that comprises, includes, or contains an item or list of items who have the enclosed quantity of those items does not include only those items or items respectively, but can include other items not expressly listed or inherent to such process, method, system, product, or apparatus.

[0046] Embodiment One

[0047] Figure 2 is a schematic diagram of a solder ball arrangement structure in a chip packaging substrate according to the embodiment one of the application. The embodiment can be applied to the solder ball arrangement of the substrate in the chip packaging. The solder ball arrangement structure in the chip packaging substrate can be applied to the substrate generation in the chip packaging. After the solder ball arrangement of the substrate, the signal line access can be performed to form the chip by connecting the signal line with the lead connection structure such as the gold finger. Further, the chip can be arranged in the mainboard to generate the electronic equipment.

[0048] As shown in Figure 2 , in the solder ball arrangement structure in the chip packaging substrate, the chip packaging substrate includes the ground solder ball, the positive differential signal solder ball, and the negative differential signal solder ball. The ground solder ball is used for transmitting the ground signal. The positive differential signal solder ball and the negative differential signal solder ball constitute the differential pair signal and are used for transmitting the differential signal. In the chip packaging substrate, the adjacent solder ball of the positive differential signal solder ball is the ground solder ball or the negative differential signal solder ball; the adjacent solder ball of the negative differential signal solder ball is the ground solder ball or the positive differential signal solder ball.

[0049] By arranging the solder ball as the differential signal solder ball beside only the ground solder ball or the differential signal solder ball of the opposite signal in the chip packaging substrate, the reflow path can be provided for the differential signal, the crosstalk is reduced, and the signal quality is improved.

[0050] As shown in Figure 2 , by arranging the adjacent solder ball of the positive differential signal solder ball as the ground solder ball or the negative differential signal solder ball and the adjacent solder ball of the negative differential signal solder ball as the ground solder ball or the positive differential signal solder ball, the substrate wire-out sequence can also be ensured.

[0051] For example, when arranging positive and negative differential signal solder balls, adjacent differential signal solder balls can be arranged in a "U"-shaped signal pattern. This increases the ratio of signal solder balls to ground solder balls while maintaining the board's trace order, allowing for more differential signals to be implemented within a limited board space. Specifically, in adjacent differential signal solder balls, starting from the positive terminal of the first pair of differential signals, the circuit is connected in series to the negative terminal of the Qth pair of differential signals. By using a layout where adjacent differential signal solder balls have opposite signals, various "U"-shaped signal arrangements can be formed. Here, Q is a positive integer greater than or equal to 2.

[0052] like Figure 2 As shown, taking three pairs of adjacent differential signals as an example, starting from the positive terminal of the first pair of differential signals, the signals are connected in series to the negative terminal of the third pair of differential signals. By using a layout where adjacent solder balls of the differential signals are opposite signals, a U-shaped opening with the top facing up (shaped like a "U") and a U-shaped opening with the bottom facing down (shaped like an "n") can be formed. Figure 2 (not shown in the image), the "U"-shaped opening faces right (shaped like a " ), and the U-shaped opening to the left (shaped like a " " Figure 2 Various "U"-shaped signal arrangement methods (not shown in the image) are available. Figure 2 The "U"-shaped dashed line is only for illustrating the arrangement of solder balls; this line does not exist in the actual arrangement of solder balls.

[0053] When actually arranging differential signal solder balls on the substrate, the above-mentioned "U"-shaped signal arrangement with any opening direction can be selected according to the actual wiring requirements.

[0054] like Figure 2 As shown, in addition to placing differential signal solder balls (including positive differential signal solder balls and negative differential signal solder balls) in the substrate, ground solder balls can also be placed to reduce crosstalk between differential signal pairs and improve signal quality. For example, ground solder balls can be placed on the outside of the "U"-shaped signal arrangement described above.

[0055] like Figure 2 The solder ball arrangement shown can be expanded horizontally or vertically to achieve a multi-channel differential signal layout.

[0056] Optionally, a solder ball arrangement structure group is formed every N layers from the edge of the chip packaging substrate to the inside; in each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and the adjacent solder balls of the positive differential signal solder balls are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder balls are ground solder balls or positive differential signal solder balls; in each solder ball arrangement structure group, the Nth layer is a ground solder ball; where N is a positive integer greater than or equal to 2.

[0057] By using the adjacent solder balls of the differential signal solder balls in the first N-1 layers as the opposite signal solder balls and arranging the ground solder balls outside the differential signal solder balls, and arranging the Nth layer as the ground solder balls, the crosstalk between the differential signals can be significantly reduced, and the quality of the differential signals can be improved. Optionally, in each solder ball arrangement structure group, the first N-1 layers can adopt the adjacent differential signal solder balls to form a "U" type signal arrangement mode, and the adjacent solder balls of the differential signal solder balls are the opposite signal solder balls; the ground solder balls are arranged outside the adjacent differential signal solder balls; and the Nth layer is all the ground solder balls.

[0058] Optionally, in order to avoid the layers near the edge of the chip packaging substrate needing to be printed circuit board (PCB) out line through a neck mode, in an optional embodiment of the present application, the ground solder balls arranged in the first layer are removed in the solder ball arrangement structure group near the edge of the chip packaging substrate (BGA). As shown in Figure 3 The blank circle in the first layer from the edge of the BGA in the figure indicates that the ground solder ball at this position is removed.

[0059] The neck mode is a wiring mode with small line width and small line spacing, which temporarily narrows the line width and reduces the line spacing to adapt to the dense pad area wiring. However, using the neck mode for out line limits the PCB wiring, resulting in a sudden change in the impedance of the wiring under the BGA when the differential signals of the inner layer are fan out, which affects the quality of the differential signal transmission. The technical scheme of the embodiment of the present application removes the ground solder balls arranged in the first layer in the solder ball arrangement structure group near the edge of the chip packaging substrate, so that the PCB out line at this position does not need to use the neck mode wiring, avoiding the impedance mutation caused by the neck mode, thereby improving the quality of the differential signals of the inner layer.

[0060] Optionally, in the outermost solder ball arrangement structure group of the chip packaging substrate, the ground solder balls of the Nth layer can correspond to the differential signal solder balls of the N-1th layer one by one, which is convenient for PCB wiring.

[0061] In this embodiment, the chip packaging substrate includes ground solder balls, positive differential signal solder balls, and negative differential signal solder balls. The ground solder balls are used to transmit ground signals. The positive differential signal solder balls and the negative differential signal solder balls constitute a differential pair signal for transmitting differential signals. In the chip packaging substrate, the adjacent solder balls of the positive differential signal solder balls are either ground solder balls or negative differential signal solder balls. The adjacent solder balls of the negative differential signal solder balls are either ground solder balls or positive differential signal solder balls. By arranging the solder balls in the chip packaging substrate such that differential signal solder balls are adjacent to ground solder balls or differential signal solder balls with opposite signals, the problem of crosstalk between differential signal pairs is solved. This ensures the board trace order, provides a return path for differential signals, reduces crosstalk, and improves signal quality. By arranging adjacent differential signal solder balls with opposite signals in a "U"-shaped signal arrangement, the board trace order can be guaranteed, and the ratio of signal solder balls to ground solder balls can be increased, allowing more differential signals to be implemented within a limited board. Placing ground solder balls outside adjacent differential signal solder balls can reduce differential signal crosstalk and improve signal quality. By removing the ground solder ball on the first layer at the edge of the BGA, the use of neck mode routing is eliminated, avoiding impedance abrupt changes in the routing and improving differential signal quality.

[0062] Example 2

[0063] Figure 3 This is a schematic diagram of a solder ball arrangement structure in a chip packaging substrate according to Embodiment 2 of the present invention. This embodiment is a further refinement of the above technical solution. The technical solution in this embodiment can be combined with various optional solutions in one or more of the above embodiments.

[0064] like Figure 3 As shown, the chip packaging substrate includes a ground solder ball (GND), a positive differential signal solder ball, and a negative differential signal solder ball; wherein: the ground solder ball is used to transmit a ground signal; the positive differential signal solder ball and the negative differential signal solder ball constitute a differential pair signal for transmitting a differential signal; in the chip packaging substrate, the solder ball adjacent to the positive differential signal solder ball is either a ground solder ball or a negative differential signal solder ball; the solder ball adjacent to the negative differential signal solder ball is either a ground solder ball or a positive differential signal solder ball.

[0065] Optionally, when arranging positive differential signal solder balls and negative differential signal solder balls, adjacent differential signal solder balls form a "U"-shaped signal arrangement; wherein, the differential signal solder balls include positive differential signal solder balls and negative differential signal solder balls; and ground solder balls are arranged outside the adjacent differential signal solder balls.

[0066] Optionally, in the solder ball arrangement adjacent to the edge of the chip package substrate, the grounding solder balls set in the first layer can be removed, such as... Figure 3 The blank circle in the first layer.

[0067] Optionally, a solder ball arrangement structure group is formed every N layers from the edge to the inner side of the chip packaging substrate; in each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and adjacent solder balls of the positive differential signal solder balls are ground solder balls or negative differential signal solder balls; adjacent solder balls of the negative differential signal solder balls are ground solder balls or positive differential signal solder balls; in each solder ball arrangement structure group, the Nth layer is a ground solder ball; wherein N is a positive integer greater than or equal to 2.

[0068] Based on the above embodiments, as shown in Figure 3 Optionally, a solder ball arrangement structure subgroup is formed every M columns in each solder ball arrangement structure group; in each solder ball arrangement structure subgroup, there are M×(N-1) / 2 positive differential signal solder balls and M×(N-1) / 2 negative differential signal solder balls; wherein M is a positive integer greater than or equal to 2, and at least one of M and (N-1) is even; in each solder ball arrangement structure subgroup, adjacent solder balls of the positive differential signal solder balls are negative differential signal solder balls, and adjacent solder balls of the negative differential signal solder balls are positive differential signal solder balls; the solder ball arrangement structure subgroups are arranged in the lateral direction of the chip packaging substrate; and ground solder balls are arranged between the solder ball arrangement structure subgroups.

[0069] By making at least one of M and (N-1) even, the number of differential signal solder balls in the solder ball arrangement structure subgroup can be even, i.e., a differential signal pair is formed. The differential signal solder balls in the solder ball arrangement structure subgroup can be adjacent solder balls of opposite signal solder balls. The differential signal solder balls in the solder ball arrangement structure subgroup can form a "U" type signal arrangement mode. That is, in the solder ball arrangement structure subgroup, starting from the positive electrode of the first pair of differential signals, passing through the negative electrode of the first pair of differential signals, the positive electrode of the second pair of differential signals, the negative electrode of the second pair of differential signals, and so on until the negative electrode of the last pair of differential signals, a "U" type is formed; or starting from the negative electrode of the first pair of differential signals and connecting to the positive electrode of the last pair of differential signals, a "U" type is formed.

[0070] By arranging the solder ball arrangement structure subgroups in the lateral direction, free differential signal expansion can be achieved to meet the needs of different information quantities. By arranging only differential signal solder balls in the solder ball arrangement structure subgroups and arranging ground solder balls between the solder ball arrangement structure subgroups, the proportion of signal solder balls and ground solder balls can be improved, as shown in Figure 3 The number of signal solder balls and the number of GND solder balls almost reach a 1:1 level, saving the number of solder balls in the substrate design, reducing the substrate area, providing great convenience for PCB wiring, and greatly improving the quality of high-speed signals compared to the existing arrangement.

[0071] Exemplarily, N is 4, M is 2; each solder ball arrangement structure sub-group includes three positive differential signal solder balls and three negative differential signal solder balls; wherein, the first positive differential signal solder ball and the first negative differential signal solder ball constitute the first pair of differential signals; the second positive differential signal solder ball and the second negative differential signal solder ball constitute the second pair of differential signals; the third positive differential signal solder ball and the third negative differential signal solder ball constitute the third pair of differential signals.

[0072] As shown in the figure, Figure 3 In the first solder ball arrangement structure sub-group counted from left to right, the first positive differential signal solder ball is D0+, the first negative differential signal solder ball is D0-, the second positive differential signal solder ball is D1+, the second negative differential signal solder ball is D1-, the third positive differential signal solder ball is D2+, and the third negative differential signal solder ball is D2-; in the second solder ball arrangement structure sub-group, the first positive differential signal solder ball is D3+, the first negative differential signal solder ball is D3-, the second positive differential signal solder ball is D4+, the second negative differential signal solder ball is D4-, the third positive differential signal solder ball is D5+, and the third negative differential signal solder ball is D5-.

[0073] Exemplarily, the arrangement structure of the differential signal solder balls in each layer in the solder ball arrangement structure sub-group is: the first layer from left to right is the second positive differential signal solder ball and the second negative differential signal solder ball, the second layer from left to right is the first negative differential signal solder ball and the third positive differential signal solder ball, and the third layer from left to right is the first positive differential signal solder ball and the third negative differential signal solder ball.

[0074] That is, as shown in the figure, Figure 3 In the first solder ball arrangement structure sub-group counted from left to right, D1+ and D1- are arranged from left to right in the first layer, D0- and D2+ are arranged from left to right in the second layer, and D0+ and D2- are arranged from left to right in the third layer. A "U" type signal arrangement mode is formed by connecting D0+, D0-, D1+, D1-, D2+, and D2- in series. In the second solder ball arrangement structure sub-group counted from left to right, D4+ and D4- are arranged from left to right in the first layer, D3- and D5+ are arranged from left to right in the second layer, and D3+ and D5- are arranged from left to right in the third layer. A "U" type signal arrangement mode is formed by connecting D3+, D3-, D4+, D4-, D5+, and D5- in series. Figure 3 The "U" type dashed line in the figure only illustrates the solder ball arrangement, and the line does not exist in actual solder ball arrangement.

[0075] Through the solder ball arrangement interface as shown in the figure, Figure 4 The PCB can be sequentially wired, and the differential signal pairs on the PCB are in the order of 0, 1, 2, 3, 4, 5, 6, 7, and so on from left to right, which is one-to-one corresponding to the gold finger interface. Figure 4is a schematic diagram of wire-out under the solder ball arrangement structure according to the second embodiment of the present application. Figure 4 As shown in the figure, under the solder ball arrangement structure provided by the embodiment of the present application, the PCB can realize sequential wire-out, and the PCB line can correspond to the gold finger (the lowermost point in the gold finger) without winding, thus realizing perfect wiring mode. Figure 5

[0076] Figure 5 is an enlarged schematic diagram of wire-out under the solder ball arrangement structure according to the second embodiment of the present application. Figure 6 As shown in the figure, in the solder ball arrangement structure adjacent to the edge of the chip packaging substrate, the ground solder ball arranged in the first layer is removed, so that the line width is consistent, the neck mode is not needed for wire-out, the impedance continuity can be maintained, and the differential signal quality is improved.

[0077] Under the solder ball arrangement structure provided by the embodiment of the present application and the prior art mode, the high-speed differential signal is out of the ball, the return loss (SDD RL) of the differential transmission S parameter of the prior art is-15 dB at 8 GHz; and the SDD RL of the embodiment of the present application is-26.5 dB at 8 GHz, which significantly improves the differential transmission quality of the high-speed differential signal.

[0078] The technical scheme of the embodiment of the present application, by arranging the differential signal solder ball in the solder ball arrangement structure sub-group in the chip packaging substrate as a "U" shape, arranging the ground solder ball outside each solder ball arrangement structure sub-group, and removing the ground solder ball arranged in the first layer in the solder ball arrangement structure adjacent to the edge of the chip packaging substrate, solves the differential signal crosstalk and impedance mutation caused by the inconsistent line width in the solder ball arrangement of the prior art. Specifically, by removing the ground solder ball arranged in the first layer in the solder ball arrangement structure adjacent to the edge of the chip packaging substrate, the PCB wire-out impedance mutation problem is solved, and the signal quality is improved. By arranging the differential signal solder ball around each differential signal solder ball in the signal pad design as a differential signal solder ball or a GND solder ball with opposite polarity, the reflow path of the high-speed signal is increased, the crosstalk is reduced, and the signal quality is improved. By arranging the differential signal solder ball in the solder ball arrangement structure sub-group as a "U" shape, and arranging the ground solder ball outside each solder ball arrangement structure sub-group, the signal solder ball and the ground solder ball in the packaging substrate can basically reach the level of 1:1 on the basis of ensuring signal integrity, the use density of the differential signal solder ball in the substrate ball-out is improved, more signal solder balls can be arranged in the limited substrate, and the high-speed differential signal can work stably and reliably at the frequency of dozens of GHz or even dozens of GHz. By limiting the arrangement sequence of the differential signal solder ball in the solder ball arrangement structure sub-group, the PCB wire-out can be completely in the order required by the gold finger, and the chip packaging design is more compact and beautiful.

[0079] ​Example 3

[0080] Figure 6 This is a schematic diagram of a chip structure provided according to Embodiment 3 of the present invention. Figure 7 As shown, the chip includes a chip packaging substrate, wherein the chip packaging substrate is generated using the solder ball arrangement structure design of the chip packaging substrate provided in any embodiment of the present invention.

[0081] Figure 7 This is a schematic diagram of a motherboard structure provided according to an embodiment of the present invention. Figure 6 As shown, the motherboard contains the following: Figure 8 The chip shown.

[0082] Figure 8 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Figure 6 As shown, the electronic device includes, for example Figure 7 The chip shown or such ​ The motherboard shown.

[0083] Electronic devices are intended to represent various forms of digital computers, such as laptops, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. Electronic devices can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices.

[0084] In addition to the chip or motherboard provided in the embodiments of the present invention, the electronic device may also include at least one processor and a memory, such as a read-only memory (ROM) or a random access memory (RAM), communicatively connected to the at least one processor. The memory stores computer programs executable by the at least one processor. The processor can perform various appropriate actions and processes based on the computer programs stored in the ROM or loaded into the RAM from memory cells. The RAM may also store various programs and data required for the operation of the electronic device. The processor, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0085] Multiple components in an electronic device are connected to an I / O interface, including: input units such as keyboards and mice; output units such as various types of displays and speakers; storage units such as disks and optical discs; and communication units such as network interface cards (NICs), modems, and wireless transceivers. The communication unit allows the electronic device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0086] The processor can be various general-purpose and / or special-purpose processing components having processing and computing capabilities. Some examples of the processor include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, and the like.

[0087] To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the electronic device. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0088] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0089] The computing system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. A server can be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system, to solve the defects of large management difficulty and weak business scalability in traditional physical host and VPS service.

[0090] The above detailed description does not limit the scope of the application. Various modifications, combinations, sub-combinations and alternatives can be made to the detailed description. Any modification, equivalent replacement and improvement etc. made within the spirit and principle of the application shall be included in the scope of the application.

Claims

1. A solder ball arrangement structure in a chip package substrate, characterized by, The chip packaging substrate comprises ground balls, positive differential signal balls, and negative differential signal balls; wherein: The ground balls are used for transmitting ground signals; The positive differential signal balls and the negative differential signal balls form differential pair signals, which are used for transmitting differential signals; In the chip packaging substrate, the adjacent balls of the positive differential signal balls are ground balls or negative differential signal balls; the adjacent balls of the negative differential signal balls are ground balls or positive differential signal balls.

2. The solder ball arrangement of claim 1, wherein In arranging the positive differential signal balls and the negative differential signal balls, the adjacent differential signal balls form a "U" type signal arrangement mode; The differential signal balls comprise positive differential signal balls and negative differential signal balls; Ground balls are arranged outside the adjacent differential signal balls.

3. The solder ball arrangement of claim 1, wherein From the edge of the chip packaging substrate to the inside, every N layers form a ball arrangement structure group; In each ball arrangement structure group, the first N-1 layers comprise positive differential signal balls, negative differential signal balls, and ground balls, and the adjacent balls of the positive differential signal balls are ground balls or negative differential signal balls; the adjacent balls of the negative differential signal balls are ground balls or positive differential signal balls; In each ball arrangement structure group, the Nth layer is a ground ball; wherein N is a positive integer greater than or equal to 2.

4. The solder ball arrangement of claim 3, wherein In each ball arrangement structure group, every M columns form a ball arrangement structure subgroup; In each ball arrangement structure subgroup, there are M×(N-1) / 2 positive differential signal balls and M×(N-1) / 2 negative differential signal balls; wherein M is a positive integer greater than or equal to 2, and at least one of M and (N-1) is even; In each ball arrangement structure subgroup, the adjacent balls of the positive differential signal balls are negative differential signal balls, and the adjacent balls of the negative differential signal balls are positive differential signal balls; Each ball arrangement structure subgroup is arranged horizontally along the chip packaging substrate; and ground balls are arranged between each ball arrangement structure subgroup.

5. The solder ball arrangement of claim 4, wherein, N is 4, and M is 2; In each ball arrangement structure subgroup, there are three positive differential signal balls and three negative differential signal balls; The first positive differential signal ball and the first negative differential signal ball form a first pair of differential signals; the second positive differential signal ball and the second negative differential signal ball form a second pair of differential signals; and the third positive differential signal ball and the third negative differential signal ball form a third pair of differential signals.

6. The ball arrangement structure of claim 5, wherein In each layer of the ball arrangement structure subgroup, the arrangement structure of the differential signal balls is that the first layer has the second positive differential signal ball and the second negative differential signal ball from left to right, the second layer has the first negative differential signal ball and the third positive differential signal ball from left to right, and the third layer has the first positive differential signal ball and the third negative differential signal ball from left to right.

7. The solder ball arrangement of claim 1, wherein In the ball arrangement structure close to the edge of the chip packaging substrate, the ground ball arranged in the first layer is removed.

8. A method for arranging solder balls in a chip packaging substrate, characterized in that, The chip packaging substrate comprises ground balls, positive differential signal balls, and negative differential signal balls; and the method comprises: Transmitting ground signals through the ground balls; Transmitting differential signals through the positive differential signal balls and the negative differential signal balls; The positive differential signal solder ball and the negative differential signal solder ball constitute a differential pair signal to transmit a differential signal; In the chip packaging substrate, the adjacent solder ball of the positive differential signal solder ball is a ground solder ball or a negative differential signal solder ball; and the adjacent solder ball of the negative differential signal solder ball is a ground solder ball or a positive differential signal solder ball.

9. A chip, characterized by The chip comprises a chip packaging substrate arranged by using the solder ball arrangement structure in the chip packaging substrate according to any one of claims 1 to 7; or the chip executes the solder ball arrangement method in the chip packaging substrate according to claim 8.

10. An electronic device, comprising: The electronic device comprises the chip according to claim 9.

Images