Neural network-based in-loop filter architecture with local multi-scale feature extraction for video coding

Abstract

An apparatus for decoding video data determines a block of a picture; applying a neural network (NN)-based filtering process to the block to generate a filtered block, where to apply the NN-based filtering process, the apparatus performs a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features of the block; and performing a second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features of the block, wherein the first scale is different from the second scale; and generating the filtered block based on the first set of extracted features and the second set of extracted features.

Description

[0001] This application claims priority to U.S. Patent Application No. 18 / 756,952, filed June 27, 2024, and U.S. Provisional Patent Application No. 63 / 511,546, filed June 30, 2023, the entire contents of each of which are incorporated herein by reference. U.S. Patent Application No. 18 / 756,952, filed June 27, 2024, claims the benefit of U.S. Patent Application No. 18 / 756,952, filed June 27, 2024, and U.S. Provisional Patent Application No. 63 / 511,546, filed June 30, 2023. TECHNICAL FIELD

[0002] This disclosure relates to video encoding and video decoding. BACKGROUND

[0003] Digital video capabilities can be incorporated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), laptop or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video gaming devices, video game consoles, cellular or satellite radio telephones, so-called “smart phones,” video teleconferencing devices, video streaming devices, and the like. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), ITU-T H.266 / Versatile Video Coding (VVC), and extensions of such standards, as well as proprietary video codecs / formats, such as AOMedia Video 1 (AV1) developed by the Alliance for Open Media, and the like. The implementation of video coding techniques enables digital video devices to encode, decode, and / or store digital video information more efficiently.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or remove redundancy of the video sequence. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) can be partitioned into video blocks, which can also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. Video blocks in the I (intra-coded) slices of a picture are coded using spatial prediction with respect to reference samples in neighboring blocks within the same picture. Video blocks in the P (predicted) or B (bidirectional predicted) slices of a picture can be coded using either spatial or temporal prediction with respect to reference samples in neighboring blocks in the same picture or in other reference pictures. SUMMARY

[0005] The disclosure describes simplifications that can be applied to NN-based filtering techniques while maintaining coding quality. For example, according to techniques of this disclosure, a video coder can be configured to perform a NN-based filtering process that includes performing a first feature extraction at a first scale on pixel data of a block to generate a first set of extracted features for the block, and performing a second feature extraction at a second scale on the pixel data of the block to generate a second set of extracted features for the block, where the first scale is different from the second scale. By performing multi-scale feature extraction on input pixel data (e.g., in the head block of a filter), the amount of multi-scale processing performed in other portions of the filter (e.g., in the backbone) can be reduced, thereby reducing the overall complexity of the filter. In this way, techniques of this disclosure can improve the performance of video coding devices. Also, these techniques can enable more devices to perform NN-based filtering, thereby generally improving the field of video coding.

[0006] According to examples of this disclosure, a method of decoding encoded video data includes determining, from the encoded video data, a block of a picture, applying a neural network (NN)-based filtering process to the block to generate a filtered block, where applying the NN-based filtering process includes performing a first feature extraction at a first scale on pixel data of the block to generate a first set of extracted features for the block, and performing a second feature extraction at a second scale on the pixel data of the block to generate a second set of extracted features for the block, where the first scale is different from the second scale, generating the filtered block based on the first set of extracted features and the second set of extracted features, determining a decoded version of the block based on the filtered block, and outputting a decoded version of the picture that includes the decoded version of the block.

[0007] According to examples of the disclosure, an apparatus for decoding encoded video data includes a memory configured to store the encoded video data and one or more processors implemented in circuitry and configured to determine, from the encoded video data, a block of a picture, apply a neural network (NN)-based filtering process to the block to generate a filtered block, wherein to apply the NN-based filtering process, the one or more processors are further configured to perform a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block and perform a second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, wherein the first scale is different than the second scale, and generate the filtered block based on the first set of extracted features and the second set of extracted features, determine a decoded version of the block based on the filtered block, and output a decoded version of the picture including the decoded version of the block.

[0008] According to examples of the disclosure, a computer-readable storage medium stores instructions that, when executed by one or more processors, cause the one or more processors to determine, from encoded video data, a block of a picture, apply a neural network (NN)-based filtering process to the block to generate a filtered block, wherein to apply the NN-based filtering process, the instructions cause the one or more processors to perform a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block and perform a second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, wherein the first scale is different than the second scale, and generate the filtered block based on the first set of extracted features and the second set of extracted features, determine a decoded version of the block based on the filtered block, and output a decoded version of the picture including the decoded version of the block.

[0009] The details of one or more examples are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will be apparent from the description, drawings, and claims. BRIEF DESCRIPTION OF DRAWINGS

[0010] Figure 1 is a block diagram illustrating an example video encoding and decoding system that can perform the techniques of this disclosure.

[0011] Figure 2 is a block diagram illustrating an example hybrid video coding framework.

[0012] Figure 3 is a conceptual diagram illustrating a hierarchical prediction structure using a group of pictures (GOP) size of 16.

[0013] Figure 4is a block diagram illustrating an example convolutional neural network (CNN) based filter with four layers.

[0014] Figure 5 is a block diagram illustrating an example CNN based filter with padded input samples and supplemental data.

[0015] Figure 6 is a block diagram illustrating another example CNN based filter with padded input samples and supplemental data.

[0016] Figure 7 is a block diagram illustrating an example attention residual block of the neural network filter of Figure 6

[0017] Figure 8 is a block diagram illustrating an example of the spatial attention layer of Figure 6

[0018] Figure 9 is a block diagram illustrating an example of a simplified CNN based filter architecture with padded input samples and supplemental data using a residual block structure.

[0019] Figure 10 is a block diagram illustrating an example residual block structure of the example of Figure 9

[0020] Figure 11 is a block diagram illustrating an example of a simplified CNN based filter architecture with padded input samples and supplemental data using a filter block structure.

[0021] Figure 12 is a block diagram illustrating an example filter block structure of the example of Figure 11

[0022] Figure 13 is a block diagram illustrating examples of multi-dimensional convolution decomposition.

[0023] Figure 14 is a block diagram illustrating an example of multi-dimensional convolution decomposition.

[0024] Figure 15 shows an example architecture of a residual block.

[0025] Figure 16 is a conceptual diagram illustrating an example unified filter with joint model (joint luma and chroma).

[0026] Figure 17 is a conceptual diagram illustrating an example unified filter with separate luma / chroma models (luma).

[0027] Figure 18 ​​​​This is a conceptual diagram illustrating an example unified filter with a separate luminance / chrominance model (chrominance).

[0028] Figure 19 This is a conceptual diagram illustrating an example filter architecture with multi-scale feature extraction.

[0029] Figure 20 This is a conceptual diagram illustrating an example filter architecture with multi-scale feature extraction.

[0030] Figure 21 This is a conceptual diagram illustrating an example filter architecture with multi-scale feature extraction.

[0031] Figure 22 This is a block diagram illustrating an example video encoder that can perform the techniques of this disclosure.

[0032] Figure 23 This is a block diagram illustrating an example video decoder that can perform the techniques of this disclosure.

[0033] Figure 24 This is a flowchart illustrating an example process for encoding the current block according to the technology of this disclosure.

[0034] Figure 25 This is a flowchart illustrating an example process for decoding the current block according to the technology of this disclosure.

[0035] Figure 26 This is a flowchart illustrating an example process for decoding the current block according to the technology of this disclosure. Detailed Implementation

[0036] Video decoding (e.g., video encoding and / or video decoding) typically involves predicting video data blocks based on decoded video data blocks within the same frame (e.g., intra-frame prediction) or based on decoded video data blocks in different frames (e.g., inter-frame prediction). In some cases, the video encoder also computes residual data by comparing the predicted block to the original block. Therefore, the residual data represents the difference between the predicted block and the original block. To reduce the number of bits required to signal the residual data, the video encoder transforms and quantizes the residual data and signals the transformed and quantized residual data in the encoded bitstream. Compression achieved through the transformation and quantization process can be lossy, meaning that the transformation and quantization process may introduce distortion into the decoded video data.

[0037] A video decoder decodes the residual data and adds it to the prediction block to produce a reconstructed video block that more closely matches the original video block than the separate prediction block. Due to losses introduced by the transform and quantization of the residual data, the first reconstructed block can have distortions or artifacts. One common type of artifact or distortion is referred to as blocking artifacts, in which the boundaries of the blocks used to code the video data are visible.

[0038] To further improve the quality of the decoded video, the video decoder can perform one or more filtering operations on the reconstructed video block. Examples of these filtering operations include deblocking filtering, sample adaptive offset (SAO) filtering, and adaptive loop filtering (ALF). Parameters for these filtering operations can be determined by the video encoder and explicitly signaled in the encoded video bitstream, or can be implicitly determined by the video decoder without needing to be explicitly signaled in the encoded video bitstream. This disclosure describes techniques related to convolutional neural network (CNN)-based in-loop filtering, or (more generally) neural network (NN)-based filtering.

[0039] Research has shown that neural network (NN)-based filtering techniques are highly capable of improving decoded and / or rendered video data. NN-based filtering techniques can be highly complex and require significant processing power to effectively perform.

[0040] This disclosure describes simplifications that can be applied to NN-based filtering techniques while maintaining coding quality. For example, according to techniques of this disclosure, a video coder can be configured to perform a NN-based filtering process that includes: performing a first feature extraction at a first scale on pixel data of a block to generate a first set of extracted features for the block; and performing a second feature extraction at a second scale on the pixel data of the block to generate a second set of extracted features for the block, where the first scale is different from the second scale. By performing multi-scale feature extraction on input pixel data (e.g., in the head block of a filter), the amount of multi-scale processing performed in other portions of the filter (e.g., in the trunk) can be reduced, thereby reducing the overall complexity of the filter. In this way, techniques of this disclosure can improve the performance of video coding devices. Also, these techniques can enable more devices to perform NN-based filtering, thereby generally improving the field of video coding.

[0041] As used in this disclosure, the term video coding generally refers to video encoding or video decoding. Similarly, the term "video coder" can generally refer to either a video encoder or a video decoder. Moreover, certain techniques described in this disclosure in relation to video decoding can also be applicable to video encoding, and vice versa. For example, video encoders and video decoders are often configured to perform identical or reciprocal processes. Also, a video encoder often performs video decoding (also referred to as reconstruction) as part of the process of determining how to encode video data. For example, a video encoder can perform deblocking filtering on a decoded video block in order to determine whether a certain encoding scheme produces a desirable rate-distortion tradeoff and also so that the video encoder can perform motion estimation using the same blocks available to the video decoder when the video decoder performs motion compensation.

[0042] Figure 1 FIG. 1 is a block diagram illustrating an example video encoding and decoding system 100 that can perform the techniques of this disclosure. The techniques of this disclosure generally relate to coding (encoding and / or decoding) video data, including filtering video data using NN-based techniques. In general, video data includes any data for processing video. Thus, video data can include uncoded raw video, coded video, decoded (e.g., reconstructed) video, and video metadata, such as signaling data.

[0043] As Figure 1 shown in FIG. 1, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a destination device 116. In particular, source device 102 provides the video data to destination device 116 via a computer-readable medium 110. Source device 102 and destination device 116 can be or include any of a wide range of devices, including desktop computers, notebook (i.e., laptop) computers, mobile devices, tablet computers, set-top boxes, hand-held telephones such as smartphones, televisions, cameras, display devices, digital media players, video gaming consoles, video streaming devices, broadcast receiver devices, and the like. In some cases, source device 102 and destination device 116 can be equipped to communicate wirelessly and thus can be referred to as wireless communication devices.

[0044] In Figure 1In the example of FIG. 1, source device 102 includes video source 104, memory 106, video encoder 200, and output interface 108. Destination device 116 includes input interface 122, video decoder 300, memory 120, and display device 118. In accordance with this disclosure, video encoder 200 of source device 102 and video decoder 300 of destination device 116 can be configured to apply the techniques for NN-based video coding and filtering. Thus, source device 102 represents an example of a video encoding device, while destination device 116 represents an example of a video decoding device. In other examples, a source device and a destination device can include other components or arrangements. For example, source device 102 can receive video data from an external video source, such as an external camera. Likewise, destination device 116 can interface with an external display device, rather than include an integrated display device.

[0045] As shown in FIG. 1, system 100 includes a source device 102 and a destination device 116. Source device 102 generates coded video data. Destination device 116 decodes the coded video data. In some examples, source device 102 and destination device 116 can operate in a substantially symmetrical manner. In some examples, source device 102 and destination device 116 can each include a video encoding and decoding component, such as video encoder 200 and video decoder 300, respectively. Hence, the coding techniques described in this disclosure can be employed in either video encoding or video decoding processes. Figure 1 System 100 of FIG. 1 is merely one example. In general, any digital video encoding and / or decoding device can perform the techniques for NN-based video coding and filtering. Source device 102 and destination device 116 are merely examples of such coding devices in which source device 102 generates coded video data for transmission to destination device 116. This disclosure refers to a “coding” device as a device that performs coding (e.g., encoding and / or decoding) of data. Thus, video encoder 200 and video decoder 300 represent examples of coding devices, in particular, video encoders and video decoders, respectively. In some examples, source device 102 and destination device 116 can operate in a substantially symmetrical manner, such that source device 102 and destination device 116 each include video encoding and decoding components. Hence, system 100 can support one-way or two-way video transmission between source device 102 and destination device 116, e.g., for video streaming, video playback, video broadcasting, or video telephony.

[0046] In general, video source 104 represents a source of video data (i.e., raw, uncoded video data) and provides a sequential series of pictures (also referred to as “frames”) of the video data to video encoder 200, which encodes data for the pictures. Video source 104 of source device 102 can include a video capture device, such as a video camera, a video archive containing previously captured raw video, and / or a video feed interface to receive video from a video content provider. As a further alternative, video source 104 can generate computer graphics-based data as the source video, or a combination of live video, archived video, and computer-generated video. In each case, video encoder 200 encodes the captured, pre-captured, or computer-generated video data. Video encoder 200 can rearrange the pictures from the received order (sometimes referred to as “display order”) into the coding order for coding. Video encoder 200 can generate a bitstream including encoded video data. Source device 102 can then output the encoded video data via output interface 108 onto computer-readable medium 110 for reception and / or retrieval by, for example, input interface 122 of destination device 116.

[0047] Memory 106 of source device 102 and memory 120 of destination device 116 represent general purpose memories. In some examples, memories 106, 120 can store raw video data, e.g., raw video from video source 104 and raw decoded video data from video decoder 300. Additionally or alternatively, memories 106, 120 can store software instructions capable of execution by, e.g., video encoder 200 and video decoder 300, respectively. While memories 106 and 120 are shown as separate from video encoder 200 and video decoder 300 in this example, it should be understood that video encoder 200 and video decoder 300 can also include internal memories for similar or equivalent purposes. Furthermore, memories 106, 120 can store encoded video data, e.g., from an output of video encoder 200 and an input of video decoder 300. In some examples, portions of memories 106, 120 can be allocated as one or more video buffers, e.g., to store raw decoded and / or encoded video data.

[0048] Computer-readable medium 110 can represent any type of medium or device capable of transporting encoded video data from source device 102 to destination device 116. In one example, computer-readable medium 110 represents a communication medium to enable source device 102 to transmit encoded video data directly to destination device 116 in real-time, e.g., via a radio frequency network or computer-based network. Output interface 108 can modulate the transmission signal including the encoded video data, and input interface 122 can demodulate the received transmission signal, according to a communication standard, such as a wireless communication protocol. The communication medium can comprise any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium can form part of a packet-based network, such as a local area network, a wide-area network, or a global network such as the Internet. The communication medium can include routers, switches, base stations, or any other equipment that can be useful to facilitate communication from source device 102 to destination device 116.

[0049] In some examples, source device 102 can output encoded data from output interface 108 to storage device 112. Similarly, destination device 116 can access encoded data from storage device 112 via input interface 122. Storage device 112 can include any of a variety of distributed or locally accessed data storage media such as a hard drive, Blu-ray discs, DVDs, CD-ROMs, flash memory, volatile or non-volatile memory, or any other suitable digital storage media for storing encoded video data.

[0050] In some examples, source device 102 can output encoded video data to file server 114A or another intermediate storage device that can store the encoded video data generated by source device 102. Destination device 116 can access stored video data from file server 114 via streaming or download.

[0051] The file server 114 can be any type of server device capable of storing encoded video data and transmitting that encoded video data to the destination device 116. The file server 114 can represent a web server (e.g., for a website), a server configured to provide file delivery protocol services (such as the File Delivery Protocol (FTP) or the File Delivery over Unidirectional Transport (FLUTE) protocol), a content delivery network (CDN) device, a hypertext transfer protocol (HTTP) server, a multimedia broadcast multicast service (MBMS) or enhanced MBMS (eMBMS) server, and / or a network attached storage (NAS) device. The file server 114 can additionally or alternatively implement one or more HTTP streaming protocols, such as Dynamic Adaptive Streaming over HTTP (DASH), HTTP Live Streaming (HLS), Real Time Streaming Protocol (RTSP), HTTP Dynamic Streaming, and the like.

[0052] The destination device 116 can access encoded video data from the file server 114 through any standard data connection, including an Internet connection. This can include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of both that is suitable for accessing encoded video data stored on the file server 114. The input interface 122 can be configured to operate according to any one or more of various protocols discussed above for retrieving or receiving media data from the file server 114, or other such protocols for retrieving media data.

[0053] The output interface 108 and the input interface 122 can represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components operating according to any of a variety of IEEE 802.11 standards, or other physical components. In examples where the output interface 108 and the input interface 122 comprise wireless components, the output interface 108 and the input interface 122 can be configured to transfer data, such as encoded video data, according to a cellular communication standard, such as 4G, 4G-LTE (Long-Term Evolution), LTE Advanced, 5G, or the like. In some examples where the output interface 108 includes a wireless transmitter, the output interface 108 and the input interface 122 can be configured to transfer data, such as encoded video data, according to other wireless standards ™ ™ ​Standard, etc. In some examples, source device 102 and / or destination device 116 can include respective system on a chip (SoC) devices. For example, source device 102 can include SoC devices to perform the functionality of video encoder 200 and / or output interface 108, and destination device 116 can include SoC devices to perform the functionality of video decoder 300 and / or input interface 122.

[0054] The techniques of this disclosure can be applied to video coding in support of any of a variety of multimedia applications, such as over-the-air television broadcasts, cable television transmissions, satellite television transmissions, Internet streaming video transmissions, digital video that is encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0055] Input interface 122 of destination device 116 receives an encoded video bitstream from computer-readable medium 110 (e.g., a communication medium, storage device 112, file server 114, or the like). The encoded video bitstream can include signaling information defined by video encoder 200, and also used by video decoder 300, such as syntax elements having values

[0056] Although not shown in FIG. 5, in some examples, video encoder 200 and video decoder 300 can each be integrated as components of an integrated circuit (IC) device, such as an SoC device. For example, video encoder 200 and / or video decoder 300 can be integrated in a system on a chip (SoC) along with one or more other devices, such as a radio interface, a digital signal processor, a graphics processing unit, an audio digital signal processor, or the like. Figure 1 Although not shown in FIG. 5, in some examples, video encoder 200 and video decoder 300 can each be integrated as components of an integrated circuit (IC) device, such as an SoC device. For example, video encoder 200 and / or video decoder 300 can be integrated in a system on a chip (SoC) along with one or more other devices, such as a radio interface, a digital signal processor, a graphics processing unit, an audio digital signal processor, or the like.

[0057] Video encoder 200 and video decoder 300 each can be implemented as any of a variety of suitable encoder and / or decoder circuitry, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware or any combinations thereof. When the techniques are implemented partially in software, a device can store instructions for the software in a suitable, non- transitory computer-readable medium and execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Each of video encoder 200 and video decoder 300 can be included in one or more encoders or decoders, any of which alone can be a combined encoder / decoder (CODEC) portion of a corresponding device. A device including video encoder 200 and / or video decoder 300 can implement video encoder 200 and / or video decoder 300 in processing circuitry, such as an integrated circuit and / or a microprocessor. Such a device can be a wireless communication device, such as a cellular phone or any of the other types of devices described herein.

[0058] Video encoder 200 and video decoder 300 can operate according to a video coding standard, such as ITU-T H.265, also referred to as High Efficiency Video Coding (HEVC), or extensions thereof, such as the multi-view and / or scalable video coding extensions. Alternatively, video encoder 200 and video decoder 300 can operate according to other proprietary or industry standards, such as ITU-T H.266, also referred to as Versatile Video Coding (VVC). In other examples, video encoder 200 and video decoder 300 can operate according to a proprietary video codec / format, such as AOMedia Video 1 (AV1), extensions of AV1, and / or subsequent versions of AV1 (e.g., AV2). In other examples, video encoder 200 and video decoder 300 can operate according to other proprietary formats or industry standards. The techniques of this disclosure, however, are not limited to any particular coding standard or format. In general, video encoder 200 and video decoder 300 can be configured to perform the techniques of this disclosure in connection with any video coding technology that uses neural networks.

[0059] In general, video encoder 200 and video decoder 300 can perform block-based coding of pictures. The term “block” generally refers to a structure containing data to be processed (e.g., encoded, decoded, or otherwise used) during encoding and / or decoding. For example, a block can include a two-dimensional matrix of samples of luma and / or chroma data. In general, video encoder 200 and video decoder 300 can code video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, rather than coding red, green, and blue (RGB) data for a sample of a picture, video encoder 200 and video decoder 300 can code a luma component and chroma components, where the chroma components can include both a red hue chroma component and a blue hue chroma component. In some examples, video encoder 200 converts received RGB format data to a YUV representation prior to encoding, and video decoder 300 converts the YUV representation to the RGB format. Alternatively, pre- and post-processing units (not shown) can perform these conversions.

[0060] This disclosure can generally relate to coding (e.g., encoding and decoding) of pictures to include processes of encoding or decoding data of pictures. Similarly, this disclosure can relate to coding of blocks of pictures to include processes of encoding or decoding (e.g., prediction and / or residual coding) data for blocks. A coded video bitstream generally includes a series of values for syntax elements that represent coding decisions (e.g., coding modes) and partitioning of pictures into blocks. Accordingly, references to coding of pictures or blocks generally should be understood to refer to coding values of syntax elements that form the pictures or blocks.

[0061] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video coder (such as video encoder 200) partitions a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video coder partitions a CTU and CUs into four equal, non overlapping squares, and each node of the quadtree has either zero or four child nodes. Nodes with zero child nodes can be referred to as “leaf nodes,” and CUs of such leaf nodes can include one or more PUs and / or one or more TUs. Video coder can further partition PUs and TUs. For example, in HEVC, a residual quadtree (RQT) represents partitioning of TUs. In HEVC, PUs represent inter-predicted data, while TUs represent residual data. Intra-predicted CUs include intra-prediction information, such as an intra-mode indication.

[0062] As another example, video encoder 200 and video decoder 300 can be configured to operate according to VVC. According to VVC, a video coder (such as video encoder 200) partitions a picture into CTUs. Video encoder 200 can partition a CTU according to a tree structure, such as a quadtree-binary tree (QTBT) structure or Multi-Type Tree (MTT) structure. The QTBT structure removes the concepts of multiple partition types, such as the separation between CUs, PUs, and TUs of HEVC. The QTBT structure includes two levels: a first level of partitioning according to quadtree partitioning and a second level of partitioning according to binary tree partitioning. The root node of the QTBT structure corresponds to a CTU. The leaf nodes of the binary trees correspond to CUs.

[0063] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of ternary tree (TT) (also referred to as tri-tree) partitioning. A ternary tree or tri-tree partitioning is a partitioning in which a block is split into three sub-blocks. In some examples, a ternary tree or tri-tree partitioning splits a block into three sub-blocks without splitting the original block through the center. The partition types (e.g., QT, BT, and TT) in the MTT can be symmetric or asymmetric.

[0064] When operating according to the AV1 codec, video encoder 200 and video decoder 300 can be configured to code video data in units of blocks. In AV1, the largest coding block that can be processed is referred to as a superblock. In AV1, a superblock can be 128x128 luma samples or 64x64 luma samples. However, in subsequent video coding formats (e.g., AV2), a superblock can be defined by different (e.g., larger) luma sample sizes. In some examples, a superblock is the top level of block quadtree. Video encoder 200 can further partition a superblock into smaller coding blocks. Video encoder 200 can partition superblocks and other coding blocks into smaller blocks using square or non-square partitions. Non-square blocks can include N / 2xN blocks, NxN / 2 blocks, N / 4xN blocks, and NxN / 4 blocks. Video encoder 200 and video decoder 300 can perform separate prediction and transform processing for each coding block.

[0065] AV1 also defines tiles of video data. A tile is a rectangular array of superblocks that can be coded independently of other tiles. That is, video encoder 200 and video decoder 300 can encode and decode coding blocks within a tile without using video data from other tiles. However, video encoder 200 and video decoder 300 can perform filtering across tile boundaries. The size of a tile can be uniform or non-uniform. Tile-based coding can enable parallel processing and / or multi-threading of encoder and decoder implementations.

[0066] In some examples, video encoder 200 and video decoder 300 can use a single QTBT or MTT structure to represent each of luma and chroma components, while in other examples, video encoder 200 and video decoder 300 can use two or more QTBT or MTT structures, such as one QTBT / MTT structure for luma components and another QTBT / MTT structure for two chroma components (or two QTBT / MTT structures for respective chroma components).

[0067] Video encoder 200 and video decoder 300 can be configured to use quadtree partitioning, QTBT partitioning, MTT partitioning, superblock partitioning, or other partitioning structures.

[0068] In some examples, a CTU includes a coding tree block (CTB) of luma samples, two corresponding CTBs of chroma samples of a picture having three sample arrays, or a CTB of samples of a picture coded using three separate color planes and syntax structures for coding samples. A CTB can be an NxN block of samples of some N value, such that one type of partitioning partitions a component into CTBs. A component is an array or a single sample from one of the three arrays (luma and two chroma) that make up a 4:2:0, 4:2:2, or 4:4:4 color format picture, or an array or a single sample of an array that make up a monochrome format picture. In some examples, a coding block is an MxN block of samples of some M value and N value, such that one type of partitioning partitions a CTB into coding blocks.

[0069] Blocks (e.g., CTUs or CUs) can be grouped in pictures in various ways. As one example, a tile can refer to a rectangular region of CTU rows within a particular tile in a picture. A tile column can be a rectangular region of CTUs within a particular tile column and a particular tile row in a picture. A tile column refers to a rectangular region of CTUs having a height equal to a height of a picture and a width specified by a syntax element (e.g., such as in a picture parameter set) and a tile row refers to a rectangular region of CTUs having a height specified by a syntax element (e.g., such as in a picture parameter set) and a width equal to a width of a picture.

[0070] In some examples, a tile can be partitioned into multiple bricks, each of which can include one or more CTU rows within the tile. A tile that is not partitioned into multiple bricks can also be referred to as a brick. However, a brick that is a true subset of a tile can not be referred to as a tile. Bricks in a picture can also be arranged in slices. A slice can be an integer number of bricks of a picture, which can be uniquely contained in a single network abstraction layer (NAL) unit. In some examples, a slice includes multiple complete tiles or only a contiguous sequence of complete bricks of one tile.

[0071] The present disclosure can interchangeably use "NxN" and "N by N" to refer to the sample dimensions of a block, such as a CU or other video block, in the vertical and horizontal dimensions, e.g., 16x16 samples or 16 by 16 samples. In general, a 16x16 CU has 16 samples in the vertical direction (y = 16) and 16 samples in the horizontal direction (x = 16). Likewise, an NxN CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non negative integer value. The samples in a CU can be arranged in rows and columns. Moreover, a CU need not necessarily have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU can comprise NxM samples, where M is not necessarily equal to N.

[0072] Video encoder 200 encodes video data representing prediction and / or residual information for a CU, among other information. Prediction information indicates how to predict the CU in order to form a prediction block for the CU. Residual information generally represents sample- wise differences between the CU prior to encoding and the prediction block.

[0073] To predict a CU, video encoder 200 can generally form a prediction block for the CU through inter-prediction or intra-prediction. Inter-prediction generally refers to predicting the CU from data of a previously coded picture, whereas intra-prediction generally refers to predicting the CU from previously coded data of the same picture. To perform inter-prediction, video encoder 200 can use one or more motion vectors to generate the prediction block. Video encoder 200 can generally perform a motion search to identify a reference block that closely matches the CU, e.g., according to a difference between the CU and the reference block. Video encoder 200 can calculate the difference metric using a sum of absolute difference (SAD), sum of squared difference (SSD), mean absolute difference (MAD), mean squared difference (MSD), or other such difference calculations to determine whether a reference block closely matches a current CU. In some examples, video encoder 200 can use uni -prediction or bi-prediction to predict a current CU.

[0074] Some examples of VVC also provide an affine motion compensation mode, which can be considered an inter-prediction mode. In the affine motion compensation mode, video encoder 200 can determine two or more motion vectors that represent non-translational motion, such as zooming or shrinking, rotation, perspective motion, or other irregular types of motion.

[0075] To perform intra prediction, video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of VVC provide sixty-seven intra prediction modes, including various directional modes, as well as a planar mode and a DC mode. In general, video encoder 200 selects an intra prediction mode that describes neighboring samples of a current block (e.g., a block of a CU) from which to predict samples of the current block. Assuming video encoder 200 is coding CTUs and CUs in a raster scan order (from left to right, top to bottom), such samples can generally be located above, above and to the left, or to the left of the current block in the same picture as the current block.

[0076] Video encoder 200 encodes data that represents the prediction mode for the current block. For example, for inter prediction modes, video encoder 200 can encode data that indicates which of various available inter prediction modes is used, as well as motion information for the corresponding mode. For example, for uni- or bi-prediction, video encoder 200 can encode motion vectors using advanced motion vector prediction (AMVP) or merge mode. Video encoder 200 can use similar modes to encode motion vectors for affine motion compensation modes.

[0077] AV1 includes two general techniques for encoding and decoding blocks of video data. The two general techniques are intra prediction (e.g., intra prediction or spatial prediction) and inter prediction (e.g., inter prediction or temporal prediction). In the context of AV1, when a block of a current frame of video data is predicted using an intra prediction mode, video encoder 200 and video decoder 300 do not use video data from other frames of the video data. For most intra prediction modes, video encoder 200 encodes a block of the current frame based on differences between sample values in the current block and prediction values generated from reference samples in the same frame. Video encoder 200 determines the prediction values generated from the reference samples based on the intra prediction mode.

[0078] After prediction, such as intra prediction or inter prediction of a block, video encoder 200 can calculate residual data for the block. The residual data, such as a residual block, represents sample-by-sample differences between the block and a prediction block formed using the corresponding prediction mode. Video encoder 200 can apply one or more transforms to the residual block to produce transform data in a transform domain rather than in the sample domain. For example, video encoder 200 can apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform. In addition, video encoder 200 can apply a secondary transform after the first transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signal-dependent transform, a Karhunen-Loeve transform (KLT), and the like. Video encoder 200 produces transform coefficients after applying the one or more transforms.

[0079] As noted above, following any transforms that produce transform coefficients, video encoder 200 can perform quantization of the transform coefficients. Quantization generally refers to a process in which transform coefficients are quantized to possibly reduce the amount of data used to represent the transform coefficients, providing further compression. By performing the quantization process, video encoder 200 can reduce the bit depth associated with some or all of the transform coefficients. For example, video encoder 200 can round n-bit values down to m-bit values during quantization, where n is greater than m. In some examples, to perform quantization, video encoder 200 can perform a bitwise right-shift of the values to be quantized.

[0080] Following quantization, video encoder 200 can scan the transform coefficients, putting them in a one-dimensional vector from the two-dimensional matrix that includes the quantized transform coefficients. The scan can be designed to place higher energy (and thus lower frequency) transform coefficients earlier in the vector and lower energy (and thus higher frequency) transform coefficients later in the vector. In some examples, video encoder 200 can utilize a predefined scan order to scan the quantized transform coefficients to produce a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, video encoder 200 can perform an adaptive scan. After scanning the quantized transform coefficients to form a one-dimensional vector, video encoder 200 can entropy encode the one-dimensional vector, e.g., according to context adaptive binary arithmetic coding (CABAC). Video encoder 200 can also entropy encode values for syntax elements describing metadata associated with encoded video data used by video decoder 300 when decoding the video data.

[0081] To perform CABAC, video encoder 200 can assign a context within a context model to a symbol to be transmitted. The context can relate to, for example, whether neighboring values of the symbol are zero-valued or not. The probability determination can be based on the context assigned to the symbol.

[0082] Video encoder 200 can further generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, e.g., in picture headers, block headers, slice headers, or other syntax data such as a sequence parameter set (SPS), picture parameter set (PPS), or video parameter set (VPS), to video decoder 300. Video decoder 300 can likewise decode such syntax data to determine how to decode corresponding video data.

[0083] In this way, video encoder 200 can generate a bitstream that includes encoded video data, e.g., syntax elements that describe partitioning of a picture into blocks (e.g., CUs) and prediction and / or residual information for the blocks. Ultimately, video decoder 300 can receive the bitstream and decode the encoded video data.

[0084] In general, video decoder 300 performs a reciprocal process to that performed by video encoder 200 to decode the encoded video data of the bitstream. For example, video decoder 300 can decode values for syntax elements of the bitstream using CABAC in a manner substantially similar to, but reciprocal to, the CABAC encoding process of video encoder 200. The syntax elements can define partitioning information for partitioning a picture into CTUs, and each CTU according to a corresponding partition structure such as a QTBT structure to define CUs of the CTU. The syntax elements can further define prediction and residual information for blocks (e.g., CUs).

[0085] The residual information can be represented by, for example, quantized transform coefficients. Video decoder 300 can inverse quantize and inverse transform the quantized transform coefficients of a block to reproduce a residual block for the block. Video decoder 300 forms a prediction block for the block using the signaled prediction mode (intra prediction or inter prediction) and related prediction information (e.g., motion information for inter prediction). Video decoder 300 can then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. Video decoder 300 can perform additional processing such as performing a deblocking process to reduce visual artifacts along boundaries of the blocks.

[0086] This disclosure can generally relate to “signaling” certain information, such as syntax elements. The term “signaling” can generally refer to the communication of values for syntax elements and / or other data used for decoding encoded video data. That is, video encoder 200 can signal values for syntax elements in a bitstream. In general, signaling refers to generating values in a bitstream. As noted above, source device 102 can transmit the bitstream to destination device 116 in substantially real time or not in real time, such as can occur when syntax elements are stored to storage device 112 for later retrieval by destination device 116.

[0087] This disclosure describes processes, techniques, and structures that can reduce the computational complexity and / or memory bandwidth requirements of neural network (NN)-based video coding tools. The example techniques described below relate to NN-aided loop filtering. However, the techniques of this disclosure are applicable to any NN-based video coding tool that uses input data with certain statistical properties. The techniques of this disclosure can be used in the context of advanced video codecs, such as extensions of VVC, next generation video coding standards, and / or any other video codecs.

[0088] According to the techniques of this disclosure, video encoder 200 and video decoder 300 can be configured to perform NN-based video coding, including NN-based filtering using any combination of the techniques described below.

[0089] Figure 2 is a conceptual diagram illustrating a hybrid video coding framework. Video coding standards since H.261 are based on the so-called hybrid video coding principle, which is illustrated in Figure 2 The term hybrid refers to the combination of two means for reducing redundancy in video signals, namely prediction with prediction residual quantization and transform coding. Prediction and transform reduce redundancy in video signals by decorrelation, while quantization reduces the data represented by the transform coefficients by reducing their precision, ideally by removing only uncorrelated details. This hybrid video coding design principle is also used in the two recent standards ITU-T H.265 / HEVC and ITU-T H.266 / VVC.

[0090] As shown in Figure 2 Modern hybrid video coders 130 typically perform block partitioning, motion compensation or inter-picture prediction, intra-picture prediction, transform, quantization, entropy coding, and in-loop post / loop-internal filtering. In the example of Figure 2 , video coder 130 includes a summation unit 134, a transform unit 136, a quantization unit 138, an entropy coding unit 140, an inverse quantization unit 142, an inverse transform unit 144, a summation unit 146, an in-loop filter unit 148, a decoded picture buffer (DPB) 150, an intra-prediction unit 152, an inter-prediction unit 154, and a motion estimation unit 156.

[0091] In general, video coder 130 can receive input video data 132 when encoding video data. Block partitioning is used to partition a received video data picture (image) into smaller blocks for the operations of the prediction and transform processes. Early video coding standards used fixed block sizes, typically 16x16 samples. Recent standards such as HEVC and VVC employ a tree-based partitioning structure to provide flexibility in the partitioning.

[0092] Motion estimation unit 156 and inter-prediction unit 154 can predict input video data 132, e.g., from previously decoded data of DPB 150. Motion compensation or inter-picture prediction exploits the redundancy that exists between pictures of a video sequence (hence the term “inter- picture”). According to the block-based motion compensation used in modern video codecs, the prediction is obtained from one or more previously decoded pictures (i.e., reference pictures). The corresponding region used to generate the inter-prediction is indicated by motion information, including motion vectors and reference picture indices.

[0093] The sum unit 134 can compute the residual data as a difference between the input video data 132 and the prediction data from the intra prediction unit 152A or the inter prediction unit 154. The sum unit 134 provides the residual block to the transform unit 136, which applies one or more transforms to the residual block to produce a transform block. The quantization unit 138 quantizes the transform block to form quantized transform coefficients. The entropy coding unit 140 entropy encodes the quantized transform coefficients, as well as other syntax elements such as motion information or intra prediction information, to produce the output bitstream 158.

[0094] Meanwhile, the inverse quantization unit 142 inverse quantizes the quantized transform coefficients, and the inverse transform unit 144 inverse transforms the transform coefficients to reproduce the residual block. The sum unit 146 combines (on a sample-by-sample basis) the residual block with the prediction block to produce a decoded block of video data. The loop filter unit 148 applies one or more filters (e.g., at least one of a neural network-based filter, a neural network-based in-loop filter, a neural network-based post-in-loop filter, an adaptive in-loop filter, or a predefined adaptive in-loop filter) to the decoded block to produce a filtered decoded block.

[0095] According to the techniques of this disclosure, the neural network filtering unit of the loop filter unit 148 can receive data of a reconstructed picture of video data from the sum unit 146 and from one or more other units of the hybrid video coder 130 (e.g., the transform unit 136, the quantization unit 138, the intra prediction unit 152, the inter prediction unit 154, the motion estimation unit 156, and / or one or more other filtering units within the loop filter unit 148). For example, the neural network filtering unit can receive data from a deblocking filter unit (also referred to as a “deblock unit”) of the loop filter unit 148. The neural network filtering unit can receive, for example, a boundary strength value that indicates whether a particular boundary is to be filtered for deblocking and, if so, the extent to which the boundary is to be filtered. For example, the boundary strength value can correspond to a number of samples on either side of the boundary to be modified and / or the extent to which the samples are to be modified.

[0096] In other examples, in addition to or instead of boundary strength values, the neural network filtering unit can receive any or all of coding unit (CU) partition data, prediction unit (PU) partition data, transform unit (TU) partition data, deblocking filter data, quantization parameter (QP) data, intra-prediction data (e.g., reconstructed samples and / or prediction samples), inter-prediction data (e.g., reconstructed samples and / or prediction samples), data representing a distance between a decoded picture and one or more reference pictures, or motion information of one or more decoded blocks of the decoded picture. The deblocking filter data can also include one or more of whether a long filter or a short filter was used for deblocking or whether a strong filter or a weak filter was used for deblocking. The data representing a distance between a decoded picture and a reference picture can be represented as a picture order count (POC) difference between POC values of the pictures.

[0097] A video data block, such as a CTU or CU, can actually include multiple color components, e.g., a luma or “luma” component, a blue color hue chroma or “chroma” component, and a red color hue chroma (chroma) component. The luma component can have a greater spatial resolution than the chroma components, and one of the chroma components can have a greater spatial resolution than the other chroma component. Alternatively, the luma component can have a greater spatial resolution than the chroma components, and both chroma components can have equal spatial resolutions to each other. For example, in a 4:2:2 format, the luma component can be twice as large as the chroma components in the horizontal direction, and equal to the chroma components in the vertical direction. As another example, in a 4:2:0 format, the luma component can be twice as large as the chroma components in the horizontal and vertical directions. The various operations discussed above can generally be applied individually to each of the luma and chroma components (although certain coding information, such as motion information or intra-prediction directions, can be determined for the luma component and inherited by the corresponding chroma components).

[0098] In recent video codecs, hierarchical prediction structures within a group of pictures (GOP) are applied to improve coding efficiency. Figure 3 An example hierarchical prediction structure is illustrated with a group of pictures (GOP) having a size equal to 16.

[0099] Referring again to Figure 2 Intra-picture prediction exploits spatial redundancy that exists within a picture (hence the term “intra”) by deriving a prediction for a block from spatially neighboring (reference) samples that have already been coded / decoded. Directional angular prediction, DC prediction, and planar or plane-up prediction are used in the most recent video codecs, including AVC, HEVC, and VVC.

[0100] Hybrid video coding standards apply a block transform to the prediction residual (whether the prediction residual is from inter- or intra-prediction). In early standards, including H.261, H.262, and H.263, a discrete cosine transform (DCT) was employed. In HEVC and VVC, more transform kernels can be applied in addition to DCT in order to cope with different statistical information in specific video signals.

[0101] Quantization aims to reduce the precision of an input value or a set of input values in order to reduce the amount of data required to represent these values. In hybrid video coding, quantization is typically applied to individual transformed residual samples, i.e., transform coefficients, resulting in integer coefficient levels. In recent video coding standards, a step size is derived from a so-called quantization parameter (QP) that controls the fidelity and the bit rate. A larger step size reduces the bit rate but also reduces the quality, which, for example, leads to block artifacts and blurred details in video pictures.

[0102] Entropy coding unit 140 can perform context adaptive binary arithmetic coding (CABAC) on the coded video. CABAC is used in recent video codecs, such as AVC, HEVC, and VVC, due to its high efficiency.

[0103] Filtering unit 148 can perform in-loop post- or in-loop filtering. In-loop post / in-loop filtering is a filtering process (or a combination of such processes) applied to a reconstructed picture to reduce coding artifacts. The input to the filtering process is typically the reconstructed picture (or reconstructed blocks of the picture), which is a combination of a reconstructed residual signal (e.g., reconstructed samples) and a prediction (e.g., predicted samples), where the reconstructed samples include quantization errors. As shown, the reconstructed picture after in-loop filtering is stored in decoded picture buffer (DPB) 150 and used as a reference for inter-prediction of subsequent pictures. Figure 2

[0104] Coding artifacts mainly depend on the QP. Therefore, QP information is typically used in the design of the filtering process. In HEVC, the in-loop filters include a deblocking filter and a sample adaptive offset (SAO) filter. In the VVC standard, an adaptive loop filter (ALF) is introduced as a third filter. The filtering process of the ALF is shown as follows:

[0105] , (1)

[0106] where is the sample before the filtering process, is the sample value after the filtering process. denotes the filter coefficients, is a clipping function, and denotes a clipping parameter. The variables k and l are in and ​where L denotes the filter length. The clipping function corresponding to the function The clipping operation introduces nonlinearity to make ALF more efficient by reducing the impact of neighboring sample values that are very different from the current sample value. In VVC, the filter parameters can be signaled in the bitstream and can be selected from a pre-defined filter set. The ALF filtering process can also be summarized using the following equation:

[0107] (2)

[0108] The video encoder 200, the video decoder 300, and the hybrid video coder 130 can be configured to perform neural network (NN) based filtering for video coding. Figure 4 is a conceptual diagram illustrating a neural network based filter 170 with four layers. Various studies have shown that embedding a neural network (NN) into a hybrid video coding framework such as Figure 2 can improve compression efficiency. Neural networks have been used for intra prediction and inter prediction to improve prediction efficiency. In recent years, NN based in-loop filtering is also an important research topic. In some examples, the filtering process is applied as a post filter. In such examples, the filtering process is applied to the output picture and the unfiltered picture can be used as a reference picture.

[0109] In addition to existing filters such as deblocking filter, sample adaptive offset (SAO), and / or adaptive loop filter (ALF), the NN based filter 170 can be applied. The NN based filter can also be exclusively applied, where the NN based filter is designed to replace all existing filters. Additionally or alternatively, the NN based filter such as the NN based filter 170 can be designed to complement, enhance, or replace any or all other filters.

[0110] Figure 4 An example of a convolutional neural network (CNN) based filter with four layers is shown. Figure 4 The NN based filtering process of the hybrid video coder 130 can take reconstructed samples as input and the intermediate output is residual samples that are added back to the input to refine the input samples. The NN filter can exploit cross-component correlation using all color components (e.g., Y, U, and V, or Y, Cb, and Cr, i.e., luma data 172A, blue hue chroma 172B, and red hue chroma 172C) as input 172. Different color components can share the same filter (including network structure and model parameters), or each component can have its own specific filter.

[0111] The filtering process can also be summarized as follows:

[0112] (3)

[0113] The model structure and model parameters of the NN-based filter can be predefined and stored in the video encoder 200 and the video decoder 300. The filter can also be signaled in the bitstream.

[0114] In Figure 4 In an example, the NN-based filter can include a series of feature extraction layers followed by an output convolution. In Figure 4 In an example, the feature extraction layers can include 3x3 conv layers followed by parametric rectified linear unit (PReLU) layers. A convolutional layer applies a convolution operation to input data, which involves a filter or kernel being slid over that input data (e.g., the reconstructed samples of the input 172) and computing a dot product at each location. The convolution operation essentially captures local patterns within the input data. For example, in the context of image processing, these patterns can be edges, textures, or other visual features. The filter or kernel is a small matrix of weights that is updated during a training process. By sliding this filter through the input data (or feature maps from a previous layer) and computing a dot product at each location, the convolutional layer creates a feature map that encodes the spatial hierarchies and patterns detected in the input.

[0115] The output of a convolutional layer is a set of feature maps, each corresponding to a filter, used to capture different aspects of the input data. As the data passes through deeper layers of the network, the layers help the neural network learn more complex and abstract features. Figure 4 In the notation 3x3 conv 3x3x6x8 in, the first 3x3 indicates that the convolutional layer has a 3x3 filter size (e.g., a 3x3 matrix). 3x3x6x8 refers to both the input and output dimensions of the convolutional layer, where 6 is the number of input channels and 8 is the number of output channels.

[0116] A PReLU layer is an activation function used in neural networks and was introduced as a variant of the ReLU (rectified linear unit) activation function. As described above, a convolutional layer outputs feature maps, each corresponding to a filter, used to represent detected features in the input. After a convolutional layer, a PReLU layer applies a PReLU activation function to each element of the feature maps produced by that convolutional layer. For positive values, the PReLU layer acts like a standard ReLU, passing the values through. For negative values, the PReLU layer allows small linear negative outputs, rather than setting them to zero (e.g., as ReLU does). This keeps neurons active and maintains gradient flow, which can be beneficial for learning in deep networks.

[0117] In summary, when a convolutional layer is followed by a PReLU layer, the convolutional layer first extracts features from the input data through a set of learned filters. The resulting feature maps are then passed through a PReLU activation function, which introduces nonlinearity and helps avoid the problem of dying neurons by allowing small gradients when the input is negative. This combination is effective in learning complex patterns in the data while maintaining robust gradient flow, which is especially beneficial in deeper network architectures.

[0118] When applying NN-based filtering in video coding, the entire video signal (pixel data) can be divided into multiple processing units (e.g., 2D blocks), and each processing unit can be processed individually or combined with other information associated with the pixel block. Possible choices of processing units include frames, slices / tiles, CTUs, or any predefined or signaled shape and size. Typically, NN-based filtering is performed on reconstructed blocks of video data. Here, reconstructed block and samples can refer to decoded blocks produced by video decoder 300 and blocks reconstructed in the reconstruction loop of video encoder 200.

[0119] To further improve the performance of NN-based filtering, different types of input data can be jointly processed to produce filtered output. The input data can include, but is not limited to, reconstructed pixels / samples, predicted pixels / samples, pixels / samples after in-loop filters, partition structure information, deblocking parameters (e.g., boundary strength (BS)), QP values, slice or picture types, or filter applicability or coding mode maps. The input data can be provided at different granularities. Luma reconstructed and predicted samples can be provided at original resolution, while chroma samples can be provided at lower resolution (e.g., for 4:2:0 representation), or can be upsampled to luma resolution to enable per-pixel representation. Similarly, QP, BS, partition, or coding mode information can be provided at lower resolution, including cases where each frame, slice, or processing block (e.g., QP) has a single value. In other examples, QP, BS, partition, or coding mode information can be upscaled (e.g., replicated) to enable per-pixel / sample representation.

[0120] Figure 5 Examples of architectures utilizing supplemental data are shown in FIGS. Figure 5is a block diagram illustrating an example CNN-based filter with padded input samples and supplemental data. The NN-based filter 171 uses pixels / samples of a processing block combined with supplemental data as input 174. The input 174 can include 4 sub-blocks of interleaved luma samples (Y x 4) 174A and associated blue hue chroma (U) data 174B and red hue chroma (V) data 174C. The supplemental data includes quantization parameter (QP) step size 176 and boundary strength (BS) 178. The area of input pixels / samples can be extended from each side with 4 padding pixels / samples. The resulting size of the processing volume is (4 + 64 + 4) x (4 + 64 + 4) x (4Y + 2UV + 1QP + 3BS).

[0121] With respect to the NN-based filter in FIG. 17, Figure 4 The NN-based filter 171 can include two or more hidden layers that utilize both 1 x 1 convolutions and Leaky ReLU layers, with respect to the NN-based filter in FIG. 17. A Leaky ReLU layer. Similar to a PReLU layer, a Leaky ReLU layer allows a small non-zero gradient to be output when the layer is not active. Instead of outputting zero for negative inputs, Leaky ReLU multiplies these inputs by a small constant. This small slope ensures that even neurons that would not normally be active still make a small contribution to the learning of the network, reducing the likelihood of the problem of ReLU dying.

[0122] The video encoder 200, the video decoder 300, and the hybrid video coder 130 can be configured to implement NN-based filtering with a multi-mode design. To further improve the performance of NN-based filtering, a multi-mode solution can be designed. For example, for each processing unit, the video encoder 200 can select among a set of modes based on rate-distortion optimization, and can signal the selection in the bitstream. Different modes can include different NN models, different values of input information used for these NN models, and so on. In one example, the video encoder 200 and the video decoder 300 can use a NN-based filtering solution with multiple modes based on a single NN model by using different QP values as input to the NN model for different modes.

[0123] Examples of NN architectures will now be described. In one example, a NN-based filtering solution with multiple modes can be used, as described above. Figure 6 The structure of this network is shown in FIG. 18. Figure 6The NN-based filter of FIG. 1 includes a first portion that includes input 3x3 convolutional filters 510A-510E and a respective parametric rectified linear unit (PReLU) filter 512A-512E for each of the inputs to generate feature maps (e.g., a feature extraction portion of the NN filter). A concatenation unit 514 concatenates the feature maps and provides them to a fusion block 516 and a transition block 522. Figure 6 The NN-based filter of FIG. 1 further includes a set 528 of attention residual (AttRes) blocks 530A-530N; and a last portion (e.g., a tail portion) that includes a 3x3 convolutional filter 550, a PReLU filter 552, a 3x3 convolutional filter 554, and a pixel reorganization unit 556. The AttRes blocks can also be referred to as backbone blocks.

[0124] In the first portion (e.g., the feature extraction portion), different inputs are received, including quantization parameters (QPs) 500, partition information (part) 502, boundary strength (BS) 504, prediction samples (pred) 506, and reconstructed samples (rec) 508. Respective 3x3 convolutional filters 510A-510E and PReLU filters 512A-512E convolve and activate the respective inputs to produce feature maps. The concatenation unit 514 then concatenates these feature maps. The fusion block 516, which includes a 1x1 convolutional filter 518 and a PReLU filter 520, fuses the concatenated feature maps. The transition block, which includes a 3x3 convolutional filter 524 and a PReLU filter 526, subsamples the fused input to create an output 188. The output 188 is then fed through the set 528 of attention residual blocks 530A-530N, which can include various numbers of attention residual blocks, such as 8. This attention block is relative to the input 188 and the output 188 is relative to the input 188. The output 188 is then fed through the set 528 of attention residual blocks 530A-530N, which can include various numbers of attention residual blocks, such as 8. This attention block is relative to the input 188 and the output 188 is relative to the input 188. Figure 7 Further explanation. The output 189 from the last attention residual block in the set 184 of attention residual blocks is fed to the last portion of the NN-based filter. In this last portion, the 3x3 convolutional filter 550, the PReLU filter 552, the 3x3 convolutional filter 554, and the pixel reorganization unit 556 process the output 189, and the addition unit 558 combines the result with the original reconstructed sample input 508. This ultimately forms the filtered output for presentation and storage (e.g., in a decoded picture buffer (DPB)) as a reference for subsequent inter-prediction. In some examples, the output 189 from the last attention residual block in the set 184 of attention residual blocks is fed to the last portion of the NN-based filter. In this last portion, the 3x3 convolutional filter 550, the PReLU filter 552, the 3x3 convolutional filter 554, and the pixel reorganization unit 556 process the output 189, and the addition unit 558 combines the result with the original reconstructed sample input 508. This ultimately forms the filtered output for presentation and storage (e.g., in a decoded picture buffer (DPB)) as a reference for subsequent inter-prediction. In some examples, Figure 6 The NN-based filter of FIG. 1 uses 96 feature maps.

[0125] Figure 7 is an example of Figure 6 a conceptual diagram of an attention residual block of FIG. 1. That is, Figure 7An attention residual block 530 is depicted that can include components similar to those of an attention residual block 530A-530N of Figure 6 In this example, the attention residual block 530 includes a first 3x3 convolutional filter 532, a parametric rectified linear unit (PReLU) filter 534, a second 3x3 convolutional filter 536, an attention block 538, and an addition unit 540. The addition unit 540 combines the output of the attention block 538 with the output 188 that was initially received by the convolutional filter 532 to produce an output 189.

[0126] Figure 8 is a conceptual diagram illustrating an example spatial attention layer of Figure 7 As shown in Figure 8 , the spatial attention layer of the attention residual block 530 includes a 3x3 convolutional filter 706, a PReLU filter 708, a 3x3 convolutional filter 710, a size expansion unit 712, a 3x3 convolutional filter 720, a PReLU filter 722, and a 3x3 convolutional filter 724. The 3x3 convolutional filter 706 receives an input 702 that corresponds to the quantization parameter (QP) 500, the partition information (part) 502, the boundary strength (BS) 504, the prediction information (pred) 506, and the reconstructed block (rec) 508 of Figure 6 The 3x3 convolutional filter 720 receives the Z K 704. The outputs of the size expansion unit 712 and the 3x3 convolutional filter 724 are combined and then combined with the R value 730 to generate an S value 732. The S value 732 is then combined with the Z K value 704 to produce an output Z K+1 value 734.

[0127] In other examples, alternative designs of NN architectures can be used. For example, a larger number of low complexity residual blocks in the backbone of the filter of Figure 6 and a reduced number of channels (feature maps) and removal of the attention module can be used. Figure 9 This alternative convolutional neural network filter structure (e.g., for luma filtering) is shown in Figure 9 is a block diagram illustrating an example of a simplified CNN-based filter architecture with padded input samples and supplemental data.

[0128] Figure 9The NN-based filter includes 3x3 convolution filters 810A-810E and PReLU filters 812A-812E that convolve respective inputs (i.e., QP 800, Part 802, BS 804, Pred 806, and Rec 808) to generate feature maps (e.g., a feature extraction portion). A concatenation unit 814 concatenates the convolved inputs (e.g., the feature maps). A fusion block 816 then fuses the concatenated feature maps using a 1x1 convolution filter 818 and a PReLU filter 820. A transition block 822 then processes the fused data using a 3x3 convolution filter 824 and a PReLU filter 826.

[0129] In this example, the NN-based filter includes a set 828 of residual blocks 830A-830N (also referred to as backbone blocks), each of which can be constructed according to a residual block structure 830 as discussed below. Figure 10 The residual blocks 830A-830N can replace the AttRes blocks 530A-530N of the example of FIG. 5. Figure 6 The example of FIG. 6 can be used for luma (brightness) filtering, but similar modifications can be made for chroma (color) filtering as discussed below. Figure 9

[0130] Figure 9 The number of residual blocks and channels included in the set 828 of FIG. 6 can be configured in different ways. That is, N can be set to different values, and the number of channels in the residual block structure 830 can be set to a number different than 160 to achieve different performance-complexity tradeoffs. Chroma filtering can be performed with these modifications to process the chroma channels.

[0131] The set 828 of residual blocks 830A-830N has N instances of the residual block structure 830. In one example, N can equal 32, such that there are 32 residual block structures. The residual blocks 830A-830N can use 64 feature maps, which is reduced relative to the 96 feature maps used in the example of FIG. 5. Figure 6 The example of FIG. 6 uses 64 feature maps, which is reduced relative to the 96 feature maps used in the example of FIG. 5.

[0132] Figure 10 is an example of a residual block structure 830. Figure 9 ​conceptual diagram of an example residual block structure 830. In this example, the residual block structure 830 includes a first 1x1 convolutional filter 832 that can increase the number of input channels to 160 before an activation layer (PReLU filter 834) processes the input channels. The PReLU filter 834 can thus reduce the number of channels to 64 through this processing. Then, a second 1x1 convolutional filter 836 processes the reduced channels, followed by a 3x3 convolutional filter 838. Finally, a combination unit 840 can combine the output of the 3x3 convolutional filter 838 with the original input received by the residual block structure 830.

[0133] In yet another NN architecture, the residual blocks can be replaced by filter blocks (also referred to as stem blocks) as shown in Figure 11 In this example, the bypass branches around all layers in each residual block are removed as shown in Figure 12 The number of channels and the number of filter blocks are configurable, e.g., 64 channels, 24 filter blocks, with 160 channels before and after activation.

[0134] Figure 11 is a conceptual diagram of another example filter block structure that illustrates a set of attention residual blocks that can be replaced by Figure 6 a filter block according to the techniques of this disclosure. Figure 11 The NN-based filter of includes 3x3 convolutional filters 1010A-1010E and PReLU filters 1012A-1012E that convolve respective inputs (i.e., QP 1000, Part 1002, BS 1004, Pred 1006, and Rec 1008) to form feature maps (e.g., feature extraction portion). A concatenation unit 1014 concatenates these feature maps. Then, a fusion block 1016 fuses the concatenated inputs using a 1x1 convolutional filter 1018 and a PReLU filter 1020. Then, a transition block 1022 processes the fused data using a 3x3 convolutional filter 1024 and a PReLU filter 1026.

[0135] In this example, the NN-based filter unit includes N filter blocks 1030A-1030N (also referred to as stem blocks), each of which can have the structure of a filter block 1030 as discussed below. Figure 12 The filter block structure 1030 can be substantially similar to the residual block structure 830, except that the combination unit 840 is omitted from the filter block structure 1030 so that the input is not combined with the output. Instead, the output of each residual block structure can be fed directly to a subsequent block.

[0136] The number of channels and the number of filter blocks can be configured. In one example, these parameters can be set to 64 channels and 32 filter blocks. The number of additional channels in each filter block 198 can be 160 as discussed above.

[0137] Figure 12 This is an example Figure 11 A conceptual diagram of an example filter block structure 1030 is provided. In this example, the residual block structure 1030 includes a first 1×1 convolutional filter 1032, which increases the number of input channels to 160 before the activation layer (PReLU filter 1034) processes the input channels. The PReLU filter 1034 can then reduce the number of channels to 64 through this processing. A second 1×1 convolutional filter 1036 then processes the reduced number of channels, followed by a 3×3 convolutional filter 1038. As discussed above, with... Figure 10 Compared to the residual block structure 830, the filter block structure 1030 does not include a combination unit.

[0138] Convolutions with 3×3 kernels are popular in neural network-based filters. In the architecture described above, 3×3×N×M convolutions are utilized in multiple parts and blocks, where the 3×3 kernels slide in the spatial (2D) domain. However, multidimensional convolutions such as 2D kernel convolutions introduce significant complexity. According to the techniques disclosed herein, video encoder 200 and video decoder 300 can be configured to utilize separable convolutions instead of multidimensional convolutions (e.g., 3×3×N×M convolutions). For example, two separable one-dimensional convolutions can be used instead of 3×3 convolutions in any part of a neural network-based filter. The use of separable convolutions reduces computational complexity and memory bandwidth requirements.

[0139] To avoid overcomputation and reduce the parameter set derived from multidimensional convolutions (such as 3×3 convolutions (or 2D convolutional quantities with higher-dimensional kernels) or similar convolutions in the CNN architecture described above), this disclosure describes a technique in which the video encoder 200 and video decoder 300 are configured to utilize separable convolutions (e.g., 1D separable convolutions) generated by low-complexity approximations instead of multidimensional (e.g., 2D) convolutions that slide in the spatial direction. While the technique of this disclosure is described with reference to 3×3 convolutions (e.g., 4×4, 5×5A, or larger), the decomposition technique of this disclosure can be used for multidimensional convolutions of any size. Typically, a multidimensional convolution has a kernel size n1×n2 in the spatial dimension, where n1 and n2 are positive integers. The values ​​of n1 and n2 can be the same or different. A multidimensional convolution can also have a size K (e.g., n1×n2×K) in the depth dimension. Furthermore, when the number of output channels is M, a multidimensional convolution can be represented as a 4A-D tensor of n1×n2×K×M.

[0140] The video encoder 200 and video decoder 300 can be configured to perform multidimensional convolution decomposition. In one example of this disclosure, the low-rank convolution approximation decomposes a 3×3×M×N convolution into a pixel-wise convolution (1×1×M×R), two separable convolutions (3×1×R×R, 1×3×R×R), and another pixel-wise convolution (1×1×R×N). Here, R is the rank of the approximation and can be used to adjust the performance / complexity of the approximation. The value of R can be an integer. In some examples, R can be derived as a function (ratio) of M or N or max(M,N). In some examples, R can be set to be equal to A*max(M,N), where A is less than 1 (e.g., 0.2, 0.5, 0.8), A is greater than 1 (e.g., 1.0, 1.2), or other values.

[0141] In a typical example, a multidimensional convolution can be approximated by multiple separable convolutions in the following way: perform a first convolution of size n1×1 and perform a second convolution of size 1×n2 on the output of the first convolution.

[0142] Figure 13 An example is shown of using separable convolutions to approximate multidimensional convolutions in the backbone of a neural network-based filter. In this example, the multidimensional convolution is a 2D 3×3 convolution. However, the techniques disclosed herein can be extended to convolutions of other dimensions.

[0143] Figure 13 It shows that the backbone block is from Figure 9 and Figure 10 Example of residual block 830A. Figure 13 An example is shown where a 3×3×K×K convolution 838 is decomposed into a series of 1D and separable convolutions in residual blocks 1300. That is, the video encoder 200 and the video decoder 300 can be configured to execute residual blocks 1300, which include performing multiple separable convolutions to approximate multidimensional convolutions. Figure 13 In the example, multiple separable convolutions include a 3×1×R×R separable convolution 1304 and a 1×3×R×R separable convolution 1306. In other examples, the order of separable convolutions 1304 and 1306 can be interchanged.

[0144] Thus, in one example of the disclosure, to perform a plurality of separable convolutions to approximate a multi-dimensional convolution, video encoder 200 and video decoder 300 can be configured to perform a first 1x1 convolution (e.g., 1x1xKxR convolution 1302), perform a first separable convolution of the plurality of separable convolutions on an output of the first 1x2 convolution (e.g., 3x1xRxR separable convolution 1304), perform a second separable convolution of the plurality of separable convolutions on an output of the first separable convolution (e.g., 1x3xRxR separable convolution 1306), and perform a second 1x1 convolution on an output of the second separable convolution (e.g., 1x1xRxK convolution 1308). The number of output channels of the first 1x1 convolution 1302 is used to control the complexity approximation of the multi-dimensional convolution. The number of output channels of the separable convolutions 1304 and 1306 can be selected to control the complexity approximation of the multi-dimensional convolution. The separable convolutions 1304 and 1306 are performing a depthwise convolution operation.

[0145] In another example, to perform a plurality of separable convolutions to approximate a multi-dimensional convolution, video encoder 200 and video decoder 300 can receive an input, perform a 1x1xKxM convolution on the input, perform a PReLU layer on an output of the 1x1xKxM convolution, perform a 1x1xMxK convolution on an output of the PReLU layer; perform a 3x1xKxR separable convolution on a result of the 1x1xMxK convolution, perform a 1x3xRxK separable convolution on a result of the 3x1xKxR separable convolution, perform a 1x1xRxK convolution on a result of the 1x3xRxK separable convolution.

[0146] In another example, Figure 13 An example is shown in which the 3x3xKxK convolution 838 is decomposed into a series of ID and separable convolutions in the residual block 1300 but in which the first ID convolution is fused with another ID convolution. That is, video encoder 200 and video decoder 300 can be configured to perform a residual block 1310 that includes performing a 1x1xMxR convolution 1320 that is a fusion of a 1x1xMxK convolution (e.g., convolution 836) and a 1x1xKxR convolution (e.g., convolution 1302). In this way, the decomposition of the multi-dimensional convolution can be further simplified. The fusion of the 1x1 convolutions in the residual block 1310 can be used in any case where the decomposed convolutions are applied before or after another pixel-wise convolution (e.g., 1x1 fusion) and there is no nonlinear or residual connection between them. The values of M and R can be selected to control the complexity and accuracy of the approximation.

[0147] In other examples of the disclosure, the NN-based filtering process includes a cascaded (e.g., applied in sequence) application of the stem block. For example, the stem block can be applied to multiple different color components. In other examples, the NN-based filtering process includes a cascaded application of the stem block applied in two or more parallel processing branches.

[0148] In one or more examples of the disclosure, performing multiple separable convolutions to approximate a multi-dimensional convolution in a stem block of a NN-based filtering process includes applying an element-wise activation process as part of the multi-dimensional convolution. Examples of element-wise activation processes can include a ReLU function and a PReLU function. A PReLU function is an example of a parameter-controlled element-wise activation process.

[0149] Different algorithms for determining separable kernels to replace 2D or other multi-dimensional kernels can be used to determine the decomposition. In some examples, a Candecomp / Parafac (CP) tensor decomposition can be used. Examples of other decompositions suitable for use with the present disclosure can be found in V. Lebedev, Y. Ganin, M. Rakhuba, I. Oseledets, V. Lempitsky, "Speeding up Convolutional Neural Networks Using Fine-tuned CP-Decomposition," ICLR 2015.

[0150] Alternative implementations and architectures will now be described. In some examples, a 2D convolution of different dimensions (e.g., Z x Y) or a convolution component of higher dimension can be used, and replaced with corresponding separable convolutions 1 x Z and Y x 1.

[0151] Figure 14 is a block diagram illustrating another example of a multi-dimensional convolution decomposition. As shown, a 3 x 3 x K x K convolution 838 of a residual block 830A is approximated by a 3 x 1 x K x R convolution 1400, and then by a 1 x 3 x R x K convolution 1410. In other examples, the positions of the convolutions 1400 and 1410 can be swapped. R is the canonical rank of the decomposition. A lower rank implies a greater reduction in complexity. In comparison to the example of Figure 14 In comparison to the example of Figure 13 , the video encoder 200 and the video decoder 300 can use two separable convolutions to approximate a 3 x 3 convolution without performing a leading or trailing 1 x 1 convolution.

[0152] Aspects of integrating the described techniques into a CNN architecture will now be described. While Figure 13 the example of Figure 9 and Figure 10The residual blocks described herein are related, but the techniques disclosed herein can be used with any multidimensional convolution found anywhere in a neural network-based filter. For example, Figure 6 A to Figure 7 The backbone blocks (attention residual blocks 530A to 530N) and Figure 11 A to Figure 12 The 3×3 convolutions in the backbone blocks (filter blocks 1030A to 1030N) can also be approximated using multiple separable convolutions. Alternatively, as referenced above... Figure 13 A or Figure 14 The described multiple separable convolutions approximate the feature extraction portion of any NN-based filter described above (e.g., Figure 11 Convolutional layers 1010A to 1010E and PReLU layers 1012A to 1012E), fusion blocks (e.g., Figure 11 Block 1016), transition blocks (e.g., Figure 11 Block 1022), backbone block (e.g., Figure 11 Block 1028) or the tail portion (e.g., Figure 11 This can be any multidimensional convolution (e.g., a 3×3 convolution) as shown in convolution 1050, PReLU 1052, convolution 1054, and pixel recombination 1056. Typically, the feature extraction portion of a neural network can include any layer configured to extract features from the input data. The tail portion of the neural network can include any number of layers at the end of the neural network before the output.

[0153] The aspects of decomposing the training will now be described. In some examples, the parameters of the separable convolution can be extracted from the trained parameters of the 2D convolution. An example extraction model can be implemented as follows.

[0154] For CP decomposition, a 3D (e.g., 3×3×k) convolutional kernel It can be decomposed into ,in It is the rank of the decomposition, and These are kernels in specific dimensions. The decomposition can be optimized using a nonlinear optimization process (e.g., the Gauss-Newton method). The squared error is used to calculate the kernel parameters.

[0155] Alternatively, there are other processes inspired by stochastic gradient descent and machine learning practices. Consider multiple approximated 3x3 convolutions within a neural network model. These approximated convolutions can be optimized individually (e.g., trained sequentially to match the output feature maps of the original 3x3 convolution and any accumulated approximation error from previous approximated convolutions in the network), or jointly across the entire network (e.g., these approximated convolutions are plugged into the network, and then the entire network or just all approximated convolutions are optimized end-to-end).

[0156] The 3x3 convolution approximation techniques described herein for CNN architectures (e.g., similar to Figure 13 and Figure 14 ) can be applicable to different types of architectures and modules that employ 2D convolutions in a sliding window across spatial dimensions and receive supplemental information as input data. The application of the techniques described herein can not only be used for the stem of a NN architecture, but also for the head blocks (e.g., feature extraction, fusion blocks, and / or transition blocks) or tail portions of the architecture.

[0157] Another example of a CNN ILF architecture is a multi-mode CNN ILF with separable convolutions. By utilizing separable convolutions in place of 2D convolutions (3x3), further complexity reduction of the CNN ILF architecture is achieved. In EE1 Test 1.3.5 of JVET-AD00205, a low-rank convolution approximation decomposes a 3x3xMxN convolution into a pixel-wise convolution (1x1xMxR), two separable convolutions (3x1xRxR, 1x3xRxR), and another pixel-wise convolution (1x1xRxN) to apply to a residual block. Here, R is the rank of the approximation and can affect the performance / complexity of the approximation.

[0158] In some examples, the residual block has Figure 14 the illustrated decomposition of Figure 9 is implemented with parameters K = 64, M = 160, and R = 51, and the total number of 24 residual blocks results in a complexity of 356.43 kMAC and a number of parameters of 1.07M for the intra-luma model of the network.

[0159] In some examples of the residual block illustrated in Figure 15 the 3x3 convolution is decomposed into a 3x1xC1xR convolution and followed by a 1x3xRxC2 convolution, where C1 and C2 are the number of input and output channels, respectively, and R is the rank of the approximation. The parameter R can be derived as R = C1xC2 / (C1+C2) and controls the complexity of the approximation.

[0160] In some examples, the residual block has Figure 15 the illustrated decomposition of Figure 9The architecture of is implemented with parameters R1 = 8, R2 = 44, M1 = 160, and M2 = 32, and a total of 24 residual blocks, such that the complexity of the network is 358.43 kMAC and the number of parameters is 1.07M for the intra-luma model.

[0161] Figure 15 A proposed architecture is shown in which the 3x3 convolutional block is replaced with 3x1 and 1x3 separable convolutions. In this example, the residual block structure 1530 includes a first 1x1 convolutional filter 1532 before a first activation layer (PReLU filter 1534), and a 3x3 convolutional filter 1540 and a second activation layer (PReLU filter 1542) in parallel with the first 1x1 convolutional filter 1532 and the PReLU filter 1534. Then, a second 1x1 convolutional filter 1536 processes the combined output of the PReLU filter 1534 and the PReLU filter 1542, followed by a 3x3 convolutional filter 1538. However, in Figure 15 the example of, the 3x3 convolutional filter 1540 can be approximated using multiple separable convolutions, as shown by the 3x1 convolutional filter 1550 and the 1x3 convolutional filter 1552 in Figure 15 Similarly, the 3x3 convolutional filter 1538 can be approximated using multiple separable convolutions, as shown by the 3x1 convolutional filter 1560 and the 1x3 convolutional filter 1562 in Figure 15 Similarly, the 3x3 convolutional filter 1538 can be approximated using multiple separable convolutions, as shown by the 3x1 convolutional filter 1560 and the 1x3 convolutional filter 1562 in

[0162] Figure 16 is a conceptual diagram illustrating an example of a unified filter 1600 with joint models (joint luma and chroma). Figure 16 represents the general principles described above with respect to Figure 4 A through Figure 15 is one example implementation of the general principles described above with respect to Figure 16 The parameters of the example of include one or more of the following: d1 = 192, d2 = 32, d3 = 16, d4 = 16, d5 = 16, C = 64, C1 = 160, C 21 = 32, C 22 =32, C 31 = 64, N = 24, and d6 = 48.

[0163] Figure 17 is a conceptual diagram illustrating an example of a unified filter 1700 with separate luma / chroma models. The filter 1700 can be applied to luma samples. Figure 17 represents the general principles described above with respect to Figure 4 A through Figure 15One example implementation of the general principles described. Filter 1700 includes one or more instances of backbone block 1750. In some examples, Figure 17 Parameters of the example include one or more of the following: d1 = 192, d2 = 32, d3 = 16, d4 = 16, d5 = 16, C = 64, C1 = 160, C 21 = 32, C 22 = 32, C 31 = 64, N = 20, and d6 = 48.

[0164] Figure 18 is a conceptual diagram illustrating an example of a unified filter with separate luma / chroma models. Filter 1800 can be applied to chroma samples. Figure 18 denotes the general principles described above with respect to Figure 4 A through Figure 15 One example implementation of the general principles described. Filter 1800 includes one or more instances of backbone block 1850. In some examples, Figure 18 Parameters of the example include one or more of the following: d1 = 192, d2 = 32, d3 = 16, d4 = 16, d5 = 16, C = 64, C1 = 160, C 21 = 32, C 22 = 32, C 31 = 64, N = 16, and d6 = 48.

[0165] Prior art architectures such as Figure 16 A through Figure 18 utilize multi-scale processing in the residual blocks of the filter’s backbone. The multi-scale processing in the architectures described above is applied to a set of features extracted from all types of input data at the input (head) block. However, different types of input data are characterized by different amounts of information that have various importances to the efficiency of the filtering, and the application of the same type of processing can not be optimal under complexity and memory constraints.

[0166] To address the above issues, this disclosure describes techniques for localizing multi-scale feature extraction at the head block of an architecture and applying the multi-scale feature extraction to a subset of input data that contains a desired level of entropy (amount of information) and is important for filtering operations. This disclosure describes techniques for applying finite support convolutional filtering (with fixed kernel size, e.g., 3x3 spatial convolutions) sequentially without intermediate nonlinear operations, allowing for cascading of filters and effectively enabling feature extraction from wider spatial regions, e.g., 5x5A or 7x7 convolutions in the case of 2 or 3 layers of 3x3 convolutions, respectively.

[0167] Figure 19 is a conceptual diagram illustrating an example filter architecture 1900 with multi-scale feature extraction. In Figure 19 In the example of filter architecture 1900, multi-scale processing is moved from the backbone of the architecture to the head block and applied to a subset of input data, e.g., as compared to unified filter 1700. In Figure 19 In the example of filter architecture 1900, 3x3 convolution 1902 performs a first feature extraction on the pixel data of the block; 5x5 convolution 1904 performs a second feature extraction on the pixel data; and 7x7 convolution 1906 performs a third feature extraction on the pixel data. Filter architecture 1900 can operate in other ways according to the principles described with respect to Figure 4 A through Figure 18

[0168] In some implementations, convolutions 1920 included in filter 1700 can be excluded from filter architecture 1900. Performing multi-scale feature extraction in the head block can reduce the need to perform multi-scale processing in the backbone, and thus excluding convolutions 1920 can simplify filter 1900 without reducing the quality of filtering obtained from filter 1900.

[0169] In some examples, the type of input data that undergoes multi-scale feature extraction includes pixel data, such as reconstructed or predicted pixels. In some examples, multi-scale processing is implemented with parallel feature extraction by convolutional filters supported by different filters (e.g., 3x3, 5x5, 7x7, etc.). Figure 19 An example of this implementation integrated in a unified filter architecture is shown in

[0170] ​In some examples, the number of features extracted by different filters varies and is set as a function of the filter support. For example, d11 = fun(d1, convSize11), d12 = fun(d1, convSize12), d11 < d1, d12 < d11 or d11 = d1 / 2, d12 = d11 / 2. In some examples, multi-scale extraction can be achieved by using pixel reorganization (e.g., by reorganizing every other pixel in the spatial domain of the feature into the depth domain and then applying a 3×3 convolution) with a fixed filter kernel support. Then, the original shape of the feature can be restored through a reverse process to reorganize the pixels from the depth domain back into the spatial domain.

[0171] In some examples, the application of convolution in the multi-scale framework can be applied together with a spatial offset (e.g., stride value > 1 in any spatial direction in the spatial direction). Specific implementation examples may include: for a 3×3 spatial convolution, the stride = {1,1} (in the horizontal or vertical direction respectively); for a 5×5 spatial convolution, the stride is {2,2}; for a 7×7, the stride is {4,4}, and so on.

[0172] In some examples, CNN feature extraction is achieved by sequentially applying CNN filters with a limited filter support (e.g., 3×3) through filters with a wider filter support / larger kernel (e.g., 5×5, 7×7A, etc.). In some examples, non-linear operations of activation are not included in the sequential feature extraction to allow linear convolution cascading.

[0173] In some examples, the number of features extracted at different stages of sequential implementation is a function of that stage, e.g., {d121, d122, d123} = fun(d1, convSize, stage_id), or {d121 = d1, d122 < d121, d123 < d122}, or d122 = d121 / 2, d123 = d122 / 2.

[0174] Figure 20 is a conceptual diagram illustrating an example filter architecture 2000 with multi-scale feature extraction. In Figure 20 the example, multi-scale processing is moved from the backbone of the architecture to the head block and is applied to a subset of the input data as in Figure 19 . In Figure 20 the example, the 7×7 convolution filter 2006 is implemented as a set of cascaded 3×3 convolution filters 2008, 2010, and 2012. The filter architecture 2000 can operate in other ways according to the principles described with respect to Figure 4 A to Figure 19 .

[0175] Figure 21 is a conceptual diagram illustrating an example filter architecture 2100 with multi-scale feature extraction. In Figure 21 example, multi-scale processing is applied to features extracted from pixel data (e.g., reconstructed data or prediction data), and is not applied or is only limitedly applied to features of supplemental data. In some examples, features extracted from non-pixel data are concatenated to the input or output of a residual block as Figure 21 indicated, and can be concatenated at an earlier or later stage of the filtering process. Figure 21 Examples of filter architectures with multi-scale feature extraction are illustrated.

[0176] It is evaluated that the proposed techniques can be applicable to different types of architectures and modules for CNN-based video / image signal processing.

[0177] Applying the techniques of this disclosure to NNVC architectures can reduce computational complexity and memory bandwidth requirements, and provide better performance. The examples described in this document are described with respect to NN-aided in-loop filtering, but can be applicable to any NN-based video coding tool that consumes input data with certain statistical properties, such as static content or sparse representation.

[0178] Figure 22 is a block diagram illustrating an example video encoder 200 that can perform the techniques of this disclosure. Figure 22 is provided for purposes of explanation and should not be considered to be a limitation on the techniques broadly illustrated and described in this disclosure. For purposes of explanation, this disclosure describes video encoder 200 in terms of the techniques of VVC and HEVC. However, the techniques of this disclosure can be performed by video encoding devices configured to other video coding standards and video coding formats, such as AV1 and subsequent formats of the AV1 video coding format.

[0179] In Figure 22In the example of FIG. 2, video encoder 200 includes video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, decoded picture buffer (DPB) 218, and entropy encoding unit 220. Any or all of video data memory 230, mode select unit 202, residual generation unit 204, transform processing unit 206, quantization unit 208, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, filter unit 216, DPB 218, and entropy encoding unit 220 can be implemented in one or more processors or in processing circuitry. For instance, the units of video encoder 200 can be implemented as one or more circuits or logic elements as part of hardware circuitry, or as part of a processor, ASIC, or FPGA. Also, video encoder 200 can include additional or alternative processors or processing circuitry to perform these and other functions.

[0180] Video data memory 230 can store video data to be encoded by the components of video encoder 200. Video encoder 200 can receive the video data stored in video data memory 230 from, for example, video source 104 Figure 1 DPB 218 can function as a reference picture memory that stores reference video data for use in prediction of subsequent video data by video encoder 200. Video data memory 230 and DPB 218 can be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. Video data memory 230 and DPB 218 can be provided by the same memory device or separate memory devices. In various examples, video data memory 230 can be on-chip with other components of video encoder 200, as illustrated, or off-chip relative to those components.

[0181] In this disclosure, reference to video data memory 230 should not be interpreted as being limited to memory internal to video encoder 200 (unless specifically described as such) or memory external to video encoder 200 (unless specifically described as such). Rather, reference to video data memory 230 should be understood as a reference memory that stores video data that video encoder 200 receives for encoding (e.g., video data for a current block to be encoded). Figure 1 Memory 106 of source device 102 can also provide temporary storage of the outputs from the various units of video encoder 200.

[0182] is illustratedFigure 22 The various units of video encoder 200 are shown to help understand the operations performed by video encoder 200. The units can be implemented as fixed- function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide particular functionality, and are preset on the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functionality in the operations that can be performed. For instance, programmable circuits can execute software or firmware that cause the programmable circuits to operate in the manner defined by instructions of the software or firmware. Fixed-function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the types of operations that the fixed-function circuits perform are generally immutable. In some examples, one or more of the units can be distinct circuit blocks (fixed-function or programmable), and in some examples, one or more of the units can be integrated circuits.

[0183] Video encoder 200 can include arithmetic logic units (ALUs), elementary function units (EFUs), digital circuits, analog circuits, and / or programmable cores formed from programmable circuitry. In examples where operations of video encoder 200 are performed using software executed by the programmable circuitry, memory 106 (FIG. 1) can store the instructions (e.g., object code) of the software that video encoder 200 receives and executes, or another memory within video encoder 200 (not shown) can store such instructions. Figure 1 ) can store the instructions (e.g., object code) of the software that video encoder 200 receives and executes, or another memory within video encoder 200 (not shown) can store such instructions.

[0184] Video data memory 230 is configured to store received video data. Video encoder 200 can retrieve pictures of the video data from video data memory 230 and provide the video data to residual generation unit 204 and mode selection unit 202. Video data in video data memory 230 can be raw video data that is to be encoded.

[0185] Mode selection unit 202 includes motion estimation unit 222, motion compensation unit 224, and intra-prediction unit 226. Mode selection unit 202 can include additional functional units that perform video prediction according to other prediction modes. As examples, mode selection unit 202 can include a palette unit, an intra-block copy unit (which can be part of motion estimation unit 222 and / or motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0186] The mode select unit 202 generally coordinates the multiple encoding passes to test combinations of encoding parameters and resulting rate-distortion values for such combinations. The encoding parameters can include partitioning of CTUs into CUs, prediction modes for CUs, transform types for residual data of CUs, quantization parameters for residual data of CUs, and so on. The mode select unit 202 can ultimately select the combination of encoding parameters that has a better rate-distortion value compared to other tested combinations.

[0187] The video encoder 200 can partition a picture retrieved from the video data memory 230 into a series of CTUs, and encapsulate one or more CTUs within a slice. The mode select unit 202 can partition the CTUs of the picture according to a tree structure such as the MTT structure, the QTBT structure, a superblock structure, or the quad-tree structure described above. As described above, the video encoder 200 can form one or more CUs by partitioning a CTU according to the tree structure. Such CUs can also be referred to generally as “video blocks” or “blocks.”

[0188] In general, the mode select unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate prediction blocks for a current block (e.g., a current CU, or in HEVC, an overlapping portion of a PU and a TU). To perform inter prediction for the current block, the motion estimation unit 222 can perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously coded pictures stored in the DPB 218). Specifically, the motion estimation unit 222 can calculate, for example, a sum of absolute difference (SAD), a sum of squared difference (SSD), a mean absolute difference (MAD), a mean squared difference (MSD), and so on, that represent how closely a potential reference block would match the current block. The motion estimation unit 222 can generally perform these calculations using sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 can identify the reference block with the lowest value resulting from these calculations to indicate the reference block that most closely matches the current block.

[0189] Motion estimation unit 222 can form one or more motion vectors (MVs) that define a position of a reference block in a reference picture relative to a position of the current block in the current picture. Motion estimation unit 222 can then provide the motion vector(s) to motion compensation unit 224. For example, for uni-directional inter prediction, motion estimation unit 222 can provide a single motion vector, while for bi-directional inter prediction, motion estimation unit 222 can provide two motion vectors. Motion compensation unit 224 can then generate a prediction block using the motion vector(s). For example, motion compensation unit 224 can use the motion vector(s) to retrieve data of the reference block. As another example, in cases where the motion vector has fractional sample precision, motion compensation unit 224 can interpolate values of the prediction block according to one or more interpolation filters. Moreover, for bi-directional inter prediction, motion compensation unit 224 can retrieve data of two reference blocks identified by the respective motion vectors and combine the retrieved data, e.g., by sample-wise averaging or weighted averaging.

[0190] When operating according to the AV1 video coding format, motion estimation unit 222 and motion compensation unit 224 can be configured to use translational motion compensation, affine motion compensation, overlapped block motion compensation (OBMC), and / or compound inter-intra prediction to encode coding blocks (e.g., both luma coding blocks and chroma coding blocks) of video data.

[0191] As another example, for intra prediction or intra prediction coding, intra prediction unit 226 can generate a prediction block from neighboring samples of the current block. For example, for directional modes, intra prediction unit 226 can generally mathematically combine values of the neighboring samples and fill these computed values across the current block in a defined direction to produce the prediction block. As another example, for a DC mode, intra prediction unit 226 can compute an average of neighboring samples of the current block and generate the prediction block to include the resulting average for each sample of the prediction block.

[0192] When operating according to the AV1 video coding format, intra prediction unit 226 can be configured to use directional intra prediction, non-directional intra prediction, recursive filter intra prediction, luma-chroma (CFL) prediction, intra block copy (IBC), and / or palette mode to encode coding blocks (e.g., both luma coding blocks and chroma coding blocks) of video data. Mode selection unit 202 can include additional functional units that perform video prediction according to other prediction modes.

[0193] The mode selection unit 202 provides the prediction block to a residual generation unit 204. The residual generation unit 204 receives an uncoded original version of the current block from the video data memory 230 and the prediction block from the mode selection unit 202. The residual generation unit 204 computes the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 can also determine the difference between sample values in the residual block to generate the residual block using residual differential pulse code modulation (RDPCM). In some examples, the residual generation unit 204 can use one or more subtractor circuits that perform binary subtraction to form.

[0194] In examples in which the mode selection unit 202 partitions a CU into PUs, each PU can be associated with a luma prediction unit and corresponding chroma prediction units. Video encoder 200 and video decoder 300 can support PUs having various sizes. As noted above, a size of a CU can refer to a size of a luma coding block of the CU, while a size of a PU can refer to a size of a luma prediction unit of the PU. Assuming that a particular CU has a size of 2Nx2N, video encoder 200 can support PU sizes of 2Nx2N or NxN for intra-prediction, and 2Nx2N, 2NxN, Nx2N, NxN, or similar symmetric PU sizes for inter-prediction. Video encoder 200 and video decoder 300 can also support asymmetric partitioning for PU sizes of 2NxnU, 2NxnD, nLx2N, and nRx2N for inter-prediction.

[0195] In examples in which the mode selection unit 202 does not further partition a CU into PUs, each CU can be associated with a luma coding block and corresponding chroma coding blocks. As above, a size of a CU can refer to a size of a luma coding block of the CU. Video encoder 200 and video decoder 300 can support CU sizes of 2Nx2N, 2NxN, or Nx2N.

[0196] For other video coding techniques, such as intra block copy mode coding, affine mode coding, and linear model (LM) mode coding, as some examples, the mode selection unit 202 generates a prediction block for the current block being coded via a respective unit associated with the coding technique. In some examples, such as palette mode coding, the mode selection unit 202 can not generate a prediction block, but instead generate syntax elements that indicate the manner in which the block is to be reconstructed based on a selected palette. In such modes, the mode selection unit 202 can provide these syntax elements to the entropy encoding unit 220 for encoding.

[0197] As described above, the residual generation unit 204 receives video data for a current block and a corresponding prediction block. The residual generation unit 204 then generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0198] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a “transform coefficient block”). The transform processing unit 206 can apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 can apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 can perform multiple transforms on the residual block, e.g., a primary transform and a secondary transform such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0199] When operating according to AV1, the transform processing unit 206 can apply one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a “transform coefficient block”). The transform processing unit 206 can apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 can apply a horizontal / vertical transform combination, which can include a discrete cosine transform (DCT), an asymmetric discrete sine transform (ADST), a flipped ADST (e.g., ADST in reverse order), and an identity transform (IDTX). When the identity transform is used, the transform is skipped in one of the vertical or horizontal directions. In some examples, the transform processing can be skipped.

[0200] The quantization unit 208 can quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 can quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) can adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization can introduce loss of information, and thus, quantized transform coefficients can have lower precision than the original transform coefficients produced by the transform processing unit 206.

[0201] Inverse quantization unit 210 and inverse transform processing unit 212 can apply inverse quantization and inverse transforms, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. Reconstruction unit 214 can produce a reconstructed block corresponding to the current block (albeit potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by mode selection unit 202. For example, reconstruction unit 214 can add samples of the reconstructed residual block to corresponding samples from the prediction block generated by mode selection unit 202 to produce the reconstructed block.

[0202] Filter unit 216 can perform one or more filtering operations on the reconstructed block, including the CNN-based filtering techniques described herein. For example, filter unit 216 can also perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In some examples, the operations of filter unit 216 can be skipped.

[0203] When operating according to AV1, filter unit 216 can perform one or more filtering operations on the reconstructed block. For example, filter unit 216 can perform a deblocking operation to reduce blocking artifacts along the edges of the CU. In other examples, filter unit 216 can apply a constrained direction enhancement filter (CDEF), which can be applied after deblocking and can include the application of a non-separable, non-linear, low-pass directional filter based on an estimated edge direction. Filter unit 216 can also include a loop restoration filter applied after CDEF, and can include a separable, symmetric, normalized Wiener filter or a double-sided box filter.

[0204] Video encoder 200 stores the reconstructed block in DPB 218. For example, in examples in which the operations of filter unit 216 are not performed, reconstruction unit 214 can store the reconstructed block to DPB 218. In examples in which the operations of filter unit 216 are performed, filter unit 216 can store the filtered reconstructed block to DPB 218. Motion estimation unit 222 and motion compensation unit 224 can retrieve reference pictures formed from reconstructed (and potentially filtered) blocks from DPB 218 to inter-predict blocks of subsequent encoded pictures. In addition, intra-prediction unit 226 can use reconstructed blocks of the current picture in DPB 218 to intra-predict other blocks in the current picture.

[0205] In general, entropy encoding unit 220 can entropy encode syntax elements received from other functional components of video encoder 200. For example, entropy encoding unit 220 can entropy encode quantized transform coefficient blocks from quantization unit 208. As another example, entropy encoding unit 220 can entropy encode prediction syntax elements (e.g., motion information for inter-prediction or intra-mode information for intra-prediction) from mode select unit 202. Entropy encoding unit 220 can perform one or more entropy encoding operations on the syntax elements, which are another example of video data, to generate entropy encoded data. For example, entropy encoding unit 220 can perform a context- adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable- to-variable (V2V) length coding operation, a syntax-based context- adaptive binary arithmetic coding (SBAC) operation, a Probability Interval Partitioning Entropy (PIPE) coding operation, an Exponential-Golomb coding operation, or another type of entropy coding operation. In some examples, entropy encoding unit 220 can operate in a bypass mode in which syntax elements are not entropy encoded.

[0206] Video encoder 200 can output a bitstream that includes the entropy encoded syntax elements needed to reconstruct blocks of a slice or picture. Specifically, entropy encoding unit 220 can output the bitstream.

[0207] According to AV1, entropy encoding unit 220 can be configured as a symbol-to-symbol adaptive multi-symbol arithmetic coder. Syntax elements in AV1 include an alphabet of N elements, and a context (e.g., a probability model) includes a set of N probabilities. Entropy encoding unit 220 can store the probabilities as n-bit (e.g., 15 A-bit) cumulative distribution functions (CDFs). Entropy encoding unit 220 can perform recursive scaling using an update factor based on the alphabet size to update the context.

[0208] The operations described above are described with respect to a block. Such description should be understood as operations for a luma coding block and / or a chroma coding block. As described above, in some examples, the luma coding block and the chroma coding block are luma and chroma components of a CU. In some examples, the luma coding block and the chroma coding block are luma and chroma components of a PU.

[0209] In some examples, operations performed with respect to a luma coding block do not need to be repeated for a chroma coding block. As one example, operations to identify a motion vector (MV) and a reference picture for a luma coding block do not need to be repeated for identifying an MV and a reference picture for a chroma block. Instead, the MV for the luma coding block can be scaled to determine the MV for the chroma block, and the reference picture can be the same. As another example, an intra-prediction process can be the same for a luma coding block and a chroma coding block.

[0210] Video encoder 200 represents an example of a device configured to encode video data, the device comprising: a memory configured to store video data; and one or more processing units implemented in circuitry and configured to: determine a prediction block for a current block; determine a residual block for the current block; determine a reconstructed block for the current block based on the prediction block and the residual block; and apply an NN-based filter to the reconstructed block to determine a filtered block. The NN-based filter can include one or more convolutions and / or two or more separable convolutions on the reconstructed block.

[0211] Figure 23 is a block diagram illustrating an example video decoder 300 that can perform the techniques of this disclosure. Figure 23 is provided for purposes of explanation and is not limiting on a technology broadly set forth in the present disclosure. For purposes of explanation, the present disclosure describes video decoder 300 according to the techniques of VVC and HEVC. However, the techniques of this disclosure can be performed by video coding devices configured to other video coding standards.

[0212] In Figure 23 In the example of FIG. 3, video decoder 300 includes coded picture buffer (CPB) memory 320, entropy decoding unit 302, prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, filter unit 312, and DPB 314. Any or all of CPB memory 320, entropy decoding unit 302, prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, filter unit 312, and DPB 314 can be implemented in one or more processors or in processing circuitry. For instance, the units of video decoder 300 can be implemented as part of hardware circuitry as one or more circuits or logic elements, or as part of a processor, ASIC, or FPGA. Also, video decoder 300 can include additional or alternative processors or processing circuitry to perform these and other functions.

[0213] Prediction processing unit 304 includes motion compensation unit 316 and intra-prediction unit 318. Prediction processing unit 304 can include additional units to perform prediction according to other prediction modes. As examples, prediction processing unit 304 can include a palette unit, an intra-block copy unit (which can form a part of motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, video decoder 300 can include more, fewer, or different functional components.

[0214] When operating according to AV1, motion compensation unit 316 can be configured to use translational motion compensation, affine motion compensation, OBMC, and / or compound inter- intra prediction to decode coding blocks (e.g., both luma coding blocks and chroma coding blocks) of video data, as described above. Intra prediction unit 318 can be configured to use directional intra prediction, non-directional intra prediction, recursive filter intra prediction, CFL, IBC, and / or palette mode to decode coding blocks (e.g., both luma coding blocks and chroma coding blocks) of video data, as described above.

[0215] CPB memory 320 can store video data, such as an encoded video bitstream, to be decoded by the components of video decoder 300. The video data stored in CPB memory 320 can be obtained, for example, from computer-readable medium 110 (FIG. 1), which can be a storage device such as a hard disk drive, flash memory, or other device for storing encoded video data. Figure 1 CPB memory 320 can include a CPB that stores encoded video data (e.g., syntax elements) from an encoded video bitstream. Also, CPB memory 320 can store video data other than syntax elements of a coded picture, such as temporary data representing outputs from the various units of video decoder 300. DPB 314 generally stores decoded pictures, which video decoder 300 can output and / or use as reference video data when decoding subsequent data or pictures of the encoded video bitstream. CPB memory 320 and DPB 314 can be formed by any of a variety of memory devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of memory devices. CPB memory 320 and DPB 314 can be provided by the same memory devices or separate memory devices. In various examples, CPB memory 320 can be on-chip with other components of video decoder 300, or off-chip relative to those components.

[0216] Additionally or alternatively, in some examples, video decoder 300 can retrieve coded video data from memory 120 (FIG. 1). That is, memory 120 can store data with CPB memory 320 as discussed above. Likewise, when some or all functionality of video decoder 300 is implemented in software to be executed by processing circuitry of video decoder 300, memory 120 can store the instructions to be executed by video decoder 300. Figure 1 The various units shown in FIG. 3 are illustrative only. The units can be implemented by dedicated function hardware, programmable circuitry, or a combination of both.

[0217] Figure 23 The various units shown in FIG. 3 are illustrative only. The units can be implemented by dedicated function hardware, programmable circuitry, or a combination of both. Figure 22 ​Fixed function circuits are circuits that provide specific functionality and are preset for performable operations. Programmable circuits are circuits that can be programmed to perform various tasks and provide flexible functionality in terms of performable operations. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by instructions of the software or firmware. Fixed function circuits can execute software instructions (e.g., to receive parameters or output parameters), but the type of operations that the fixed function circuits perform is generally immutable. In some examples, one or more of the units can be different circuit blocks (fixed function or programmable), and in some examples one or more of the units can be an integrated circuit.

[0218] Video decoder 300 can include ALUs, EFUs, digital circuits, analog circuits, and / or programmable cores formed from programmable circuitry. In examples where the operations of video decoder 300 are performed by software executing on the programmable circuitry, on-chip or off-chip memory can store instructions (e.g., object code) of the software that video decoder 300 receives and executes.

[0219] Entropy decoding unit 302 can receive encoded video data from the CPB and entropy decode the video data to reconstruct syntax elements. Prediction processing unit 304, inverse quantization unit 306, inverse transform processing unit 308, reconstruction unit 310, and filter unit 312 can generate decoded video data based on the syntax elements extracted from the bitstream.

[0220] In general, video decoder 300 reconstructs a picture on a block-by-block basis. Video decoder 300 can perform reconstruction operations individually for each block (where the block that is currently being reconstructed (i.e., decoded) can be referred to as the “current block”).

[0221] Entropy decoding unit 302 can entropy decode syntax elements defining quantized transform coefficients of a quantized transform coefficient block, as well as transform information such as a quantization parameter (QP) and / or an indication of a transform mode. Inverse quantization unit 306 can use a QP associated with the quantized transform coefficient block to determine a degree of quantization and, likewise, a degree of inverse quantization for inverse quantization unit 306 to apply. Inverse quantization unit 306 may, for example, perform a bit- shift operation to de-quantize the quantized transform coefficients. Inverse quantization unit 306 can thereby form a transform coefficient block including transform coefficients.

[0222] After inverse quantization unit 306 forms a transform coefficient block, inverse transform processing unit 308 can apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, inverse transform processing unit 308 can apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve Transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the transform coefficient block.

[0223] Furthermore, prediction processing unit 304 generates the prediction block from the prediction information syntax elements entropy decoded by entropy decoding unit 302. For instance, in the case that the prediction information syntax elements indicate that the current block is inter predicted, motion compensation unit 316 can generate the prediction block. In this case, the prediction information syntax elements can indicate a reference picture in DPB 314 from which to retrieve a reference block, and a motion vector identifying a location of the reference block in the reference picture relative to a location of the current block in the current picture. Motion compensation unit 316 can perform the inter prediction process generally in a manner substantially similar to that described with respect to motion compensation unit 224 Figure 22 )described.

[0224] As another example, in the case that the prediction information syntax elements indicate that the current block is intra predicted, intra prediction unit 318 can generate the prediction block according to an intra prediction mode indicated by the prediction information syntax elements. Again, intra prediction unit 318 can perform the intra prediction process generally in a manner substantially similar to that described with respect to intra prediction unit 226 Figure 22 )described. Intra prediction unit 318 can retrieve data for neighboring samples of the current block from DPB 314.

[0225] Reconstruction unit 310 can reconstruct the current block using the prediction block and the residual block. For example, reconstruction unit 310 can add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0226] Filter unit 312 can perform one or more filtering operations on the reconstructed block, including the CNN-based filtering techniques described herein. For example, filter unit 312 can also perform a deblocking operation to reduce blocking artifact pseudo-ghosts along the edges of the reconstructed block. The operations of filter unit 312 are not necessarily performed in all examples.

[0227] Video decoder 300 can store the reconstructed block in DPB 314. For example, in examples in which the operations of filter unit 312 are not performed, reconstructed unit 310 can store the reconstructed block to DPB 314. In examples in which the operations of filter unit 312 are performed, filter unit 312 can store the filtered reconstructed block to DPB 314. As discussed above, DPB 314 can provide reference information, such as samples of a current picture for intra prediction and previously decoded pictures for subsequent motion compensation, to prediction processing unit 304. In addition, video decoder 300 can output decoded pictures (e.g., decoded video) from DPB 314 for subsequent presentation on a display device, such as display device 118. Figure 1

[0228] In this way, video decoder 300 represents an example of a video decoding device including a memory configured to store video data and one or more processing units implemented in circuitry and configured to determine a prediction block for a current block, determine a residual block for the current block, determine a reconstructed block for the current block based on the prediction block and the residual block, and apply a NN-based filter to the reconstructed block to determine a filtered block. The NN-based filter can include one or more convolutions and / or two or more separable convolutions on the reconstructed block.

[0229] Figure 24 is a flowchart illustrating an example process for encoding a current block in accordance with the techniques of this disclosure. The current block can be or can include a current CU. Although described with respect to video encoder 200 Figure 1 and Figure 24 ), it should be understood that other devices can be configured to perform similar processes as the processes of Figure 24

[0230] In this example, video encoder 200 initially predicts a current block (350). For example, video encoder 200 can form a prediction block for the current block. Video encoder 200 can then calculate a residual block for the current block (352). To calculate the residual block, video encoder 200 can calculate a difference between an unencoded original block for the current block and the prediction block. Video encoder 200 can then transform the residual block and quantize transform coefficients of the residual block (354). Next, video encoder 200 can scan the quantized transform coefficients of the residual block (356). During or after the scan, video encoder 200 can entropy encode the transform coefficients (358). For example, video encoder 200 can encode the transform coefficients using CAVLC or CABAC. Video encoder 200 can then output the entropy encoded data for the block (360).​​

[0231] Figure 25 FIG. 7 is a flowchart illustrating an example process for decoding a current block of video data, in accordance with the techniques of this disclosure. The current block can be or include a current CU. Although described with respect to video decoder 300 Figure 1 and Figure 25 ), it should be understood that other devices can be configured to perform similar processes to those of Figure 25 .

[0232] Video decoder 300 can receive entropy encoded data for a current block, such as entropy encoded prediction information and entropy encoded data for transform coefficients of a residual block corresponding to the current block (370). Video decoder 300 can entropy decode the entropy encoded data to determine prediction information for the current block and to reproduce transform coefficients of the residual block (372). Video decoder 300 can predict the current block, e.g., using an intra-prediction mode or an inter-prediction mode as indicated by the prediction information for the current block (374), to calculate a prediction block for the current block. Video decoder 300 can then inverse scan the reproduced transform coefficients to create a block of quantized transform coefficients (376). Video decoder 300 can then inverse quantize the transform coefficients and apply an inverse transform to the transform coefficients to produce a residual block (378). Video decoder 300 can finally decode the current block by combining the prediction block and the residual block (380).

[0233] Figure 26 FIG. 7 is a flowchart illustrating an example process for decoding a current block of video data, in accordance with the techniques of this disclosure. The current block can be or include a current CU. Although described with respect to video decoder 300 Figure 1 and Figure 25 ), it should be understood that other devices can be configured to perform similar processes to those of Figure 26 . For example, the decoding loop of video encoder 200 can also perform the processes of Figure 26 .

[0234] In the example of Figure 26 , video decoder 300 determines a block of a picture from encoded video data (410). The block can be, for example, a reconstructed block, e.g., a prediction block added to a residual block, or a reconstructed block that has undergone other filtering, such as deblocking filtering or SAO.

[0235] Video decoder 300 applies a neural network (NN)-based filtering process to the block to generate a filtered block (420). To apply the NN-based filtering process, video decoder 300 performs first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block (422), performs second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, where the first scale is different from the second scale (424), and generates the filtered block based on the first set of extracted features and the second set of extracted features (426). In one example, the first scale can be, for example, 3x3, and the second scale can be 5x5. In other examples, different scales can be used.

[0236] In some examples, to perform the first feature extraction on the block at the first scale, video decoder 300 can apply a first convolutional filter having a first support size, and to perform the second feature extraction on the block at the second scale, video decoder 300 can apply a second convolutional filter having a second support size that is different from the first support size. In some examples, to perform the first feature extraction on the block at the first scale, video decoder 300 can apply a first set of cascaded convolutional filters, and to perform the second feature extraction on the block at the second scale, video decoder 300 can apply a second set of cascaded convolutional filters. Each of the cascaded convolutional filters in the first set can have a first support size, and each of the cascaded convolutional filters in the second set can also have the first support size. Video decoder 300 can further perform third feature extraction on the pixel data of the block at a third scale to generate a third set of extracted features for the block.

[0237] Video decoder 300 determines a decoded version of the block based on the filtered block (430). Video decoder 300 outputs a decoded version of the picture that includes the decoded version of the block (440). Video decoder 300 can output the decoded version of the picture, for example, for display, transmission, or storage. If Figure 26 If the process of FIG. 4 is performed by a video encoding device, the video encoding device can store the decoded version of the picture for use as, for example, a reference picture when encoding other pictures of the video data.

[0238] The following numbered clauses exemplify one or more aspects of the devices and techniques described in this disclosure.

[0239] Clause 1B: A method of decoding encoded video data, the method comprising: determining, from the encoded video data, a block of a picture; applying a neural network (NN)-based filtering process to the block to generate a filtered block, wherein applying the NN-based filtering process comprises: performing a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block; performing a second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, wherein the first scale is different from the second scale; and generating the filtered block based on the first set of extracted features and the second set of extracted features; determining, based on the filtered block, a decoded version of the block; and outputting a decoded version of the picture that includes the decoded version of the block.

[0240] Clause 2B: The method of clause 1B, wherein applying the NN-based filtering process comprises: performing a third feature extraction on the pixel data of the block at a third scale to generate a third set of extracted features for the block, wherein the first scale is different from the second scale and the third scale, and the second scale is different from the third scale.

[0241] Clause 3B: The method of clause 1B or 2B, wherein: performing the first feature extraction on the block at the first scale comprises applying a first convolutional filter having a first support size; and performing the second feature extraction on the block at the second scale comprises applying a second convolutional filter having a second support size, wherein the first support size is different from the second support size.

[0242] Clause 4B: The method of any of clauses 1B-3B, wherein: performing the first feature extraction on the block at the first scale comprises applying a first set of cascaded convolutional filters; and performing the second feature extraction on the block at the second scale comprises applying a second set of cascaded convolutional filters.

[0243] Clause 5B: The method of clause 4B, wherein each of the cascaded convolutional filters in the first set has a first support size, and each of the cascaded convolutional filters in the second set has the first support size.

[0244] Clause 6B: The method of any of clauses 1B-5B, the method further comprising: inputting the first set of extracted features for the block into a first parametric rectified linear unit (PReLU) layer; and inputting the second set of extracted features for the block into a second PReLU layer.

[0245] Clause 7B: The method of any of clauses 1B-6B, wherein the block comprises a reconstructed block, and determining the block of the picture comprises adding a prediction block to a residual block.

[0246] Clause 8B: The method of any of clauses 1B-7B, wherein the first scale is 3x3 and the second scale is 5x5.

[0247] Clause 9B: The method of any of clauses 1B-8B, wherein the method of decoding is performed as part of a video encoding process.

[0248] Clause 10B: A device for decoding encoded video data, the device comprising: a memory configured to store the encoded video data; one or more processors implemented in circuitry and configured to: determine a block of a picture from the encoded video data; apply a neural network (NN)-based filtering process to the block to generate a filtered block, wherein to apply the NN-based filtering process, the one or more processors are further configured to: perform a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block; perform a second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, wherein the first scale is different from the second scale; and generate the filtered block based on the first set of extracted features and the second set of extracted features; determine a decoded version of the block based on the filtered block; and output a decoded version of the picture including the decoded version of the block.

[0249] Clause 11B: The device of clause 10B, wherein to apply the NN-based filtering process, the one or more processors are further configured to: perform a third feature extraction on the pixel data of the block at a third scale to generate a third set of extracted features for the block, wherein the first scale is different from the second scale and the third scale, and the second scale is different from the third scale.

[0250] Clause 12B: The device of clause 10B or 11B, wherein: to perform the first feature extraction on the block at the first scale, the one or more processors are further configured to apply a first convolutional filter having a first support size; and to perform the second feature extraction on the block at the second scale, the one or more processors are further configured to apply a second convolutional filter having a second support size, wherein the first support size is different from the second support size.

[0251] Clause 13B: The device of any of clauses 10B-12B, wherein: to perform the first feature extraction of the block at the first scale, the one or more processors are further configured to apply a first set of cascaded convolutional filters; and to perform the second feature extraction of the block at the second scale, the one or more processors are further configured to apply a second set of cascaded convolutional filters.

[0252] Clause 14B: The device of clause 13B, wherein each of the cascaded convolutional filters in the first set has a first support size, and each of the cascaded convolutional filters in the second set has the first support size.

[0253] Clause 15B: The device of any of clauses 10B-14B, wherein the one or more processors are further configured to: input the first set of extracted features of the block into a first parametric rectified linear unit (PReLU) layer; and input the second set of extracted features of the block into a second PReLU layer.

[0254] Clause 16B: The device of any of clauses 10B-15B, wherein the block comprises a reconstructed block, and to determine the block of the picture, the one or more processors are further configured to add a predicted block to a residual block.

[0255] Clause 17B: The device of any of clauses 10B-16B, wherein the first scale is 3x3 and the second scale is 5x5.

[0256] Clause 18B: The device of any of clauses 10B-17B, further comprising a display configured to display decoded video data.

[0257] Clause 19B: The device of any of clauses 10B-18B, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

[0258] Clause 20B: A computer-readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to: determine, from coded video data, a block of a picture; apply a neural network (NN)-based filtering process to the block to generate a filtered block, wherein to apply the NN-based filtering process, the instructions cause the one or more processors to: perform a first feature extraction at a first scale on pixel data of the block to generate a first set of extracted features for the block; and perform a second feature extraction at a second scale on the pixel data of the block to generate a second set of extracted features for the block, wherein the first scale is different from the second scale; and generate the filtered block based on the first set of extracted features and the second set of extracted features; determine a decoded version of the block based on the filtered block; and output a decoded version of the picture that includes the decoded version of the block.

[0259] It should be appreciated that according to an example, certain acts or events that are described might be performed in a different sequence, can be added, modified or omitted (e.g., all described acts or events can not be necessary to implement the techniques). Moreover, in certain examples, acts or events can be performed concurrently, e.g., through multi-threaded processing, interrupt processing, or multiple processors, rather than sequentially.

[0260] In one or more examples, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium and executed by a hardware-based processing unit. Computer-readable media can include computer-readable storage media, which corresponds to a tangible medium such as data storage media, or communication media including any medium that facilitates transfer of a computer program from one place to another, e.g., according to a communication protocol. In this manner, computer- readable media generally can correspond to (1) tangible computer-readable storage media which is non-transitory or (2) a communication medium such as a signal or carrier wave. Data storage media can be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, code and / or data structures for implementation of the techniques described in this disclosure. A computer program product can include a computer-readable medium.

[0261] By way of example, and not limitation, such computer-readable storage media can include one or more of RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage, or other magnetic storage devices, flash memory, or any other storage medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any

[0262] Instructions can be executed by one or more processors, such as one or more DSPs, general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry. Accordingly, the terms "processor" and "processing circuitry," as used herein can refer to any of the foregoing structures or any other structure suitable for implementation of the techniques described herein. In addition, in some aspects, the functionality described herein can be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated in a combined codec. Also, the techniques could be fully implemented in one or more circuits or logic elements.

[0263] The techniques of this disclosure can be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC) or a set of ICs (e.g., a chip set). Various components, modules, or units are described in this disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily require

[0264] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method of decoding encoded video data, the method comprising: determining a block of a picture from the encoded video data; applying a neural network (NN)-based filtering process to the block to generate a filtered block, wherein applying the NN-based filtering process comprises: performing first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block; performing second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, wherein the first scale is different from the second scale; and generating the filtered block based on the first set of extracted features and the second set of extracted features; determining a decoded version of the block based on the filtered block; and outputting a decoded version of the picture that includes the decoded version of the block.

2. The method of claim 1, wherein applying the NN-based filtering process comprises: performing third feature extraction on the pixel data of the block at a third scale to generate a third set of extracted features for the block, wherein the first scale is different from the second scale and the third scale, and the second scale is different from the third scale.

3. The method of claim 1, wherein: performing the first feature extraction on the block at the first scale comprises applying a first convolutional filter having a first support size; and performing the second feature extraction on the block at the second scale comprises applying a second convolutional filter having a second support size, wherein the first support size is different from the second support size.

4. The method of claim 1, wherein: performing the first feature extraction on the block at the first scale comprises applying a first set of cascaded convolutional filters; and performing the second feature extraction on the block at the second scale comprises applying a second set of cascaded convolutional filters.

5. The method of claim 4, wherein each of the cascaded convolutional filters in the first set has a first support size, and each of the cascaded convolutional filters in the second set has the first support size.

6. The method of claim 1, further comprising: inputting the first set of extracted features for the block into a first parametric rectified linear unit (PReLU) layer; and inputting the second set of extracted features for the block into a second PReLU layer.

7. The method of claim 1, wherein the block comprises a reconstructed block, and determining the block of the picture comprises adding a prediction block to a residual block.

8. The method of claim 1, wherein the first scale is 3x3, and the second scale is 5x5.

9. The method of claim 1, wherein the method of decoding is performed as part of a video encoding process.

10. An apparatus for decoding encoded video data, the apparatus comprising: a memory configured to store the encoded video data; ​ one or more processors implemented in circuitry and configured to: determine a block of a picture from the coded video data; apply a neural network (NN)-based filtering process to the block to generate a filtered block, wherein to apply the NN-based filtering process, the one or more processors are further configured to: perform a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block; perform a second feature extraction on the pixel data of the block at a second scale to generate a second set of extracted features for the block, wherein the first scale is different than the second scale; and generate the filtered block based on the first set of extracted features and the second set of extracted features; determine a decoded version of the block based on the filtered block; and output a decoded version of the picture that includes the decoded version of the block.

11. The device of claim 10, wherein to apply the NN-based filtering process, the one or more processors are further configured to: perform a third feature extraction on the pixel data of the block at a third scale to generate a third set of extracted features for the block, wherein the first scale is different than the second scale and the third scale, and the second scale is different than the third scale.

12. The device of claim 10, wherein: to perform the first feature extraction on the block at the first scale, the one or more processors are further configured to apply a first convolutional filter having a first support size; and to perform the second feature extraction on the block at the second scale, the one or more processors are further configured to apply a second convolutional filter having a second support size, wherein the first support size is different than the second support size.

13. The device of claim 10, wherein: to perform the first feature extraction on the block at the first scale, the one or more processors are further configured to apply a first set of cascaded convolutional filters; and to perform the second feature extraction on the block at the second scale, the one or more processors are further configured to apply a second set of cascaded convolutional filters.

14. The device of claim 13, wherein each of the cascaded convolutional filters in the first set has a first support size, and each of the cascaded convolutional filters in the second set has the first support size.

15. The device of claim 10, wherein the one or more processors are further configured to: input the first set of extracted features for the block into a first parametric rectified linear unit (PReLU) layer; and input the second set of extracted features for the block into a second PReLU layer.

16. The device of claim 10, wherein the block comprises a reconstructed block, and to determine the block of the picture, the one or more processors are further configured to add a prediction block to a residual block.

17. The device of claim 10, wherein the first dimension is 3x3 and the second dimension is 5x5.

18. The device of claim 10, further comprising a display configured to display decoded video data.

19. The device of claim 10, wherein the device comprises one or more of a camera, a computer, a mobile device, a broadcast receiver device, or a set-top box.

20. A computer-readable storage medium storing instructions that, when executed by one or more processors, cause the one or more processors to: determine a block of a picture from encoded video data; apply a neural network (NN)-based filtering process to the block to generate a filtered block, wherein to apply the NN-based filtering process, the instructions cause the one or more processors to: performing a first feature extraction on pixel data of the block at a first scale to generate a first set of extracted features for the block; and perform a second feature extraction on the pixel data of the block at a second dimension to generate a second set of extracted features for the block, wherein the first dimension is different than the second dimension; and generate the filtered block based on the first set of extracted features and the second set of extracted features; and determine a decoded version of the block based on the filtered block; and output a decoded version of the picture that includes the decoded version of the block.

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