Systems and methods for efficient operation of critical and discontinuous conduction mode totem pole power factor correction circuits

Abstract

A PFC circuit is disclosed. The circuit includes a first switch having a first power switch, a first current sensing circuit, and a first overcurrent protection circuit; a second switch having a second power switch, a second current sensing circuit, and a second overcurrent protection circuit, the first switch coupled to the second switch at a switch node; an inductor coupled between the switch node and an AC input terminal; and a controller arranged to transmit a control signal to the first switch and the second switch; wherein the first current sensing circuit is arranged to transmit a first signal comprising at least one of an amplitude and a polarity of a first current flowing through the first power switch; and the first overcurrent protection circuit is arranged to receive the first signal and to transition the first power switch to a first off state in response to the first signal exceeding a first predetermined threshold.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Provisional Patent Application No. 202410968616.1, filed on July 18, 2024, entitled “Critical Conduction Mode Totem Pole Power Factor Correction Control Strategy (CRM TOTEM POLE PFC CONTROL STRATEGY),” which is hereby incorporated in its entirety for all purposes. Technical Field

[0003] The described embodiments generally relate to power converters, and more specifically, to systems and methods for efficiently operating critical and discontinuous conduction mode totem-pole power factor correction (PFC) circuits. Background Technology

[0004] Electronic devices such as computers, servers, and televisions employ one or more power conversion circuits to convert one form of electrical energy into another. Some power conversion circuits use circuit topologies called DC-DC converters to convert high (or low) DC voltages to lower (or higher) DC voltages. Because many electronic devices are sensitive to the size and efficiency of power conversion circuits, novel power converters can offer relatively high efficiency and small size for new electronic devices. In some applications, totem-pole bridgeless power factor correction (PFC) circuits can be used. However, in current methods, cycle-by-cycle overcurrent protection (OCP) and synchronous rectifier mode (SR) detection and control can be complex and costly. Therefore, there is a need in the art to improve cycle-by-cycle overcurrent protection (OCP) and synchronous rectifier mode (SR) detection and control in totem-pole bridgeless PFC circuits. Summary of the Invention

[0005] In some embodiments, a power factor correction (PFC) circuit is disclosed. The circuit includes: a first switch having a first power switch, a first current sensing circuit, and a first overcurrent protection circuit; a second switch having a second power switch, a second current sensing circuit, and a second overcurrent protection circuit, the first switch being coupled to the second switch at a switch node; an inductor coupled between the switch node and an AC input terminal; and a controller arranged to transmit control signals to the first switch and the second switch; wherein the first current sensing circuit is arranged to transmit a first signal including at least one of the amplitude and polarity of a first current flowing through the first power switch; and the first overcurrent protection circuit is arranged to receive the first signal and, in response to the first signal exceeding a first predetermined threshold, to switch the first power switch to a first off state.

[0006] In some embodiments, the second current sense circuit is arranged to transmit a second signal containing at least one of a magnitude and a polarity of a second current flowing through the second power switch.

[0007] In some embodiments, the second overcurrent protection circuit is arranged to receive the second signal and to transition the second power switch to a second off state in response to the second signal exceeding a second predetermined threshold.

[0008] In some embodiments, the first switch further includes a first drive circuit arranged to transmit a first control signal to the first power switch based at least in part on the first signal and the control signal.

[0009] In some embodiments, the second switch further includes a second drive circuit arranged to transmit a second control signal to the second power switch based at least in part on the second signal and the control signal.

[0010] In some embodiments, the first switch further includes a first synchronous rectification (SR) mode detection circuit arranged to generate a first SR signal in response to receiving the first signal.

[0011] In some embodiments, the first drive circuit is further arranged to transmit the first control signal to the first power switch based at least in part on the first SR signal.

[0012] In some embodiments, the second switch further includes a second synchronous rectification (SR) mode detection circuit arranged to generate a second SR signal in response to receiving the second signal.

[0013] In some embodiments, a method of operating a power factor correction (PFC) circuit is disclosed. The method includes providing a first switch having a first power switch, a first current sense circuit, and a first overcurrent protection circuit; providing a second switch having a second power switch, a second current sense circuit, and a second overcurrent protection circuit, the first switch coupled to the second switch at a switch node; providing an inductor coupled between the switch node and an AC input; and providing a controller arranged to transmit a control signal to the first switch and the second switch; transmitting, by the first current sense circuit, a first signal containing at least one of a magnitude and a polarity of a first current flowing through the first power switch; and receiving, by the first overcurrent protection circuit, the first signal; and transitioning the first power switch to a first off state in response to the first signal exceeding a first predetermined threshold.

[0014] In some embodiments, a circuit is disclosed. The circuit includes: a first switch having a first power switch, a first current sense circuit, and a first overcurrent protection circuit; a second switch having a second power switch, a second current sense circuit, and a second overcurrent protection circuit, the first switch coupled to the second switch at a switch node; an inductor coupled between the switch node and an AC input; and wherein the first current sense circuit is arranged to transmit a first signal including at least one of a magnitude and a polarity of a first current flowing through the first power switch; and wherein the first overcurrent protection circuit is arranged to receive the first signal and to transition the first power switch to a first off state in response to the first signal exceeding a first predetermined threshold. BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 A simplified schematic of a totem pole power factor conversion (PFC) circuit is shown, in which the current sense and overcurrent protection circuits are placed relatively close to the power switches, according to some embodiments;

[0016] Figure 2 A simplified schematic of a totem pole power factor conversion (PFC) circuit with integrated high-side and low-side switches that support current sense and overcurrent protection is shown, according to some embodiments;

[0017] Figure 3 A chart of operating waveforms of various nodes in the PFC circuit of Figure 1 , in which the high-side switch is used as a main switch, according to some embodiments;

[0018] Figure 4 A chart of operating waveforms of various nodes in the PFC circuit of Figure 1 , in which the high-side switch is used as a synchronous rectifier (SR) switch, according to some embodiments. DETAILED DESCRIPTION

[0019] The circuits, apparatuses, and related technology disclosed herein generally relate to electronic circuits. More specifically, the circuits, apparatuses, and related technology disclosed herein relate to systems and methods for efficiently operating critical and discontinuous conduction mode totem pole power factor correction (PFC) circuits. The circuits and technology disclosed herein enable current sensing and overcurrent protection in critical conduction mode (CRM) and discontinuous conduction mode (DCM) totem pole PFC circuits. In some embodiments, a bidirectional current sensing circuit can be coupled to each of a control switch and a synchronous switch of a totem pole PFC circuit. The bidirectional current sensing circuit can be arranged to generate a signal based on at least one of a direction and / or magnitude of a current flowing through the switch. In various embodiments, the generated signal can be used to determine when an overcurrent condition occurs in the switch, and in response, turn off the switch. In some embodiments, the generated signal can be used to determine whether the switch is operating in a control mode or a synchronous rectification (SR) mode. When the switch is operating in the SR mode, an SR determination circuit can turn off the switch if the current flowing through the switch exceeds a predetermined threshold.

[0020] In various embodiments, an integrated circuit (IC) can include a power switch, a bidirectional current sensing circuit, an SR determination circuit, an overcurrent protection (OCP) circuit, and a drive circuit. The IC can be used in a high side and / or low side section of a totem pole PFC circuit, such as those described in U.S. Patent Application No. 17 / 667,335, filed February 8, 2022, entitled “Systems and Methods for Automatic determination of State of Switches in Power Converters,” the contents of which are incorporated by reference herein. In some embodiments, the predetermined threshold can be set internally within the IC. In various embodiments, the predetermined threshold can be set externally using an impedance element, such as but not limited to a resistor. Various inventive embodiments are described herein, including methods, processes, systems, apparatuses, and the like.

[0021] Several exemplary embodiments will now be described with reference to the accompanying drawings, which form part of the embodiments. The following description is merely illustrative and is not intended to limit the scope, applicability, or configuration of this disclosure. Rather, the subsequent description of the embodiments will provide those skilled in the art with a description of what can be done to implement one or more embodiments. It should be understood that various changes may be made in terms of the function and arrangement of elements without departing from the spirit and scope of this disclosure. In the following description, specific details are set forth for illustrative purposes to provide a thorough understanding of certain embodiments of the invention. However, it will be apparent, however, that various embodiments may be practiced without these specific details. The drawings and description are not intended to be limiting. The words “example” or “exemplary” are used herein to mean “serves as an example, instance, or illustration.” Any embodiment or design described herein as “exemplary” or “example” is not necessarily to be construed as preferred or superior to other embodiments or designs.

[0022] Figure 1 A simplified schematic diagram of a totem-pole power factor conversion (PFC) circuit according to some embodiments is shown, wherein the current sensing and overcurrent protection circuitry are positioned relatively close to the power switch. Figure 1 As shown, the PFC circuit 100 can receive AC power input from AC power supply Vac 120 and generate an output voltage (V) at the output terminal 112. BUS 122. The PFC circuit 100 may include a controller 106, an input inductor 128, a high-side switch 102, a low-side switch 104, diodes 130 and 132, and an output capacitor 134. Diodes 130 and 132 may be implemented using any current rectification structure, such as, but not limited to, pn junction diodes or diode-connected transistors, as understood by those skilled in the art. In some embodiments, diodes 130 and 132 may be implemented using switches actively controlled by the controller 106. The output capacitor 134 may be implemented using any capacitor structure, such as, but not limited to, one or more transistors with two metal conductor plates separated by a dielectric or whose drain and source terminals are electrically shorted, wherein the drain / source terminals serve as the first plate of the capacitor and the gate of the transistor serves as the second plate of the capacitor.

[0023] The high-side switch 102 can include a high-side power switch 108, a bidirectional current sense circuit 140 coupled to the high-side power switch 108, an overcurrent protection (OCP) circuit 142, a synchronous rectifier circuit 144, and a comparator circuit 146. The low-side switch 104 can include a low-side power switch 110, a bidirectional current sense circuit 150 coupled to the low-side power switch 110, an overcurrent protection (OCP) circuit 152, a synchronous rectifier mode circuit 154, and a comparator circuit 156. Each of the comparator circuits 146 or 156 can include hysteresis. In some embodiments, each of the comparator circuits 146 or 156 can include a drive circuit arranged to drive a gate terminal of the high-side and / or low-side power switch.

[0024] The controller 106 can be arranged to receive a voltage FB generated based on the output voltage 122, a line voltage 160, a neutral voltage 162, and a zero current detection (ZCD) signal 164. Based on the voltage FB, the line voltage 160, the neutral voltage 162, and the ZCD signal 164, the controller 106 can be arranged to generate a control signal for each of the high-side switch 102 and the low-side switch 104. For example, the controller 106 can be configured to generate a pulse width modulation (PWM) signal, which can control the on-state of the high-side power switch 108 and the low-side power switch 110.

[0025] Each of the high-side switch and the low-side switch can be arranged to respond to the control signal received from the controller 106 by becoming on or off. In some embodiments, each of the high-side switch and the low-side switch can be arranged to become on or off in response to the control signal and in response to an electrical condition of the high-side switch and / or the low-side switch. For example, one or both of the high-side switch SI and the low-side switch S2 can be configured to receive a control signal from the controller 106 and wait for a particular electrical condition to occur before becoming on or off according to the control signal.

[0026] In the illustrated embodiment, current sensing for the high-side can be performed by the bidirectional current sense circuit 140 disposed within the high-side switch 102, while current sensing for the low-side can be performed by the bidirectional current sense circuit 150 disposed within the low-side switch 104. The sensed high-side signal and the sensed low-side signal can be used for cycle-by-cycle overcurrent protection during main switch magnetization. In some embodiments, the controller 106 can be arranged to receive an auxiliary winding voltage and can determine whether an overcurrent condition has occurred based on a change in the auxiliary winding voltage. In response to this determination, the controller 106 can adjust the on-time of the switch or can enter the switch into an overcurrent protection state by shutting it down.

[0027] For SR control during demagnetization, SR current sensing and corresponding power switch turn-off can be performed inside the high-side and low-side switches. The controller 106 can be arranged to receive SR turn-off information from the auxiliary voltage variation. The controller 106 can wait for a predetermined time period and then transmit a turn-on signal to the main switch to start the next switching cycle.

[0028] In various embodiments, over-current protection and synchronous rectification control can be performed inside the high-side and low-side switches, and the operating state of the device, such as when to enter cycle-by-cycle OCP mode or when to enter SR turn-off mode, can be indicated by the variation of the auxiliary winding voltage. Thus, the controller 106 can be arranged to determine whether the system can enter a protection mode or start a new switching cycle.

[0029] The bidirectional current sensing circuit 140 can be arranged to generate a signal based on at least one of the direction and / or magnitude of the current flowing through the power switch 108. In some embodiments, the bidirectional current sensing circuit 140 can include a relatively small transistor coupled in parallel with the power switch 108. The signal can be transmitted to the OCP circuit 142 and the SR circuit 144. The OCP circuit 142 can compare the signal to a predetermined threshold and transmit an output signal according to the comparison result. The SR circuit can use the signal to determine whether to enter an SR operating mode. The comparator 146 can receive the output signal of the OCP circuit 142 and the output signal of the SR circuit. The comparator 146 can also receive a pulse width modulation (PWM) signal. The comparator 146 can be arranged to turn off the power switch 108 when an over-current condition occurs. In addition, when the SR operating mode is to be entered, the comparator 146 can be arranged to turn off the power switch 108. The low-side switch 104 operates similarly to the high-side switch 102 in terms of the bidirectional current sensing circuit 150, the SR mode circuit 154, the OCP circuit 152, and the comparator circuit 156. In some embodiments, the SR circuit 144 can cause the power switch to operate as an ideal diode or have a reverse channel conduction when the current flowing through the power switch is negative (flowing from the source to the drain).

[0030] In some embodiments, each of the high-side switch 108 and the low-side switch 104 is formed of silicon, GaN, or any other suitable semiconductor material. In various embodiments, the bidirectional current sense circuit, the OCP circuit, the SR circuit, and the comparator circuit, and the power switches can be formed in a silicon substrate. In some embodiments, the bidirectional current sense circuit, the OCP circuit, the SR circuit, and the comparator circuit, and the power switches can be formed in a GaN substrate. In various embodiments, the OCP circuit, the SR circuit, and the comparator circuit can be formed in a silicon substrate, while the power switches and the bidirectional current sense circuit can be formed in a GaN substrate. In some embodiments, the OCP circuit, the SR circuit, and the comparator circuit, the power switches, and the bidirectional current sense circuit can be monolithically integrated onto a single die. In various embodiments, the OCP circuit, the SR circuit, and the comparator circuit can be formed in a first die, while the power switches and the bidirectional current sense circuit can be formed on a second die. In some embodiments, the OCP circuit, the SR circuit, and the comparator circuit, the power switches, and the bidirectional current sense circuit can be integrated into one electronic package, such as, but not limited to, a quad flat no-lead (QFN) package, or into a dual flat no-lead (DFN) package, into a ball grid array (BGA) package. In some embodiments, the OCP circuit, the SR circuit, and the comparator circuit, the power switches, and the bidirectional current sense circuit can be individually packaged into electronic packages.

[0031] Figure 2 A simplified schematic of a totem pole power factor correction (PFC) circuit with integrated high-side and low-side switches that supports current sensing and overcurrent protection is shown, in accordance with some embodiments. Figure 2 A PFC circuit 200 similar to the PFC circuit 100 is shown, in which the high-side and low-side switches can be integrated into a single semiconductor package 202. In some embodiments, the high-side and low-side switches can be integrated into a single semiconductor die. An isolation circuit 204 can be included in the single semiconductor package 202 in order to isolate the high-side circuit from the low-side circuit.

[0032] Figure 3 A graph of the operating waveforms of various nodes in the PFC circuit of Figure 1 , in accordance with some embodiments. Figure 3 Waveforms of various nodes in the PFC circuit 100 are shown when the switch 102 (Q H ) is used as the main switch. The controller 106 can generate the on-time (T ON ) based on the feedback voltage FB, and can turn on Q H During the time period 308 (i.e., the time between t0and ti), the inductor 128 can be magnetized and the current (l QH) can rise. Under normal operating conditions, I QH may remain below an overcurrent protection (OCP) threshold. As such, Q H may be turned off by controller 106 at time 312 (labeled ti). Signal 302 (labeled PWMH') is the signal applied to the gate terminal of power switch 108.

[0033] During normal operation, PWMH' signal can follow signal 304 (labeled PWMH) generated by controller 106. The circuits and techniques disclosed herein enable the overcurrent protection function to be performed very close to the power switch, rather than at the controller. As such, the overcurrent condition can be responded to relatively quickly without the assistance of the controller. Under some abnormal operating conditions, when Q H may be turned on at time 318 (labeled t4). I QH may reach the OCP threshold at time 320 (labeled ts). In response, OCP circuit 142 can pull down PWMH' signal, turning off Q H while PWMH signal is still high. When Q H is turned off at ts, inductor 128 can start to resonate due to the presence of the parasitic junction capacitance of Q H and Q L .

[0034] In response, auxiliary winding voltage 328 (labeled V ZCD ) can go from a low state to a high state. At time 330 (labeled t6), V ZCD signal can reach 0V, at which point controller 106 can detect the zero crossing of V ZCD signal. When the zero crossing of V ZCD signal occurs while PWMH signal is high, controller 106 can interpret this as an overcurrent condition. As such, PWMH can be pulled low at t6. After a predetermined period of time has elapsed, controller 106 can transition signal 306 (labeled PWML) to a high state, indicating that switch 104 is operating in a synchronous rectifier (SR) mode of operation at time 334 (labeled t7). Embodiments of the present disclosure enable the power switch to be turned off relatively quickly when an overcurrent condition occurs. In some embodiments, the controller can be informed of the occurrence of the overcurrent condition through a change in voltage of the auxiliary winding inductor.

[0035] Figure 4 A chart showing the operating waveforms of various nodes in a PFC circuit of Figure 1 is shown, where switch 102 (Q H ) is used as a synchronous rectifier (SR) switch, in accordance with some embodiments. Figure 4 A chart showing the operating waveforms of various nodes in a PFC circuit ofH ) Waveforms at various nodes in the PFC circuit 100 when used as an SR switch. When Q H When operating in SR mode, the controller 106 can be arranged to control the turn-on of the power switch 108, while the SR circuit 144 can control the turn-off of the power switch 108. In this mode, the switch 104 (Q L ) can be used as the main switch. At tl, the main switch Q L turns off. After a predetermined dead time, the controller 106 can transmit the PWMH signal. The PWMH high signal can turn Q H on at t2 into the on state (as SR). During the inductor 128 demagnetization phase, the current I H of Q QH may decrease. When I QH reaches the SR OFF threshold 404, the SR controller circuit turns Q H off at t3 by pulling the PWMH' signal to an internal reference ground. In some embodiments, the internal reference ground can be the switch node. The external PWMH signal can remain high because the controller 106 can not be able to directly sense the I QH current. Once Q H is turned off, and after I QH reaches zero, resonance can occur between the inductor 128 and the power switch parasitic junction capacitance. A zero crossing of the current in the auxiliary winding can occur at t4. When both PWMH is high and the zero crossing occurs simultaneously, the controller 106 can determine that the demagnetization phase has ended and can pull PWMH low. After a predetermined dead time, the controller 106 can start another switching cycle by turning on PWML.

[0036] In some embodiments, the combination of circuits and methods disclosed herein can be utilized to provide circuits and methods for efficiently operating critical and discontinuous conduction mode totem pole power factor correction (PFC) circuits. Although the circuits and methods are described and shown herein with respect to several particular configurations of PFC circuits, embodiments of the present disclosure are also applicable to other power converter topologies, such as but not limited to AHB converter circuits and active clamped flyback (ACF) converters.

[0037] In the foregoing specification, embodiments of the disclosure have been described with reference to numerous specific details that can vary from specific implementation to specific implementation. Accordingly, the specification and drawings are to be regarded in an illustrative rather than a restrictive sense. The sole and exclusive indicator of the scope of the disclosure, and what is intended by the applicants to be the scope of the disclosure, is the literal and equivalent scope of the claims that issue from this application, in whatever form codified and including any subsequent correction. Specific details can have been set forth in this specification in connection with particular embodiments to provide a thorough description of the application. However, it will be apparent to those skilled in the art that specific details can not be required in all cases and that particular embodiments can be implemented without these specific details.

[0038] In addition, spatially relative terms, such as "bottom" or "top" or the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use and / or operation in addition to the orientations depicted in the figures. For example, if a device is inverted, elements described as "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. The device can be otherwise oriented (for example, rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.

[0039] As used herein, the terms "and", "or", and "and / or" can include a variety of meanings that also are expected to depend at least in part upon the context in which such terms are used. Typically, "or" if used to associate a list, such as A, B, or C, is intended to mean A, B, and C, here used in the inclusive sense, as well as A, B or C, here used in the exclusive sense. In addition, the term "one or more" as used herein can be used to describe any feature, structure, or characteristic in the singular or can be used to describe some combination of features, structures, or characteristics. However, it should be noted that this is merely an illustrative example and claimed subject matter is not limited to these examples. Furthermore, the term "at least one of' if used to associate a list, such as A, B, or C, can be interpreted in the alternative (such as A or B or C) or the

[0040] Reference throughout this specification to "one example", "an example", "certain examples", or "exemplary implementation" means that a particular feature, structure, or characteristic described in connection with the feature and / or example can be included in at least one feature and / or example of claimed subject matter. Thus, the appearances of the phrase "in one example", "an example", "in certain examples", "in certain implementations" or other like phrases in various places throughout this specification are not necessarily all referring to the same feature, example, and / or limitation. Furthermore, the particular features, structures, or characteristics can be combined in one or more examples and / or features.

[0041] In the preceding detailed description, numerous specific details have been set forth in order to provide a thorough understanding of the claimed subject matter. However, it will be understood by those skilled in the art that the claimed subject matter can be practiced without these specific details. In other instances, well-known methods and apparatuses have not been described in detail in order to avoid obscuring the claimed subject matter. Accordingly, it is intended that the claimed subject matter not be limited to the particular examples disclosed, but that it include all aspects falling within the scope of the appended claims and their equivalents.

Claims

1. A power factor correction (PFC) circuit, comprising: a first switch having a first power switch, a first current sense circuit, and a first overcurrent protection circuit; a second switch having a second power switch, a second current sense circuit, and a second overcurrent protection circuit, the first switch coupled to the second switch at a switch node; an inductor coupled between the switch node and an AC input; and a controller arranged to transmit a control signal to the first switch and the second switch; wherein: the first current sense circuit is arranged to transmit a first signal containing at least one of a magnitude and a polarity of a first current flowing through the first power switch; and the first overcurrent protection circuit is arranged to receive the first signal and to transition the first power switch to a first off state in response to the first signal exceeding a first predetermined threshold.

2. The PFC circuit of claim 1, wherein the second current sense circuit is arranged to transmit a second signal containing at least one of a magnitude and a polarity of a second current flowing through the second power switch.

3. The PFC circuit of claim 2, wherein the second overcurrent protection circuit is arranged to receive the second signal and to transition the second power switch to a second off state in response to the second signal exceeding a second predetermined threshold.

4. The PFC circuit of claim 2, wherein the first switch further comprises a first drive circuit arranged to transmit a first control signal to the first power switch based at least in part on the first signal and the control signal.

5. The PFC circuit of claim 2, wherein the second switch further comprises a second drive circuit arranged to transmit a second control signal to the second power switch based at least in part on the second signal and the control signal.

6. The PFC circuit of claim 4, wherein the first switch further comprises a first synchronous rectification (SR) mode detection circuit arranged to generate a first SR signal in response to receiving the first signal.

7. The PFC circuit of claim 6, wherein the first drive circuit is further arranged to transmit the first control signal to the first power switch based at least in part on the first SR signal.

8. The PFC circuit of claim 2, wherein the second switch further comprises a second synchronous rectification (SR) mode detection circuit arranged to generate a second SR signal in response to receiving the second signal.

9. A method of operating a power factor correction (PFC) circuit, the method comprising: providing a first switch having a first power switch, a first current sense circuit, and a first overcurrent protection circuit; providing a second switch having a second power switch, a second current sense circuit, and a second overcurrent protection circuit, the first switch coupled to the second switch at a switch node; An inductor is provided, the inductor being coupled between the switch node and an AC input; and A controller is provided, the controller being arranged to transmit a control signal to the first switch and the second switch; A first signal is transmitted by the first current sense circuit, the first signal including at least one of a magnitude and a polarity of a first current flowing through the first power switch; and The first signal is received by the first overcurrent protection circuit; and the first power switch is transitioned to a first off state in response to the first signal exceeding a first predetermined threshold.

10. The method of claim 9, further comprising transmitting, by the second current sense circuit, a second signal including at least one of a magnitude and a polarity of a second current flowing through the second power switch.

11. The method of claim 10, further comprising receiving, by the second overcurrent protection circuit, the second signal and transitioning the second power switch to a second off state in response to the second signal exceeding a second predetermined threshold.

12. The method of claim 10, further comprising transmitting, by a first drive circuit, a first control signal to the first power switch based at least in part on the first signal and the control signal.

13. The method of claim 10, further comprising transmitting, by a second drive circuit, a second control signal to the second power switch based at least in part on the second signal and the control signal.

14. The method of claim 12, further comprising generating, by a first synchronous rectification (SR) mode detection circuit, a first SR signal in response to receiving the first signal.

15. The method of claim 14, further comprising transmitting, by the first drive circuit, the first control signal to the first power switch based at least in part on the first SR signal.

16. The method of claim 14, further comprising generating, by a second synchronous rectification (SR) mode detection circuit, a second SR signal in response to receiving the second signal.

17. A circuit comprising: a first switch having a first power switch, a first current sense circuit, and a first overcurrent protection circuit; a second switch having a second power switch, a second current sense circuit, and a second overcurrent protection circuit, the first switch being coupled to the second switch at a switch node; an inductor coupled between the switch node and an AC input; and wherein the first current sense circuit is arranged to transmit a first signal including at least one of a magnitude and a polarity of a first current flowing through the first power switch; and wherein the first overcurrent protection circuit is arranged to receive the first signal and transition the first power switch to a first off state in response to the first signal exceeding a first predetermined threshold.

18. The circuit of claim 17, wherein the second current sense circuit is arranged to transmit a second signal including at least one of a magnitude and a polarity of a second current flowing through the second power switch.

19. The circuit of claim 18, wherein the second overcurrent protection circuit is arranged to receive the second signal and transition the second power switch to a second off state in response to the second signal exceeding a second predetermined threshold.

20. The circuit of claim 17, wherein the first power switch is a gallium nitride (GaN)-based switch.

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