Control method and device of asymmetric half-bridge flyback converter and converter

Abstract

The invention discloses a control method and device for an asymmetric half-bridge flyback converter and the converter, and the method comprises the steps: controlling an upper bridge arm switching tube to be switched on and a lower bridge arm switching tube to be switched off, and obtaining a first primary side current; when a first current value corresponding to the first primary side current is greater than a first current threshold value, controlling the upper bridge arm switch tube to be switched off, and controlling the lower bridge arm switch tube to be switched on to obtain a second primary side current; when the change slope corresponding to the second primary side current is zero, acquiring a sampling output voltage from an auxiliary winding of the transformer; updating a first current threshold value according to the sampling output voltage and the voltage reference value; according to the updated first current threshold value, an upper bridge arm switching tube is controlled to work in the next switching period, closed-loop control is conducted on the asymmetric half-bridge flyback converter on the primary side, the problem of inaccurate sampling caused by a resonant element in the asymmetric half-bridge flyback converter is solved, meanwhile, an optocoupler in a traditional secondary side feedback loop is omitted, and the cost is reduced. The loop response speed is increased, and the dynamic performance is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of switching power supply, and in particular to a control method and device of an asymmetric half-bridge flyback converter and the converter. BACKGROUND

[0002] With the popularization of fast charging technology, power adapters need to support a wide range of output voltages such as 5V to 48V. Asymmetric half-bridge (AHB) topology is favored in high-efficiency and high-power-density applications due to its soft switching characteristics.

[0003] Traditional AHB converters mostly use secondary-side feedback control, that is, the secondary-side sampling signal is transmitted back to the primary-side controller through an optocoupler. However, the transmission delay through the optocoupler results in slow loop response, poor dynamic performance, and easy output voltage overshoot or undershoot. Therefore, how to achieve accurate and fast primary-side control in the AHB topology has become a technical problem to be solved. SUMMARY

[0004] The embodiments of the present application provide a control method and device of an asymmetric half-bridge flyback converter and the converter to solve the problem of slow primary-side control loop response, poor accuracy and dynamic performance of the existing AHB topology.

[0005] A control method of an asymmetric half-bridge flyback converter, comprising: controlling the upper bridge arm switch to be turned on and the lower bridge arm switch to be turned off to obtain a first primary-side current; when a first current value corresponding to the first primary-side current is greater than a first current threshold, controlling the upper bridge arm switch to be turned off and the lower bridge arm switch to be turned on to obtain a second primary-side current; when a change slope corresponding to the second primary-side current is zero, obtaining a sampling output voltage from an auxiliary winding of a transformer; obtaining a voltage gear instruction signal and determining a voltage reference value according to the voltage gear instruction signal; updating the first current threshold according to the sampling output voltage and the voltage reference value; controlling the upper bridge arm switch to work in a next switching period according to the updated first current threshold.

[0006] Further, the control method of the asymmetric half-bridge flyback converter further comprises: when a second current value corresponding to the second primary-side current is greater than a second current threshold, controlling the lower bridge arm switch to be turned off and the upper bridge arm switch to be turned on to enter the next switching period.

[0007] Further, the control of the upper bridge arm switch tube to be off and the lower bridge arm switch tube to be on when the first current value corresponding to the first primary side current is greater than the first current threshold value comprises: the control of the upper bridge arm switch tube to be off when the first current value corresponding to the first primary side current is greater than the first current threshold value; the control of the lower bridge arm switch tube to be on after a preset dead time after the control of the upper bridge arm switch tube to be off.

[0008] Further, the acquisition of the voltage gear instruction signal and the determination of the voltage reference value according to the voltage gear instruction signal comprise: the acquisition of the voltage gear instruction signal from the charging protocol chip through an isolation circuit; the verification of the voltage gear instruction signal through a power data object module; if the verification is passed, the output of a reference adjustment signal to a signal processing module; the processing of the reference adjustment signal through the signal processing module to output the voltage reference value.

[0009] Further, the update of the first current threshold value according to the sampled output voltage and the voltage reference value comprises: the processing of the sampled output voltage and the voltage reference value through an error amplifier to output a voltage error signal; the update of the first current threshold value according to the voltage error signal through a voltage-controlled current source.

[0010] A control device for executing the control method of the asymmetric half-bridge flyback converter.

[0011] An asymmetric half-bridge flyback converter comprising a primary side half-bridge circuit, a transformer and the control device described above; the primary side half-bridge circuit comprising an upper bridge arm switch tube, a lower bridge arm switch tube and a current detection terminal; the transformer comprising a primary winding and an auxiliary winding; the primary winding being connected with the primary side half-bridge circuit; the control device being connected with the upper bridge arm switch tube, the lower bridge arm switch tube, the current detection terminal and the auxiliary winding.

[0012] Further, the asymmetric half-bridge flyback converter further comprises a charging protocol chip, an output circuit and an isolation circuit; the output circuit being used for the transformer and the load; the charging protocol chip being connected with the output circuit and the isolation circuit, and being used for outputting the voltage gear instruction signal to the isolation circuit according to the load information output by the output circuit. The isolation circuit is connected with the control device, and is used for isolating and feeding back the voltage gear instruction signal to the control device.

[0013] Further, the isolation circuit comprises an isolation optocoupler.

[0014] Further, the asymmetric half-bridge flyback converter further comprises a synchronous rectification circuit; the synchronous rectification circuit is connected with the transformer, the output circuit and the charging protocol chip.

[0015] The control method, device and converter of the asymmetric half-bridge flyback converter, by controlling the upper bridge arm switch tube to be turned on and the lower bridge arm switch tube to be turned off, a first primary side current is obtained, when a first current value corresponding to the first primary side current is greater than a first current threshold, the upper bridge arm switch tube is controlled to be turned off, and the lower bridge arm switch tube is controlled to be turned on, a second primary side current is obtained, and when a change slope corresponding to the second primary side current is zero, a sampling output voltage is obtained from an auxiliary winding of the transformer, by obtaining a voltage gear instruction signal, a voltage reference value is determined according to the voltage gear instruction signal, and the first current threshold is updated according to the sampling output voltage and the voltage reference value, and the upper bridge arm switch tube is controlled to work in the next switching cycle according to the updated first current threshold, the closed-loop control of the asymmetric half-bridge flyback converter is realized on the primary side, at the same time, the voltage sampling is performed by positioning the current slope zero-crossing point, the problem of inaccurate sampling caused by the resonant element in the asymmetric half-bridge flyback converter is overcome, the optocoupler in the traditional secondary side feedback loop is saved, the optocoupler delay is eliminated, the loop response speed is improved, the dynamic performance is improved, and the gear voltage regulation is integrated into the primary side control, so that the voltage gear switching is fast and accurate. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the description of the embodiments of the present application. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort on the basis of these drawings.

[0017] Figure 1 is a circuit schematic diagram of the asymmetric half-bridge flyback converter in an embodiment of the present application; Figure 2 is a flowchart of the control method of the asymmetric half-bridge flyback converter in an embodiment of the present application; Figure 3 is another flowchart of the control method of the asymmetric half-bridge flyback converter in an embodiment of the present application; Figure 4 is another flowchart of the control method of the asymmetric half-bridge flyback converter in an embodiment of the present application; Figure 5 is another flow chart of the control method of the asymmetric half-bridge flyback converter in an embodiment of the present application; Figure 6 is a working waveform diagram of the asymmetric half-bridge flyback converter in an embodiment of the present application.

[0018] In the figure: 1, the primary side half-bridge circuit; 2, the transformer; 3, the control device; 31, the slope zero-crossing detection unit; 32, the voltage detection unit; 33, the power data object module; 34, the signal processing module; 35, the error amplifier; 36, the frequency control unit; 37, the current comparison unit; 38, the driving unit; 4, the charging protocol chip; 5, the output circuit; 6, the isolation circuit; 7, the synchronous rectification circuit; DETAILED DESCRIPTION The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0019] The control method of the asymmetric half-bridge flyback converter provided by the embodiments of the present application can be applied in the application environment as shown in Figure 1 . Specifically, the control method of the asymmetric half-bridge flyback converter is applied in the asymmetric half-bridge flyback converter, and the asymmetric half-bridge flyback converter comprises the primary side half-bridge circuit 1, the transformer 2 and the control device 3 as shown in Figure 1 . The control method of the asymmetric half-bridge flyback converter is applied in the control device 3.

[0020] As an example, the primary side half-bridge circuit 1 includes a first capacitor C1, an upper bridge arm switch Q1, a lower bridge arm switch Q2, a first inductor L1, a second capacitor Cr, a first resistor RCS, and an excitation inductor LM formed by a primary winding Np of a transformer 2. The first capacitor C1 is a filter capacitor, which is connected to an external power supply. The first inductor L1 is a resonance inductor. The second capacitor Cr is a resonance capacitor. The first resistor RCS is a sampling resistor. As an example, the upper bridge arm switch Q1 and the lower bridge arm switch Q2 are both NMOS transistors. The drain of the upper bridge arm switch Q1 is connected to a first terminal of the first capacitor C1, the source of the upper bridge arm switch Q1 is connected to the drain of the lower bridge arm switch Q2, and the source of the lower bridge arm switch Q2 is connected to a second terminal of the first capacitor C1. A connection node between the upper bridge arm switch Q1 and the lower bridge arm switch Q2 is connected to a first terminal of the first inductor L1, and a second terminal of the first inductor L1 is connected to a first terminal of the primary winding Np. The first resistor RCS and the second capacitor Cr are connected in series between the source of the lower bridge arm switch Q2 and a second terminal of the primary winding Np. The gate of the upper bridge arm switch Q1 and the gate of the lower bridge arm switch Q2 are connected to a control device 3, respectively.

[0021] As an example, the transformer 2 includes a primary winding Np, a secondary winding Ns, and an auxiliary winding Na. As an example, the asymmetric half-bridge flyback converter further includes a synchronous rectification circuit 7 and an output circuit 5. The secondary winding Ns is connected to the output circuit 5 through the synchronous rectification circuit 7, and the output circuit 5 is connected to a load. As an example, the output circuit 5 includes a USB interface.

[0022] As an example, the control device 3 adopts a power management chip U2. As an example, the power management chip U2 includes a first drive end HG1, a second drive end LG1, a current collection end VCS, a voltage collection end FB, a ground end GND, a power supply end Vcc, and an input / output end I / O. The first drive end HG1 is used to connect the gate of the upper bridge arm switch Q1, the second drive end LG1 is used to connect the gate of the lower bridge arm switch Q2, the current collection end VCS is used to connect a connection node between the first resistor RCS and the second capacitor Cr, the voltage collection end FB is used to connect the auxiliary winding Na through a voltage dividing circuit, the ground end GND is used to ground, and the power supply end Vcc is used to connect the auxiliary winding Na. The input / output end I / O is used to obtain a voltage gear instruction signal.

[0023] As an example, the power management chip U2 further includes a slope zero-crossing detection unit 31, a voltage detection unit 32, a power data object module 33, a signal processing module 34, an error amplifier 35, a frequency control unit 36, a current comparison unit 37, and a drive unit 38.

[0024] Exemplarily, the asymmetric half-bridge flyback converter further comprises a charging protocol chip 4. The charging protocol chip 4 is connected with the output circuit 5 and the control device 3, and is configured to output a voltage gear signal to the control device 3 according to a load connected with the output circuit 5. Exemplarily, the charging protocol chip 4 can be a fast charging protocol chip.

[0025] In an embodiment, as shown in Figure 2 , a control method of an asymmetric half-bridge flyback converter is provided. The control method is applied to the control device 3 in Figure 1 , and comprises the following steps: S201: controlling the upper bridge arm switch tube Q1 to be turned on and the lower bridge arm switch tube Q2 to be turned off, and obtaining a first primary current Ir.

[0026] S202: when a first current value corresponding to the first primary current Ir is greater than a first current threshold, controlling the upper bridge arm switch tube Q1 to be turned off and the lower bridge arm switch tube Q2 to be turned on, and obtaining a second primary current Ir.

[0027] S203: when a variation slope corresponding to the second primary current Ir is zero, obtaining a sampling output voltage from the auxiliary winding Na of the transformer 2.

[0028] S204: obtaining a voltage gear instruction signal, and determining a voltage reference value according to the voltage gear instruction signal.

[0029] S205: updating the first current threshold according to the sampling output voltage and the voltage reference value.

[0030] S206: controlling the upper bridge arm switch tube Q1 to work in a next switching period according to the updated first current threshold.

[0031] As an example, in step S201, as shown in Figure 6 , a working waveform diagram of the asymmetric half-bridge flyback converter is shown. Before t0, the asymmetric half-bridge flyback converter works at a preset first voltage gear PD0. In the stage of t0-t1, the control device 3 controls the upper bridge arm switch tube Q1 to be turned on and the lower bridge arm switch tube Q2 to be turned off, and the resonant cavity current starts to linearly rise from a negative value. The control device 3 obtains a sampling value of the first primary current Ir, i.e. a first current value, through the current collection end VCS.

[0032] As an example, in step S202, when the first current value corresponding to the first primary current Ir is greater than the first current threshold, the upper bridge arm switch tube Q1 is controlled to be turned off and the lower bridge arm switch tube Q2 is controlled to be turned on to obtain the second primary current Ir. Exemplarily, the control device 3 compares the first current value corresponding to the first primary current Ir and the first current threshold through the current comparison unit 37. When the first current value corresponding to the first primary current Ir is greater than the first current threshold, for example, the upper bridge arm switch tube Q1 is controlled to be turned off and the lower bridge arm switch tube Q2 is controlled to be turned on.Figure 6 At time t1 in FIG. 9, the upper bridge arm switch Q1 is turned off by the driving unit 38. After the upper bridge arm switch Q1 is turned off, a preset dead time is passed, and then the lower bridge arm switch Q2 is turned on by the driving unit 38. At the moment when the lower bridge arm switch Q2 is turned on, the second primary current Ir is obtained in real time, and the second primary current Ir starts to decrease.

[0033] As an example, in step S203, the sampling output voltage is obtained from the auxiliary winding Na of the transformer 2 when the change slope corresponding to the second primary current Ir is zero. As an example, the control device 3 continuously monitors the instantaneous value of the second primary current Ir by the slope zero-crossing detection unit 31, and performs differential operation or low-pass filtered differential operation on adjacent sampling points to obtain the change slope corresponding to the second primary current Ir. It can be understood that the change slope is the instantaneous change slope, and when the change slope corresponding to the second primary current Ir is zero, it indicates that the voltage across the second capacitor Cr at this moment is equal to the output voltage reflected to the primary side, and the voltage across the transformer 2 excitation inductance LM can accurately reflect the output voltage. At this moment, the voltage detection unit 32 immediately controls the voltage sampling end FB to sample and hold the voltage division voltage of the auxiliary winding Na, to obtain the sampling output voltage which can accurately represent the actual output voltage, thereby effectively avoiding the influence of the second capacitor Cr, i.e. the resonance capacitor voltage fluctuation and the transformer 2 leakage inductance on the sampling accuracy.

[0034] As an example, in step S204, the voltage grade instruction signal is obtained, and the voltage reference value is determined according to the voltage grade instruction signal. As an example, the voltage grade signal can be automatically obtained from the fast charging protocol chip, or can be configured and sent to the control device 3 through the man-machine interaction module. In this example, the control device 3 receives the voltage grade instruction signal from the secondary side charging protocol chip 4, and determines the voltage reference value according to the voltage grade instruction signal, so as to adjust the output voltage according to different voltage grade signals in the subsequent steps.

[0035] As an example, in step S205, the first current threshold value is updated according to the sampling output voltage and the voltage reference value. The accurate sampling output voltage obtained in step S203 is compared with the voltage reference value determined in step S204 by the error amplifier 35 in the control device 3, the difference is amplified to generate a voltage error signal, and the voltage error signal is input to the voltage-controlled current source or the function module equivalent thereto, so that the voltage-controlled current source outputs the updated first current threshold value according to the size and polarity of the voltage error signal. As an example, if the difference between the sampling output voltage and the voltage reference value becomes larger, the first current threshold value is increased, so that more energy is transferred in the next cycle; otherwise, the first current threshold value is decreased.

[0036] As an example, in step S206, the updated first current threshold will be latched and used for the next switching period. For example Figure 6 The next period starts at time t6. When the new period starts, the upper arm switch Q1 is turned on, and the first primary current Imag rises until the current value corresponding to the first primary current Imag reaches the updated first current threshold, at which point the upper arm switch Q1 is turned off, thereby achieving regulation of the output energy and ultimately stabilizing the output voltage at the target gear. Figure 6 In the formula, Ip is the resonant current, Imag is the first primary current Imag, Ir is the second primary current Ir, VCS is the resonant current sampling signal, FB_S_1 and FB_S_2 are the output voltages before and after adjustment. VHG1 and VLG1 are the driving signals of the upper arm switch Q1 and the lower arm switch Q2, respectively.

[0037] In this embodiment, by controlling the upper arm switch Q1 to be turned on and the lower arm switch Q2 to be turned off, the first primary current Imag is obtained. When the first current value corresponding to the first primary current Imag is greater than the first current threshold, the upper arm switch Q1 is controlled to be turned off, and the lower arm switch Q2 is controlled to be turned on, the second primary current Ir is obtained, and when the change slope corresponding to the second primary current Ir is zero, the sampling output voltage is obtained from the auxiliary winding Na of the transformer 2. By obtaining the voltage gear instruction signal, determining the voltage reference value according to the voltage gear instruction signal, and updating the first current threshold according to the sampling output voltage and the voltage reference value, and controlling the upper arm switch Q1 to work according to the updated first current threshold in the next switching period, the closed-loop control of the asymmetric half-bridge flyback converter is realized on the primary side. At the same time, by positioning the zero-crossing point of the current slope to sample the voltage, the problem of inaccurate sampling caused by resonant elements in the asymmetric half-bridge flyback converter is overcome, the optocoupler in the traditional secondary side feedback loop is eliminated, the delay of the optocoupler is eliminated, the response speed of the loop is improved, the dynamic performance is improved, and the gear voltage regulation is integrated into the primary side control to realize fast and accurate voltage gear switching.

[0038] In an embodiment, the control method of the asymmetric half-bridge flyback converter further comprises: when the second current value corresponding to the second primary current Ir is greater than the second current threshold, controlling the lower arm switch Q2 to be turned off, and controlling the upper arm switch Q1 to be turned on to enter the next switching period.

[0039] As an example, during the conduction of the lower arm switch Q2, for example Figure 6 As shown in times t1 to t3, the second primary current Ir continuously decreases and reversely increases, becoming negative. The current comparison unit 37 of the control device 3 simultaneously monitors the negative value of the second primary current Ir. When the absolute value of the negative current reaches the preset second current threshold, i.e. the negative current threshold, for example Figure 6At time t3, as shown, the drive unit 38 controls the lower bridge arm switch Q2 to turn off. After a dead time, it controls the upper bridge arm switch Q1 to turn on, thus starting the next switching cycle. In this example, this negative current turn-off mechanism helps to achieve zero-voltage switching (ZVS) of the upper bridge arm switch Q1, reducing switching losses.

[0040] In this embodiment, by setting a second current threshold to turn off the lower bridge arm switch Q2, the asymmetric half-bridge flyback converter can achieve zero-voltage switching of the upper bridge arm switch Q1 under a wide range of load conditions, effectively improving the overall efficiency of the asymmetric half-bridge flyback converter.

[0041] In one embodiment, such as Figure 3 As shown, in step S202, when the first current value corresponding to the first primary current Imag is greater than the first current threshold, the upper bridge arm switch Q1 is turned off and the lower bridge arm switch Q2 is turned on, including: S301: When the first current value corresponding to the first primary current Imag is greater than the first current threshold, control the upper bridge arm switch Q1 to turn off.

[0042] S302: After the upper arm switch Q1 is turned off, the lower arm switch Q2 is turned on after a preset dead time.

[0043] As an example, in step S301, when the current comparison unit 37 determines that the first current value corresponding to the first primary current Imag is greater than the first current threshold, the drive unit 38 immediately pulls the drive signal of the upper bridge arm switch Q1 low to realize the rapid turn-off of the upper bridge arm switch Q1.

[0044] As an example, in step S302, after the upper bridge arm switch Q1 is turned off, the drive unit 38 waits for a preset dead time. During this period, the drive signals for both the upper bridge arm switch Q1 and the lower bridge arm switch Q2 are low. This dead time ensures that the body diode of the lower bridge arm switch Q2 conducts first to freewheel after the upper bridge arm switch Q1 is completely turned off, clamping the midpoint voltage between the upper bridge arm switch Q1 and the lower bridge arm switch Q2 to ground, creating conditions for the lower bridge arm switch Q2 to achieve zero-voltage switching. After the dead time ends, the drive unit 38 sets the drive signal for the lower bridge arm switch Q2 to a high level, turning on the lower bridge arm switch Q2.

[0045] In this embodiment, by introducing dead time and controlling the conduction sequence of the upper arm switch Q1 and the lower arm switch Q2, the risk of shoot-through of the upper arm switch Q1 and the lower arm switch Q2 is effectively prevented, and the inductor current is used to achieve ZVS of the lower arm switch Q2, thereby reducing switching losses and electromagnetic interference.

[0046] In one embodiment, such asFigure 4 As shown in step S204, the voltage level instruction signal is acquired, and a voltage reference value is determined according to the voltage level instruction signal, including: S401: acquiring the voltage level instruction signal from the charging protocol chip 4 through the isolation circuit 6.

[0047] S402: verifying the voltage level instruction signal by the power data object module 33.

[0048] S403: if the verification is passed, outputting the reference adjustment signal to the signal processing module 34.

[0049] S404: processing the reference adjustment signal by the signal processing module 34, and outputting the voltage reference value.

[0050] As an example, in step S401, the charging protocol chip 4 of the secondary side of the asymmetric half-bridge flyback converter communicates with the load through the CC pin to determine the required voltage and current specifications. Then, the charging protocol chip 4 generates a corresponding voltage level instruction signal, which is transmitted to the input / output end I / O of the control device 3 of the primary side, i.e., the I / O pin, after being electrically isolated by the isolation circuit 6. Optionally, the isolation circuit 6 includes an optical coupler or a signal transformer 2.

[0051] As an example, in step S402, the power data object module 33 inside the control device 3 checks the received voltage level instruction signal, such as checking whether it meets the fast charging protocol specification, whether it is within the output range supported by the chip, etc., to prevent system abnormalities caused by incorrect instructions.

[0052] As an example, in steps S403 and S404, after the verification is passed, the power data object module 33 outputs a reference adjustment signal in digital form. The signal processing module 34 converts the reference adjustment signal into an analog voltage value, i.e., a voltage reference value, as the reference input of the error amplifier 35. Exemplarily, the signal processing module 34 includes a digital-to-analog converter.

[0053] In this embodiment, the voltage level instruction signal is safely transmitted through the isolation circuit 6, and is verified and converted in the primary side, realizing fast response of the charging protocol. At the same time, the complex protocol processing and protection functions are still retained in the charging protocol chip 4 of the secondary side, optimizing the system architecture, so that the control device 3 of the primary side focuses on efficient loop control.

[0054] In an embodiment, as shown in step S205, the first current threshold value is updated according to the sampled output voltage and the voltage reference value, including: Figure 5 ​S501: The error amplifier 35 processes the sampled output voltage and the voltage reference value, and outputs a voltage error signal.

[0055] S502: The voltage-controlled current source updates the first current threshold according to the voltage error signal.

[0056] As an example, in step S501, the error amplifier 35 compares the sampled output voltage with the voltage reference value of the reference, and the voltage error signal is proportional to the difference between the sampled output voltage and the voltage reference value. The voltage error signal reflects the deviation of the current output voltage from the target voltage.

[0057] As an example, in step S502, the voltage error signal is sent to the voltage-controlled current source. The voltage-controlled current source generates a current signal corresponding to the voltage error signal according to the size of the voltage error signal, which is used to set or modulate the reference source generating the first current threshold. For example, the larger the voltage error signal, the more the output voltage deviates, the larger the current output by the voltage-controlled current source, and the higher the first current threshold generated, so that the upper bridge arm switch Q1 is turned on for a longer time in the next cycle to transfer more energy to make the output voltage rise.

[0058] In this embodiment, the voltage control loop is formed by the error amplifier 35 and the voltage-controlled current source, which converts the voltage deviation into adjustment of the peak current threshold, realizes continuous and accurate control of the output energy, and ensures the stability of the output voltage.

[0059] It should be understood that the size of the serial number of each step in the above embodiment does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application.

[0060] The embodiment provides a control device 3 for executing the control method of the asymmetric half-bridge flyback converter. The control device 3 is preferably a power management chip U2 integrated with special hardware modules such as the first drive end HG1, the second drive end LG1, the current collection end VCS, the voltage collection end FB, the ground end GND, the power supply end Vcc, the input and output end I / O, the slope zero-crossing detection unit 31, the voltage detection unit 32, the power data object module 33, the signal processing module 34, the error amplifier 35, the frequency control unit 36, the current comparison unit 37 and the drive unit 38, etc. By executing the above method, efficient and fast primary side control is realized.

[0061] The embodiment provides an asymmetric half-bridge flyback converter, which comprises a control device 3. Figure 1As shown, it comprises a primary side half-bridge circuit 1, a transformer 2 and the above-mentioned control device 3; the primary side half-bridge circuit 1 comprises an upper bridge arm switch tube Q1, a lower bridge arm switch tube Q2 and a current detection end; the transformer 2 comprises a primary winding and an auxiliary winding Na; the primary winding is connected with the primary side half-bridge circuit 1; the control device 3 is connected with the gate of the upper bridge arm switch tube Q1, the gate of the lower bridge arm switch tube Q2, the current detection end and the auxiliary winding Na.

[0062] Exemplarily, the control device 3 is connected with the auxiliary winding Na through the voltage dividing resistors R2 and R3.

[0063] In the embodiment, the asymmetric half-bridge flyback converter realizes the primary side feedback control without the need of an optical coupler through the integrated control device 3, and has the advantages of fast loop response, good dynamic performance, low no-load loss and accurate output voltage control.

[0064] In an embodiment, the asymmetric half-bridge flyback converter further comprises a charging protocol chip 4, an output circuit 5 and an isolation circuit 6; the output circuit 5 is used for the transformer 2 and a load; the charging protocol chip 4 is connected with the output circuit 5 and the isolation circuit 6, and is used for outputting a voltage gear instruction signal to the isolation circuit 6 according to the load information output by the output circuit 5; the isolation circuit 6 is connected with the control device 3, and is used for isolating and feeding back the voltage gear instruction signal to the control device 3.

[0065] In the embodiment, through the introduction of the secondary side charging protocol chip 4 and the isolation circuit 6, the asymmetric half-bridge flyback converter can intelligently identify devices and quickly respond to voltage switching requests, while maintaining the electrical isolation safety between the primary and secondary sides.

[0066] In an embodiment, the isolation circuit 6 comprises an isolation optical coupler (not shown in the figure).

[0067] Exemplarily, the anode of a light-emitting diode of the isolation optical coupler is connected to the CC pin of the secondary side charging protocol chip 4 through a current limiting resistor, and the cathode is grounded; the collector of a photosensitive triode of the isolation optical coupler is connected to the I / O pin of the control device 3 and a pull-up resistor, and the emitter of the photosensitive triode is grounded. When the charging protocol chip 4 outputs the voltage gear instruction signal, the isolation optical coupler is turned on, and a low-level signal is transmitted to the I / O pin of the control device 3.

[0068] In the embodiment, the isolation optical coupler is used as the isolation scheme, which is mature in technology and low in cost, and reliably realizes the isolated transmission of signals.

[0069] In an embodiment, the asymmetric half-bridge flyback converter further comprises a synchronous rectification circuit 7; the synchronous rectification circuit 7 is connected with the transformer 2, the output circuit 5 and the charging protocol chip 4.

[0070] Exemplarily, the synchronous rectification circuit 7 comprises a synchronous rectification tube Q3 for replacing a traditional rectification diode to reduce conduction loss and improve efficiency. Exemplarily, the synchronous rectification tube Q3 is an NMOS tube, the drain of the synchronous rectification tube Q3 is connected with the first end of the secondary winding Ns through a diode D1, the source of the synchronous rectification tube Q3 is connected with the output circuit 5, and the gate of the synchronous rectification tube Q3 is connected with the driving end VG of the charging protocol chip 4.

[0071] Exemplarily, the asymmetric half-bridge flyback converter further comprises an output capacitor C3 and an output sampling resistor Rcs. The first end of the output capacitor C3 is connected with the cathode of the diode D1 and the drain of the synchronous rectification tube Q3, and the second end of the output capacitor C3 is grounded. The first end of the output sampling resistor Rcs is connected with the second end of the secondary winding Ns, and the second end of the output sampling resistor Rcs is connected with the output circuit 5. The power supply end Vcc of the charging protocol chip 4 is connected with the first end of the output capacitor C3, and the sampling end Vcs of the charging protocol chip 4 is connected with the second end of the output sampling resistor Rcs.

[0072] In the embodiment, the synchronous rectification technology is adopted to further reduce the on-state loss of the converter, and the overall efficiency can be significantly improved especially when a large current is output.

[0073] The above embodiments are only used to illustrate the technical solutions of the present application, but not limit the same. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features can be replaced by equivalent features. The modification or replacement does not change the essence of the corresponding technical solutions, and should be included in the protection scope of the present application.

Claims

1. A control method of an asymmetric half-bridge flyback converter, characterized in that, The method comprises: controlling the upper bridge arm switch tube to be turned on and the lower bridge arm switch tube to be turned off, and obtaining a first primary side current; when a first current value corresponding to the first primary side current is greater than a first current threshold, controlling the upper bridge arm switch tube to be turned off and the lower bridge arm switch tube to be turned on, and obtaining a second primary side current; when a variation slope corresponding to the second primary side current is zero, obtaining a sampling output voltage from an auxiliary winding of the transformer; obtaining a voltage gear instruction signal, and determining a voltage reference value according to the voltage gear instruction signal; updating the first current threshold according to the sampling output voltage and the voltage reference value; controlling the upper bridge arm switch tube to work in a next switching period according to the updated first current threshold.

2. The control method of the asymmetric half-bridge flyback converter according to claim 1, characterized in that, The control method of the asymmetric half-bridge flyback converter further comprises: when a second current value corresponding to the second primary side current is greater than a second current threshold, controlling the lower bridge arm switch tube to be turned off and the upper bridge arm switch tube to be turned on, so as to enter the next switching period.

3. The control method of the asymmetric half-bridge flyback converter according to claim 1, characterized in that, The method of controlling the upper bridge arm switch tube to be turned off and the lower bridge arm switch tube to be turned on when the first current value corresponding to the first primary side current is greater than the first current threshold comprises: controlling the upper bridge arm switch tube to be turned off when the first current value corresponding to the first primary side current is greater than the first current threshold; after controlling the upper bridge arm switch tube to be turned off, controlling the lower bridge arm switch tube to be turned on after a preset dead time.

4. The control method of the asymmetric half-bridge flyback converter according to claim 1, characterized in that, The method of obtaining the voltage gear instruction signal and determining the voltage reference value according to the voltage gear instruction signal comprises: obtaining the voltage gear instruction signal from a charging protocol chip through an isolation circuit; verifying the voltage gear instruction signal through a power data object module; if the verification is passed, outputting a reference adjustment signal to a signal processing module; processing the reference adjustment signal through the signal processing module, and outputting the voltage reference value.

5. The control method of the asymmetric half-bridge flyback converter according to claim 1, characterized in that, The method of updating the first current threshold according to the sampling output voltage and the voltage reference value comprises: processing the sampling output voltage and the voltage reference value through an error amplifier, and outputting a voltage error signal; updating the first current threshold according to the voltage error signal through a voltage-controlled current source.

6. A control device characterized by comprising: A control device for executing the control method of the asymmetric half-bridge flyback converter.

7. An asymmetrical half-bridge flyback converter, characterized by The control device comprises a primary side half-bridge circuit, a transformer and the control device of claim 6. The primary side half-bridge circuit comprises an upper bridge arm switch tube, a lower bridge arm switch tube and a current detection end. The transformer comprises a primary winding and an auxiliary winding. The primary winding is connected with the primary side half-bridge circuit. The control device is connected with the upper bridge arm switch tube, the lower bridge arm switch tube, the current detection end and the auxiliary winding.

8. The asymmetrical half-bridge flyback converter of claim 7, characterized by The asymmetric half-bridge flyback converter further comprises a charging protocol chip, an output circuit and an isolation circuit. The output circuit is used for the transformer and a load. The charging protocol chip is connected with the output circuit and the isolation circuit, and is used for outputting the voltage gear instruction signal to the isolation circuit according to load information output by the output circuit. The isolation circuit is connected with the control device, and is used for isolating and feeding back the voltage grade instruction signal to the control device.

9. The asymmetrical half-bridge flyback converter of claim 8, characterized by, The isolation circuit comprises an isolation optocoupler.

10. The asymmetrical half bridge flyback converter of claim 8, wherein, The asymmetric half-bridge flyback converter further comprises a synchronous rectification circuit; the synchronous rectification circuit is connected with the transformer, the output circuit and the charging protocol chip.

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