Capacitance and Inductance Tester and Capacitance and Inductance Positioning and Detection Methods and Devices

Abstract

This disclosure presents embodiments of a capacitance and inductance tester and a method and apparatus for locating and detecting capacitance and inductance. One specific implementation of the method includes: acquiring multi-dimensional data from a target circuit board; registering and fusing the three-dimensional point cloud data of the circuit board to obtain processed point cloud data; clustering the processed point cloud data of the circuit board into component point clouds to generate a set of component point cloud data groups; extracting nominal parameters from the two-dimensional image data of the circuit board to generate a set of component nominal parameters; measuring the physical electrical parameters of the components on the target circuit board to obtain a set of component electrical parameters; performing simulation modeling on the set of component point cloud data groups to obtain a three-dimensional model of the circuit board; and generating circuit board component detection information. This implementation can accurately determine the spatial location of capacitors and inductors in a unified three-dimensional coordinate system, thereby realizing the associated execution of component positioning and electrical measurement, and thus improving the efficiency of circuit board detection.

Description

Technical Field

[0001] The embodiments disclosed herein relate to the field of computer technology, specifically to a capacitance and inductance tester and a capacitance and inductance positioning and detection method and apparatus. Background Technology

[0002] Capacitors and inductors are typically critical components on circuit boards, requiring inspection and measurement of their models, locations, and electrical parameters during assembly and maintenance. With increasing circuit board integration, component layouts are denser and their dimensions smaller, making manual methods insufficient for accurately identifying, locating, and measuring components on larger boards. Currently, component inspection and measurement on circuit boards typically involves identifying component models and locations using two-dimensional images, followed by individual measurements using electrical measuring equipment. However, two-dimensional images only provide planar positions and cannot reflect the true three-dimensional locations of capacitors and inductors, easily leading to measurement point positioning errors. Furthermore, in densely populated areas, it is difficult to accurately distinguish adjacent components using two-dimensional images, easily causing measurement confusion or omissions. Summary of the Invention

[0003] The summary portion of this disclosure is intended to provide a brief overview of the concepts, which will be described in detail in the detailed description portion. This summary portion is not intended to identify key or essential features of the claimed technical solutions, nor is it intended to limit the scope of the claimed technical solutions.

[0004] Some embodiments of this disclosure provide capacitance and inductance testers, capacitance and inductance positioning and detection methods, apparatuses, electronic devices, and computer-readable media to solve the technical problems mentioned in the background section above.

[0005] In a first aspect, some embodiments of this disclosure provide a method for locating and detecting capacitors and inductors. The method includes: acquiring multi-dimensional data from a target circuit board using a three-dimensional scanning device and an image acquisition device included in a capacitor and inductor tester, obtaining three-dimensional point cloud data and two-dimensional image data of the circuit board; wherein the capacitor and inductor tester further includes an electrical parameter measuring device; performing registration and fusion processing on the three-dimensional point cloud data of the circuit board based on the image acquisition device and the two-dimensional image data of the circuit board, obtaining processed point cloud data of the circuit board; and performing component point cloud clustering on the processed point cloud data of the circuit board to generate a set of component point cloud data groups, wherein each component point cloud data group... Each group corresponds to a 3D parameter of a component. Based on the 3D parameters of each corresponding component, the nominal parameters of the component are extracted from the 2D image data of the circuit board to generate a set of nominal parameters of the components. Using the electrical parameter measuring device, the physical electrical parameters of each component in the target circuit board corresponding to the 3D parameters of each component are measured to obtain a set of component electrical parameters. Based on the set of component electrical parameters and the set of nominal parameters of the components, the point cloud data of the components is simulated and modeled to obtain a 3D model of the circuit board. Based on the set of component electrical parameters, the set of nominal parameters of the components, and the 3D model of the circuit board, circuit board component detection information is generated.

[0006] Secondly, some embodiments of this disclosure provide a capacitance and inductance positioning and detection device, which includes: a multi-dimensional data acquisition unit configured to perform multi-dimensional data acquisition on a target circuit board using a capacitance and inductance tester including a three-dimensional scanning device and an image acquisition device, to obtain three-dimensional point cloud data and two-dimensional image data of the circuit board, wherein the capacitance and inductance tester further includes an electrical parameter measuring device; a registration and fusion unit configured to perform registration and fusion processing on the three-dimensional point cloud data of the circuit board based on the image acquisition device and the two-dimensional image data of the circuit board, to obtain processed point cloud data of the circuit board; and a point cloud clustering unit configured to perform component point cloud clustering on the processed point cloud data of the circuit board to generate a set of component point cloud data groups, wherein each component point cloud data group corresponds to The system includes: a component 3D parameter extraction unit configured to extract nominal parameters from the 2D image data of the circuit board based on the corresponding 3D parameters of each component, thereby generating a set of nominal parameters of each component; an electrical parameter measurement unit configured to measure the physical electrical parameters of each component in the target circuit board corresponding to the 3D parameters of each component using the electrical parameter measurement device, thereby obtaining a set of component electrical parameters; a simulation modeling unit configured to perform simulation modeling on the set of component point cloud data based on the set of component electrical parameters and the set of nominal parameters of each component, thereby obtaining a 3D model of the circuit board; and a generation unit configured to generate circuit board component detection information based on the set of component electrical parameters, the set of nominal parameters of each component, and the 3D model of the circuit board.

[0007] Thirdly, some embodiments of this disclosure provide an electronic device, including: one or more processors; and a storage device having one or more programs stored thereon, wherein when the one or more programs are executed by the one or more processors, the one or more processors implement the method described in any implementation of the first aspect above.

[0008] Fourthly, some embodiments of this disclosure provide a computer-readable medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the method described in any of the implementations of the first aspect above.

[0009] The various embodiments of this disclosure have the following beneficial effects: the capacitor and inductor positioning and detection methods of some embodiments of this disclosure can accurately determine the spatial position of capacitors and inductors in a unified three-dimensional coordinate system, thereby realizing the associated execution of component positioning and electrical measurement, and thus improving the efficiency of circuit board inspection. Specifically, the reason for the low efficiency of related circuit board inspection is that two-dimensional images only provide planar positions and cannot reflect the true three-dimensional positions of capacitors and inductors, which easily leads to measurement point positioning errors. Moreover, in densely populated areas of components, it is difficult to accurately distinguish adjacent components based on two-dimensional images, which easily leads to measurement confusion or omissions. Based on this, the capacitor and inductor positioning and detection methods of some embodiments of this disclosure firstly use a three-dimensional scanning device and an image acquisition device included in a capacitor and inductor tester to perform multi-dimensional data acquisition on the target circuit board, obtaining three-dimensional point cloud data and two-dimensional image data of the circuit board. The capacitor and inductor tester also includes an electrical parameter measurement device. Thus, the true spatial shape and height information of components in the circuit board can be determined by the three-dimensional point cloud data, and the appearance and nominal information of the components can be determined by the two-dimensional image data of the circuit board. Then, based on the image acquisition device and the 2D image data of the circuit board, the 3D point cloud data of the circuit board is registered and fused to obtain processed point cloud data. This establishes a spatial correspondence between the 2D pixel plane and the 3D point cloud, allowing the pixel position of each component in the circuit board image to be mapped to a specific 3D region in the point cloud. Next, the processed circuit board point cloud data is clustered to generate a set of component point cloud data groups, where each group corresponds to a 3D parameter of a component. Thus, by representing a physical component with each point cloud group, the 3D parameters such as the center position, volume, and outline of each component are determined. Next, based on the corresponding 3D parameters of each component, the nominal parameters of the circuit board 2D image data are extracted to generate a set of nominal parameters. This allows the 3D component region to be used as a mask on the 2D image of the circuit board, enabling the extraction of image regions of each component, distinguishing adjacent components, reducing component confusion or omission, and obtaining the nominal parameters of each component. Next, using the aforementioned electrical parameter measurement equipment, the physical electrical parameters of each component on the target circuit board corresponding to the three-dimensional parameters of each of the aforementioned components are measured, resulting in a set of component electrical parameters. Thus, given the three-dimensional position and nominal parameters, electrical measurements can be performed on each component to obtain its electrical parameters. Then, based on the aforementioned set of component electrical parameters and the aforementioned set of component nominal parameters, simulation modeling is performed on the aforementioned set of component point cloud data to obtain a three-dimensional model of the circuit board. This allows the construction of a three-dimensional circuit board model with electrical attribute parameters. Finally, based on the aforementioned set of component electrical parameters, the aforementioned set of component nominal parameters, and the aforementioned three-dimensional model of the circuit board, circuit board component detection information is generated.Therefore, it is possible to determine whether the nominal and measured values ​​of components in the target circuit board match and whether their distribution is reasonable, thereby obtaining circuit board component detection information. This enables the sequential execution of component positioning, electrical measurement, and circuit board detection, thereby improving circuit board detection efficiency. Attached Figure Description

[0010] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. Throughout the drawings, the same or similar reference numerals denote the same or similar elements. It should be understood that the drawings are schematic, and elements are not necessarily drawn to scale.

[0011] Figure 1 These are flowcharts of some embodiments of the capacitance and inductance positioning detection method of this disclosure;

[0012] Figure 2 This is a schematic diagram of a scenario for multi-dimensional data acquisition in the capacitance and inductance positioning detection method disclosed herein;

[0013] Figure 3 This is a test diagram illustrating the three-phase testing of components on the target circuit board.

[0014] Figure 4 This is a test diagram for performing single-phase and current tests on components in the target circuit board;

[0015] Figure 5 This is a schematic diagram of the three-phase test settings interface of the capacitance and inductance tester disclosed herein;

[0016] Figure 6 This is a schematic diagram of the three-phase test display interface of the capacitance and inductance tester disclosed herein;

[0017] Figure 7 This is a schematic diagram of the single-phase test display interface of the capacitance and inductance tester disclosed herein;

[0018] Figure 8 This is a schematic diagram of the structure of some embodiments of the capacitance and inductance positioning detection device according to the present disclosure;

[0019] Figure 9 This is a schematic diagram of the structure of an electronic device suitable for implementing some embodiments of the present disclosure. Detailed Implementation

[0020] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0021] It should also be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings. Unless otherwise specified, the embodiments and features described in this disclosure can be combined with each other.

[0022] It should be noted that the concepts of "first" and "second" mentioned in this disclosure are used only to distinguish different devices, modules or units, and are not used to limit the order of functions performed by these devices, modules or units or their interdependencies.

[0023] It should be noted that the terms "a" and "a plurality of" used in this disclosure are illustrative rather than restrictive, and those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0024] The names of messages or information exchanged between multiple devices in the embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.

[0025] This disclosure will now be described in detail with reference to the accompanying drawings and embodiments.

[0026] Figure 1 A flowchart 100 of some embodiments of the capacitance and inductance positioning detection method according to the present disclosure is shown. The capacitance and inductance positioning detection method includes the following steps:

[0027] Step 101: Using the 3D scanning device and image acquisition device included in the capacitance and inductance tester, multi-dimensional data acquisition is performed on the target circuit board to obtain 3D point cloud data and 2D image data of the circuit board.

[0028] In some embodiments, the execution subject (e.g., a computing device) of the capacitance and inductance positioning detection method can perform multi-dimensional data acquisition on the target circuit board using a capacitance and inductance tester that includes a 3D scanning device and an image acquisition device, thereby obtaining 3D point cloud data and 2D image data of the circuit board. The target circuit board can be a finished circuit board with several capacitors, inductors, and other components soldered on it (i.e., a printed circuit board), and with wiring and assembly completed according to the design. The capacitance and inductance tester can be a device for component testing of the finished circuit board. The capacitance and inductance tester can include a 3D scanning device, an image acquisition device, and an electrical parameter measuring device. The 3D scanning device can be used to acquire the 3D point cloud data of the target circuit board. The image acquisition device is used to acquire the 2D image data of the target circuit board. As an example, the 3D scanning device can be composed of a pre-defined number of associated spectral confocal sensors. The image acquisition device can be an industrial camera. Each circuit board point cloud data in the 3D point cloud data includes 3D coordinates and reflection intensity. The 2D image data includes the pixel coordinates and RGB color values ​​of each 2D image pixel.

[0029] like Figure 2 As shown, the system includes a target circuit board 201, a platform 202, a capacitance and inductance tester 203, a 3D scanning device 2031, an image acquisition device 2032, an electrical parameter measuring device 2033, and a calibration plate 204. The target circuit board 201 can be placed on the calibration plate 204. The calibration plate 204 can be a calibration reference plate with standard feature patterns (e.g., a checkerboard pattern, a dot array pattern, or a 3D feature structure). The calibration plate 204 is fixed on the horizontally placed platform 202, located within the effective field of view of the 3D scanning device 2031, and the four corner feature points, boundaries, or 3D feature structures of the calibration plate 204 can be completely covered by the imaging area of ​​the image acquisition device 2032, with uniform illumination provided by a ring light source 202. The capacitance and inductance tester 203 can be located directly above the center of the platform 202 and parallel to the platform 202, with a preset distance (e.g., 40cm) between them. In practice, firstly, the aforementioned capacitance and inductance tester moves horizontally at a preset speed (e.g., 1 cm / s). The executing entity can then use the included 3D scanning device 2031 to gradually scan the target circuit board, obtaining 3D point cloud data of the circuit board. Then, after the 3D scanning device 2031 finishes scanning, the executing entity can use the image acquisition device 2032 included in the capacitance and inductance tester 203 to acquire a 2D image of the stationary target circuit board 201, obtaining 2D image data of the circuit board.

[0030] It should be noted that the aforementioned computing devices can be either hardware or software. When the computing device is hardware, it can be implemented as a distributed cluster consisting of multiple servers or terminal devices, or as a single server or a single terminal device. When the computing device is software, it can be installed on the hardware devices listed above. It can be implemented as, for example, multiple software programs or software modules used to provide distributed services, or as a single software program or software module. No specific limitations are made here. It should be understood that the number of the aforementioned computing devices can be arbitrary, depending on the implementation requirements.

[0031] Step 102: Based on the image acquisition device and the two-dimensional image data of the circuit board, the three-dimensional point cloud data of the circuit board is registered and fused to obtain the processed point cloud data of the circuit board.

[0032] In some embodiments, the execution entity can use the industrial camera and the two-dimensional image data of the circuit board to perform registration and fusion processing on the three-dimensional point cloud data of the circuit board to obtain processed circuit board point cloud data. In practice, the execution entity can align the coordinate system of the three-dimensional point cloud data of the circuit board with the two-dimensional image data of the circuit board, and fuse the RGB information included in the aligned two-dimensional image data of the circuit board into the three-dimensional point cloud data of the circuit board to obtain processed circuit board point cloud data.

[0033] In some optional implementations of certain embodiments, the execution entity may perform registration and fusion processing on the three-dimensional point cloud data of the circuit board based on the image acquisition device and the two-dimensional image data of the circuit board to obtain the processed point cloud data of the circuit board:

[0034] The first step is to map the coordinates of each two-dimensional image pixel in the circuit board's two-dimensional image data to the point cloud coordinate system corresponding to the circuit board's three-dimensional point cloud data, based on the camera calibration parameters of the aforementioned image acquisition device, in order to update the circuit board's three-dimensional point cloud data. The aforementioned camera calibration parameters may include focal length, principal point position, and distortion coefficients.

[0035] In practice, before performing multi-dimensional data acquisition on the target circuit board, the execution entity can achieve unified calibration between the sensor's three-dimensional coordinate system of the spectral confocal sensor and the camera's coordinate system of the industrial camera using the calibration board. First, the execution entity can acquire three-dimensional point cloud data corresponding to feature points on the calibration board using the spectral confocal sensor, and acquire two-dimensional image data corresponding to the same feature points on the calibration board using the industrial camera. Second, the execution entity can perform distortion correction on the acquired two-dimensional image data corresponding to the feature points using the camera calibration parameters, including focal length, principal point position (i.e., intrinsic parameter matrix), and distortion coefficient, to obtain the two-dimensional pixel coordinates corresponding to the feature points on the calibration board. Third, by matching the two-dimensional pixel coordinates corresponding to the feature points on the calibration board with the three-dimensional feature points acquired by the spectral confocal sensor, and using a pose solving algorithm based on a perspective projection model (e.g., the PnP solving algorithm), the rotation matrix and translation vector between the industrial camera coordinate system and the point cloud coordinate system can be determined, thereby completing the alignment between the two-dimensional image coordinate system and the three-dimensional point cloud coordinate system.

[0036] Then, for each two-dimensional image pixel in the aforementioned circuit board two-dimensional image data, the execution entity backprojects the pixel coordinates of the aforementioned two-dimensional image pixel to the corresponding spatial ray in the three-dimensional point cloud coordinate system using the aforementioned rotation matrix and translation vector. Based on the aforementioned spatial ray, the circuit board three-dimensional point cloud data with the closest distance between the points is determined as the corresponding three-dimensional data cloud point. Subsequently, the RGB color values ​​of the aforementioned two-dimensional image pixels are assigned to the corresponding three-dimensional point cloud data. Thus, information (color, text, texture) on the acquired circuit board image can be mapped to the point cloud coordinate system to generate colored three-dimensional point cloud data.

[0037] The second step involves performing substrate fitting transformation on the updated 3D point cloud data of the circuit board to obtain processed point cloud data. This processed point cloud data resides within a unified 3D coordinate system.

[0038] In some optional implementations of certain embodiments, the aforementioned execution entity may perform substrate fitting transformation on the updated circuit board 3D point cloud data through the following steps to obtain processed circuit board point cloud data:

[0039] The first step is to remove background point cloud data from the updated 3D point cloud data of the circuit board. In practice, the execution entity can remove 3D point cloud data of circuit boards that are outside the pre-measured height range (i.e., the value range in the Z-axis direction, for example, 20mm to 30mm) and width range (i.e., the value range in the X-axis and Y-axis directions) of the target circuit board as background point cloud data from the updated 3D point cloud data.

[0040] The second step involves performing the following substrate fitting steps based on the updated 3D point cloud data of the circuit board:

[0041] The first sub-step involves selecting three 3D point cloud datasets of the circuit boards that satisfy a planar condition from the 3D point cloud dataset. This planar condition can be that the 3D coordinates of the three selected 3D point cloud datasets are not collinear.

[0042] The second sub-step involves determining the substrate plane based on the selected 3D point cloud data of the three circuit boards. In practice, the aforementioned execution entity can determine the plane equations corresponding to the selected 3D point cloud data of the three circuit boards, and define the plane represented by the solved plane equations as the substrate plane. Specifically, the direction vectors between every two 3D coordinates in the 3D point clouds of the three circuit boards can be determined separately. Then, any two direction vectors are randomly selected and their cross product is performed to obtain the normal direction of the plane. Finally, the normal direction of the plane is combined with the 3D coordinates of any one of the 3D point clouds of the circuit boards to construct the parameters of the plane equation, thus obtaining a uniquely determined plane equation. Therefore, using the 3D coordinates of the three 3D point clouds of the three circuit boards, a plane can be determined in 3D space as the substrate plane of the circuit board.

[0043] The third sub-step involves determining the substrate distances corresponding to each point cloud in the circuit board's 3D point cloud data, based on the determined substrate plane. In practice, the aforementioned execution entity can define the point cloud substrate distance as the straight-line distance between each 3D point cloud of the circuit board and the substrate plane.

[0044] The fourth sub-step involves determining the number of interior points based on the determined distances between each point cloud substrate and the first error distance threshold. In practice, the execution entity can determine the number of point cloud substrate distances greater than or equal to the first error distance threshold as the number of interior points. Since the PCB board surface is relatively flat, as an example, the first error distance threshold can be taken in the range of 0.03mm to 0.05mm.

[0045] Third, in response to the determination that the number of times the above substrate fitting step has been executed is less than or equal to the preset number of iterations, the above substrate fitting step is executed again. As an example, the preset number of iterations can be 10. In practice, since the target circuit board is the largest planar object in the multi-dimensional data acquisition scene, after the background point cloud is removed, only the substrate point cloud data and component point cloud data remain in the 3D point cloud data of the circuit board. However, the component area accounts for a smaller proportion, while the substrate area accounts for a larger proportion, and the distance from the bottom of the component to the circuit board substrate is often similar. Therefore, by determining the substrate distance of each point cloud and filtering and iterating multiple times, the substrate plane can be determined.

[0046] The fourth step is to determine the substrate plane corresponding to the largest number of interior points among the determined interior point numbers as the candidate substrate plane. In practice, the aforementioned execution entity can determine the plane represented by the plane equation corresponding to the largest number of interior points among the determined interior point numbers as the candidate substrate plane.

[0047] The fifth step is to convert the updated 3D point cloud data of the circuit board according to the above candidate substrate plane to obtain the processed point cloud data of the circuit board.

[0048] In some optional implementations of certain embodiments, the aforementioned execution entity may perform the following steps to transform the updated 3D point cloud data of the circuit board based on the aforementioned candidate substrate plane, thereby obtaining the processed circuit board point cloud data:

[0049] The first step involves denoising the updated 3D point cloud data of the circuit board based on the aforementioned candidate substrate plane and the second error distance threshold, to determine the target circuit board 3D point cloud data. The second error distance threshold is less than the first error distance threshold. In practice, the executing entity can determine the distance between each circuit board 3D point cloud and the candidate substrate plane, and identify the circuit board 3D point clouds with distance values ​​less than or equal to the second error distance threshold as the target circuit board 3D point clouds, thus obtaining the target circuit board 3D point cloud data. For example, the second error distance threshold can be 0.02 mm.

[0050] The second step is to determine the target substrate plane based on the aforementioned 3D point cloud data of the target circuit board. In practice, the execution entity can use a plane fitting algorithm to perform plane fitting processing on the aforementioned 3D point cloud data of the target circuit board, thereby determining the target substrate plane. Specifically, the aforementioned plane fitting algorithm can refer to the least squares method. Thus, through multiple iterations and error filtering, a geometric plane that matches the substrate of the aforementioned target circuit board can be fitted.

[0051] The third step involves performing coordinate system transformation on the three-dimensional point cloud data of the target circuit board based on the target substrate plane, resulting in processed circuit board point cloud data. The processed circuit board point cloud data is located in the three-dimensional coordinate system corresponding to the target substrate plane.

[0052] In practice, firstly, the aforementioned execution entity can establish a unified three-dimensional reference coordinate system for the entire detection process based on the standard feature structure of the calibration board. The origin of this unified three-dimensional reference coordinate system can be set as a preset reference point on the calibration board, its X and Y axes can be determined by the edge directions of the calibration board, and its Z axis is determined by the plane normal vector of the calibration board. Then, the execution entity determines the extrinsic parameter matrix of the spatial relationship between each spectral confocal sensor coordinate system and the unified three-dimensional reference coordinate system. Afterwards, based on the determined extrinsic parameter matrices, the execution entity can uniformly transform the point cloud data in each spectral confocal sensor coordinate system to the unified three-dimensional reference coordinate system through three-dimensional rotation and three-dimensional translation operations, obtaining the processed circuit board point cloud data.

[0053] Step 103: Perform component point cloud clustering on the processed circuit board point cloud data to generate a set of component point cloud data groups.

[0054] In some embodiments, the execution entity may perform component point cloud clustering on the processed circuit board point cloud data to generate a set of component point cloud data groups. Each component point cloud data group corresponds to a component's three-dimensional parameters. Each component's three-dimensional parameter may include the component's centroid coordinates, spatial bounding box range, component major axis direction vector, component width direction vector, and component vertical direction vector. The spatial bounding box range characterizes the spatial range occupied by the corresponding component in a unified three-dimensional coordinate system. The component major axis direction vector characterizes the orientation of the component's major axis. The component width direction vector characterizes the orientation of the component's minor axis. Taking a cuboid in a unified three-dimensional coordinate system as an example, the component major axis direction vector, component width direction vector, and component vertical direction vector can respectively characterize the spatial orientations corresponding to the cube's length, width, and height.

[0055] In some optional implementations of certain embodiments, the execution entity may perform component point cloud clustering on the processed circuit board point cloud data through the following steps to generate a set of component point cloud data groups:

[0056] The first step is to perform the following feature extraction steps for each processed circuit board point cloud in the above processed circuit board point cloud data:

[0057] The first sub-step involves determining the set of adjacent circuit board point clouds corresponding to the processed circuit board point cloud. This set of adjacent circuit board point clouds describes the geometry of the processed circuit board point cloud within a local region. In practice, the executing entity can use the KNN algorithm to determine the K nearest neighbors of the processed circuit board point cloud as the set of adjacent circuit board point clouds. For example, K can be 16.

[0058] The second sub-step involves determining the coordinate covariance matrix corresponding to the processed circuit board point cloud based on the aforementioned set of adjacent circuit board point clouds. In practice, the executing entity can determine the covariance matrix between the processed circuit board point cloud and the set of adjacent circuit board point clouds. Specifically, firstly, the mean values ​​of the X-axis, Y-axis, and Z-axis coordinates of each adjacent circuit board point cloud in the processed circuit board point cloud and the adjacent circuit board point cloud set are determined as the average three-dimensional coordinates. Then, the three-dimensional coordinates of each adjacent circuit board point cloud in the adjacent circuit board point cloud set are subtracted from the average three-dimensional coordinates to determine the coordinate offset. Subsequently, for each determined coordinate offset, the following parameters are determined: the square of the X-axis offset (XX), the square of the Y-axis offset (YY), the square of the Z-axis offset (ZZ), the product of the X-axis and Y-axis offsets (XY), the product of the Y-axis and Z-axis offsets (YZ), and the product of the X-axis and Z-axis offsets (XZ). Then, determine the mean of the six parameters corresponding to each coordinate offset (i.e., the mean of the square of each X-axis offset, the mean of the square of each Y-axis offset, the mean of the square of each Z-axis offset, etc.), and finally determine the six determined means in the order of ((XX, XY, XZ), (XY, YY, YZ), (XZ, YZ, ZZ)) to form a three-row, three-column coordinate covariance matrix.

[0059] The third sub-step involves generating point cloud feature information based on the aforementioned coordinate covariance matrix. In practice, firstly, the execution entity can perform eigenvalue decomposition on the coordinate covariance matrix using a solver to obtain three eigenvalues. Then, the eigenvector corresponding to the smallest eigenvalue can be taken as the normal vector of the processed circuit board point cloud, and the other two eigenvectors (i.e., the eigenvectors corresponding to the other two eigenvalues) can be taken as the two local plane directions of the processed circuit board point cloud on the local plane. Next, the ratio of the smallest eigenvalue to the sum of the three eigenvalues ​​is taken as the curvature eigenvalue. Finally, the three-dimensional coordinates, normal vector, two local plane directions, and curvature eigenvalue of the processed circuit board point cloud can be determined as the point cloud feature information corresponding to the processed circuit board point cloud.

[0060] The second step is to construct a circuit board point cloud graph based on the determined set of adjacent circuit board point clouds and the processed circuit board point cloud data. In practice, the aforementioned execution entity can use each processed circuit board point cloud in the processed circuit board point cloud data as a vertex and the adjacency relationship as an edge (for example, if the set of adjacent circuit board point clouds corresponding to processed circuit board point cloud A contains B, C, D, and F, then there are connecting edges between point cloud A and point clouds B, C, D, and F).

[0061] The third step involves inputting the circuit board point cloud image and its feature information into the circuit board point cloud classification model to generate classification labels for each point cloud. This model can be a neural network that takes the circuit board point cloud image and the feature information corresponding to each vertex (i.e., the circuit board point cloud) as input, and outputs a point cloud classification probability vector. The model employs an encoder-decoder structure, ultimately generating the point cloud classification probability vector through an output layer. The encoder extracts local point cloud features. First, it obtains the set of neighboring point clouds for each point cloud using a neighborhood query method such as KNN or ball query. Then, it uses relative position encoding estimation to determine the relative coordinates of the neighborhood point clouds. Next, it uses kernel density estimation to obtain the point cloud density and determine the inverse density coefficient to compensate for uneven point cloud distribution. Afterward, the relative coordinates are input into the MLP, and a channel-wise linear transformation is performed to generate convolution weights and neighborhood features. Finally, the neighborhood features and inverse density coefficients are weighted and convolved using the convolution weights, and local to global features are extracted layer by layer through downsampling. The decoder is used to restore spatial resolution and fuse encoder features, through distance-based interpolation, skip connections, and a point-wise multi-layer perceptron (MLP) for feature propagation and fusion. The output layer can consist of global max pooling, an MLP classification head (containing fully connected layers, batch normalization layers, ReLU activation functions, dropout layers), and a softmax layer.

[0062] As an example, the circuit board point cloud classification model described above can be a PointConv model, a KPConv (KernelPoint Convolution) model, or a DGCNN (Dynamic Graph CNN) model. The point cloud classification probability vector described above can be the probability vector of the category to which each point in the corresponding circuit board point cloud belongs. The point cloud classification label described above can characterize the component type of the corresponding circuit board point cloud. Component types can include, but are not limited to: capacitors, inductors, resistors, substrates, and noise. For example, one of the above point cloud classification probability vectors could be ("type=capacitor":0.765, "type=inductor":0.327, "type=PCB substrate":0.541), "type=other / pad / noise":0.215), and the corresponding point cloud classification label could be "capacitor".

[0063] The fourth step involves classifying the processed circuit board point cloud data according to the aforementioned point cloud classification labels, resulting in a set of similar point cloud data groups. In practice, the executing entity can group processed circuit board point clouds with the same point cloud classification labels into the same group to obtain a set of similar point cloud data groups.

[0064] The fifth step involves clustering each similar point cloud data group in the set of similar point cloud data groups to generate individual component point cloud data groups, resulting in a set of component point cloud data groups. Each component point cloud data group in this set can represent a component in the target circuit board. In practice, firstly, for each similar point cloud data group in the set of similar point cloud data groups, the execution entity uses a clustering algorithm to cluster the various similar point clouds included in the set to generate individual component point cloud data groups. Then, the execution entity can determine the generated individual component point cloud data groups as the set of component point cloud data groups. As an example, the clustering algorithm can be the DBSCAN density clustering algorithm.

[0065] Step 6: For each element point cloud data group in the aforementioned element point cloud data set, determine the three-dimensional parameters of the element represented by that element point cloud data group. In practice, firstly, the executing entity can determine the mean X-axis coordinate, mean Y-axis coordinate, and mean Z-axis coordinate of each element point cloud in the aforementioned element point cloud data set, thereby determining the centroid coordinates of the element. Then, the executing entity can determine the spatial bounding box range of the aforementioned element point cloud data set (i.e., the maximum and minimum coordinate values ​​of the element represented by the aforementioned element point cloud data set in the X, Y, and Z axes). Next, the executing entity can determine the coordinate difference between each element point cloud in the aforementioned element point cloud data set and the centroid coordinates of the aforementioned element as the element coordinate offset. Then, the executing entity can construct the element coordinate covariance matrix using the determined element coordinate offsets. Specifically, the construction method of the aforementioned element coordinate covariance matrix can refer to the construction method of the aforementioned coordinate covariance matrix, and will not be repeated here. Next, the execution entity can solve for the eigenvalues ​​of the component's coordinate covariance matrix, obtaining three eigenvalues, λ1, λ2, and λ3 in descending order. Then, the execution entity can use the eigenvector corresponding to the largest eigenvalue (λ1) as the component's major axis direction vector, the eigenvector corresponding to eigenvalue λ2 as the component's width direction vector, and the eigenvector corresponding to eigenvalue λ3 as the component's vertical direction vector. Finally, the execution entity can determine the component's centroid coordinates, bounding box extent, major axis direction vector, width direction vector, and vertical direction vector as the component's three-dimensional parameters.

[0066] Step 104: Based on the three-dimensional parameters of each corresponding component, extract the component nominal parameters from the two-dimensional image data of the circuit board to generate a set of component nominal parameters.

[0067] In some embodiments, the execution entity can extract component nominal parameters from the circuit board two-dimensional image data based on the corresponding three-dimensional parameters of each component to generate a component nominal parameter set. The component nominal parameters in the component nominal parameter set can be the parsed electrical parameters marked on the corresponding components. In practice, the execution entity can directly perform character recognition or image recognition on the circuit board two-dimensional image data to obtain the nominal parameters of each component included in the image.

[0068] In some optional implementations of certain embodiments, the execution entity may perform component nominal parameter extraction processing on the two-dimensional image data of the circuit board according to the three-dimensional parameters of each corresponding component through the following steps to generate a set of component nominal parameters:

[0069] First, based on each component point cloud data group in the above component point cloud data set, perform the following image processing steps:

[0070] The first sub-step involves generating the component image coordinate region based on the component's 3D parameters corresponding to the aforementioned component point cloud data set. In practice, the execution entity can use the extrinsic parameter matrix of the spatial relationship between the determined industrial camera coordinate system and the point cloud coordinate system, and between the coordinate systems of each spectral confocal sensor and the unified 3D reference coordinate system, to convert the spatial bounding box range included by the aforementioned component's 3D parameters—that is, the maximum and minimum coordinate values ​​of the component represented by the aforementioned component point cloud data set in the X, Y, and Z axes—into the pixel coordinate range within the aforementioned 2D image of the circuit board as the component image coordinate region. This allows the determination of the projection area of ​​the corresponding component's 3D region onto the 2D image of the circuit board.

[0071] The second sub-step involves segmenting the 2D circuit board image represented by the aforementioned 2D circuit board image data according to the coordinate regions of the aforementioned component image, thereby obtaining component images. In practice, the executing entity can perform image segmentation on the 2D circuit board image represented by the aforementioned 2D circuit board image data according to the coordinate regions of the aforementioned component image, and use the segmented local images as component images. Optionally, the executing entity can also preprocess the aforementioned component images (e.g., histogram equalization or image denoising through median filtering).

[0072] The third sub-step involves performing nominal parameter recognition processing on the aforementioned component images to generate component parameter identification information. In practice, the executing entity can use a character recognition model to identify marking parameters such as silkscreen characters, model identifiers, capacity markings, and inductance values ​​present in the component images to obtain component parameter identification information. For example, the character recognition model can be an OCR model or a Transformer-based OCR model. The component parameter identification information can be the character information marked on the component.

[0073] The fourth sub-step involves parsing the characters based on the component parameter identification information to generate the component's nominal parameters. Typically, the electrical parameters marked on components are often in characters or use scientific notation, therefore they cannot be directly used after identification. Specifically, for capacitor components, a three-digit code is often used; a three-digit XYZ can represent: XY×10. Z For example, 104 can represent 10 × 10⁴. 4 =100000pF=0.1µF. For inductors, "4R7" can represent 4.7µH, and "100" can represent 10µH. In practice, the aforementioned execution entity can parse the component parameter identification information according to regular expressions and rule tables to generate the component nominal parameters. For example, pure numbers can be parsed according to the pF rule, the character "R" can be treated as a decimal point, values ​​containing characters "uH" or "mH" can be directly parsed into values ​​with units, and for characters containing package information (such as "C1005"), the package code can be directly extracted from the identified characters.

[0074] The second step is to determine the nominal parameters of each generated component as a set of nominal parameters for the components.

[0075] Step 105: Using an electrical parameter measuring device, measure the physical electrical parameters of each component on the target circuit board that corresponds to the three-dimensional parameters of each component, and obtain the set of component electrical parameters.

[0076] In some embodiments, the execution entity can use the electrical parameter measuring device to perform physical electrical parameter measurements on each component in the target circuit board corresponding to the three-dimensional parameters of each component, thereby obtaining a set of component electrical parameters. The component electrical parameters in the set of component electrical parameters can be the electrical parameters of the corresponding components (see details for reference). Figure 6 , Figure 7(The electrical parameters shown). The aforementioned electrical parameter measuring equipment can be a measuring instrument used for three-phase testing, single-phase testing, and current testing of components in a circuit board. In practice, firstly, for each component's three-dimensional parameters, the aforementioned execution entity can determine the corresponding component's "measurement contact point" or "measurement area" according to the component's centroid coordinates, spatial bounding box range (length L, width W, height H), component's major axis direction vector v1, component's width direction vector v2, and component's vertical direction vector v3. The aforementioned execution entity can determine that the angle between the normal vector of the target substrate plane and the component's vertical direction vector v3 is less than a preset tilt angle, and can determine that the corresponding component is basically consistent with the substrate direction of the circuit board. In the corresponding component point cloud data group, the minimum Z-axis coordinate is selected as the bottom position of the corresponding component. For chip capacitors and inductors, the component's major axis direction vector v1 can be extended by a length of L / 2, and the pad endpoints can be determined at both ends. The endpoints are then projected onto the substrate plane to form a contactable area. For cylindrical components, the lowest point or the positions of the solder feet at both ends can be found in the bottom contour as the measurement contact point. Finally, the aforementioned execution entity can output two or more precise three-dimensional measurement point coordinates for each component, and move to the corresponding position along the XY axis and downward along the Z axis via two independently movable probes until it contacts the pad (contact success can be determined by force sensor or contact resistance). Thus, the electrical parameters of the component are measured by the electrical parameter measurement equipment to obtain the electrical parameters of each component in the target circuit board.

[0077] Optionally, the determined "measurement contact point" or "measurement area" can be displayed on the host computer interface of the capacitance and inductance tester and marked in the camera's field of view. Thus, the operator can manually place the two probes on the two end pads of the corresponding component according to the interface instructions and trigger the test instrument to measure through the electrical parameter measurement equipment.

[0078] like Figure 3 As shown, the aforementioned electrical parameter measuring equipment can perform three-phase testing on components in the target circuit board. Specifically, as... Figure 3 As shown in (a), the aforementioned electrical parameter measuring equipment can perform three-phase Y-type or three-phase Δ-type tests on components in the target circuit board. The A, B, and C terminals of the measuring instrument are connected to the corresponding input terminals of the test sample (the instrument measurement mode should be selected as "Δ connection or Y connection"). When testing capacitance and inductance, the appropriate wiring method should be selected according to the actual circuit configuration. When using the instrument for testing, ensure that the A, B, and C terminals of the measuring instrument are correctly connected to the corresponding input terminals of the test sample. Figure 3As shown in (b), the aforementioned electrical parameter measuring equipment can perform three-phase YN-type tests on components in the target circuit board. The YN-type connection is also known as a star connection with a neutral point. In this connection method, the ends of the three phases are connected together to form a common point (i.e., the neutral point), while the other end of each phase is connected to the power supply or load. The A, B, C, and N terminals of the measuring instrument are connected to the test sample respectively (the instrument measurement mode is selected as "YN-type connection"). Figure 3 As shown in (c), the above-mentioned electrical parameter measuring equipment can perform three-phase type III tests on the components in the target circuit board. The measuring lines are connected from the output terminal of the measuring instrument according to the color corresponding to phases A, B, and C, and the three-phase current is clamped above the corresponding leads of the high-voltage capacitor bank.

[0079] The setup interface for the three tests performed by the aforementioned electrical parameter measuring equipment is as follows: Figure 5 As shown, clicking "Three-Phase Test" in the main menu will take you to the "Three-Phase Test - Settings" interface. The "Test Item Type" field allows you to select the type of test item (component), such as capacitor, inductor, resistor, or automatically select the component. The selected test item type (component type) should match the actual test item type; otherwise, measurement data may be incorrect or unstable. The "Connection Method" field allows you to select the connection method. Clicking the "▽" button allows you to select the measurement method, including Δ connection, Y connection, YN connection, and III connection. The rated frequency refers to the rated frequency of the tested item, not the instrument's output frequency. The rated frequency parameter is used when performing capacitive reactance calculations, inductive reactance calculations, and capacitance calculations. For example, if the rated frequency is set to 60Hz and the inductance value during inductance testing is 10mH, the inductive reactance value displayed by the instrument refers to the inductive reactance value of this inductor at 60Hz. The "Rated Capacity" field allows you to enter the rated capacity of the test item. The "Test Item Number" field allows you to enter the test item number. The "Substation Name" field is for entering the name of the substation for easy recording and archiving. The "Sample Model" field is for entering the model number of the sample for easy recording and archiving. The "Manufacturer" field is for entering the manufacturer of the sample for easy recording and archiving. The "Date of manufacture" field is for entering the date of manufacture of the sample for easy recording and archiving. The "Test Personnel" field is for entering the name of the test personnel for easy recording and archiving. The "Test" button is used to start the test. The "Exit" button is used to return to the previous menu interface.

[0080] The three-phase test display interface of the above-mentioned electrical parameter measuring equipment is as follows: Figure 6The diagram shows interfaces for capacitance, inductance, and resistance testing. Parameters include voltage, current, angle, frequency, impedance, resistance, phase capacitance, total capacitance, capacitive reactance, phase capacitance, total capacitance, inductive reactance, phase inductance, total inductance, and reactance. Voltage can be the measured RMS voltage values ​​of phases A, B, and C under current conditions. Current can be the measured RMS current values ​​of phases A, B, and C under current conditions. Angle can be the phase difference between voltage and current. Frequency can be the measurement frequency. Impedance can be the calculated impedance values ​​of the three phases. Resistance can be the calculated resistance values. Phase capacitance can be the calculated capacitance values ​​of the three phases. Total capacitance can be the calculated total capacitance value. Capacitive reactance can be the calculated capacitive reactance values ​​of the three phases. Phase capacitance can be the calculated capacitance values ​​of the three phases. Total capacitance can be the calculated total capacitance value. Inductive reactance can be the calculated inductive reactance values ​​of the three phases. Phase inductance can be the calculated inductance values ​​of the three phases. Total inductance can be the calculated total inductance value. Reactance can be the calculated reactance value.

[0081] like Figure 4 As shown, the aforementioned electrical parameter measuring equipment can perform single-phase and current tests on components in the target circuit board. Specifically, as... Figure 4 As shown in (a), the above-mentioned electrical parameter measuring equipment can perform external clamp meter testing (i.e., single-phase capacitor measurement) on components in the target circuit board. The measuring instrument uses the test terminals A (yellow) connected to one end of the test sample and N (black) connected to the other end, clamping the test sample with current. Figure 4 As shown in (b), the aforementioned electrical parameter measuring device can perform built-in CT testing on components in the target circuit board. For example... Figure 4 As shown in (c), the above-mentioned electrical parameter measuring equipment can also use a matching clamp-on current transformer to perform current measurement independently, without the need to connect test leads when performing current measurement.

[0082] The single-phase test display interface of the above-mentioned electrical parameter measuring equipment is as follows: Figure 7 As shown, the interface also includes interfaces for capacitance, inductance, and resistance testing. The parameters in the diagram include voltage, current, angle, frequency, resistance, capacitive reactance, capacitance, capacitance, impedance, inductive reactance, inductance, and reactance. Voltage can be the measured RMS voltage value under current conditions. Current can be the measured RMS current value under current conditions. Angle can be the phase difference between voltage and current. Frequency can be the measured frequency. Resistance can be the calculated resistance value. Capacitive reactance can be the calculated capacitive reactance value. Capacitance can be the calculated capacitance value. Impedance can be the calculated impedance value. Inductive reactance can be the calculated inductive reactance value. Inductance can be the calculated inductance value. Reactance can be the calculated reactance value.

[0083] Step 106: Based on the component electrical parameter set and the component nominal parameter set, perform simulation modeling on the component point cloud data set to obtain the three-dimensional model of the circuit board.

[0084] In some embodiments, the execution entity can perform simulation modeling on the component point cloud data set based on the component electrical parameter set and the component nominal parameter set to obtain a 3D model of the circuit board. In practice, the execution entity can use a 3D modeling tool to perform 3D modeling on the component point cloud data set to obtain a 3D model of the circuit board. As an example, the 3D modeling tool can be SolidWorks or Geomagic Design X.

[0085] In some optional implementations of certain embodiments, the execution entity may perform simulation modeling on the component point cloud data set based on the component electrical parameter set and the component nominal parameter set to obtain a three-dimensional model of the circuit board, including:

[0086] The first step is to perform the following steps for each component point cloud data group in the above component point cloud data group set:

[0087] The first sub-step involves geometric fitting of the aforementioned component point cloud data set to construct a 3D model of the component. In practice, the execution entity can use the RANSAC algorithm to perform geometric fitting on the component entity represented by the component point cloud data set to obtain the 3D model of the component. For example, for common chip capacitors and inductors, a cuboid or cylinder can be used as the model. By determining the minimum and maximum values ​​of the corresponding component in the X, Y, and Z axes through the bounding box range of the corresponding 3D parameters, the length, width, and height of the component are determined.

[0088] The second sub-step involves binding the electrical parameters of the components in the aforementioned component electrical parameter set, which correspond to the aforementioned component point cloud data group, to the aforementioned component 3D model.

[0089] The second step is to construct a substrate plane model based on the determined target substrate plane. In practice, the aforementioned execution entity can construct a basic flat geometry with the same size as the PCB board at the target reference plane location using the component point cloud data group with the corresponding component type of PCB substrate, given the known position of the circuit board substrate plane (i.e., the aforementioned target reference plane) and the size of the PCB board.

[0090] The third step involves combining the constructed 3D models of each component into the aforementioned substrate planar model according to the posture represented by the corresponding 3D parameters of the component, thus obtaining the 3D model of the circuit board. In practice, for each constructed 3D model of a component, the execution entity can determine the spatial posture of the 3D model of the component in the aforementioned unified 3D coordinate system according to the corresponding 3D parameters of the component, including the 3D coordinates of the component's centroid, the major axis vector of the component, the width vector of the component, and the vertical vector of the component, and place the 3D model of the component on the aforementioned substrate planar model at the same position as the component's centroid coordinates according to the aforementioned spatial posture. Then, the execution entity can determine the combined 3D model as the 3D model of the circuit board.

[0091] Step 107: Generate circuit board component detection information based on the component electrical parameter set, component nominal parameter set, and circuit board 3D model.

[0092] In some embodiments, the execution entity can generate circuit board component detection information based on the component electrical parameter set, the component nominal parameter set, and the circuit board 3D model. In practice, the execution entity can determine whether the component nominal parameters bound to each component 3D model of the circuit board 3D model are the same as the measured component electrical parameters, and generate circuit board component detection information indicating whether there are parameter anomalies.

[0093] In some optional implementations of certain embodiments, the execution entity can generate circuit board component detection information based on the aforementioned set of component electrical parameters, the aforementioned set of component nominal parameters, and the aforementioned three-dimensional model of the circuit board through the following steps:

[0094] The first step involves performing component geometric state detection on the 3D model of the circuit board based on the constructed substrate planar model and the aforementioned component point cloud data set, thereby generating component geometric state detection information. In practice, firstly, for each component 3D model included in the circuit board 3D model, the executing entity can determine the vertical distance between the centroid of the component 3D model and the substrate planar model as the bottom spacing. Then, in response to determining that the bottom spacing meets the distance difference condition, the bottom spacing is marked as an abnormal bottom spacing. The distance difference condition can be that the bottom spacing deviates from the bottom spacing corresponding to any component of the same type by more than 10%. Secondly, the executing entity can use the angle between the vertical direction vector of the component corresponding to the component 3D model and the normal vector of the determined target reference plane as the component tilt angle. Then, in response to determining that the component tilt angle is greater than or equal to a preset angle threshold, the executing entity can mark the component tilt angle as an abnormal component tilt angle. Next, the executing entity can project the component 3D model onto the target reference plane and determine the model projection area. In response to determining that the model projection area meets the projection difference condition, the model projection area is marked as an abnormal model projection area. The aforementioned projection difference condition can be that the projected area of ​​the model deviates from the projected area of ​​any other component of the same type by more than 10%. Finally, the executing entity can determine the bottom spacing, component tilt angle, and model projected area as component geometric state detection information. Thus, by using the bottom spacing, component tilt angle, and model projected area, it is possible to determine whether the corresponding component has any issues such as warping, tilting, or positional offset in its geometric shape.

[0095] The second step involves performing component layout detection on the aforementioned 3D model of the circuit board based on the set of nominal parameters and the 3D parameters of each component, to generate component layout detection information. In practice, firstly, the executing entity can determine the distance between the center points (distance between centroids), the nearest horizontal distance, and the nearest vertical (height) distance between any two adjacent 3D models of components in the circuit board 3D model, using the centroid coordinates and bounding box range of each component's 3D parameters. Then, for each determined distance between adjacent components, in response to the determination that there is a distance value less than or equal to an adjacency distance threshold (e.g., 0.5 mm), the determined distance is marked as abnormal adjacent component distance information. Finally, the executing entity can determine the distance between the center points (distance between centroids), the nearest horizontal distance, and the nearest vertical (height) distance between any two 3D models of the same component type in the circuit board 3D model as the distance information for components of the same type. Next, for each determined distance information of similar components, in response to the determination that there is a distance value less than or equal to a similar distance threshold (e.g., 2 mm) in the aforementioned similar component distance information, the aforementioned similar component distance information is marked as abnormal similar component distance information. Thus, by using the distance information of each adjacent component and the distance information of each similar component, it is possible to determine whether the components in the target circuit board are excessively crowded, whether there is a soldering risk, or whether there is assembly interference. Finally, the aforementioned executing entity can determine the determined distance information of each adjacent component and the distance information of each similar component as component layout detection information.

[0096] The third step involves generating component modal inspection information based on the aforementioned set of component electrical parameters, the aforementioned set of component nominal parameters, the aforementioned component layout detection information, and the aforementioned component geometric state detection information. Specifically, for each adjacent component 3D model in the aforementioned circuit board 3D model, firstly, the executing entity can determine whether the measured component electrical parameters corresponding to the aforementioned component 3D model are within the error range corresponding to the component nominal parameters bound to the aforementioned component 3D model (e.g., the difference between parameters is within ±20%). Then, in response to determining that the measured component electrical parameters are not within the error range corresponding to the component nominal parameters bound to the aforementioned component 3D model, it is determined whether there are outliers in the aforementioned component layout detection information and the aforementioned component geometric state detection information (i.e., abnormal bottom spacing, abnormal component tilt angle, abnormal model projection area, abnormal adjacent component distance information, abnormal similar component distance information). Subsequently, in response to determining that there are outliers in the aforementioned component layout detection information and / or the aforementioned component geometric state detection information, the corresponding outliers and the measured component electrical parameters are determined as component modal inspection information. Finally, in response to the determination that there are no outliers in the above component layout detection information and / or the above component geometric state detection information, the corresponding measured component electrical parameters can be individually determined as component modal inspection information.

[0097] In practice, when components exhibit geometric anomalies (i.e., offset, tilt, or slant) or layout abnormalities, they often lead to abnormal electrical parameters. For example, tilting may result in lower capacitance values, slant may cause poor pin contact, and offset may lead to solder joint breakage. Adjacent inductors that are too close together may experience magnetic coupling, causing inductance measurement deviations; capacitors that are excessively close to heat-generating devices may introduce temperature drift. Therefore, when the measured electrical parameters of a component are abnormal, the cause of the abnormality can be preliminarily determined by correlating the component's geometric state and layout state. This allows the geometric or layout anomaly to be output together with the electrical anomaly as a composite anomaly status.

[0098] The fourth step is to determine the generated component geometric state detection information, circuit board layout detection information, and component modal inspection information as circuit board component detection information.

[0099] The various embodiments of this disclosure have the following beneficial effects: the capacitor and inductor positioning and detection methods of some embodiments of this disclosure can accurately determine the spatial position of capacitors and inductors in a unified three-dimensional coordinate system, thereby realizing the associated execution of component positioning and electrical measurement, and thus improving the efficiency of circuit board inspection. Specifically, the reason for the low efficiency of related circuit board inspection is that two-dimensional images only provide planar positions and cannot reflect the true three-dimensional positions of capacitors and inductors, which easily leads to measurement point positioning errors. Moreover, in densely populated areas of components, it is difficult to accurately distinguish adjacent components based on two-dimensional images, which easily leads to measurement confusion or omissions. Based on this, the capacitor and inductor positioning and detection methods of some embodiments of this disclosure firstly use a three-dimensional scanning device and an image acquisition device included in a capacitor and inductor tester to perform multi-dimensional data acquisition on the target circuit board, obtaining three-dimensional point cloud data and two-dimensional image data of the circuit board. The capacitor and inductor tester also includes an electrical parameter measurement device. Thus, the true spatial shape and height information of components in the circuit board can be determined by the three-dimensional point cloud data, and the appearance and nominal information of the components can be determined by the two-dimensional image data of the circuit board. Then, based on the image acquisition device and the 2D image data of the circuit board, the 3D point cloud data of the circuit board is registered and fused to obtain processed point cloud data. This establishes a spatial correspondence between the 2D pixel plane and the 3D point cloud, allowing the pixel position of each component in the circuit board image to be mapped to a specific 3D region in the point cloud. Next, the processed circuit board point cloud data is clustered to generate a set of component point cloud data groups, where each group corresponds to a 3D parameter of a component. Thus, by representing a physical component with each point cloud group, the 3D parameters such as the center position, volume, and outline of each component are determined. Next, based on the corresponding 3D parameters of each component, the nominal parameters of the circuit board 2D image data are extracted to generate a set of nominal parameters. This allows the 3D component region to be used as a mask on the 2D image of the circuit board, enabling the extraction of image regions of each component, distinguishing adjacent components, reducing component confusion or omission, and obtaining the nominal parameters of each component. Next, using the aforementioned electrical parameter measurement equipment, the physical electrical parameters of each component on the target circuit board corresponding to the three-dimensional parameters of each of the aforementioned components are measured, resulting in a set of component electrical parameters. Thus, given the three-dimensional position and nominal parameters, electrical measurements can be performed on each component to obtain its electrical parameters. Then, based on the aforementioned set of component electrical parameters and the aforementioned set of component nominal parameters, simulation modeling is performed on the aforementioned set of component point cloud data to obtain a three-dimensional model of the circuit board. This allows the construction of a three-dimensional circuit board model with electrical attribute parameters. Finally, based on the aforementioned set of component electrical parameters, the aforementioned set of component nominal parameters, and the aforementioned three-dimensional model of the circuit board, circuit board component detection information is generated.Therefore, it is possible to determine whether the nominal and measured values ​​of components in the target circuit board match and whether their distribution is reasonable, thereby obtaining circuit board component detection information. This enables the sequential execution of component positioning, electrical measurement, and circuit board detection, thereby improving circuit board detection efficiency.

[0100] Further reference Figure 8 As an implementation of the methods shown in the above figures, this disclosure provides some embodiments of a capacitance and inductance positioning detection device, which are similar to... Figure 1 Corresponding to the method embodiments shown, this capacitance and inductance positioning detection device can be specifically applied to various electronic devices.

[0101] like Figure 8 As shown, the capacitance and inductance positioning and detection device 800 in some embodiments includes: a multi-dimensional data acquisition unit 801, a registration and fusion unit 802, a point cloud clustering unit 803, an extraction unit 804, an electrical parameter measurement unit 805, a simulation modeling unit 806, and a generation unit 807. The multi-dimensional data acquisition unit 801 is configured to perform multi-dimensional data acquisition on the target circuit board using a three-dimensional scanning device and an image acquisition device included in the capacitance and inductance tester, obtaining three-dimensional point cloud data and two-dimensional image data of the circuit board. The capacitance and inductance tester also includes an electrical parameter measurement device. The registration and fusion unit 802 is configured to perform registration and fusion processing on the three-dimensional point cloud data of the circuit board based on the image acquisition device and the two-dimensional image data of the circuit board, obtaining processed point cloud data of the circuit board. The point cloud clustering unit 803 is configured to perform component point cloud clustering on the processed point cloud data of the circuit board to generate a set of component point cloud data groups, wherein each component point cloud data group corresponds to a component three-dimensional parameter. The extraction unit 804 is configured to... The circuit board is configured to extract nominal parameters from the 2D image data of the circuit board based on the corresponding 3D parameters of each component to generate a set of nominal parameters of the components; the electrical parameter measurement unit 805 is configured to measure the physical electrical parameters of each component in the target circuit board corresponding to the 3D parameters of each component through the electrical parameter measurement device to obtain a set of component electrical parameters; the simulation modeling unit 806 is configured to perform simulation modeling on the set of component point cloud data based on the set of component electrical parameters and the set of component nominal parameters to obtain a 3D model of the circuit board; and the generation unit 807 is configured to generate circuit board component detection information based on the set of component electrical parameters, the set of component nominal parameters, and the 3D model of the circuit board.

[0102] It is understandable that the units described in the capacitance and inductance positioning detection device 800 are related to the reference. Figure 1The steps in the described method correspond accordingly. Therefore, the operations, features, and beneficial effects described above for the method also apply to the capacitance and inductance positioning detection device 800 and the units contained therein, and will not be repeated here.

[0103] The following is for reference. Figure 9 It shows a schematic diagram of the structure of an electronic device 900 (e.g., a computing device) suitable for implementing some embodiments of the present disclosure. Figure 9 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments of this disclosure.

[0104] like Figure 9 As shown, the electronic device 900 may include a processing unit 901 (e.g., a central processing unit, a graphics processor, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 902 or a program loaded from a storage device 908 into a random access memory (RAM) 903. The RAM 903 also stores various programs and data required for the operation of the electronic device 900. The processing unit 901, ROM 902, and RAM 903 are interconnected via a bus 904. An input / output (I / O) interface 905 is also connected to the bus 904.

[0105] Typically, the following devices can be connected to I / O interface 905: input devices 906 including, for example, touchscreens, touchpads, keyboards, mice, cameras, microphones, accelerometers, gyroscopes, etc.; output devices 907 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 908 including, for example, magnetic tapes, hard disks, etc.; and communication devices 909. Communication device 909 allows electronic device 900 to communicate wirelessly or wiredly with other devices to exchange data. Although Figure 9 An electronic device 900 with various devices is shown; however, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively. Figure 9 Each box shown can represent a device or multiple devices as needed.

[0106] In particular, according to some embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, some embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device 909, or installed from a storage device 908, or installed from a ROM 902. When the computer program is executed by the processing device 901, it performs the functions defined in the methods of some embodiments of this disclosure.

[0107] It should be noted that, in some embodiments of this disclosure, the computer-readable medium may be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium may be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In some embodiments of this disclosure, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In some embodiments of this disclosure, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (radio frequency), etc., or any suitable combination thereof.

[0108] In some implementations, clients and servers can communicate using any currently known or future-developed network protocol such as HTTP (Hypertext Transfer Protocol) and can interconnect with digital data communication (e.g., communication networks) of any form or medium. Examples of communication networks include local area networks (“LANs”), wide area networks (“WANs”), the Internet (e.g., the Internet of Things), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future-developed networks.

[0109] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device. The aforementioned computer-readable medium carries one or more programs that, when executed by the electronic device, cause the electronic device to: perform multi-dimensional data acquisition on the target circuit board using a capacitance and inductance tester including a 3D scanning device and an image acquisition device, obtaining 3D point cloud data and 2D image data of the circuit board, wherein the capacitance and inductance tester further includes an electrical parameter measuring device; perform registration and fusion processing on the 3D point cloud data of the circuit board based on the image acquisition device and the 2D image data of the circuit board, obtaining processed circuit board point cloud data; and perform component point cloud clustering on the processed circuit board point cloud data to generate a set of component point cloud data groups, wherein each Each component point cloud data set corresponds to a component 3D parameter. Based on the corresponding 3D parameters of each component, the nominal parameters of the component are extracted from the 2D image data of the circuit board to generate a set of nominal parameters. Using the electrical parameter measurement equipment, the physical electrical parameters of each component in the target circuit board corresponding to the 3D parameters of each component are measured to obtain a set of component electrical parameters. Based on the set of component electrical parameters and the set of component nominal parameters, the component point cloud data set is simulated and modeled to obtain a 3D model of the circuit board. Based on the set of component electrical parameters, the set of component nominal parameters, and the 3D model of the circuit board, circuit board component detection information is generated.

[0110] Computer program code for performing operations of some embodiments of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0111] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0112] The functions described above in this document can be performed at least in part by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), and so on.

[0113] The above description is merely a selection of preferred embodiments of this disclosure and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in the embodiments of this disclosure is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described inventive concept. For example, technical solutions formed by substituting the above-described features with (but not limited to) technical features with similar functions disclosed in the embodiments of this disclosure.

Claims

1. A method for capacitive inductive positioning detection, applied to a capacitive inductive tester, characterized in that, The method comprises the following steps: acquiring three-dimensional point cloud data and two-dimensional image data of a target circuit board through a three-dimensional scanning device and an image acquisition device included in a capacitance and inductance tester, wherein the capacitance and inductance tester further comprises an electrical parameter measuring device; mapping each two-dimensional image pixel coordinate included in the two-dimensional image data of the circuit board to a point cloud coordinate system corresponding to the three-dimensional point cloud data of the circuit board according to camera calibration parameters corresponding to the image acquisition device, so as to update the three-dimensional point cloud data of the circuit board; performing substrate fitting conversion on the updated three-dimensional point cloud data of the circuit board to obtain processed circuit board point cloud data, wherein the processed circuit board point cloud data is located in a unified three-dimensional coordinate system; for each processed circuit board point cloud in the processed circuit board point cloud data, performing the following feature extraction steps: determining a set of adjacent circuit board point clouds corresponding to the processed circuit board point cloud; determining a coordinate covariance matrix corresponding to the processed circuit board point cloud according to the set of adjacent circuit board point clouds; generating point cloud feature information according to the coordinate covariance matrix; constructing a circuit board point cloud graph according to the determined set of adjacent circuit board point clouds and the processed circuit board point cloud data; inputting the circuit board point cloud graph and each point cloud feature information into a circuit board point cloud classification model to generate each point cloud classification label; classifying the processed circuit board point cloud data according to the point cloud classification labels to obtain a set of homogeneous point cloud data groups; performing clustering processing on each homogeneous point cloud data group in the set of homogeneous point cloud data groups to generate each component point cloud data group, obtain a set of component point cloud data groups, and determine a component three-dimensional parameter corresponding to a component represented by each component point cloud data group in the set of component point cloud data groups; performing component point cloud clustering on the processed circuit board point cloud data to generate a set of component point cloud data groups, wherein each component point cloud data group corresponds to a component three-dimensional parameter; performing component nominal parameter extraction processing on the circuit board two-dimensional image data according to the corresponding component three-dimensional parameters to generate a set of component nominal parameters; measuring the entity electrical parameters of each component corresponding to the component three-dimensional parameters in the target circuit board through the electrical parameter measuring device to obtain a set of component electrical parameters; performing simulation modeling on the set of component point cloud data groups according to the set of component electrical parameters and the set of component nominal parameters to obtain a circuit board three-dimensional model; generating circuit board component detection information according to the set of component electrical parameters, the set of component nominal parameters and the circuit board three-dimensional model.

2. The method of claim 1, wherein, The method further comprises the following steps: performing background point cloud elimination on the updated three-dimensional point cloud data of the circuit board to update the three-dimensional point cloud data of the circuit board; based on the updated three-dimensional point cloud data of the circuit board, performing the following substrate fitting steps: selecting three three-dimensional point cloud data of the circuit board satisfying a plane condition from the three-dimensional point cloud data of the circuit board; determine a substrate plane according to the selected three circuit board three-dimensional point cloud data; determine each point cloud substrate distance corresponding to the circuit board three-dimensional point cloud data according to the determined substrate plane; determine the number of inliers according to the determined each point cloud substrate distance and the first error distance threshold; in response to determining that the number of times of performing the substrate fitting step is less than or equal to the preset iteration number, execute the substrate fitting step again; determine the substrate plane corresponding to the maximum number of inliers in the determined each number of inliers as a candidate substrate plane; perform conversion processing on the updated circuit board three-dimensional point cloud data according to the candidate substrate plane to obtain processed circuit board point cloud data.

3. The method of claim 2, wherein, The conversion processing on the updated circuit board three-dimensional point cloud data according to the candidate substrate plane to obtain processed circuit board point cloud data comprises: perform denoising processing on the updated circuit board three-dimensional point cloud data according to the candidate substrate plane and a second error distance threshold to determine target circuit board three-dimensional point cloud data, wherein the second error distance threshold is less than the first error distance threshold; determine a target substrate plane according to the target circuit board three-dimensional point cloud data; perform coordinate system conversion processing on the target circuit board three-dimensional point cloud data according to the target substrate plane to obtain processed circuit board point cloud data, wherein the processed circuit board point cloud data is in a three-dimensional coordinate system corresponding to the target substrate plane.

4. The method of claim 3, wherein, The component nominal parameter extraction processing on the circuit board two-dimensional image data according to the corresponding each component three-dimensional parameter comprises: perform the following image processing steps based on each component point cloud data group in the component point cloud data group set: generate a component image coordinate region according to the component three-dimensional parameter corresponding to the component point cloud data group; segment the circuit board two-dimensional image represented by the circuit board two-dimensional image data according to the component image coordinate region to obtain a component image; perform nominal parameter identification processing on the component image to generate component nominal parameter identification information; perform character analysis according to the component nominal parameter identification information to generate component nominal parameters; determine each generated component nominal parameter as a component nominal parameter set.

5. The method of claim 4, wherein, The simulation modeling on the component point cloud data group set according to the component electrical parameter set and the component nominal parameter set to obtain a circuit board three-dimensional model comprises: perform the following steps for each component point cloud data group in the component point cloud data group set: perform geometric fitting processing on the component point cloud data group to construct a component three-dimensional model; bind the component electrical parameter corresponding to the component point cloud data group in the component electrical parameter set to the component three-dimensional model; construct a substrate plane model according to the determined target substrate plane; combine each constructed component three-dimensional model to the substrate plane model according to the attitude represented by the corresponding component three-dimensional parameter to obtain a circuit board three-dimensional model.

6. A capacitive inductive position detection device, characterized by comprises: The multi-dimensional data acquisition unit is configured to acquire multi-dimensional data of a target circuit board by a three-dimensional scanning device and an image acquisition device included in the capacitance and inductance tester, to obtain three-dimensional point cloud data and two-dimensional image data of the circuit board, wherein the capacitance and inductance tester further includes an electrical parameter measurement device; The registration and fusion unit is configured to map each two-dimensional image pixel coordinate included in the two-dimensional image data of the circuit board to a point cloud coordinate system corresponding to the three-dimensional point cloud data of the circuit board according to camera calibration parameters corresponding to the image acquisition device, to update the three-dimensional point cloud data of the circuit board; and perform substrate fitting conversion on the updated three-dimensional point cloud data of the circuit board, to obtain processed circuit board point cloud data, wherein the processed circuit board point cloud data is located in a unified three-dimensional coordinate system; The point cloud clustering unit is configured to, for each processed circuit board point cloud in the processed circuit board point cloud data, perform the following feature extraction steps: determine a set of adjacent circuit board point clouds corresponding to the processed circuit board point cloud; determine a coordinate covariance matrix corresponding to the processed circuit board point cloud according to the set of adjacent circuit board point clouds; generate point cloud feature information according to the coordinate covariance matrix; construct a circuit board point cloud graph according to each set of adjacent circuit board point clouds and the processed circuit board point cloud data; input the circuit board point cloud graph and each point cloud feature information into a circuit board point cloud classification model, to generate each point cloud classification label; classify the processed circuit board point cloud data according to the point cloud classification labels, to obtain a set of homogeneous point cloud data groups; perform clustering processing on each homogeneous point cloud data group in the set of homogeneous point cloud data groups, to generate each component point cloud data group, obtain a set of component point cloud data groups, and determine a component three-dimensional parameter corresponding to a component represented by each component point cloud data group in the set of component point cloud data groups; The extraction unit is configured to perform component nominal parameter extraction processing on the two-dimensional image data of the circuit board according to each component three-dimensional parameter corresponding thereto, to generate a set of component nominal parameters; The electrical parameter measurement unit is configured to perform entity electrical parameter measurement on each component in the target circuit board corresponding to each component three-dimensional parameter by the electrical parameter measurement device, to obtain a set of component electrical parameters; The simulation modeling unit is configured to perform simulation modeling on the set of component point cloud data groups according to the set of component electrical parameters and the set of component nominal parameters, to obtain a three-dimensional model of the circuit board; The production unit is configured to generate circuit board component detection information according to the set of component electrical parameters, the set of component nominal parameters, and the three-dimensional model of the circuit board.

7. An electronic device, comprising: comprise: one or more processors; a memory device having one or more programs stored thereon; when the one or more programs are executed by the one or more processors, the one or more processors implement the method of any one of claims 1 to 5.

8. A computer readable medium characterized by A computer program product, comprising a computer readable medium having stored thereon the computer program, wherein the computer program is executable by a processor to implement the method according to any one of claims 1 to 5.

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